1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc -mtriple=thumbv8.1m.main-arm-none-eabi -mattr=+mve,+fullfp16 -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-LE
3 ; RUN: llc -mtriple=thumbebv8.1m.main-arm-none-eabi -mattr=+mve,+fullfp16 -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-BE
5 define void @foo_v4i32_v4i32(<4 x i32> *%dest, <4 x i32> *%mask, <4 x i32> *%src) {
6 ; CHECK-LABEL: foo_v4i32_v4i32:
7 ; CHECK: @ %bb.0: @ %entry
9 ; CHECK-NEXT: sub sp, #8
10 ; CHECK-NEXT: vldrw.u32 q0, [r1]
11 ; CHECK-NEXT: movs r3, #0
12 ; CHECK-NEXT: vcmp.s32 gt, q0, zr
13 ; CHECK-NEXT: @ implicit-def: $q0
14 ; CHECK-NEXT: vmrs r12, p0
15 ; CHECK-NEXT: and r1, r12, #1
16 ; CHECK-NEXT: rsbs r1, r1, #0
17 ; CHECK-NEXT: bfi r3, r1, #0, #1
18 ; CHECK-NEXT: ubfx r1, r12, #4, #1
19 ; CHECK-NEXT: rsbs r1, r1, #0
20 ; CHECK-NEXT: bfi r3, r1, #1, #1
21 ; CHECK-NEXT: ubfx r1, r12, #8, #1
22 ; CHECK-NEXT: rsbs r1, r1, #0
23 ; CHECK-NEXT: bfi r3, r1, #2, #1
24 ; CHECK-NEXT: ubfx r1, r12, #12, #1
25 ; CHECK-NEXT: rsbs r1, r1, #0
26 ; CHECK-NEXT: bfi r3, r1, #3, #1
27 ; CHECK-NEXT: and r1, r3, #15
28 ; CHECK-NEXT: lsls r3, r1, #31
30 ; CHECK-NEXT: ldrne r3, [r2]
31 ; CHECK-NEXT: vmovne.32 q0[0], r3
32 ; CHECK-NEXT: lsls r3, r1, #30
34 ; CHECK-NEXT: ldrmi r3, [r2, #4]
35 ; CHECK-NEXT: vmovmi.32 q0[1], r3
36 ; CHECK-NEXT: lsls r3, r1, #29
38 ; CHECK-NEXT: ldrmi r3, [r2, #8]
39 ; CHECK-NEXT: vmovmi.32 q0[2], r3
40 ; CHECK-NEXT: lsls r1, r1, #28
42 ; CHECK-NEXT: ldrmi r1, [r2, #12]
43 ; CHECK-NEXT: vmovmi.32 q0[3], r1
44 ; CHECK-NEXT: vmrs r2, p0
45 ; CHECK-NEXT: movs r1, #0
46 ; CHECK-NEXT: and r3, r2, #1
47 ; CHECK-NEXT: rsbs r3, r3, #0
48 ; CHECK-NEXT: bfi r1, r3, #0, #1
49 ; CHECK-NEXT: ubfx r3, r2, #4, #1
50 ; CHECK-NEXT: rsbs r3, r3, #0
51 ; CHECK-NEXT: bfi r1, r3, #1, #1
52 ; CHECK-NEXT: ubfx r3, r2, #8, #1
53 ; CHECK-NEXT: ubfx r2, r2, #12, #1
54 ; CHECK-NEXT: rsbs r3, r3, #0
55 ; CHECK-NEXT: bfi r1, r3, #2, #1
56 ; CHECK-NEXT: rsbs r2, r2, #0
57 ; CHECK-NEXT: bfi r1, r2, #3, #1
58 ; CHECK-NEXT: and r1, r1, #15
59 ; CHECK-NEXT: lsls r2, r1, #31
61 ; CHECK-NEXT: vmovne r2, s0
62 ; CHECK-NEXT: strne r2, [r0]
63 ; CHECK-NEXT: lsls r2, r1, #30
65 ; CHECK-NEXT: vmovmi r2, s1
66 ; CHECK-NEXT: strmi r2, [r0, #4]
67 ; CHECK-NEXT: lsls r2, r1, #29
69 ; CHECK-NEXT: vmovmi r2, s2
70 ; CHECK-NEXT: strmi r2, [r0, #8]
71 ; CHECK-NEXT: lsls r1, r1, #28
73 ; CHECK-NEXT: vmovmi r1, s3
74 ; CHECK-NEXT: strmi r1, [r0, #12]
75 ; CHECK-NEXT: add sp, #8
78 %0 = load <4 x i32>, <4 x i32>* %mask, align 4
79 %1 = icmp sgt <4 x i32> %0, zeroinitializer
80 %2 = call <4 x i32> @llvm.masked.load.v4i32(<4 x i32>* %src, i32 4, <4 x i1> %1, <4 x i32> undef)
81 call void @llvm.masked.store.v4i32(<4 x i32> %2, <4 x i32>* %dest, i32 4, <4 x i1> %1)
85 define void @foo_sext_v4i32_v4i8(<4 x i32> *%dest, <4 x i32> *%mask, <4 x i8> *%src) {
86 ; CHECK-LABEL: foo_sext_v4i32_v4i8:
87 ; CHECK: @ %bb.0: @ %entry
89 ; CHECK-NEXT: sub sp, #8
90 ; CHECK-NEXT: vldrw.u32 q0, [r1]
91 ; CHECK-NEXT: movs r3, #0
92 ; CHECK-NEXT: vcmp.s32 gt, q0, zr
93 ; CHECK-NEXT: @ implicit-def: $q0
94 ; CHECK-NEXT: vmrs r12, p0
95 ; CHECK-NEXT: and r1, r12, #1
96 ; CHECK-NEXT: rsbs r1, r1, #0
97 ; CHECK-NEXT: bfi r3, r1, #0, #1
98 ; CHECK-NEXT: ubfx r1, r12, #4, #1
99 ; CHECK-NEXT: rsbs r1, r1, #0
100 ; CHECK-NEXT: bfi r3, r1, #1, #1
101 ; CHECK-NEXT: ubfx r1, r12, #8, #1
102 ; CHECK-NEXT: rsbs r1, r1, #0
103 ; CHECK-NEXT: bfi r3, r1, #2, #1
104 ; CHECK-NEXT: ubfx r1, r12, #12, #1
105 ; CHECK-NEXT: rsbs r1, r1, #0
106 ; CHECK-NEXT: bfi r3, r1, #3, #1
107 ; CHECK-NEXT: and r1, r3, #15
108 ; CHECK-NEXT: lsls r3, r1, #31
110 ; CHECK-NEXT: ldrbne r3, [r2]
111 ; CHECK-NEXT: vmovne.32 q0[0], r3
112 ; CHECK-NEXT: lsls r3, r1, #30
114 ; CHECK-NEXT: ldrbmi r3, [r2, #1]
115 ; CHECK-NEXT: vmovmi.32 q0[1], r3
116 ; CHECK-NEXT: lsls r3, r1, #29
118 ; CHECK-NEXT: ldrbmi r3, [r2, #2]
119 ; CHECK-NEXT: vmovmi.32 q0[2], r3
120 ; CHECK-NEXT: lsls r1, r1, #28
122 ; CHECK-NEXT: ldrbmi r1, [r2, #3]
123 ; CHECK-NEXT: vmovmi.32 q0[3], r1
124 ; CHECK-NEXT: vmrs r2, p0
125 ; CHECK-NEXT: movs r1, #0
126 ; CHECK-NEXT: vmovlb.s8 q0, q0
127 ; CHECK-NEXT: vmovlb.s16 q0, q0
128 ; CHECK-NEXT: and r3, r2, #1
129 ; CHECK-NEXT: rsbs r3, r3, #0
130 ; CHECK-NEXT: bfi r1, r3, #0, #1
131 ; CHECK-NEXT: ubfx r3, r2, #4, #1
132 ; CHECK-NEXT: rsbs r3, r3, #0
133 ; CHECK-NEXT: bfi r1, r3, #1, #1
134 ; CHECK-NEXT: ubfx r3, r2, #8, #1
135 ; CHECK-NEXT: ubfx r2, r2, #12, #1
136 ; CHECK-NEXT: rsbs r3, r3, #0
137 ; CHECK-NEXT: bfi r1, r3, #2, #1
138 ; CHECK-NEXT: rsbs r2, r2, #0
139 ; CHECK-NEXT: bfi r1, r2, #3, #1
140 ; CHECK-NEXT: and r1, r1, #15
141 ; CHECK-NEXT: lsls r2, r1, #31
143 ; CHECK-NEXT: vmovne r2, s0
144 ; CHECK-NEXT: strne r2, [r0]
145 ; CHECK-NEXT: lsls r2, r1, #30
147 ; CHECK-NEXT: vmovmi r2, s1
148 ; CHECK-NEXT: strmi r2, [r0, #4]
149 ; CHECK-NEXT: lsls r2, r1, #29
151 ; CHECK-NEXT: vmovmi r2, s2
152 ; CHECK-NEXT: strmi r2, [r0, #8]
153 ; CHECK-NEXT: lsls r1, r1, #28
155 ; CHECK-NEXT: vmovmi r1, s3
156 ; CHECK-NEXT: strmi r1, [r0, #12]
157 ; CHECK-NEXT: add sp, #8
160 %0 = load <4 x i32>, <4 x i32>* %mask, align 4
161 %1 = icmp sgt <4 x i32> %0, zeroinitializer
162 %2 = call <4 x i8> @llvm.masked.load.v4i8(<4 x i8>* %src, i32 1, <4 x i1> %1, <4 x i8> undef)
163 %3 = sext <4 x i8> %2 to <4 x i32>
164 call void @llvm.masked.store.v4i32(<4 x i32> %3, <4 x i32>* %dest, i32 4, <4 x i1> %1)
168 define void @foo_sext_v4i32_v4i16(<4 x i32> *%dest, <4 x i32> *%mask, <4 x i16> *%src) {
169 ; CHECK-LABEL: foo_sext_v4i32_v4i16:
170 ; CHECK: @ %bb.0: @ %entry
171 ; CHECK-NEXT: .pad #8
172 ; CHECK-NEXT: sub sp, #8
173 ; CHECK-NEXT: vldrw.u32 q0, [r1]
174 ; CHECK-NEXT: movs r3, #0
175 ; CHECK-NEXT: vcmp.s32 gt, q0, zr
176 ; CHECK-NEXT: @ implicit-def: $q0
177 ; CHECK-NEXT: vmrs r12, p0
178 ; CHECK-NEXT: and r1, r12, #1
179 ; CHECK-NEXT: rsbs r1, r1, #0
180 ; CHECK-NEXT: bfi r3, r1, #0, #1
181 ; CHECK-NEXT: ubfx r1, r12, #4, #1
182 ; CHECK-NEXT: rsbs r1, r1, #0
183 ; CHECK-NEXT: bfi r3, r1, #1, #1
184 ; CHECK-NEXT: ubfx r1, r12, #8, #1
185 ; CHECK-NEXT: rsbs r1, r1, #0
186 ; CHECK-NEXT: bfi r3, r1, #2, #1
187 ; CHECK-NEXT: ubfx r1, r12, #12, #1
188 ; CHECK-NEXT: rsbs r1, r1, #0
189 ; CHECK-NEXT: bfi r3, r1, #3, #1
190 ; CHECK-NEXT: and r1, r3, #15
191 ; CHECK-NEXT: lsls r3, r1, #31
193 ; CHECK-NEXT: ldrhne r3, [r2]
194 ; CHECK-NEXT: vmovne.32 q0[0], r3
195 ; CHECK-NEXT: lsls r3, r1, #30
197 ; CHECK-NEXT: ldrhmi r3, [r2, #2]
198 ; CHECK-NEXT: vmovmi.32 q0[1], r3
199 ; CHECK-NEXT: lsls r3, r1, #29
201 ; CHECK-NEXT: ldrhmi r3, [r2, #4]
202 ; CHECK-NEXT: vmovmi.32 q0[2], r3
203 ; CHECK-NEXT: lsls r1, r1, #28
205 ; CHECK-NEXT: ldrhmi r1, [r2, #6]
206 ; CHECK-NEXT: vmovmi.32 q0[3], r1
207 ; CHECK-NEXT: vmrs r2, p0
208 ; CHECK-NEXT: movs r1, #0
209 ; CHECK-NEXT: vmovlb.s16 q0, q0
210 ; CHECK-NEXT: and r3, r2, #1
211 ; CHECK-NEXT: rsbs r3, r3, #0
212 ; CHECK-NEXT: bfi r1, r3, #0, #1
213 ; CHECK-NEXT: ubfx r3, r2, #4, #1
214 ; CHECK-NEXT: rsbs r3, r3, #0
215 ; CHECK-NEXT: bfi r1, r3, #1, #1
216 ; CHECK-NEXT: ubfx r3, r2, #8, #1
217 ; CHECK-NEXT: ubfx r2, r2, #12, #1
218 ; CHECK-NEXT: rsbs r3, r3, #0
219 ; CHECK-NEXT: bfi r1, r3, #2, #1
220 ; CHECK-NEXT: rsbs r2, r2, #0
221 ; CHECK-NEXT: bfi r1, r2, #3, #1
222 ; CHECK-NEXT: and r1, r1, #15
223 ; CHECK-NEXT: lsls r2, r1, #31
225 ; CHECK-NEXT: vmovne r2, s0
226 ; CHECK-NEXT: strne r2, [r0]
227 ; CHECK-NEXT: lsls r2, r1, #30
229 ; CHECK-NEXT: vmovmi r2, s1
230 ; CHECK-NEXT: strmi r2, [r0, #4]
231 ; CHECK-NEXT: lsls r2, r1, #29
233 ; CHECK-NEXT: vmovmi r2, s2
234 ; CHECK-NEXT: strmi r2, [r0, #8]
235 ; CHECK-NEXT: lsls r1, r1, #28
237 ; CHECK-NEXT: vmovmi r1, s3
238 ; CHECK-NEXT: strmi r1, [r0, #12]
239 ; CHECK-NEXT: add sp, #8
242 %0 = load <4 x i32>, <4 x i32>* %mask, align 4
243 %1 = icmp sgt <4 x i32> %0, zeroinitializer
244 %2 = call <4 x i16> @llvm.masked.load.v4i16(<4 x i16>* %src, i32 2, <4 x i1> %1, <4 x i16> undef)
245 %3 = sext <4 x i16> %2 to <4 x i32>
246 call void @llvm.masked.store.v4i32(<4 x i32> %3, <4 x i32>* %dest, i32 4, <4 x i1> %1)
250 define void @foo_zext_v4i32_v4i8(<4 x i32> *%dest, <4 x i32> *%mask, <4 x i8> *%src) {
251 ; CHECK-LABEL: foo_zext_v4i32_v4i8:
252 ; CHECK: @ %bb.0: @ %entry
253 ; CHECK-NEXT: .pad #8
254 ; CHECK-NEXT: sub sp, #8
255 ; CHECK-NEXT: vldrw.u32 q0, [r1]
256 ; CHECK-NEXT: movs r3, #0
257 ; CHECK-NEXT: vmov.i32 q1, #0xff
258 ; CHECK-NEXT: vcmp.s32 gt, q0, zr
259 ; CHECK-NEXT: @ implicit-def: $q0
260 ; CHECK-NEXT: vmrs r12, p0
261 ; CHECK-NEXT: and r1, r12, #1
262 ; CHECK-NEXT: rsbs r1, r1, #0
263 ; CHECK-NEXT: bfi r3, r1, #0, #1
264 ; CHECK-NEXT: ubfx r1, r12, #4, #1
265 ; CHECK-NEXT: rsbs r1, r1, #0
266 ; CHECK-NEXT: bfi r3, r1, #1, #1
267 ; CHECK-NEXT: ubfx r1, r12, #8, #1
268 ; CHECK-NEXT: rsbs r1, r1, #0
269 ; CHECK-NEXT: bfi r3, r1, #2, #1
270 ; CHECK-NEXT: ubfx r1, r12, #12, #1
271 ; CHECK-NEXT: rsbs r1, r1, #0
272 ; CHECK-NEXT: bfi r3, r1, #3, #1
273 ; CHECK-NEXT: and r1, r3, #15
274 ; CHECK-NEXT: lsls r3, r1, #31
276 ; CHECK-NEXT: ldrbne r3, [r2]
277 ; CHECK-NEXT: vmovne.32 q0[0], r3
278 ; CHECK-NEXT: lsls r3, r1, #30
280 ; CHECK-NEXT: ldrbmi r3, [r2, #1]
281 ; CHECK-NEXT: vmovmi.32 q0[1], r3
282 ; CHECK-NEXT: lsls r3, r1, #29
284 ; CHECK-NEXT: ldrbmi r3, [r2, #2]
285 ; CHECK-NEXT: vmovmi.32 q0[2], r3
286 ; CHECK-NEXT: lsls r1, r1, #28
288 ; CHECK-NEXT: ldrbmi r1, [r2, #3]
289 ; CHECK-NEXT: vmovmi.32 q0[3], r1
290 ; CHECK-NEXT: vmrs r2, p0
291 ; CHECK-NEXT: movs r1, #0
292 ; CHECK-NEXT: vand q0, q0, q1
293 ; CHECK-NEXT: and r3, r2, #1
294 ; CHECK-NEXT: rsbs r3, r3, #0
295 ; CHECK-NEXT: bfi r1, r3, #0, #1
296 ; CHECK-NEXT: ubfx r3, r2, #4, #1
297 ; CHECK-NEXT: rsbs r3, r3, #0
298 ; CHECK-NEXT: bfi r1, r3, #1, #1
299 ; CHECK-NEXT: ubfx r3, r2, #8, #1
300 ; CHECK-NEXT: ubfx r2, r2, #12, #1
301 ; CHECK-NEXT: rsbs r3, r3, #0
302 ; CHECK-NEXT: bfi r1, r3, #2, #1
303 ; CHECK-NEXT: rsbs r2, r2, #0
304 ; CHECK-NEXT: bfi r1, r2, #3, #1
305 ; CHECK-NEXT: and r1, r1, #15
306 ; CHECK-NEXT: lsls r2, r1, #31
308 ; CHECK-NEXT: vmovne r2, s0
309 ; CHECK-NEXT: strne r2, [r0]
310 ; CHECK-NEXT: lsls r2, r1, #30
312 ; CHECK-NEXT: vmovmi r2, s1
313 ; CHECK-NEXT: strmi r2, [r0, #4]
314 ; CHECK-NEXT: lsls r2, r1, #29
316 ; CHECK-NEXT: vmovmi r2, s2
317 ; CHECK-NEXT: strmi r2, [r0, #8]
318 ; CHECK-NEXT: lsls r1, r1, #28
320 ; CHECK-NEXT: vmovmi r1, s3
321 ; CHECK-NEXT: strmi r1, [r0, #12]
322 ; CHECK-NEXT: add sp, #8
325 %0 = load <4 x i32>, <4 x i32>* %mask, align 4
326 %1 = icmp sgt <4 x i32> %0, zeroinitializer
327 %2 = call <4 x i8> @llvm.masked.load.v4i8(<4 x i8>* %src, i32 1, <4 x i1> %1, <4 x i8> undef)
328 %3 = zext <4 x i8> %2 to <4 x i32>
329 call void @llvm.masked.store.v4i32(<4 x i32> %3, <4 x i32>* %dest, i32 4, <4 x i1> %1)
333 define void @foo_zext_v4i32_v4i16(<4 x i32> *%dest, <4 x i32> *%mask, <4 x i16> *%src) {
334 ; CHECK-LABEL: foo_zext_v4i32_v4i16:
335 ; CHECK: @ %bb.0: @ %entry
336 ; CHECK-NEXT: .pad #8
337 ; CHECK-NEXT: sub sp, #8
338 ; CHECK-NEXT: vldrw.u32 q0, [r1]
339 ; CHECK-NEXT: movs r3, #0
340 ; CHECK-NEXT: vcmp.s32 gt, q0, zr
341 ; CHECK-NEXT: @ implicit-def: $q0
342 ; CHECK-NEXT: vmrs r12, p0
343 ; CHECK-NEXT: and r1, r12, #1
344 ; CHECK-NEXT: rsbs r1, r1, #0
345 ; CHECK-NEXT: bfi r3, r1, #0, #1
346 ; CHECK-NEXT: ubfx r1, r12, #4, #1
347 ; CHECK-NEXT: rsbs r1, r1, #0
348 ; CHECK-NEXT: bfi r3, r1, #1, #1
349 ; CHECK-NEXT: ubfx r1, r12, #8, #1
350 ; CHECK-NEXT: rsbs r1, r1, #0
351 ; CHECK-NEXT: bfi r3, r1, #2, #1
352 ; CHECK-NEXT: ubfx r1, r12, #12, #1
353 ; CHECK-NEXT: rsbs r1, r1, #0
354 ; CHECK-NEXT: bfi r3, r1, #3, #1
355 ; CHECK-NEXT: and r1, r3, #15
356 ; CHECK-NEXT: lsls r3, r1, #31
358 ; CHECK-NEXT: ldrhne r3, [r2]
359 ; CHECK-NEXT: vmovne.32 q0[0], r3
360 ; CHECK-NEXT: lsls r3, r1, #30
362 ; CHECK-NEXT: ldrhmi r3, [r2, #2]
363 ; CHECK-NEXT: vmovmi.32 q0[1], r3
364 ; CHECK-NEXT: lsls r3, r1, #29
366 ; CHECK-NEXT: ldrhmi r3, [r2, #4]
367 ; CHECK-NEXT: vmovmi.32 q0[2], r3
368 ; CHECK-NEXT: lsls r1, r1, #28
370 ; CHECK-NEXT: ldrhmi r1, [r2, #6]
371 ; CHECK-NEXT: vmovmi.32 q0[3], r1
372 ; CHECK-NEXT: vmrs r2, p0
373 ; CHECK-NEXT: movs r1, #0
374 ; CHECK-NEXT: vmovlb.u16 q0, q0
375 ; CHECK-NEXT: and r3, r2, #1
376 ; CHECK-NEXT: rsbs r3, r3, #0
377 ; CHECK-NEXT: bfi r1, r3, #0, #1
378 ; CHECK-NEXT: ubfx r3, r2, #4, #1
379 ; CHECK-NEXT: rsbs r3, r3, #0
380 ; CHECK-NEXT: bfi r1, r3, #1, #1
381 ; CHECK-NEXT: ubfx r3, r2, #8, #1
382 ; CHECK-NEXT: ubfx r2, r2, #12, #1
383 ; CHECK-NEXT: rsbs r3, r3, #0
384 ; CHECK-NEXT: bfi r1, r3, #2, #1
385 ; CHECK-NEXT: rsbs r2, r2, #0
386 ; CHECK-NEXT: bfi r1, r2, #3, #1
387 ; CHECK-NEXT: and r1, r1, #15
388 ; CHECK-NEXT: lsls r2, r1, #31
390 ; CHECK-NEXT: vmovne r2, s0
391 ; CHECK-NEXT: strne r2, [r0]
392 ; CHECK-NEXT: lsls r2, r1, #30
394 ; CHECK-NEXT: vmovmi r2, s1
395 ; CHECK-NEXT: strmi r2, [r0, #4]
396 ; CHECK-NEXT: lsls r2, r1, #29
398 ; CHECK-NEXT: vmovmi r2, s2
399 ; CHECK-NEXT: strmi r2, [r0, #8]
400 ; CHECK-NEXT: lsls r1, r1, #28
402 ; CHECK-NEXT: vmovmi r1, s3
403 ; CHECK-NEXT: strmi r1, [r0, #12]
404 ; CHECK-NEXT: add sp, #8
407 %0 = load <4 x i32>, <4 x i32>* %mask, align 4
408 %1 = icmp sgt <4 x i32> %0, zeroinitializer
409 %2 = call <4 x i16> @llvm.masked.load.v4i16(<4 x i16>* %src, i32 2, <4 x i1> %1, <4 x i16> undef)
410 %3 = zext <4 x i16> %2 to <4 x i32>
411 call void @llvm.masked.store.v4i32(<4 x i32> %3, <4 x i32>* %dest, i32 4, <4 x i1> %1)
415 define void @foo_v8i16_v8i16(<8 x i16> *%dest, <8 x i16> *%mask, <8 x i16> *%src) {
416 ; CHECK-LABEL: foo_v8i16_v8i16:
417 ; CHECK: @ %bb.0: @ %entry
418 ; CHECK-NEXT: .pad #16
419 ; CHECK-NEXT: sub sp, #16
420 ; CHECK-NEXT: vldrh.u16 q0, [r1]
421 ; CHECK-NEXT: movs r3, #0
422 ; CHECK-NEXT: vcmp.s16 gt, q0, zr
423 ; CHECK-NEXT: @ implicit-def: $q0
424 ; CHECK-NEXT: vmrs r12, p0
425 ; CHECK-NEXT: and r1, r12, #1
426 ; CHECK-NEXT: rsbs r1, r1, #0
427 ; CHECK-NEXT: bfi r3, r1, #0, #1
428 ; CHECK-NEXT: ubfx r1, r12, #2, #1
429 ; CHECK-NEXT: rsbs r1, r1, #0
430 ; CHECK-NEXT: bfi r3, r1, #1, #1
431 ; CHECK-NEXT: ubfx r1, r12, #4, #1
432 ; CHECK-NEXT: rsbs r1, r1, #0
433 ; CHECK-NEXT: bfi r3, r1, #2, #1
434 ; CHECK-NEXT: ubfx r1, r12, #6, #1
435 ; CHECK-NEXT: rsbs r1, r1, #0
436 ; CHECK-NEXT: bfi r3, r1, #3, #1
437 ; CHECK-NEXT: ubfx r1, r12, #8, #1
438 ; CHECK-NEXT: rsbs r1, r1, #0
439 ; CHECK-NEXT: bfi r3, r1, #4, #1
440 ; CHECK-NEXT: ubfx r1, r12, #10, #1
441 ; CHECK-NEXT: rsbs r1, r1, #0
442 ; CHECK-NEXT: bfi r3, r1, #5, #1
443 ; CHECK-NEXT: ubfx r1, r12, #12, #1
444 ; CHECK-NEXT: rsbs r1, r1, #0
445 ; CHECK-NEXT: bfi r3, r1, #6, #1
446 ; CHECK-NEXT: ubfx r1, r12, #14, #1
447 ; CHECK-NEXT: rsbs r1, r1, #0
448 ; CHECK-NEXT: bfi r3, r1, #7, #1
449 ; CHECK-NEXT: uxtb r1, r3
450 ; CHECK-NEXT: lsls r3, r3, #31
452 ; CHECK-NEXT: ldrhne r3, [r2]
453 ; CHECK-NEXT: vmovne.16 q0[0], r3
454 ; CHECK-NEXT: lsls r3, r1, #30
456 ; CHECK-NEXT: ldrhmi r3, [r2, #2]
457 ; CHECK-NEXT: vmovmi.16 q0[1], r3
458 ; CHECK-NEXT: lsls r3, r1, #29
460 ; CHECK-NEXT: ldrhmi r3, [r2, #4]
461 ; CHECK-NEXT: vmovmi.16 q0[2], r3
462 ; CHECK-NEXT: lsls r3, r1, #28
464 ; CHECK-NEXT: ldrhmi r3, [r2, #6]
465 ; CHECK-NEXT: vmovmi.16 q0[3], r3
466 ; CHECK-NEXT: lsls r3, r1, #27
468 ; CHECK-NEXT: ldrhmi r3, [r2, #8]
469 ; CHECK-NEXT: vmovmi.16 q0[4], r3
470 ; CHECK-NEXT: lsls r3, r1, #26
472 ; CHECK-NEXT: ldrhmi r3, [r2, #10]
473 ; CHECK-NEXT: vmovmi.16 q0[5], r3
474 ; CHECK-NEXT: lsls r3, r1, #25
476 ; CHECK-NEXT: ldrhmi r3, [r2, #12]
477 ; CHECK-NEXT: vmovmi.16 q0[6], r3
478 ; CHECK-NEXT: lsls r1, r1, #24
480 ; CHECK-NEXT: ldrhmi r1, [r2, #14]
481 ; CHECK-NEXT: vmovmi.16 q0[7], r1
482 ; CHECK-NEXT: movs r2, #0
483 ; CHECK-NEXT: vmrs r1, p0
484 ; CHECK-NEXT: and r3, r1, #1
485 ; CHECK-NEXT: rsbs r3, r3, #0
486 ; CHECK-NEXT: bfi r2, r3, #0, #1
487 ; CHECK-NEXT: ubfx r3, r1, #2, #1
488 ; CHECK-NEXT: rsbs r3, r3, #0
489 ; CHECK-NEXT: bfi r2, r3, #1, #1
490 ; CHECK-NEXT: ubfx r3, r1, #4, #1
491 ; CHECK-NEXT: rsbs r3, r3, #0
492 ; CHECK-NEXT: bfi r2, r3, #2, #1
493 ; CHECK-NEXT: ubfx r3, r1, #6, #1
494 ; CHECK-NEXT: rsbs r3, r3, #0
495 ; CHECK-NEXT: bfi r2, r3, #3, #1
496 ; CHECK-NEXT: ubfx r3, r1, #8, #1
497 ; CHECK-NEXT: rsbs r3, r3, #0
498 ; CHECK-NEXT: bfi r2, r3, #4, #1
499 ; CHECK-NEXT: ubfx r3, r1, #10, #1
500 ; CHECK-NEXT: rsbs r3, r3, #0
501 ; CHECK-NEXT: bfi r2, r3, #5, #1
502 ; CHECK-NEXT: ubfx r3, r1, #12, #1
503 ; CHECK-NEXT: ubfx r1, r1, #14, #1
504 ; CHECK-NEXT: rsbs r3, r3, #0
505 ; CHECK-NEXT: bfi r2, r3, #6, #1
506 ; CHECK-NEXT: rsbs r1, r1, #0
507 ; CHECK-NEXT: bfi r2, r1, #7, #1
508 ; CHECK-NEXT: uxtb r1, r2
509 ; CHECK-NEXT: lsls r2, r2, #31
511 ; CHECK-NEXT: vmovne.u16 r2, q0[0]
512 ; CHECK-NEXT: strhne r2, [r0]
513 ; CHECK-NEXT: lsls r2, r1, #30
515 ; CHECK-NEXT: vmovmi.u16 r2, q0[1]
516 ; CHECK-NEXT: strhmi r2, [r0, #2]
517 ; CHECK-NEXT: lsls r2, r1, #29
519 ; CHECK-NEXT: vmovmi.u16 r2, q0[2]
520 ; CHECK-NEXT: strhmi r2, [r0, #4]
521 ; CHECK-NEXT: lsls r2, r1, #28
523 ; CHECK-NEXT: vmovmi.u16 r2, q0[3]
524 ; CHECK-NEXT: strhmi r2, [r0, #6]
525 ; CHECK-NEXT: lsls r2, r1, #27
527 ; CHECK-NEXT: vmovmi.u16 r2, q0[4]
528 ; CHECK-NEXT: strhmi r2, [r0, #8]
529 ; CHECK-NEXT: lsls r2, r1, #26
531 ; CHECK-NEXT: vmovmi.u16 r2, q0[5]
532 ; CHECK-NEXT: strhmi r2, [r0, #10]
533 ; CHECK-NEXT: lsls r2, r1, #25
535 ; CHECK-NEXT: vmovmi.u16 r2, q0[6]
536 ; CHECK-NEXT: strhmi r2, [r0, #12]
537 ; CHECK-NEXT: lsls r1, r1, #24
539 ; CHECK-NEXT: vmovmi.u16 r1, q0[7]
540 ; CHECK-NEXT: strhmi r1, [r0, #14]
541 ; CHECK-NEXT: add sp, #16
544 %0 = load <8 x i16>, <8 x i16>* %mask, align 2
545 %1 = icmp sgt <8 x i16> %0, zeroinitializer
546 %2 = call <8 x i16> @llvm.masked.load.v8i16(<8 x i16>* %src, i32 2, <8 x i1> %1, <8 x i16> undef)
547 call void @llvm.masked.store.v8i16(<8 x i16> %2, <8 x i16>* %dest, i32 2, <8 x i1> %1)
551 define void @foo_sext_v8i16_v8i8(<8 x i16> *%dest, <8 x i16> *%mask, <8 x i8> *%src) {
552 ; CHECK-LABEL: foo_sext_v8i16_v8i8:
553 ; CHECK: @ %bb.0: @ %entry
554 ; CHECK-NEXT: .pad #16
555 ; CHECK-NEXT: sub sp, #16
556 ; CHECK-NEXT: vldrh.u16 q0, [r1]
557 ; CHECK-NEXT: movs r3, #0
558 ; CHECK-NEXT: vcmp.s16 gt, q0, zr
559 ; CHECK-NEXT: @ implicit-def: $q0
560 ; CHECK-NEXT: vmrs r12, p0
561 ; CHECK-NEXT: and r1, r12, #1
562 ; CHECK-NEXT: rsbs r1, r1, #0
563 ; CHECK-NEXT: bfi r3, r1, #0, #1
564 ; CHECK-NEXT: ubfx r1, r12, #2, #1
565 ; CHECK-NEXT: rsbs r1, r1, #0
566 ; CHECK-NEXT: bfi r3, r1, #1, #1
567 ; CHECK-NEXT: ubfx r1, r12, #4, #1
568 ; CHECK-NEXT: rsbs r1, r1, #0
569 ; CHECK-NEXT: bfi r3, r1, #2, #1
570 ; CHECK-NEXT: ubfx r1, r12, #6, #1
571 ; CHECK-NEXT: rsbs r1, r1, #0
572 ; CHECK-NEXT: bfi r3, r1, #3, #1
573 ; CHECK-NEXT: ubfx r1, r12, #8, #1
574 ; CHECK-NEXT: rsbs r1, r1, #0
575 ; CHECK-NEXT: bfi r3, r1, #4, #1
576 ; CHECK-NEXT: ubfx r1, r12, #10, #1
577 ; CHECK-NEXT: rsbs r1, r1, #0
578 ; CHECK-NEXT: bfi r3, r1, #5, #1
579 ; CHECK-NEXT: ubfx r1, r12, #12, #1
580 ; CHECK-NEXT: rsbs r1, r1, #0
581 ; CHECK-NEXT: bfi r3, r1, #6, #1
582 ; CHECK-NEXT: ubfx r1, r12, #14, #1
583 ; CHECK-NEXT: rsbs r1, r1, #0
584 ; CHECK-NEXT: bfi r3, r1, #7, #1
585 ; CHECK-NEXT: uxtb r1, r3
586 ; CHECK-NEXT: lsls r3, r3, #31
588 ; CHECK-NEXT: ldrbne r3, [r2]
589 ; CHECK-NEXT: vmovne.16 q0[0], r3
590 ; CHECK-NEXT: lsls r3, r1, #30
592 ; CHECK-NEXT: ldrbmi r3, [r2, #1]
593 ; CHECK-NEXT: vmovmi.16 q0[1], r3
594 ; CHECK-NEXT: lsls r3, r1, #29
596 ; CHECK-NEXT: ldrbmi r3, [r2, #2]
597 ; CHECK-NEXT: vmovmi.16 q0[2], r3
598 ; CHECK-NEXT: lsls r3, r1, #28
600 ; CHECK-NEXT: ldrbmi r3, [r2, #3]
601 ; CHECK-NEXT: vmovmi.16 q0[3], r3
602 ; CHECK-NEXT: lsls r3, r1, #27
604 ; CHECK-NEXT: ldrbmi r3, [r2, #4]
605 ; CHECK-NEXT: vmovmi.16 q0[4], r3
606 ; CHECK-NEXT: lsls r3, r1, #26
608 ; CHECK-NEXT: ldrbmi r3, [r2, #5]
609 ; CHECK-NEXT: vmovmi.16 q0[5], r3
610 ; CHECK-NEXT: lsls r3, r1, #25
612 ; CHECK-NEXT: ldrbmi r3, [r2, #6]
613 ; CHECK-NEXT: vmovmi.16 q0[6], r3
614 ; CHECK-NEXT: lsls r1, r1, #24
616 ; CHECK-NEXT: ldrbmi r1, [r2, #7]
617 ; CHECK-NEXT: vmovmi.16 q0[7], r1
618 ; CHECK-NEXT: movs r2, #0
619 ; CHECK-NEXT: vmrs r1, p0
620 ; CHECK-NEXT: vmovlb.s8 q0, q0
621 ; CHECK-NEXT: and r3, r1, #1
622 ; CHECK-NEXT: rsbs r3, r3, #0
623 ; CHECK-NEXT: bfi r2, r3, #0, #1
624 ; CHECK-NEXT: ubfx r3, r1, #2, #1
625 ; CHECK-NEXT: rsbs r3, r3, #0
626 ; CHECK-NEXT: bfi r2, r3, #1, #1
627 ; CHECK-NEXT: ubfx r3, r1, #4, #1
628 ; CHECK-NEXT: rsbs r3, r3, #0
629 ; CHECK-NEXT: bfi r2, r3, #2, #1
630 ; CHECK-NEXT: ubfx r3, r1, #6, #1
631 ; CHECK-NEXT: rsbs r3, r3, #0
632 ; CHECK-NEXT: bfi r2, r3, #3, #1
633 ; CHECK-NEXT: ubfx r3, r1, #8, #1
634 ; CHECK-NEXT: rsbs r3, r3, #0
635 ; CHECK-NEXT: bfi r2, r3, #4, #1
636 ; CHECK-NEXT: ubfx r3, r1, #10, #1
637 ; CHECK-NEXT: rsbs r3, r3, #0
638 ; CHECK-NEXT: bfi r2, r3, #5, #1
639 ; CHECK-NEXT: ubfx r3, r1, #12, #1
640 ; CHECK-NEXT: ubfx r1, r1, #14, #1
641 ; CHECK-NEXT: rsbs r3, r3, #0
642 ; CHECK-NEXT: bfi r2, r3, #6, #1
643 ; CHECK-NEXT: rsbs r1, r1, #0
644 ; CHECK-NEXT: bfi r2, r1, #7, #1
645 ; CHECK-NEXT: uxtb r1, r2
646 ; CHECK-NEXT: lsls r2, r2, #31
648 ; CHECK-NEXT: vmovne.u16 r2, q0[0]
649 ; CHECK-NEXT: strhne r2, [r0]
650 ; CHECK-NEXT: lsls r2, r1, #30
652 ; CHECK-NEXT: vmovmi.u16 r2, q0[1]
653 ; CHECK-NEXT: strhmi r2, [r0, #2]
654 ; CHECK-NEXT: lsls r2, r1, #29
656 ; CHECK-NEXT: vmovmi.u16 r2, q0[2]
657 ; CHECK-NEXT: strhmi r2, [r0, #4]
658 ; CHECK-NEXT: lsls r2, r1, #28
660 ; CHECK-NEXT: vmovmi.u16 r2, q0[3]
661 ; CHECK-NEXT: strhmi r2, [r0, #6]
662 ; CHECK-NEXT: lsls r2, r1, #27
664 ; CHECK-NEXT: vmovmi.u16 r2, q0[4]
665 ; CHECK-NEXT: strhmi r2, [r0, #8]
666 ; CHECK-NEXT: lsls r2, r1, #26
668 ; CHECK-NEXT: vmovmi.u16 r2, q0[5]
669 ; CHECK-NEXT: strhmi r2, [r0, #10]
670 ; CHECK-NEXT: lsls r2, r1, #25
672 ; CHECK-NEXT: vmovmi.u16 r2, q0[6]
673 ; CHECK-NEXT: strhmi r2, [r0, #12]
674 ; CHECK-NEXT: lsls r1, r1, #24
676 ; CHECK-NEXT: vmovmi.u16 r1, q0[7]
677 ; CHECK-NEXT: strhmi r1, [r0, #14]
678 ; CHECK-NEXT: add sp, #16
681 %0 = load <8 x i16>, <8 x i16>* %mask, align 2
682 %1 = icmp sgt <8 x i16> %0, zeroinitializer
683 %2 = call <8 x i8> @llvm.masked.load.v8i8(<8 x i8>* %src, i32 1, <8 x i1> %1, <8 x i8> undef)
684 %3 = sext <8 x i8> %2 to <8 x i16>
685 call void @llvm.masked.store.v8i16(<8 x i16> %3, <8 x i16>* %dest, i32 2, <8 x i1> %1)
689 define void @foo_zext_v8i16_v8i8(<8 x i16> *%dest, <8 x i16> *%mask, <8 x i8> *%src) {
690 ; CHECK-LABEL: foo_zext_v8i16_v8i8:
691 ; CHECK: @ %bb.0: @ %entry
692 ; CHECK-NEXT: .pad #16
693 ; CHECK-NEXT: sub sp, #16
694 ; CHECK-NEXT: vldrh.u16 q0, [r1]
695 ; CHECK-NEXT: movs r3, #0
696 ; CHECK-NEXT: vcmp.s16 gt, q0, zr
697 ; CHECK-NEXT: @ implicit-def: $q0
698 ; CHECK-NEXT: vmrs r12, p0
699 ; CHECK-NEXT: and r1, r12, #1
700 ; CHECK-NEXT: rsbs r1, r1, #0
701 ; CHECK-NEXT: bfi r3, r1, #0, #1
702 ; CHECK-NEXT: ubfx r1, r12, #2, #1
703 ; CHECK-NEXT: rsbs r1, r1, #0
704 ; CHECK-NEXT: bfi r3, r1, #1, #1
705 ; CHECK-NEXT: ubfx r1, r12, #4, #1
706 ; CHECK-NEXT: rsbs r1, r1, #0
707 ; CHECK-NEXT: bfi r3, r1, #2, #1
708 ; CHECK-NEXT: ubfx r1, r12, #6, #1
709 ; CHECK-NEXT: rsbs r1, r1, #0
710 ; CHECK-NEXT: bfi r3, r1, #3, #1
711 ; CHECK-NEXT: ubfx r1, r12, #8, #1
712 ; CHECK-NEXT: rsbs r1, r1, #0
713 ; CHECK-NEXT: bfi r3, r1, #4, #1
714 ; CHECK-NEXT: ubfx r1, r12, #10, #1
715 ; CHECK-NEXT: rsbs r1, r1, #0
716 ; CHECK-NEXT: bfi r3, r1, #5, #1
717 ; CHECK-NEXT: ubfx r1, r12, #12, #1
718 ; CHECK-NEXT: rsbs r1, r1, #0
719 ; CHECK-NEXT: bfi r3, r1, #6, #1
720 ; CHECK-NEXT: ubfx r1, r12, #14, #1
721 ; CHECK-NEXT: rsbs r1, r1, #0
722 ; CHECK-NEXT: bfi r3, r1, #7, #1
723 ; CHECK-NEXT: uxtb r1, r3
724 ; CHECK-NEXT: lsls r3, r3, #31
726 ; CHECK-NEXT: ldrbne r3, [r2]
727 ; CHECK-NEXT: vmovne.16 q0[0], r3
728 ; CHECK-NEXT: lsls r3, r1, #30
730 ; CHECK-NEXT: ldrbmi r3, [r2, #1]
731 ; CHECK-NEXT: vmovmi.16 q0[1], r3
732 ; CHECK-NEXT: lsls r3, r1, #29
734 ; CHECK-NEXT: ldrbmi r3, [r2, #2]
735 ; CHECK-NEXT: vmovmi.16 q0[2], r3
736 ; CHECK-NEXT: lsls r3, r1, #28
738 ; CHECK-NEXT: ldrbmi r3, [r2, #3]
739 ; CHECK-NEXT: vmovmi.16 q0[3], r3
740 ; CHECK-NEXT: lsls r3, r1, #27
742 ; CHECK-NEXT: ldrbmi r3, [r2, #4]
743 ; CHECK-NEXT: vmovmi.16 q0[4], r3
744 ; CHECK-NEXT: lsls r3, r1, #26
746 ; CHECK-NEXT: ldrbmi r3, [r2, #5]
747 ; CHECK-NEXT: vmovmi.16 q0[5], r3
748 ; CHECK-NEXT: lsls r3, r1, #25
750 ; CHECK-NEXT: ldrbmi r3, [r2, #6]
751 ; CHECK-NEXT: vmovmi.16 q0[6], r3
752 ; CHECK-NEXT: lsls r1, r1, #24
754 ; CHECK-NEXT: ldrbmi r1, [r2, #7]
755 ; CHECK-NEXT: vmovmi.16 q0[7], r1
756 ; CHECK-NEXT: movs r2, #0
757 ; CHECK-NEXT: vmrs r1, p0
758 ; CHECK-NEXT: vmovlb.u8 q0, q0
759 ; CHECK-NEXT: and r3, r1, #1
760 ; CHECK-NEXT: rsbs r3, r3, #0
761 ; CHECK-NEXT: bfi r2, r3, #0, #1
762 ; CHECK-NEXT: ubfx r3, r1, #2, #1
763 ; CHECK-NEXT: rsbs r3, r3, #0
764 ; CHECK-NEXT: bfi r2, r3, #1, #1
765 ; CHECK-NEXT: ubfx r3, r1, #4, #1
766 ; CHECK-NEXT: rsbs r3, r3, #0
767 ; CHECK-NEXT: bfi r2, r3, #2, #1
768 ; CHECK-NEXT: ubfx r3, r1, #6, #1
769 ; CHECK-NEXT: rsbs r3, r3, #0
770 ; CHECK-NEXT: bfi r2, r3, #3, #1
771 ; CHECK-NEXT: ubfx r3, r1, #8, #1
772 ; CHECK-NEXT: rsbs r3, r3, #0
773 ; CHECK-NEXT: bfi r2, r3, #4, #1
774 ; CHECK-NEXT: ubfx r3, r1, #10, #1
775 ; CHECK-NEXT: rsbs r3, r3, #0
776 ; CHECK-NEXT: bfi r2, r3, #5, #1
777 ; CHECK-NEXT: ubfx r3, r1, #12, #1
778 ; CHECK-NEXT: ubfx r1, r1, #14, #1
779 ; CHECK-NEXT: rsbs r3, r3, #0
780 ; CHECK-NEXT: bfi r2, r3, #6, #1
781 ; CHECK-NEXT: rsbs r1, r1, #0
782 ; CHECK-NEXT: bfi r2, r1, #7, #1
783 ; CHECK-NEXT: uxtb r1, r2
784 ; CHECK-NEXT: lsls r2, r2, #31
786 ; CHECK-NEXT: vmovne.u16 r2, q0[0]
787 ; CHECK-NEXT: strhne r2, [r0]
788 ; CHECK-NEXT: lsls r2, r1, #30
790 ; CHECK-NEXT: vmovmi.u16 r2, q0[1]
791 ; CHECK-NEXT: strhmi r2, [r0, #2]
792 ; CHECK-NEXT: lsls r2, r1, #29
794 ; CHECK-NEXT: vmovmi.u16 r2, q0[2]
795 ; CHECK-NEXT: strhmi r2, [r0, #4]
796 ; CHECK-NEXT: lsls r2, r1, #28
798 ; CHECK-NEXT: vmovmi.u16 r2, q0[3]
799 ; CHECK-NEXT: strhmi r2, [r0, #6]
800 ; CHECK-NEXT: lsls r2, r1, #27
802 ; CHECK-NEXT: vmovmi.u16 r2, q0[4]
803 ; CHECK-NEXT: strhmi r2, [r0, #8]
804 ; CHECK-NEXT: lsls r2, r1, #26
806 ; CHECK-NEXT: vmovmi.u16 r2, q0[5]
807 ; CHECK-NEXT: strhmi r2, [r0, #10]
808 ; CHECK-NEXT: lsls r2, r1, #25
810 ; CHECK-NEXT: vmovmi.u16 r2, q0[6]
811 ; CHECK-NEXT: strhmi r2, [r0, #12]
812 ; CHECK-NEXT: lsls r1, r1, #24
814 ; CHECK-NEXT: vmovmi.u16 r1, q0[7]
815 ; CHECK-NEXT: strhmi r1, [r0, #14]
816 ; CHECK-NEXT: add sp, #16
819 %0 = load <8 x i16>, <8 x i16>* %mask, align 2
820 %1 = icmp sgt <8 x i16> %0, zeroinitializer
821 %2 = call <8 x i8> @llvm.masked.load.v8i8(<8 x i8>* %src, i32 1, <8 x i1> %1, <8 x i8> undef)
822 %3 = zext <8 x i8> %2 to <8 x i16>
823 call void @llvm.masked.store.v8i16(<8 x i16> %3, <8 x i16>* %dest, i32 2, <8 x i1> %1)
827 define void @foo_v16i8_v16i8(<16 x i8> *%dest, <16 x i8> *%mask, <16 x i8> *%src) {
828 ; CHECK-LABEL: foo_v16i8_v16i8:
829 ; CHECK: @ %bb.0: @ %entry
830 ; CHECK-NEXT: .save {r4, r6, r7, lr}
831 ; CHECK-NEXT: push {r4, r6, r7, lr}
832 ; CHECK-NEXT: .setfp r7, sp, #8
833 ; CHECK-NEXT: add r7, sp, #8
834 ; CHECK-NEXT: .pad #32
835 ; CHECK-NEXT: sub sp, #32
836 ; CHECK-NEXT: mov r4, sp
837 ; CHECK-NEXT: bfc r4, #0, #4
838 ; CHECK-NEXT: mov sp, r4
839 ; CHECK-NEXT: vldrb.u8 q0, [r1]
840 ; CHECK-NEXT: sub.w r4, r7, #8
841 ; CHECK-NEXT: vcmp.s8 gt, q0, zr
842 ; CHECK-NEXT: @ implicit-def: $q0
843 ; CHECK-NEXT: vmrs r3, p0
844 ; CHECK-NEXT: uxth r1, r3
845 ; CHECK-NEXT: lsls r3, r3, #31
847 ; CHECK-NEXT: ldrbne r3, [r2]
848 ; CHECK-NEXT: vmovne.8 q0[0], r3
849 ; CHECK-NEXT: lsls r3, r1, #30
851 ; CHECK-NEXT: ldrbmi r3, [r2, #1]
852 ; CHECK-NEXT: vmovmi.8 q0[1], r3
853 ; CHECK-NEXT: lsls r3, r1, #29
855 ; CHECK-NEXT: ldrbmi r3, [r2, #2]
856 ; CHECK-NEXT: vmovmi.8 q0[2], r3
857 ; CHECK-NEXT: lsls r3, r1, #28
859 ; CHECK-NEXT: ldrbmi r3, [r2, #3]
860 ; CHECK-NEXT: vmovmi.8 q0[3], r3
861 ; CHECK-NEXT: lsls r3, r1, #27
863 ; CHECK-NEXT: ldrbmi r3, [r2, #4]
864 ; CHECK-NEXT: vmovmi.8 q0[4], r3
865 ; CHECK-NEXT: lsls r3, r1, #26
867 ; CHECK-NEXT: ldrbmi r3, [r2, #5]
868 ; CHECK-NEXT: vmovmi.8 q0[5], r3
869 ; CHECK-NEXT: lsls r3, r1, #25
871 ; CHECK-NEXT: ldrbmi r3, [r2, #6]
872 ; CHECK-NEXT: vmovmi.8 q0[6], r3
873 ; CHECK-NEXT: lsls r3, r1, #24
875 ; CHECK-NEXT: ldrbmi r3, [r2, #7]
876 ; CHECK-NEXT: vmovmi.8 q0[7], r3
877 ; CHECK-NEXT: lsls r3, r1, #23
879 ; CHECK-NEXT: ldrbmi r3, [r2, #8]
880 ; CHECK-NEXT: vmovmi.8 q0[8], r3
881 ; CHECK-NEXT: lsls r3, r1, #22
883 ; CHECK-NEXT: ldrbmi r3, [r2, #9]
884 ; CHECK-NEXT: vmovmi.8 q0[9], r3
885 ; CHECK-NEXT: lsls r3, r1, #21
887 ; CHECK-NEXT: ldrbmi r3, [r2, #10]
888 ; CHECK-NEXT: vmovmi.8 q0[10], r3
889 ; CHECK-NEXT: lsls r3, r1, #20
891 ; CHECK-NEXT: ldrbmi r3, [r2, #11]
892 ; CHECK-NEXT: vmovmi.8 q0[11], r3
893 ; CHECK-NEXT: lsls r3, r1, #19
895 ; CHECK-NEXT: ldrbmi r3, [r2, #12]
896 ; CHECK-NEXT: vmovmi.8 q0[12], r3
897 ; CHECK-NEXT: lsls r3, r1, #18
899 ; CHECK-NEXT: ldrbmi r3, [r2, #13]
900 ; CHECK-NEXT: vmovmi.8 q0[13], r3
901 ; CHECK-NEXT: lsls r3, r1, #17
903 ; CHECK-NEXT: ldrbmi r3, [r2, #14]
904 ; CHECK-NEXT: vmovmi.8 q0[14], r3
905 ; CHECK-NEXT: lsls r1, r1, #16
907 ; CHECK-NEXT: ldrbmi r1, [r2, #15]
908 ; CHECK-NEXT: vmovmi.8 q0[15], r1
909 ; CHECK-NEXT: vmrs r2, p0
910 ; CHECK-NEXT: uxth r1, r2
911 ; CHECK-NEXT: lsls r2, r2, #31
913 ; CHECK-NEXT: vmovne.u8 r2, q0[0]
914 ; CHECK-NEXT: strbne r2, [r0]
915 ; CHECK-NEXT: lsls r2, r1, #30
917 ; CHECK-NEXT: vmovmi.u8 r2, q0[1]
918 ; CHECK-NEXT: strbmi r2, [r0, #1]
919 ; CHECK-NEXT: lsls r2, r1, #29
921 ; CHECK-NEXT: vmovmi.u8 r2, q0[2]
922 ; CHECK-NEXT: strbmi r2, [r0, #2]
923 ; CHECK-NEXT: lsls r2, r1, #28
925 ; CHECK-NEXT: vmovmi.u8 r2, q0[3]
926 ; CHECK-NEXT: strbmi r2, [r0, #3]
927 ; CHECK-NEXT: lsls r2, r1, #27
929 ; CHECK-NEXT: vmovmi.u8 r2, q0[4]
930 ; CHECK-NEXT: strbmi r2, [r0, #4]
931 ; CHECK-NEXT: lsls r2, r1, #26
933 ; CHECK-NEXT: vmovmi.u8 r2, q0[5]
934 ; CHECK-NEXT: strbmi r2, [r0, #5]
935 ; CHECK-NEXT: lsls r2, r1, #25
937 ; CHECK-NEXT: vmovmi.u8 r2, q0[6]
938 ; CHECK-NEXT: strbmi r2, [r0, #6]
939 ; CHECK-NEXT: lsls r2, r1, #24
941 ; CHECK-NEXT: vmovmi.u8 r2, q0[7]
942 ; CHECK-NEXT: strbmi r2, [r0, #7]
943 ; CHECK-NEXT: lsls r2, r1, #23
945 ; CHECK-NEXT: vmovmi.u8 r2, q0[8]
946 ; CHECK-NEXT: strbmi r2, [r0, #8]
947 ; CHECK-NEXT: lsls r2, r1, #22
949 ; CHECK-NEXT: vmovmi.u8 r2, q0[9]
950 ; CHECK-NEXT: strbmi r2, [r0, #9]
951 ; CHECK-NEXT: lsls r2, r1, #21
953 ; CHECK-NEXT: vmovmi.u8 r2, q0[10]
954 ; CHECK-NEXT: strbmi r2, [r0, #10]
955 ; CHECK-NEXT: lsls r2, r1, #20
957 ; CHECK-NEXT: vmovmi.u8 r2, q0[11]
958 ; CHECK-NEXT: strbmi r2, [r0, #11]
959 ; CHECK-NEXT: lsls r2, r1, #19
961 ; CHECK-NEXT: vmovmi.u8 r2, q0[12]
962 ; CHECK-NEXT: strbmi r2, [r0, #12]
963 ; CHECK-NEXT: lsls r2, r1, #18
965 ; CHECK-NEXT: vmovmi.u8 r2, q0[13]
966 ; CHECK-NEXT: strbmi r2, [r0, #13]
967 ; CHECK-NEXT: lsls r2, r1, #17
969 ; CHECK-NEXT: vmovmi.u8 r2, q0[14]
970 ; CHECK-NEXT: strbmi r2, [r0, #14]
971 ; CHECK-NEXT: lsls r1, r1, #16
973 ; CHECK-NEXT: vmovmi.u8 r1, q0[15]
974 ; CHECK-NEXT: strbmi r1, [r0, #15]
975 ; CHECK-NEXT: mov sp, r4
976 ; CHECK-NEXT: pop {r4, r6, r7, pc}
978 %0 = load <16 x i8>, <16 x i8>* %mask, align 1
979 %1 = icmp sgt <16 x i8> %0, zeroinitializer
980 %2 = call <16 x i8> @llvm.masked.load.v16i8(<16 x i8>* %src, i32 1, <16 x i1> %1, <16 x i8> undef)
981 call void @llvm.masked.store.v16i8(<16 x i8> %2, <16 x i8>* %dest, i32 1, <16 x i1> %1)
985 define void @foo_trunc_v8i8_v8i16(<8 x i8> *%dest, <8 x i16> *%mask, <8 x i16> *%src) {
986 ; CHECK-LABEL: foo_trunc_v8i8_v8i16:
987 ; CHECK: @ %bb.0: @ %entry
988 ; CHECK-NEXT: .pad #16
989 ; CHECK-NEXT: sub sp, #16
990 ; CHECK-NEXT: vldrh.u16 q0, [r1]
991 ; CHECK-NEXT: movs r3, #0
992 ; CHECK-NEXT: vcmp.s16 gt, q0, zr
993 ; CHECK-NEXT: @ implicit-def: $q0
994 ; CHECK-NEXT: vmrs r12, p0
995 ; CHECK-NEXT: and r1, r12, #1
996 ; CHECK-NEXT: rsbs r1, r1, #0
997 ; CHECK-NEXT: bfi r3, r1, #0, #1
998 ; CHECK-NEXT: ubfx r1, r12, #2, #1
999 ; CHECK-NEXT: rsbs r1, r1, #0
1000 ; CHECK-NEXT: bfi r3, r1, #1, #1
1001 ; CHECK-NEXT: ubfx r1, r12, #4, #1
1002 ; CHECK-NEXT: rsbs r1, r1, #0
1003 ; CHECK-NEXT: bfi r3, r1, #2, #1
1004 ; CHECK-NEXT: ubfx r1, r12, #6, #1
1005 ; CHECK-NEXT: rsbs r1, r1, #0
1006 ; CHECK-NEXT: bfi r3, r1, #3, #1
1007 ; CHECK-NEXT: ubfx r1, r12, #8, #1
1008 ; CHECK-NEXT: rsbs r1, r1, #0
1009 ; CHECK-NEXT: bfi r3, r1, #4, #1
1010 ; CHECK-NEXT: ubfx r1, r12, #10, #1
1011 ; CHECK-NEXT: rsbs r1, r1, #0
1012 ; CHECK-NEXT: bfi r3, r1, #5, #1
1013 ; CHECK-NEXT: ubfx r1, r12, #12, #1
1014 ; CHECK-NEXT: rsbs r1, r1, #0
1015 ; CHECK-NEXT: bfi r3, r1, #6, #1
1016 ; CHECK-NEXT: ubfx r1, r12, #14, #1
1017 ; CHECK-NEXT: rsbs r1, r1, #0
1018 ; CHECK-NEXT: bfi r3, r1, #7, #1
1019 ; CHECK-NEXT: uxtb r1, r3
1020 ; CHECK-NEXT: lsls r3, r3, #31
1021 ; CHECK-NEXT: itt ne
1022 ; CHECK-NEXT: ldrhne r3, [r2]
1023 ; CHECK-NEXT: vmovne.16 q0[0], r3
1024 ; CHECK-NEXT: lsls r3, r1, #30
1025 ; CHECK-NEXT: itt mi
1026 ; CHECK-NEXT: ldrhmi r3, [r2, #2]
1027 ; CHECK-NEXT: vmovmi.16 q0[1], r3
1028 ; CHECK-NEXT: lsls r3, r1, #29
1029 ; CHECK-NEXT: itt mi
1030 ; CHECK-NEXT: ldrhmi r3, [r2, #4]
1031 ; CHECK-NEXT: vmovmi.16 q0[2], r3
1032 ; CHECK-NEXT: lsls r3, r1, #28
1033 ; CHECK-NEXT: itt mi
1034 ; CHECK-NEXT: ldrhmi r3, [r2, #6]
1035 ; CHECK-NEXT: vmovmi.16 q0[3], r3
1036 ; CHECK-NEXT: lsls r3, r1, #27
1037 ; CHECK-NEXT: itt mi
1038 ; CHECK-NEXT: ldrhmi r3, [r2, #8]
1039 ; CHECK-NEXT: vmovmi.16 q0[4], r3
1040 ; CHECK-NEXT: lsls r3, r1, #26
1041 ; CHECK-NEXT: itt mi
1042 ; CHECK-NEXT: ldrhmi r3, [r2, #10]
1043 ; CHECK-NEXT: vmovmi.16 q0[5], r3
1044 ; CHECK-NEXT: lsls r3, r1, #25
1045 ; CHECK-NEXT: itt mi
1046 ; CHECK-NEXT: ldrhmi r3, [r2, #12]
1047 ; CHECK-NEXT: vmovmi.16 q0[6], r3
1048 ; CHECK-NEXT: lsls r1, r1, #24
1049 ; CHECK-NEXT: itt mi
1050 ; CHECK-NEXT: ldrhmi r1, [r2, #14]
1051 ; CHECK-NEXT: vmovmi.16 q0[7], r1
1052 ; CHECK-NEXT: movs r2, #0
1053 ; CHECK-NEXT: vmrs r1, p0
1054 ; CHECK-NEXT: and r3, r1, #1
1055 ; CHECK-NEXT: rsbs r3, r3, #0
1056 ; CHECK-NEXT: bfi r2, r3, #0, #1
1057 ; CHECK-NEXT: ubfx r3, r1, #2, #1
1058 ; CHECK-NEXT: rsbs r3, r3, #0
1059 ; CHECK-NEXT: bfi r2, r3, #1, #1
1060 ; CHECK-NEXT: ubfx r3, r1, #4, #1
1061 ; CHECK-NEXT: rsbs r3, r3, #0
1062 ; CHECK-NEXT: bfi r2, r3, #2, #1
1063 ; CHECK-NEXT: ubfx r3, r1, #6, #1
1064 ; CHECK-NEXT: rsbs r3, r3, #0
1065 ; CHECK-NEXT: bfi r2, r3, #3, #1
1066 ; CHECK-NEXT: ubfx r3, r1, #8, #1
1067 ; CHECK-NEXT: rsbs r3, r3, #0
1068 ; CHECK-NEXT: bfi r2, r3, #4, #1
1069 ; CHECK-NEXT: ubfx r3, r1, #10, #1
1070 ; CHECK-NEXT: rsbs r3, r3, #0
1071 ; CHECK-NEXT: bfi r2, r3, #5, #1
1072 ; CHECK-NEXT: ubfx r3, r1, #12, #1
1073 ; CHECK-NEXT: ubfx r1, r1, #14, #1
1074 ; CHECK-NEXT: rsbs r3, r3, #0
1075 ; CHECK-NEXT: bfi r2, r3, #6, #1
1076 ; CHECK-NEXT: rsbs r1, r1, #0
1077 ; CHECK-NEXT: bfi r2, r1, #7, #1
1078 ; CHECK-NEXT: uxtb r1, r2
1079 ; CHECK-NEXT: lsls r2, r2, #31
1080 ; CHECK-NEXT: itt ne
1081 ; CHECK-NEXT: vmovne.u16 r2, q0[0]
1082 ; CHECK-NEXT: strbne r2, [r0]
1083 ; CHECK-NEXT: lsls r2, r1, #30
1084 ; CHECK-NEXT: itt mi
1085 ; CHECK-NEXT: vmovmi.u16 r2, q0[1]
1086 ; CHECK-NEXT: strbmi r2, [r0, #1]
1087 ; CHECK-NEXT: lsls r2, r1, #29
1088 ; CHECK-NEXT: itt mi
1089 ; CHECK-NEXT: vmovmi.u16 r2, q0[2]
1090 ; CHECK-NEXT: strbmi r2, [r0, #2]
1091 ; CHECK-NEXT: lsls r2, r1, #28
1092 ; CHECK-NEXT: itt mi
1093 ; CHECK-NEXT: vmovmi.u16 r2, q0[3]
1094 ; CHECK-NEXT: strbmi r2, [r0, #3]
1095 ; CHECK-NEXT: lsls r2, r1, #27
1096 ; CHECK-NEXT: itt mi
1097 ; CHECK-NEXT: vmovmi.u16 r2, q0[4]
1098 ; CHECK-NEXT: strbmi r2, [r0, #4]
1099 ; CHECK-NEXT: lsls r2, r1, #26
1100 ; CHECK-NEXT: itt mi
1101 ; CHECK-NEXT: vmovmi.u16 r2, q0[5]
1102 ; CHECK-NEXT: strbmi r2, [r0, #5]
1103 ; CHECK-NEXT: lsls r2, r1, #25
1104 ; CHECK-NEXT: itt mi
1105 ; CHECK-NEXT: vmovmi.u16 r2, q0[6]
1106 ; CHECK-NEXT: strbmi r2, [r0, #6]
1107 ; CHECK-NEXT: lsls r1, r1, #24
1108 ; CHECK-NEXT: itt mi
1109 ; CHECK-NEXT: vmovmi.u16 r1, q0[7]
1110 ; CHECK-NEXT: strbmi r1, [r0, #7]
1111 ; CHECK-NEXT: add sp, #16
1114 %0 = load <8 x i16>, <8 x i16>* %mask, align 2
1115 %1 = icmp sgt <8 x i16> %0, zeroinitializer
1116 %2 = call <8 x i16> @llvm.masked.load.v8i16(<8 x i16>* %src, i32 2, <8 x i1> %1, <8 x i16> undef)
1117 %3 = trunc <8 x i16> %2 to <8 x i8>
1118 call void @llvm.masked.store.v8i8(<8 x i8> %3, <8 x i8>* %dest, i32 1, <8 x i1> %1)
1122 define void @foo_trunc_v4i8_v4i32(<4 x i8> *%dest, <4 x i32> *%mask, <4 x i32> *%src) {
1123 ; CHECK-LABEL: foo_trunc_v4i8_v4i32:
1124 ; CHECK: @ %bb.0: @ %entry
1125 ; CHECK-NEXT: .pad #8
1126 ; CHECK-NEXT: sub sp, #8
1127 ; CHECK-NEXT: vldrw.u32 q0, [r1]
1128 ; CHECK-NEXT: movs r3, #0
1129 ; CHECK-NEXT: vcmp.s32 gt, q0, zr
1130 ; CHECK-NEXT: @ implicit-def: $q0
1131 ; CHECK-NEXT: vmrs r12, p0
1132 ; CHECK-NEXT: and r1, r12, #1
1133 ; CHECK-NEXT: rsbs r1, r1, #0
1134 ; CHECK-NEXT: bfi r3, r1, #0, #1
1135 ; CHECK-NEXT: ubfx r1, r12, #4, #1
1136 ; CHECK-NEXT: rsbs r1, r1, #0
1137 ; CHECK-NEXT: bfi r3, r1, #1, #1
1138 ; CHECK-NEXT: ubfx r1, r12, #8, #1
1139 ; CHECK-NEXT: rsbs r1, r1, #0
1140 ; CHECK-NEXT: bfi r3, r1, #2, #1
1141 ; CHECK-NEXT: ubfx r1, r12, #12, #1
1142 ; CHECK-NEXT: rsbs r1, r1, #0
1143 ; CHECK-NEXT: bfi r3, r1, #3, #1
1144 ; CHECK-NEXT: and r1, r3, #15
1145 ; CHECK-NEXT: lsls r3, r1, #31
1146 ; CHECK-NEXT: itt ne
1147 ; CHECK-NEXT: ldrne r3, [r2]
1148 ; CHECK-NEXT: vmovne.32 q0[0], r3
1149 ; CHECK-NEXT: lsls r3, r1, #30
1150 ; CHECK-NEXT: itt mi
1151 ; CHECK-NEXT: ldrmi r3, [r2, #4]
1152 ; CHECK-NEXT: vmovmi.32 q0[1], r3
1153 ; CHECK-NEXT: lsls r3, r1, #29
1154 ; CHECK-NEXT: itt mi
1155 ; CHECK-NEXT: ldrmi r3, [r2, #8]
1156 ; CHECK-NEXT: vmovmi.32 q0[2], r3
1157 ; CHECK-NEXT: lsls r1, r1, #28
1158 ; CHECK-NEXT: itt mi
1159 ; CHECK-NEXT: ldrmi r1, [r2, #12]
1160 ; CHECK-NEXT: vmovmi.32 q0[3], r1
1161 ; CHECK-NEXT: vmrs r2, p0
1162 ; CHECK-NEXT: movs r1, #0
1163 ; CHECK-NEXT: and r3, r2, #1
1164 ; CHECK-NEXT: rsbs r3, r3, #0
1165 ; CHECK-NEXT: bfi r1, r3, #0, #1
1166 ; CHECK-NEXT: ubfx r3, r2, #4, #1
1167 ; CHECK-NEXT: rsbs r3, r3, #0
1168 ; CHECK-NEXT: bfi r1, r3, #1, #1
1169 ; CHECK-NEXT: ubfx r3, r2, #8, #1
1170 ; CHECK-NEXT: ubfx r2, r2, #12, #1
1171 ; CHECK-NEXT: rsbs r3, r3, #0
1172 ; CHECK-NEXT: bfi r1, r3, #2, #1
1173 ; CHECK-NEXT: rsbs r2, r2, #0
1174 ; CHECK-NEXT: bfi r1, r2, #3, #1
1175 ; CHECK-NEXT: and r1, r1, #15
1176 ; CHECK-NEXT: lsls r2, r1, #31
1177 ; CHECK-NEXT: itt ne
1178 ; CHECK-NEXT: vmovne r2, s0
1179 ; CHECK-NEXT: strbne r2, [r0]
1180 ; CHECK-NEXT: lsls r2, r1, #30
1181 ; CHECK-NEXT: itt mi
1182 ; CHECK-NEXT: vmovmi r2, s1
1183 ; CHECK-NEXT: strbmi r2, [r0, #1]
1184 ; CHECK-NEXT: lsls r2, r1, #29
1185 ; CHECK-NEXT: itt mi
1186 ; CHECK-NEXT: vmovmi r2, s2
1187 ; CHECK-NEXT: strbmi r2, [r0, #2]
1188 ; CHECK-NEXT: lsls r1, r1, #28
1189 ; CHECK-NEXT: itt mi
1190 ; CHECK-NEXT: vmovmi r1, s3
1191 ; CHECK-NEXT: strbmi r1, [r0, #3]
1192 ; CHECK-NEXT: add sp, #8
1195 %0 = load <4 x i32>, <4 x i32>* %mask, align 4
1196 %1 = icmp sgt <4 x i32> %0, zeroinitializer
1197 %2 = call <4 x i32> @llvm.masked.load.v4i32(<4 x i32>* %src, i32 4, <4 x i1> %1, <4 x i32> undef)
1198 %3 = trunc <4 x i32> %2 to <4 x i8>
1199 call void @llvm.masked.store.v4i8(<4 x i8> %3, <4 x i8>* %dest, i32 1, <4 x i1> %1)
1203 define void @foo_trunc_v4i16_v4i32(<4 x i16> *%dest, <4 x i32> *%mask, <4 x i32> *%src) {
1204 ; CHECK-LABEL: foo_trunc_v4i16_v4i32:
1205 ; CHECK: @ %bb.0: @ %entry
1206 ; CHECK-NEXT: .pad #8
1207 ; CHECK-NEXT: sub sp, #8
1208 ; CHECK-NEXT: vldrw.u32 q0, [r1]
1209 ; CHECK-NEXT: movs r3, #0
1210 ; CHECK-NEXT: vcmp.s32 gt, q0, zr
1211 ; CHECK-NEXT: @ implicit-def: $q0
1212 ; CHECK-NEXT: vmrs r12, p0
1213 ; CHECK-NEXT: and r1, r12, #1
1214 ; CHECK-NEXT: rsbs r1, r1, #0
1215 ; CHECK-NEXT: bfi r3, r1, #0, #1
1216 ; CHECK-NEXT: ubfx r1, r12, #4, #1
1217 ; CHECK-NEXT: rsbs r1, r1, #0
1218 ; CHECK-NEXT: bfi r3, r1, #1, #1
1219 ; CHECK-NEXT: ubfx r1, r12, #8, #1
1220 ; CHECK-NEXT: rsbs r1, r1, #0
1221 ; CHECK-NEXT: bfi r3, r1, #2, #1
1222 ; CHECK-NEXT: ubfx r1, r12, #12, #1
1223 ; CHECK-NEXT: rsbs r1, r1, #0
1224 ; CHECK-NEXT: bfi r3, r1, #3, #1
1225 ; CHECK-NEXT: and r1, r3, #15
1226 ; CHECK-NEXT: lsls r3, r1, #31
1227 ; CHECK-NEXT: itt ne
1228 ; CHECK-NEXT: ldrne r3, [r2]
1229 ; CHECK-NEXT: vmovne.32 q0[0], r3
1230 ; CHECK-NEXT: lsls r3, r1, #30
1231 ; CHECK-NEXT: itt mi
1232 ; CHECK-NEXT: ldrmi r3, [r2, #4]
1233 ; CHECK-NEXT: vmovmi.32 q0[1], r3
1234 ; CHECK-NEXT: lsls r3, r1, #29
1235 ; CHECK-NEXT: itt mi
1236 ; CHECK-NEXT: ldrmi r3, [r2, #8]
1237 ; CHECK-NEXT: vmovmi.32 q0[2], r3
1238 ; CHECK-NEXT: lsls r1, r1, #28
1239 ; CHECK-NEXT: itt mi
1240 ; CHECK-NEXT: ldrmi r1, [r2, #12]
1241 ; CHECK-NEXT: vmovmi.32 q0[3], r1
1242 ; CHECK-NEXT: vmrs r2, p0
1243 ; CHECK-NEXT: movs r1, #0
1244 ; CHECK-NEXT: and r3, r2, #1
1245 ; CHECK-NEXT: rsbs r3, r3, #0
1246 ; CHECK-NEXT: bfi r1, r3, #0, #1
1247 ; CHECK-NEXT: ubfx r3, r2, #4, #1
1248 ; CHECK-NEXT: rsbs r3, r3, #0
1249 ; CHECK-NEXT: bfi r1, r3, #1, #1
1250 ; CHECK-NEXT: ubfx r3, r2, #8, #1
1251 ; CHECK-NEXT: ubfx r2, r2, #12, #1
1252 ; CHECK-NEXT: rsbs r3, r3, #0
1253 ; CHECK-NEXT: bfi r1, r3, #2, #1
1254 ; CHECK-NEXT: rsbs r2, r2, #0
1255 ; CHECK-NEXT: bfi r1, r2, #3, #1
1256 ; CHECK-NEXT: and r1, r1, #15
1257 ; CHECK-NEXT: lsls r2, r1, #31
1258 ; CHECK-NEXT: itt ne
1259 ; CHECK-NEXT: vmovne r2, s0
1260 ; CHECK-NEXT: strhne r2, [r0]
1261 ; CHECK-NEXT: lsls r2, r1, #30
1262 ; CHECK-NEXT: itt mi
1263 ; CHECK-NEXT: vmovmi r2, s1
1264 ; CHECK-NEXT: strhmi r2, [r0, #2]
1265 ; CHECK-NEXT: lsls r2, r1, #29
1266 ; CHECK-NEXT: itt mi
1267 ; CHECK-NEXT: vmovmi r2, s2
1268 ; CHECK-NEXT: strhmi r2, [r0, #4]
1269 ; CHECK-NEXT: lsls r1, r1, #28
1270 ; CHECK-NEXT: itt mi
1271 ; CHECK-NEXT: vmovmi r1, s3
1272 ; CHECK-NEXT: strhmi r1, [r0, #6]
1273 ; CHECK-NEXT: add sp, #8
1276 %0 = load <4 x i32>, <4 x i32>* %mask, align 4
1277 %1 = icmp sgt <4 x i32> %0, zeroinitializer
1278 %2 = call <4 x i32> @llvm.masked.load.v4i32(<4 x i32>* %src, i32 4, <4 x i1> %1, <4 x i32> undef)
1279 %3 = trunc <4 x i32> %2 to <4 x i16>
1280 call void @llvm.masked.store.v4i16(<4 x i16> %3, <4 x i16>* %dest, i32 2, <4 x i1> %1)
1284 define void @foo_v4f32_v4f32(<4 x float> *%dest, <4 x i32> *%mask, <4 x float> *%src) {
1285 ; CHECK-LABEL: foo_v4f32_v4f32:
1286 ; CHECK: @ %bb.0: @ %entry
1287 ; CHECK-NEXT: .pad #8
1288 ; CHECK-NEXT: sub sp, #8
1289 ; CHECK-NEXT: vldrw.u32 q0, [r1]
1290 ; CHECK-NEXT: movs r3, #0
1291 ; CHECK-NEXT: vcmp.s32 gt, q0, zr
1292 ; CHECK-NEXT: @ implicit-def: $q0
1293 ; CHECK-NEXT: vmrs r12, p0
1294 ; CHECK-NEXT: and r1, r12, #1
1295 ; CHECK-NEXT: rsbs r1, r1, #0
1296 ; CHECK-NEXT: bfi r3, r1, #0, #1
1297 ; CHECK-NEXT: ubfx r1, r12, #4, #1
1298 ; CHECK-NEXT: rsbs r1, r1, #0
1299 ; CHECK-NEXT: bfi r3, r1, #1, #1
1300 ; CHECK-NEXT: ubfx r1, r12, #8, #1
1301 ; CHECK-NEXT: rsbs r1, r1, #0
1302 ; CHECK-NEXT: bfi r3, r1, #2, #1
1303 ; CHECK-NEXT: ubfx r1, r12, #12, #1
1304 ; CHECK-NEXT: rsbs r1, r1, #0
1305 ; CHECK-NEXT: bfi r3, r1, #3, #1
1306 ; CHECK-NEXT: and r1, r3, #15
1307 ; CHECK-NEXT: lsls r3, r1, #31
1309 ; CHECK-NEXT: vldrne s0, [r2]
1310 ; CHECK-NEXT: lsls r3, r1, #30
1312 ; CHECK-NEXT: vldrmi s1, [r2, #4]
1313 ; CHECK-NEXT: lsls r3, r1, #29
1315 ; CHECK-NEXT: vldrmi s2, [r2, #8]
1316 ; CHECK-NEXT: lsls r1, r1, #28
1318 ; CHECK-NEXT: vldrmi s3, [r2, #12]
1319 ; CHECK-NEXT: vmrs r2, p0
1320 ; CHECK-NEXT: movs r1, #0
1321 ; CHECK-NEXT: and r3, r2, #1
1322 ; CHECK-NEXT: rsbs r3, r3, #0
1323 ; CHECK-NEXT: bfi r1, r3, #0, #1
1324 ; CHECK-NEXT: ubfx r3, r2, #4, #1
1325 ; CHECK-NEXT: rsbs r3, r3, #0
1326 ; CHECK-NEXT: bfi r1, r3, #1, #1
1327 ; CHECK-NEXT: ubfx r3, r2, #8, #1
1328 ; CHECK-NEXT: ubfx r2, r2, #12, #1
1329 ; CHECK-NEXT: rsbs r3, r3, #0
1330 ; CHECK-NEXT: bfi r1, r3, #2, #1
1331 ; CHECK-NEXT: rsbs r2, r2, #0
1332 ; CHECK-NEXT: bfi r1, r2, #3, #1
1333 ; CHECK-NEXT: and r1, r1, #15
1334 ; CHECK-NEXT: lsls r2, r1, #31
1336 ; CHECK-NEXT: vstrne s0, [r0]
1337 ; CHECK-NEXT: lsls r2, r1, #30
1339 ; CHECK-NEXT: vstrmi s1, [r0, #4]
1340 ; CHECK-NEXT: lsls r2, r1, #29
1342 ; CHECK-NEXT: vstrmi s2, [r0, #8]
1343 ; CHECK-NEXT: lsls r1, r1, #28
1345 ; CHECK-NEXT: vstrmi s3, [r0, #12]
1346 ; CHECK-NEXT: add sp, #8
1349 %0 = load <4 x i32>, <4 x i32>* %mask, align 4
1350 %1 = icmp sgt <4 x i32> %0, zeroinitializer
1351 %2 = call <4 x float> @llvm.masked.load.v4f32(<4 x float>* %src, i32 4, <4 x i1> %1, <4 x float> undef)
1352 call void @llvm.masked.store.v4f32(<4 x float> %2, <4 x float>* %dest, i32 4, <4 x i1> %1)
1356 define void @foo_v8f16_v8f16(<8 x half> *%dest, <8 x i16> *%mask, <8 x half> *%src) {
1357 ; CHECK-LABEL: foo_v8f16_v8f16:
1358 ; CHECK: @ %bb.0: @ %entry
1359 ; CHECK-NEXT: .pad #16
1360 ; CHECK-NEXT: sub sp, #16
1361 ; CHECK-NEXT: vldrh.u16 q0, [r1]
1362 ; CHECK-NEXT: movs r3, #0
1363 ; CHECK-NEXT: vcmp.s16 gt, q0, zr
1364 ; CHECK-NEXT: @ implicit-def: $q0
1365 ; CHECK-NEXT: vmrs r12, p0
1366 ; CHECK-NEXT: and r1, r12, #1
1367 ; CHECK-NEXT: rsbs r1, r1, #0
1368 ; CHECK-NEXT: bfi r3, r1, #0, #1
1369 ; CHECK-NEXT: ubfx r1, r12, #2, #1
1370 ; CHECK-NEXT: rsbs r1, r1, #0
1371 ; CHECK-NEXT: bfi r3, r1, #1, #1
1372 ; CHECK-NEXT: ubfx r1, r12, #4, #1
1373 ; CHECK-NEXT: rsbs r1, r1, #0
1374 ; CHECK-NEXT: bfi r3, r1, #2, #1
1375 ; CHECK-NEXT: ubfx r1, r12, #6, #1
1376 ; CHECK-NEXT: rsbs r1, r1, #0
1377 ; CHECK-NEXT: bfi r3, r1, #3, #1
1378 ; CHECK-NEXT: ubfx r1, r12, #8, #1
1379 ; CHECK-NEXT: rsbs r1, r1, #0
1380 ; CHECK-NEXT: bfi r3, r1, #4, #1
1381 ; CHECK-NEXT: ubfx r1, r12, #10, #1
1382 ; CHECK-NEXT: rsbs r1, r1, #0
1383 ; CHECK-NEXT: bfi r3, r1, #5, #1
1384 ; CHECK-NEXT: ubfx r1, r12, #12, #1
1385 ; CHECK-NEXT: rsbs r1, r1, #0
1386 ; CHECK-NEXT: bfi r3, r1, #6, #1
1387 ; CHECK-NEXT: ubfx r1, r12, #14, #1
1388 ; CHECK-NEXT: rsbs r1, r1, #0
1389 ; CHECK-NEXT: bfi r3, r1, #7, #1
1390 ; CHECK-NEXT: uxtb r1, r3
1391 ; CHECK-NEXT: lsls r3, r3, #31
1392 ; CHECK-NEXT: bne .LBB13_18
1393 ; CHECK-NEXT: @ %bb.1: @ %else
1394 ; CHECK-NEXT: lsls r3, r1, #30
1395 ; CHECK-NEXT: bmi .LBB13_19
1396 ; CHECK-NEXT: .LBB13_2: @ %else2
1397 ; CHECK-NEXT: lsls r3, r1, #29
1398 ; CHECK-NEXT: bmi .LBB13_20
1399 ; CHECK-NEXT: .LBB13_3: @ %else5
1400 ; CHECK-NEXT: lsls r3, r1, #28
1401 ; CHECK-NEXT: bmi .LBB13_21
1402 ; CHECK-NEXT: .LBB13_4: @ %else8
1403 ; CHECK-NEXT: lsls r3, r1, #27
1404 ; CHECK-NEXT: bmi .LBB13_22
1405 ; CHECK-NEXT: .LBB13_5: @ %else11
1406 ; CHECK-NEXT: lsls r3, r1, #26
1407 ; CHECK-NEXT: bmi .LBB13_23
1408 ; CHECK-NEXT: .LBB13_6: @ %else14
1409 ; CHECK-NEXT: lsls r3, r1, #25
1410 ; CHECK-NEXT: bmi .LBB13_24
1411 ; CHECK-NEXT: .LBB13_7: @ %else17
1412 ; CHECK-NEXT: lsls r1, r1, #24
1413 ; CHECK-NEXT: bpl .LBB13_9
1414 ; CHECK-NEXT: .LBB13_8: @ %cond.load19
1415 ; CHECK-NEXT: vldr.16 s4, [r2, #14]
1416 ; CHECK-NEXT: vmov r1, s4
1417 ; CHECK-NEXT: vmov.16 q0[7], r1
1418 ; CHECK-NEXT: .LBB13_9: @ %else20
1419 ; CHECK-NEXT: vmrs r1, p0
1420 ; CHECK-NEXT: movs r2, #0
1421 ; CHECK-NEXT: and r3, r1, #1
1422 ; CHECK-NEXT: rsbs r3, r3, #0
1423 ; CHECK-NEXT: bfi r2, r3, #0, #1
1424 ; CHECK-NEXT: ubfx r3, r1, #2, #1
1425 ; CHECK-NEXT: rsbs r3, r3, #0
1426 ; CHECK-NEXT: bfi r2, r3, #1, #1
1427 ; CHECK-NEXT: ubfx r3, r1, #4, #1
1428 ; CHECK-NEXT: rsbs r3, r3, #0
1429 ; CHECK-NEXT: bfi r2, r3, #2, #1
1430 ; CHECK-NEXT: ubfx r3, r1, #6, #1
1431 ; CHECK-NEXT: rsbs r3, r3, #0
1432 ; CHECK-NEXT: bfi r2, r3, #3, #1
1433 ; CHECK-NEXT: ubfx r3, r1, #8, #1
1434 ; CHECK-NEXT: rsbs r3, r3, #0
1435 ; CHECK-NEXT: bfi r2, r3, #4, #1
1436 ; CHECK-NEXT: ubfx r3, r1, #10, #1
1437 ; CHECK-NEXT: rsbs r3, r3, #0
1438 ; CHECK-NEXT: bfi r2, r3, #5, #1
1439 ; CHECK-NEXT: ubfx r3, r1, #12, #1
1440 ; CHECK-NEXT: ubfx r1, r1, #14, #1
1441 ; CHECK-NEXT: rsbs r3, r3, #0
1442 ; CHECK-NEXT: bfi r2, r3, #6, #1
1443 ; CHECK-NEXT: rsbs r1, r1, #0
1444 ; CHECK-NEXT: bfi r2, r1, #7, #1
1445 ; CHECK-NEXT: uxtb r1, r2
1446 ; CHECK-NEXT: lsls r2, r2, #31
1447 ; CHECK-NEXT: bne .LBB13_25
1448 ; CHECK-NEXT: @ %bb.10: @ %else23
1449 ; CHECK-NEXT: lsls r2, r1, #30
1450 ; CHECK-NEXT: bmi .LBB13_26
1451 ; CHECK-NEXT: .LBB13_11: @ %else25
1452 ; CHECK-NEXT: lsls r2, r1, #29
1453 ; CHECK-NEXT: bmi .LBB13_27
1454 ; CHECK-NEXT: .LBB13_12: @ %else27
1455 ; CHECK-NEXT: lsls r2, r1, #28
1456 ; CHECK-NEXT: bmi .LBB13_28
1457 ; CHECK-NEXT: .LBB13_13: @ %else29
1458 ; CHECK-NEXT: lsls r2, r1, #27
1459 ; CHECK-NEXT: bmi .LBB13_29
1460 ; CHECK-NEXT: .LBB13_14: @ %else31
1461 ; CHECK-NEXT: lsls r2, r1, #26
1462 ; CHECK-NEXT: bmi .LBB13_30
1463 ; CHECK-NEXT: .LBB13_15: @ %else33
1464 ; CHECK-NEXT: lsls r2, r1, #25
1465 ; CHECK-NEXT: bmi .LBB13_31
1466 ; CHECK-NEXT: .LBB13_16: @ %else35
1467 ; CHECK-NEXT: lsls r1, r1, #24
1468 ; CHECK-NEXT: bmi .LBB13_32
1469 ; CHECK-NEXT: .LBB13_17: @ %else37
1470 ; CHECK-NEXT: add sp, #16
1472 ; CHECK-NEXT: .LBB13_18: @ %cond.load
1473 ; CHECK-NEXT: vldr.16 s0, [r2]
1474 ; CHECK-NEXT: lsls r3, r1, #30
1475 ; CHECK-NEXT: bpl .LBB13_2
1476 ; CHECK-NEXT: .LBB13_19: @ %cond.load1
1477 ; CHECK-NEXT: vldr.16 s4, [r2, #2]
1478 ; CHECK-NEXT: vmov r3, s4
1479 ; CHECK-NEXT: vmov.16 q0[1], r3
1480 ; CHECK-NEXT: lsls r3, r1, #29
1481 ; CHECK-NEXT: bpl .LBB13_3
1482 ; CHECK-NEXT: .LBB13_20: @ %cond.load4
1483 ; CHECK-NEXT: vldr.16 s4, [r2, #4]
1484 ; CHECK-NEXT: vmov r3, s4
1485 ; CHECK-NEXT: vmov.16 q0[2], r3
1486 ; CHECK-NEXT: lsls r3, r1, #28
1487 ; CHECK-NEXT: bpl .LBB13_4
1488 ; CHECK-NEXT: .LBB13_21: @ %cond.load7
1489 ; CHECK-NEXT: vldr.16 s4, [r2, #6]
1490 ; CHECK-NEXT: vmov r3, s4
1491 ; CHECK-NEXT: vmov.16 q0[3], r3
1492 ; CHECK-NEXT: lsls r3, r1, #27
1493 ; CHECK-NEXT: bpl .LBB13_5
1494 ; CHECK-NEXT: .LBB13_22: @ %cond.load10
1495 ; CHECK-NEXT: vldr.16 s4, [r2, #8]
1496 ; CHECK-NEXT: vmov r3, s4
1497 ; CHECK-NEXT: vmov.16 q0[4], r3
1498 ; CHECK-NEXT: lsls r3, r1, #26
1499 ; CHECK-NEXT: bpl .LBB13_6
1500 ; CHECK-NEXT: .LBB13_23: @ %cond.load13
1501 ; CHECK-NEXT: vldr.16 s4, [r2, #10]
1502 ; CHECK-NEXT: vmov r3, s4
1503 ; CHECK-NEXT: vmov.16 q0[5], r3
1504 ; CHECK-NEXT: lsls r3, r1, #25
1505 ; CHECK-NEXT: bpl.w .LBB13_7
1506 ; CHECK-NEXT: .LBB13_24: @ %cond.load16
1507 ; CHECK-NEXT: vldr.16 s4, [r2, #12]
1508 ; CHECK-NEXT: vmov r3, s4
1509 ; CHECK-NEXT: vmov.16 q0[6], r3
1510 ; CHECK-NEXT: lsls r1, r1, #24
1511 ; CHECK-NEXT: bmi.w .LBB13_8
1512 ; CHECK-NEXT: b .LBB13_9
1513 ; CHECK-NEXT: .LBB13_25: @ %cond.store
1514 ; CHECK-NEXT: vstr.16 s0, [r0]
1515 ; CHECK-NEXT: lsls r2, r1, #30
1516 ; CHECK-NEXT: bpl .LBB13_11
1517 ; CHECK-NEXT: .LBB13_26: @ %cond.store24
1518 ; CHECK-NEXT: vmovx.f16 s4, s0
1519 ; CHECK-NEXT: vstr.16 s4, [r0, #2]
1520 ; CHECK-NEXT: lsls r2, r1, #29
1521 ; CHECK-NEXT: bpl .LBB13_12
1522 ; CHECK-NEXT: .LBB13_27: @ %cond.store26
1523 ; CHECK-NEXT: vstr.16 s1, [r0, #4]
1524 ; CHECK-NEXT: lsls r2, r1, #28
1525 ; CHECK-NEXT: bpl .LBB13_13
1526 ; CHECK-NEXT: .LBB13_28: @ %cond.store28
1527 ; CHECK-NEXT: vmovx.f16 s4, s1
1528 ; CHECK-NEXT: vstr.16 s4, [r0, #6]
1529 ; CHECK-NEXT: lsls r2, r1, #27
1530 ; CHECK-NEXT: bpl .LBB13_14
1531 ; CHECK-NEXT: .LBB13_29: @ %cond.store30
1532 ; CHECK-NEXT: vstr.16 s2, [r0, #8]
1533 ; CHECK-NEXT: lsls r2, r1, #26
1534 ; CHECK-NEXT: bpl .LBB13_15
1535 ; CHECK-NEXT: .LBB13_30: @ %cond.store32
1536 ; CHECK-NEXT: vmovx.f16 s4, s2
1537 ; CHECK-NEXT: vstr.16 s4, [r0, #10]
1538 ; CHECK-NEXT: lsls r2, r1, #25
1539 ; CHECK-NEXT: bpl .LBB13_16
1540 ; CHECK-NEXT: .LBB13_31: @ %cond.store34
1541 ; CHECK-NEXT: vstr.16 s3, [r0, #12]
1542 ; CHECK-NEXT: lsls r1, r1, #24
1543 ; CHECK-NEXT: bpl .LBB13_17
1544 ; CHECK-NEXT: .LBB13_32: @ %cond.store36
1545 ; CHECK-NEXT: vmovx.f16 s0, s3
1546 ; CHECK-NEXT: vstr.16 s0, [r0, #14]
1547 ; CHECK-NEXT: add sp, #16
1550 %0 = load <8 x i16>, <8 x i16>* %mask, align 2
1551 %1 = icmp sgt <8 x i16> %0, zeroinitializer
1552 %2 = call <8 x half> @llvm.masked.load.v8f16(<8 x half>* %src, i32 2, <8 x i1> %1, <8 x half> undef)
1553 call void @llvm.masked.store.v8f16(<8 x half> %2, <8 x half>* %dest, i32 2, <8 x i1> %1)
1557 declare void @llvm.masked.store.v4i32(<4 x i32>, <4 x i32>*, i32, <4 x i1>)
1558 declare void @llvm.masked.store.v8i16(<8 x i16>, <8 x i16>*, i32, <8 x i1>)
1559 declare void @llvm.masked.store.v16i8(<16 x i8>, <16 x i8>*, i32, <16 x i1>)
1560 declare void @llvm.masked.store.v8f16(<8 x half>, <8 x half>*, i32, <8 x i1>)
1561 declare void @llvm.masked.store.v4f32(<4 x float>, <4 x float>*, i32, <4 x i1>)
1562 declare <16 x i8> @llvm.masked.load.v16i8(<16 x i8>*, i32, <16 x i1>, <16 x i8>)
1563 declare <8 x i16> @llvm.masked.load.v8i16(<8 x i16>*, i32, <8 x i1>, <8 x i16>)
1564 declare <4 x i32> @llvm.masked.load.v4i32(<4 x i32>*, i32, <4 x i1>, <4 x i32>)
1565 declare <4 x float> @llvm.masked.load.v4f32(<4 x float>*, i32, <4 x i1>, <4 x float>)
1566 declare <8 x half> @llvm.masked.load.v8f16(<8 x half>*, i32, <8 x i1>, <8 x half>)
1568 declare void @llvm.masked.store.v8i8(<8 x i8>, <8 x i8>*, i32, <8 x i1>)
1569 declare void @llvm.masked.store.v4i8(<4 x i8>, <4 x i8>*, i32, <4 x i1>)
1570 declare void @llvm.masked.store.v4i16(<4 x i16>, <4 x i16>*, i32, <4 x i1>)
1571 declare <4 x i16> @llvm.masked.load.v4i16(<4 x i16>*, i32, <4 x i1>, <4 x i16>)
1572 declare <4 x i8> @llvm.masked.load.v4i8(<4 x i8>*, i32, <4 x i1>, <4 x i8>)
1573 declare <8 x i8> @llvm.masked.load.v8i8(<8 x i8>*, i32, <8 x i1>, <8 x i8>)