[AArch64] Check the expansion of BITREVERSE in regression test
[llvm-core.git] / lib / CodeGen / LiveDebugVariables.h
blob3d36f4d2494a525a6057c95bb39fea0b901aaf04
1 //===- LiveDebugVariables.h - Tracking debug info variables ----*- c++ -*--===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file provides the interface to the LiveDebugVariables analysis.
12 // The analysis removes DBG_VALUE instructions for virtual registers and tracks
13 // live user variables in a data structure that can be updated during register
14 // allocation.
16 // After register allocation new DBG_VALUE instructions are emitted to reflect
17 // the new locations of user variables.
19 //===----------------------------------------------------------------------===//
21 #ifndef LLVM_LIB_CODEGEN_LIVEDEBUGVARIABLES_H
22 #define LLVM_LIB_CODEGEN_LIVEDEBUGVARIABLES_H
24 #include "llvm/ADT/ArrayRef.h"
25 #include "llvm/CodeGen/MachineFunctionPass.h"
26 #include "llvm/IR/DebugInfo.h"
28 namespace llvm {
30 class LiveInterval;
31 class LiveIntervals;
32 class VirtRegMap;
34 class LLVM_LIBRARY_VISIBILITY LiveDebugVariables : public MachineFunctionPass {
35 void *pImpl;
37 public:
38 static char ID; // Pass identification, replacement for typeid
40 LiveDebugVariables();
41 ~LiveDebugVariables() override;
43 /// renameRegister - Move any user variables in OldReg to NewReg:SubIdx.
44 /// @param OldReg Old virtual register that is going away.
45 /// @param NewReg New register holding the user variables.
46 /// @param SubIdx If NewReg is a virtual register, SubIdx may indicate a sub-
47 /// register.
48 void renameRegister(unsigned OldReg, unsigned NewReg, unsigned SubIdx);
50 /// splitRegister - Move any user variables in OldReg to the live ranges in
51 /// NewRegs where they are live. Mark the values as unavailable where no new
52 /// register is live.
53 void splitRegister(unsigned OldReg, ArrayRef<unsigned> NewRegs,
54 LiveIntervals &LIS);
56 /// emitDebugValues - Emit new DBG_VALUE instructions reflecting the changes
57 /// that happened during register allocation.
58 /// @param VRM Rename virtual registers according to map.
59 void emitDebugValues(VirtRegMap *VRM);
61 /// dump - Print data structures to dbgs().
62 void dump();
64 private:
66 bool runOnMachineFunction(MachineFunction &) override;
67 void releaseMemory() override;
68 void getAnalysisUsage(AnalysisUsage &) const override;
69 bool doInitialization(Module &) override;
73 } // namespace llvm
75 #endif