| blob | 608689dc46579a38b7e85a59d2b0de0765e4061f |
1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc -mtriple=thumbv8.1m.main-arm-none-eabi -mattr=+mve,+fullfp16 -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-MVE
3 ; RUN: llc -mtriple=thumbv8.1m.main-arm-none-eabi -mattr=+mve.fp -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-MVEFP
5 define arm_aapcs_vfpcc <4 x float> @vcmp_oeq_v4f32(<4 x float> %src, float %src2, <4 x float> %a, <4 x float> %b) {
6 ; CHECK-MVE-LABEL: vcmp_oeq_v4f32:
7 ; CHECK-MVE: @ %bb.0: @ %entry
8 ; CHECK-MVE-NEXT: vcmp.f32 s0, s4
9 ; CHECK-MVE-NEXT: movs r1, #0
10 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
11 ; CHECK-MVE-NEXT: it eq
12 ; CHECK-MVE-NEXT: moveq r1, #1
13 ; CHECK-MVE-NEXT: cmp r1, #0
14 ; CHECK-MVE-NEXT: vcmp.f32 s1, s4
15 ; CHECK-MVE-NEXT: cset r1, ne
16 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
17 ; CHECK-MVE-NEXT: mov.w r2, #0
18 ; CHECK-MVE-NEXT: vcmp.f32 s2, s4
19 ; CHECK-MVE-NEXT: it eq
20 ; CHECK-MVE-NEXT: moveq r2, #1
21 ; CHECK-MVE-NEXT: cmp r2, #0
22 ; CHECK-MVE-NEXT: cset r2, ne
23 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
24 ; CHECK-MVE-NEXT: mov.w r3, #0
25 ; CHECK-MVE-NEXT: vcmp.f32 s3, s4
26 ; CHECK-MVE-NEXT: it eq
27 ; CHECK-MVE-NEXT: moveq r3, #1
28 ; CHECK-MVE-NEXT: cmp r3, #0
29 ; CHECK-MVE-NEXT: cset r3, ne
30 ; CHECK-MVE-NEXT: movs r0, #0
31 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
32 ; CHECK-MVE-NEXT: it eq
33 ; CHECK-MVE-NEXT: moveq r0, #1
34 ; CHECK-MVE-NEXT: cmp r0, #0
35 ; CHECK-MVE-NEXT: cset r0, ne
36 ; CHECK-MVE-NEXT: lsls r0, r0, #31
37 ; CHECK-MVE-NEXT: vseleq.f32 s3, s15, s11
38 ; CHECK-MVE-NEXT: lsls r0, r3, #31
39 ; CHECK-MVE-NEXT: vseleq.f32 s2, s14, s10
40 ; CHECK-MVE-NEXT: lsls r0, r2, #31
41 ; CHECK-MVE-NEXT: vseleq.f32 s1, s13, s9
42 ; CHECK-MVE-NEXT: lsls r0, r1, #31
43 ; CHECK-MVE-NEXT: vseleq.f32 s0, s12, s8
44 ; CHECK-MVE-NEXT: bx lr
45 ;
46 ; CHECK-MVEFP-LABEL: vcmp_oeq_v4f32:
47 ; CHECK-MVEFP: @ %bb.0: @ %entry
48 ; CHECK-MVEFP-NEXT: vmov r0, s4
49 ; CHECK-MVEFP-NEXT: vcmp.f32 eq, q0, r0
50 ; CHECK-MVEFP-NEXT: vpsel q0, q2, q3
51 ; CHECK-MVEFP-NEXT: bx lr
52 entry:
53 %i = insertelement <4 x float> undef, float %src2, i32 0
54 %sp = shufflevector <4 x float> %i, <4 x float> undef, <4 x i32> zeroinitializer
55 %c = fcmp oeq <4 x float> %src, %sp
56 %s = select <4 x i1> %c, <4 x float> %a, <4 x float> %b
57 ret <4 x float> %s
58 }
60 define arm_aapcs_vfpcc <4 x float> @vcmp_one_v4f32(<4 x float> %src, float %src2, <4 x float> %a, <4 x float> %b) {
61 ; CHECK-MVE-LABEL: vcmp_one_v4f32:
62 ; CHECK-MVE: @ %bb.0: @ %entry
63 ; CHECK-MVE-NEXT: vcmp.f32 s0, s4
64 ; CHECK-MVE-NEXT: movs r1, #0
65 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
66 ; CHECK-MVE-NEXT: vcmp.f32 s0, s4
67 ; CHECK-MVE-NEXT: it mi
68 ; CHECK-MVE-NEXT: movmi r1, #1
69 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
70 ; CHECK-MVE-NEXT: it gt
71 ; CHECK-MVE-NEXT: movgt r1, #1
72 ; CHECK-MVE-NEXT: cmp r1, #0
73 ; CHECK-MVE-NEXT: vcmp.f32 s1, s4
74 ; CHECK-MVE-NEXT: mov.w r2, #0
75 ; CHECK-MVE-NEXT: cset r1, ne
76 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
77 ; CHECK-MVE-NEXT: it mi
78 ; CHECK-MVE-NEXT: movmi r2, #1
79 ; CHECK-MVE-NEXT: vcmp.f32 s2, s4
80 ; CHECK-MVE-NEXT: it gt
81 ; CHECK-MVE-NEXT: movgt r2, #1
82 ; CHECK-MVE-NEXT: cmp r2, #0
83 ; CHECK-MVE-NEXT: mov.w r3, #0
84 ; CHECK-MVE-NEXT: cset r2, ne
85 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
86 ; CHECK-MVE-NEXT: it mi
87 ; CHECK-MVE-NEXT: movmi r3, #1
88 ; CHECK-MVE-NEXT: it gt
89 ; CHECK-MVE-NEXT: movgt r3, #1
90 ; CHECK-MVE-NEXT: cmp r3, #0
91 ; CHECK-MVE-NEXT: mov.w r0, #0
92 ; CHECK-MVE-NEXT: vcmp.f32 s3, s4
93 ; CHECK-MVE-NEXT: cset r3, ne
94 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
95 ; CHECK-MVE-NEXT: it mi
96 ; CHECK-MVE-NEXT: movmi r0, #1
97 ; CHECK-MVE-NEXT: it gt
98 ; CHECK-MVE-NEXT: movgt r0, #1
99 ; CHECK-MVE-NEXT: cmp r0, #0
100 ; CHECK-MVE-NEXT: cset r0, ne
101 ; CHECK-MVE-NEXT: lsls r0, r0, #31
102 ; CHECK-MVE-NEXT: vseleq.f32 s3, s15, s11
103 ; CHECK-MVE-NEXT: lsls r0, r3, #31
104 ; CHECK-MVE-NEXT: vseleq.f32 s2, s14, s10
105 ; CHECK-MVE-NEXT: lsls r0, r2, #31
106 ; CHECK-MVE-NEXT: vseleq.f32 s1, s13, s9
107 ; CHECK-MVE-NEXT: lsls r0, r1, #31
108 ; CHECK-MVE-NEXT: vseleq.f32 s0, s12, s8
109 ; CHECK-MVE-NEXT: bx lr
110 ;
111 ; CHECK-MVEFP-LABEL: vcmp_one_v4f32:
112 ; CHECK-MVEFP: @ %bb.0: @ %entry
113 ; CHECK-MVEFP-NEXT: vmov r0, s4
114 ; CHECK-MVEFP-NEXT: vdup.32 q1, r0
115 ; CHECK-MVEFP-NEXT: vpt.f32 le, q1, q0
116 ; CHECK-MVEFP-NEXT: vcmpt.f32 le, q0, r0
117 ; CHECK-MVEFP-NEXT: vpnot
118 ; CHECK-MVEFP-NEXT: vpsel q0, q2, q3
119 ; CHECK-MVEFP-NEXT: bx lr
120 entry:
121 %i = insertelement <4 x float> undef, float %src2, i32 0
122 %sp = shufflevector <4 x float> %i, <4 x float> undef, <4 x i32> zeroinitializer
123 %c = fcmp one <4 x float> %src, %sp
124 %s = select <4 x i1> %c, <4 x float> %a, <4 x float> %b
125 ret <4 x float> %s
126 }
128 define arm_aapcs_vfpcc <4 x float> @vcmp_ogt_v4f32(<4 x float> %src, float %src2, <4 x float> %a, <4 x float> %b) {
129 ; CHECK-MVE-LABEL: vcmp_ogt_v4f32:
130 ; CHECK-MVE: @ %bb.0: @ %entry
131 ; CHECK-MVE-NEXT: vcmpe.f32 s0, s4
132 ; CHECK-MVE-NEXT: movs r1, #0
133 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
134 ; CHECK-MVE-NEXT: it gt
135 ; CHECK-MVE-NEXT: movgt r1, #1
136 ; CHECK-MVE-NEXT: cmp r1, #0
137 ; CHECK-MVE-NEXT: vcmpe.f32 s1, s4
138 ; CHECK-MVE-NEXT: cset r1, ne
139 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
140 ; CHECK-MVE-NEXT: mov.w r2, #0
141 ; CHECK-MVE-NEXT: vcmpe.f32 s2, s4
142 ; CHECK-MVE-NEXT: it gt
143 ; CHECK-MVE-NEXT: movgt r2, #1
144 ; CHECK-MVE-NEXT: cmp r2, #0
145 ; CHECK-MVE-NEXT: cset r2, ne
146 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
147 ; CHECK-MVE-NEXT: mov.w r3, #0
148 ; CHECK-MVE-NEXT: vcmpe.f32 s3, s4
149 ; CHECK-MVE-NEXT: it gt
150 ; CHECK-MVE-NEXT: movgt r3, #1
151 ; CHECK-MVE-NEXT: cmp r3, #0
152 ; CHECK-MVE-NEXT: cset r3, ne
153 ; CHECK-MVE-NEXT: movs r0, #0
154 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
155 ; CHECK-MVE-NEXT: it gt
156 ; CHECK-MVE-NEXT: movgt r0, #1
157 ; CHECK-MVE-NEXT: cmp r0, #0
158 ; CHECK-MVE-NEXT: cset r0, ne
159 ; CHECK-MVE-NEXT: lsls r0, r0, #31
160 ; CHECK-MVE-NEXT: vseleq.f32 s3, s15, s11
161 ; CHECK-MVE-NEXT: lsls r0, r3, #31
162 ; CHECK-MVE-NEXT: vseleq.f32 s2, s14, s10
163 ; CHECK-MVE-NEXT: lsls r0, r2, #31
164 ; CHECK-MVE-NEXT: vseleq.f32 s1, s13, s9
165 ; CHECK-MVE-NEXT: lsls r0, r1, #31
166 ; CHECK-MVE-NEXT: vseleq.f32 s0, s12, s8
167 ; CHECK-MVE-NEXT: bx lr
168 ;
169 ; CHECK-MVEFP-LABEL: vcmp_ogt_v4f32:
170 ; CHECK-MVEFP: @ %bb.0: @ %entry
171 ; CHECK-MVEFP-NEXT: vmov r0, s4
172 ; CHECK-MVEFP-NEXT: vcmp.f32 gt, q0, r0
173 ; CHECK-MVEFP-NEXT: vpsel q0, q2, q3
174 ; CHECK-MVEFP-NEXT: bx lr
175 entry:
176 %i = insertelement <4 x float> undef, float %src2, i32 0
177 %sp = shufflevector <4 x float> %i, <4 x float> undef, <4 x i32> zeroinitializer
178 %c = fcmp ogt <4 x float> %src, %sp
179 %s = select <4 x i1> %c, <4 x float> %a, <4 x float> %b
180 ret <4 x float> %s
181 }
183 define arm_aapcs_vfpcc <4 x float> @vcmp_oge_v4f32(<4 x float> %src, float %src2, <4 x float> %a, <4 x float> %b) {
184 ; CHECK-MVE-LABEL: vcmp_oge_v4f32:
185 ; CHECK-MVE: @ %bb.0: @ %entry
186 ; CHECK-MVE-NEXT: vcmpe.f32 s0, s4
187 ; CHECK-MVE-NEXT: movs r1, #0
188 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
189 ; CHECK-MVE-NEXT: it ge
190 ; CHECK-MVE-NEXT: movge r1, #1
191 ; CHECK-MVE-NEXT: cmp r1, #0
192 ; CHECK-MVE-NEXT: vcmpe.f32 s1, s4
193 ; CHECK-MVE-NEXT: cset r1, ne
194 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
195 ; CHECK-MVE-NEXT: mov.w r2, #0
196 ; CHECK-MVE-NEXT: vcmpe.f32 s2, s4
197 ; CHECK-MVE-NEXT: it ge
198 ; CHECK-MVE-NEXT: movge r2, #1
199 ; CHECK-MVE-NEXT: cmp r2, #0
200 ; CHECK-MVE-NEXT: cset r2, ne
201 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
202 ; CHECK-MVE-NEXT: mov.w r3, #0
203 ; CHECK-MVE-NEXT: vcmpe.f32 s3, s4
204 ; CHECK-MVE-NEXT: it ge
205 ; CHECK-MVE-NEXT: movge r3, #1
206 ; CHECK-MVE-NEXT: cmp r3, #0
207 ; CHECK-MVE-NEXT: cset r3, ne
208 ; CHECK-MVE-NEXT: movs r0, #0
209 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
210 ; CHECK-MVE-NEXT: it ge
211 ; CHECK-MVE-NEXT: movge r0, #1
212 ; CHECK-MVE-NEXT: cmp r0, #0
213 ; CHECK-MVE-NEXT: cset r0, ne
214 ; CHECK-MVE-NEXT: lsls r0, r0, #31
215 ; CHECK-MVE-NEXT: vseleq.f32 s3, s15, s11
216 ; CHECK-MVE-NEXT: lsls r0, r3, #31
217 ; CHECK-MVE-NEXT: vseleq.f32 s2, s14, s10
218 ; CHECK-MVE-NEXT: lsls r0, r2, #31
219 ; CHECK-MVE-NEXT: vseleq.f32 s1, s13, s9
220 ; CHECK-MVE-NEXT: lsls r0, r1, #31
221 ; CHECK-MVE-NEXT: vseleq.f32 s0, s12, s8
222 ; CHECK-MVE-NEXT: bx lr
223 ;
224 ; CHECK-MVEFP-LABEL: vcmp_oge_v4f32:
225 ; CHECK-MVEFP: @ %bb.0: @ %entry
226 ; CHECK-MVEFP-NEXT: vmov r0, s4
227 ; CHECK-MVEFP-NEXT: vcmp.f32 ge, q0, r0
228 ; CHECK-MVEFP-NEXT: vpsel q0, q2, q3
229 ; CHECK-MVEFP-NEXT: bx lr
230 entry:
231 %i = insertelement <4 x float> undef, float %src2, i32 0
232 %sp = shufflevector <4 x float> %i, <4 x float> undef, <4 x i32> zeroinitializer
233 %c = fcmp oge <4 x float> %src, %sp
234 %s = select <4 x i1> %c, <4 x float> %a, <4 x float> %b
235 ret <4 x float> %s
236 }
238 define arm_aapcs_vfpcc <4 x float> @vcmp_olt_v4f32(<4 x float> %src, float %src2, <4 x float> %a, <4 x float> %b) {
239 ; CHECK-MVE-LABEL: vcmp_olt_v4f32:
240 ; CHECK-MVE: @ %bb.0: @ %entry
241 ; CHECK-MVE-NEXT: vcmpe.f32 s0, s4
242 ; CHECK-MVE-NEXT: movs r1, #0
243 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
244 ; CHECK-MVE-NEXT: it mi
245 ; CHECK-MVE-NEXT: movmi r1, #1
246 ; CHECK-MVE-NEXT: cmp r1, #0
247 ; CHECK-MVE-NEXT: vcmpe.f32 s1, s4
248 ; CHECK-MVE-NEXT: cset r1, ne
249 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
250 ; CHECK-MVE-NEXT: mov.w r2, #0
251 ; CHECK-MVE-NEXT: vcmpe.f32 s2, s4
252 ; CHECK-MVE-NEXT: it mi
253 ; CHECK-MVE-NEXT: movmi r2, #1
254 ; CHECK-MVE-NEXT: cmp r2, #0
255 ; CHECK-MVE-NEXT: cset r2, ne
256 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
257 ; CHECK-MVE-NEXT: mov.w r3, #0
258 ; CHECK-MVE-NEXT: vcmpe.f32 s3, s4
259 ; CHECK-MVE-NEXT: it mi
260 ; CHECK-MVE-NEXT: movmi r3, #1
261 ; CHECK-MVE-NEXT: cmp r3, #0
262 ; CHECK-MVE-NEXT: cset r3, ne
263 ; CHECK-MVE-NEXT: movs r0, #0
264 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
265 ; CHECK-MVE-NEXT: it mi
266 ; CHECK-MVE-NEXT: movmi r0, #1
267 ; CHECK-MVE-NEXT: cmp r0, #0
268 ; CHECK-MVE-NEXT: cset r0, ne
269 ; CHECK-MVE-NEXT: lsls r0, r0, #31
270 ; CHECK-MVE-NEXT: vseleq.f32 s3, s15, s11
271 ; CHECK-MVE-NEXT: lsls r0, r3, #31
272 ; CHECK-MVE-NEXT: vseleq.f32 s2, s14, s10
273 ; CHECK-MVE-NEXT: lsls r0, r2, #31
274 ; CHECK-MVE-NEXT: vseleq.f32 s1, s13, s9
275 ; CHECK-MVE-NEXT: lsls r0, r1, #31
276 ; CHECK-MVE-NEXT: vseleq.f32 s0, s12, s8
277 ; CHECK-MVE-NEXT: bx lr
278 ;
279 ; CHECK-MVEFP-LABEL: vcmp_olt_v4f32:
280 ; CHECK-MVEFP: @ %bb.0: @ %entry
281 ; CHECK-MVEFP-NEXT: vmov r0, s4
282 ; CHECK-MVEFP-NEXT: vdup.32 q1, r0
283 ; CHECK-MVEFP-NEXT: vcmp.f32 gt, q1, q0
284 ; CHECK-MVEFP-NEXT: vpsel q0, q2, q3
285 ; CHECK-MVEFP-NEXT: bx lr
286 entry:
287 %i = insertelement <4 x float> undef, float %src2, i32 0
288 %sp = shufflevector <4 x float> %i, <4 x float> undef, <4 x i32> zeroinitializer
289 %c = fcmp olt <4 x float> %src, %sp
290 %s = select <4 x i1> %c, <4 x float> %a, <4 x float> %b
291 ret <4 x float> %s
292 }
294 define arm_aapcs_vfpcc <4 x float> @vcmp_ole_v4f32(<4 x float> %src, float %src2, <4 x float> %a, <4 x float> %b) {
295 ; CHECK-MVE-LABEL: vcmp_ole_v4f32:
296 ; CHECK-MVE: @ %bb.0: @ %entry
297 ; CHECK-MVE-NEXT: vcmpe.f32 s0, s4
298 ; CHECK-MVE-NEXT: movs r1, #0
299 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
300 ; CHECK-MVE-NEXT: it ls
301 ; CHECK-MVE-NEXT: movls r1, #1
302 ; CHECK-MVE-NEXT: cmp r1, #0
303 ; CHECK-MVE-NEXT: vcmpe.f32 s1, s4
304 ; CHECK-MVE-NEXT: cset r1, ne
305 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
306 ; CHECK-MVE-NEXT: mov.w r2, #0
307 ; CHECK-MVE-NEXT: vcmpe.f32 s2, s4
308 ; CHECK-MVE-NEXT: it ls
309 ; CHECK-MVE-NEXT: movls r2, #1
310 ; CHECK-MVE-NEXT: cmp r2, #0
311 ; CHECK-MVE-NEXT: cset r2, ne
312 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
313 ; CHECK-MVE-NEXT: mov.w r3, #0
314 ; CHECK-MVE-NEXT: vcmpe.f32 s3, s4
315 ; CHECK-MVE-NEXT: it ls
316 ; CHECK-MVE-NEXT: movls r3, #1
317 ; CHECK-MVE-NEXT: cmp r3, #0
318 ; CHECK-MVE-NEXT: cset r3, ne
319 ; CHECK-MVE-NEXT: movs r0, #0
320 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
321 ; CHECK-MVE-NEXT: it ls
322 ; CHECK-MVE-NEXT: movls r0, #1
323 ; CHECK-MVE-NEXT: cmp r0, #0
324 ; CHECK-MVE-NEXT: cset r0, ne
325 ; CHECK-MVE-NEXT: lsls r0, r0, #31
326 ; CHECK-MVE-NEXT: vseleq.f32 s3, s15, s11
327 ; CHECK-MVE-NEXT: lsls r0, r3, #31
328 ; CHECK-MVE-NEXT: vseleq.f32 s2, s14, s10
329 ; CHECK-MVE-NEXT: lsls r0, r2, #31
330 ; CHECK-MVE-NEXT: vseleq.f32 s1, s13, s9
331 ; CHECK-MVE-NEXT: lsls r0, r1, #31
332 ; CHECK-MVE-NEXT: vseleq.f32 s0, s12, s8
333 ; CHECK-MVE-NEXT: bx lr
334 ;
335 ; CHECK-MVEFP-LABEL: vcmp_ole_v4f32:
336 ; CHECK-MVEFP: @ %bb.0: @ %entry
337 ; CHECK-MVEFP-NEXT: vmov r0, s4
338 ; CHECK-MVEFP-NEXT: vdup.32 q1, r0
339 ; CHECK-MVEFP-NEXT: vcmp.f32 ge, q1, q0
340 ; CHECK-MVEFP-NEXT: vpsel q0, q2, q3
341 ; CHECK-MVEFP-NEXT: bx lr
342 entry:
343 %i = insertelement <4 x float> undef, float %src2, i32 0
344 %sp = shufflevector <4 x float> %i, <4 x float> undef, <4 x i32> zeroinitializer
345 %c = fcmp ole <4 x float> %src, %sp
346 %s = select <4 x i1> %c, <4 x float> %a, <4 x float> %b
347 ret <4 x float> %s
348 }
350 define arm_aapcs_vfpcc <4 x float> @vcmp_ueq_v4f32(<4 x float> %src, float %src2, <4 x float> %a, <4 x float> %b) {
351 ; CHECK-MVE-LABEL: vcmp_ueq_v4f32:
352 ; CHECK-MVE: @ %bb.0: @ %entry
353 ; CHECK-MVE-NEXT: vcmp.f32 s0, s4
354 ; CHECK-MVE-NEXT: movs r1, #0
355 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
356 ; CHECK-MVE-NEXT: vcmp.f32 s0, s4
357 ; CHECK-MVE-NEXT: it eq
358 ; CHECK-MVE-NEXT: moveq r1, #1
359 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
360 ; CHECK-MVE-NEXT: it vs
361 ; CHECK-MVE-NEXT: movvs r1, #1
362 ; CHECK-MVE-NEXT: cmp r1, #0
363 ; CHECK-MVE-NEXT: vcmp.f32 s1, s4
364 ; CHECK-MVE-NEXT: mov.w r2, #0
365 ; CHECK-MVE-NEXT: cset r1, ne
366 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
367 ; CHECK-MVE-NEXT: it eq
368 ; CHECK-MVE-NEXT: moveq r2, #1
369 ; CHECK-MVE-NEXT: vcmp.f32 s2, s4
370 ; CHECK-MVE-NEXT: it vs
371 ; CHECK-MVE-NEXT: movvs r2, #1
372 ; CHECK-MVE-NEXT: cmp r2, #0
373 ; CHECK-MVE-NEXT: mov.w r3, #0
374 ; CHECK-MVE-NEXT: cset r2, ne
375 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
376 ; CHECK-MVE-NEXT: it eq
377 ; CHECK-MVE-NEXT: moveq r3, #1
378 ; CHECK-MVE-NEXT: it vs
379 ; CHECK-MVE-NEXT: movvs r3, #1
380 ; CHECK-MVE-NEXT: cmp r3, #0
381 ; CHECK-MVE-NEXT: mov.w r0, #0
382 ; CHECK-MVE-NEXT: vcmp.f32 s3, s4
383 ; CHECK-MVE-NEXT: cset r3, ne
384 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
385 ; CHECK-MVE-NEXT: it eq
386 ; CHECK-MVE-NEXT: moveq r0, #1
387 ; CHECK-MVE-NEXT: it vs
388 ; CHECK-MVE-NEXT: movvs r0, #1
389 ; CHECK-MVE-NEXT: cmp r0, #0
390 ; CHECK-MVE-NEXT: cset r0, ne
391 ; CHECK-MVE-NEXT: lsls r0, r0, #31
392 ; CHECK-MVE-NEXT: vseleq.f32 s3, s15, s11
393 ; CHECK-MVE-NEXT: lsls r0, r3, #31
394 ; CHECK-MVE-NEXT: vseleq.f32 s2, s14, s10
395 ; CHECK-MVE-NEXT: lsls r0, r2, #31
396 ; CHECK-MVE-NEXT: vseleq.f32 s1, s13, s9
397 ; CHECK-MVE-NEXT: lsls r0, r1, #31
398 ; CHECK-MVE-NEXT: vseleq.f32 s0, s12, s8
399 ; CHECK-MVE-NEXT: bx lr
400 ;
401 ; CHECK-MVEFP-LABEL: vcmp_ueq_v4f32:
402 ; CHECK-MVEFP: @ %bb.0: @ %entry
403 ; CHECK-MVEFP-NEXT: vmov r0, s4
404 ; CHECK-MVEFP-NEXT: vdup.32 q1, r0
405 ; CHECK-MVEFP-NEXT: vpt.f32 le, q1, q0
406 ; CHECK-MVEFP-NEXT: vcmpt.f32 le, q0, r0
407 ; CHECK-MVEFP-NEXT: vpsel q0, q2, q3
408 ; CHECK-MVEFP-NEXT: bx lr
409 entry:
410 %i = insertelement <4 x float> undef, float %src2, i32 0
411 %sp = shufflevector <4 x float> %i, <4 x float> undef, <4 x i32> zeroinitializer
412 %c = fcmp ueq <4 x float> %src, %sp
413 %s = select <4 x i1> %c, <4 x float> %a, <4 x float> %b
414 ret <4 x float> %s
415 }
417 define arm_aapcs_vfpcc <4 x float> @vcmp_une_v4f32(<4 x float> %src, float %src2, <4 x float> %a, <4 x float> %b) {
418 ; CHECK-MVE-LABEL: vcmp_une_v4f32:
419 ; CHECK-MVE: @ %bb.0: @ %entry
420 ; CHECK-MVE-NEXT: vcmp.f32 s0, s4
421 ; CHECK-MVE-NEXT: movs r1, #0
422 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
423 ; CHECK-MVE-NEXT: it ne
424 ; CHECK-MVE-NEXT: movne r1, #1
425 ; CHECK-MVE-NEXT: cmp r1, #0
426 ; CHECK-MVE-NEXT: vcmp.f32 s1, s4
427 ; CHECK-MVE-NEXT: cset r1, ne
428 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
429 ; CHECK-MVE-NEXT: mov.w r2, #0
430 ; CHECK-MVE-NEXT: vcmp.f32 s2, s4
431 ; CHECK-MVE-NEXT: it ne
432 ; CHECK-MVE-NEXT: movne r2, #1
433 ; CHECK-MVE-NEXT: cmp r2, #0
434 ; CHECK-MVE-NEXT: cset r2, ne
435 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
436 ; CHECK-MVE-NEXT: mov.w r3, #0
437 ; CHECK-MVE-NEXT: vcmp.f32 s3, s4
438 ; CHECK-MVE-NEXT: it ne
439 ; CHECK-MVE-NEXT: movne r3, #1
440 ; CHECK-MVE-NEXT: cmp r3, #0
441 ; CHECK-MVE-NEXT: cset r3, ne
442 ; CHECK-MVE-NEXT: movs r0, #0
443 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
444 ; CHECK-MVE-NEXT: it ne
445 ; CHECK-MVE-NEXT: movne r0, #1
446 ; CHECK-MVE-NEXT: cmp r0, #0
447 ; CHECK-MVE-NEXT: cset r0, ne
448 ; CHECK-MVE-NEXT: lsls r0, r0, #31
449 ; CHECK-MVE-NEXT: vseleq.f32 s3, s15, s11
450 ; CHECK-MVE-NEXT: lsls r0, r3, #31
451 ; CHECK-MVE-NEXT: vseleq.f32 s2, s14, s10
452 ; CHECK-MVE-NEXT: lsls r0, r2, #31
453 ; CHECK-MVE-NEXT: vseleq.f32 s1, s13, s9
454 ; CHECK-MVE-NEXT: lsls r0, r1, #31
455 ; CHECK-MVE-NEXT: vseleq.f32 s0, s12, s8
456 ; CHECK-MVE-NEXT: bx lr
457 ;
458 ; CHECK-MVEFP-LABEL: vcmp_une_v4f32:
459 ; CHECK-MVEFP: @ %bb.0: @ %entry
460 ; CHECK-MVEFP-NEXT: vmov r0, s4
461 ; CHECK-MVEFP-NEXT: vcmp.f32 ne, q0, r0
462 ; CHECK-MVEFP-NEXT: vpsel q0, q2, q3
463 ; CHECK-MVEFP-NEXT: bx lr
464 entry:
465 %i = insertelement <4 x float> undef, float %src2, i32 0
466 %sp = shufflevector <4 x float> %i, <4 x float> undef, <4 x i32> zeroinitializer
467 %c = fcmp une <4 x float> %src, %sp
468 %s = select <4 x i1> %c, <4 x float> %a, <4 x float> %b
469 ret <4 x float> %s
470 }
472 define arm_aapcs_vfpcc <4 x float> @vcmp_ugt_v4f32(<4 x float> %src, float %src2, <4 x float> %a, <4 x float> %b) {
473 ; CHECK-MVE-LABEL: vcmp_ugt_v4f32:
474 ; CHECK-MVE: @ %bb.0: @ %entry
475 ; CHECK-MVE-NEXT: vcmpe.f32 s0, s4
476 ; CHECK-MVE-NEXT: movs r1, #0
477 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
478 ; CHECK-MVE-NEXT: it hi
479 ; CHECK-MVE-NEXT: movhi r1, #1
480 ; CHECK-MVE-NEXT: cmp r1, #0
481 ; CHECK-MVE-NEXT: vcmpe.f32 s1, s4
482 ; CHECK-MVE-NEXT: cset r1, ne
483 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
484 ; CHECK-MVE-NEXT: mov.w r2, #0
485 ; CHECK-MVE-NEXT: vcmpe.f32 s2, s4
486 ; CHECK-MVE-NEXT: it hi
487 ; CHECK-MVE-NEXT: movhi r2, #1
488 ; CHECK-MVE-NEXT: cmp r2, #0
489 ; CHECK-MVE-NEXT: cset r2, ne
490 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
491 ; CHECK-MVE-NEXT: mov.w r3, #0
492 ; CHECK-MVE-NEXT: vcmpe.f32 s3, s4
493 ; CHECK-MVE-NEXT: it hi
494 ; CHECK-MVE-NEXT: movhi r3, #1
495 ; CHECK-MVE-NEXT: cmp r3, #0
496 ; CHECK-MVE-NEXT: cset r3, ne
497 ; CHECK-MVE-NEXT: movs r0, #0
498 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
499 ; CHECK-MVE-NEXT: it hi
500 ; CHECK-MVE-NEXT: movhi r0, #1
501 ; CHECK-MVE-NEXT: cmp r0, #0
502 ; CHECK-MVE-NEXT: cset r0, ne
503 ; CHECK-MVE-NEXT: lsls r0, r0, #31
504 ; CHECK-MVE-NEXT: vseleq.f32 s3, s15, s11
505 ; CHECK-MVE-NEXT: lsls r0, r3, #31
506 ; CHECK-MVE-NEXT: vseleq.f32 s2, s14, s10
507 ; CHECK-MVE-NEXT: lsls r0, r2, #31
508 ; CHECK-MVE-NEXT: vseleq.f32 s1, s13, s9
509 ; CHECK-MVE-NEXT: lsls r0, r1, #31
510 ; CHECK-MVE-NEXT: vseleq.f32 s0, s12, s8
511 ; CHECK-MVE-NEXT: bx lr
512 ;
513 ; CHECK-MVEFP-LABEL: vcmp_ugt_v4f32:
514 ; CHECK-MVEFP: @ %bb.0: @ %entry
515 ; CHECK-MVEFP-NEXT: vmov r0, s4
516 ; CHECK-MVEFP-NEXT: vdup.32 q1, r0
517 ; CHECK-MVEFP-NEXT: vcmp.f32 ge, q1, q0
518 ; CHECK-MVEFP-NEXT: vpnot
519 ; CHECK-MVEFP-NEXT: vpsel q0, q2, q3
520 ; CHECK-MVEFP-NEXT: bx lr
521 entry:
522 %i = insertelement <4 x float> undef, float %src2, i32 0
523 %sp = shufflevector <4 x float> %i, <4 x float> undef, <4 x i32> zeroinitializer
524 %c = fcmp ugt <4 x float> %src, %sp
525 %s = select <4 x i1> %c, <4 x float> %a, <4 x float> %b
526 ret <4 x float> %s
527 }
529 define arm_aapcs_vfpcc <4 x float> @vcmp_uge_v4f32(<4 x float> %src, float %src2, <4 x float> %a, <4 x float> %b) {
530 ; CHECK-MVE-LABEL: vcmp_uge_v4f32:
531 ; CHECK-MVE: @ %bb.0: @ %entry
532 ; CHECK-MVE-NEXT: vcmpe.f32 s0, s4
533 ; CHECK-MVE-NEXT: movs r1, #0
534 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
535 ; CHECK-MVE-NEXT: it pl
536 ; CHECK-MVE-NEXT: movpl r1, #1
537 ; CHECK-MVE-NEXT: cmp r1, #0
538 ; CHECK-MVE-NEXT: vcmpe.f32 s1, s4
539 ; CHECK-MVE-NEXT: cset r1, ne
540 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
541 ; CHECK-MVE-NEXT: mov.w r2, #0
542 ; CHECK-MVE-NEXT: vcmpe.f32 s2, s4
543 ; CHECK-MVE-NEXT: it pl
544 ; CHECK-MVE-NEXT: movpl r2, #1
545 ; CHECK-MVE-NEXT: cmp r2, #0
546 ; CHECK-MVE-NEXT: cset r2, ne
547 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
548 ; CHECK-MVE-NEXT: mov.w r3, #0
549 ; CHECK-MVE-NEXT: vcmpe.f32 s3, s4
550 ; CHECK-MVE-NEXT: it pl
551 ; CHECK-MVE-NEXT: movpl r3, #1
552 ; CHECK-MVE-NEXT: cmp r3, #0
553 ; CHECK-MVE-NEXT: cset r3, ne
554 ; CHECK-MVE-NEXT: movs r0, #0
555 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
556 ; CHECK-MVE-NEXT: it pl
557 ; CHECK-MVE-NEXT: movpl r0, #1
558 ; CHECK-MVE-NEXT: cmp r0, #0
559 ; CHECK-MVE-NEXT: cset r0, ne
560 ; CHECK-MVE-NEXT: lsls r0, r0, #31
561 ; CHECK-MVE-NEXT: vseleq.f32 s3, s15, s11
562 ; CHECK-MVE-NEXT: lsls r0, r3, #31
563 ; CHECK-MVE-NEXT: vseleq.f32 s2, s14, s10
564 ; CHECK-MVE-NEXT: lsls r0, r2, #31
565 ; CHECK-MVE-NEXT: vseleq.f32 s1, s13, s9
566 ; CHECK-MVE-NEXT: lsls r0, r1, #31
567 ; CHECK-MVE-NEXT: vseleq.f32 s0, s12, s8
568 ; CHECK-MVE-NEXT: bx lr
569 ;
570 ; CHECK-MVEFP-LABEL: vcmp_uge_v4f32:
571 ; CHECK-MVEFP: @ %bb.0: @ %entry
572 ; CHECK-MVEFP-NEXT: vmov r0, s4
573 ; CHECK-MVEFP-NEXT: vdup.32 q1, r0
574 ; CHECK-MVEFP-NEXT: vcmp.f32 gt, q1, q0
575 ; CHECK-MVEFP-NEXT: vpnot
576 ; CHECK-MVEFP-NEXT: vpsel q0, q2, q3
577 ; CHECK-MVEFP-NEXT: bx lr
578 entry:
579 %i = insertelement <4 x float> undef, float %src2, i32 0
580 %sp = shufflevector <4 x float> %i, <4 x float> undef, <4 x i32> zeroinitializer
581 %c = fcmp uge <4 x float> %src, %sp
582 %s = select <4 x i1> %c, <4 x float> %a, <4 x float> %b
583 ret <4 x float> %s
584 }
586 define arm_aapcs_vfpcc <4 x float> @vcmp_ult_v4f32(<4 x float> %src, float %src2, <4 x float> %a, <4 x float> %b) {
587 ; CHECK-MVE-LABEL: vcmp_ult_v4f32:
588 ; CHECK-MVE: @ %bb.0: @ %entry
589 ; CHECK-MVE-NEXT: vcmpe.f32 s0, s4
590 ; CHECK-MVE-NEXT: movs r1, #0
591 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
592 ; CHECK-MVE-NEXT: it lt
593 ; CHECK-MVE-NEXT: movlt r1, #1
594 ; CHECK-MVE-NEXT: cmp r1, #0
595 ; CHECK-MVE-NEXT: vcmpe.f32 s1, s4
596 ; CHECK-MVE-NEXT: cset r1, ne
597 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
598 ; CHECK-MVE-NEXT: mov.w r2, #0
599 ; CHECK-MVE-NEXT: vcmpe.f32 s2, s4
600 ; CHECK-MVE-NEXT: it lt
601 ; CHECK-MVE-NEXT: movlt r2, #1
602 ; CHECK-MVE-NEXT: cmp r2, #0
603 ; CHECK-MVE-NEXT: cset r2, ne
604 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
605 ; CHECK-MVE-NEXT: mov.w r3, #0
606 ; CHECK-MVE-NEXT: vcmpe.f32 s3, s4
607 ; CHECK-MVE-NEXT: it lt
608 ; CHECK-MVE-NEXT: movlt r3, #1
609 ; CHECK-MVE-NEXT: cmp r3, #0
610 ; CHECK-MVE-NEXT: cset r3, ne
611 ; CHECK-MVE-NEXT: movs r0, #0
612 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
613 ; CHECK-MVE-NEXT: it lt
614 ; CHECK-MVE-NEXT: movlt r0, #1
615 ; CHECK-MVE-NEXT: cmp r0, #0
616 ; CHECK-MVE-NEXT: cset r0, ne
617 ; CHECK-MVE-NEXT: lsls r0, r0, #31
618 ; CHECK-MVE-NEXT: vseleq.f32 s3, s15, s11
619 ; CHECK-MVE-NEXT: lsls r0, r3, #31
620 ; CHECK-MVE-NEXT: vseleq.f32 s2, s14, s10
621 ; CHECK-MVE-NEXT: lsls r0, r2, #31
622 ; CHECK-MVE-NEXT: vseleq.f32 s1, s13, s9
623 ; CHECK-MVE-NEXT: lsls r0, r1, #31
624 ; CHECK-MVE-NEXT: vseleq.f32 s0, s12, s8
625 ; CHECK-MVE-NEXT: bx lr
626 ;
627 ; CHECK-MVEFP-LABEL: vcmp_ult_v4f32:
628 ; CHECK-MVEFP: @ %bb.0: @ %entry
629 ; CHECK-MVEFP-NEXT: vmov r0, s4
630 ; CHECK-MVEFP-NEXT: vcmp.f32 ge, q0, r0
631 ; CHECK-MVEFP-NEXT: vpnot
632 ; CHECK-MVEFP-NEXT: vpsel q0, q2, q3
633 ; CHECK-MVEFP-NEXT: bx lr
634 entry:
635 %i = insertelement <4 x float> undef, float %src2, i32 0
636 %sp = shufflevector <4 x float> %i, <4 x float> undef, <4 x i32> zeroinitializer
637 %c = fcmp ult <4 x float> %src, %sp
638 %s = select <4 x i1> %c, <4 x float> %a, <4 x float> %b
639 ret <4 x float> %s
640 }
642 define arm_aapcs_vfpcc <4 x float> @vcmp_ule_v4f32(<4 x float> %src, float %src2, <4 x float> %a, <4 x float> %b) {
643 ; CHECK-MVE-LABEL: vcmp_ule_v4f32:
644 ; CHECK-MVE: @ %bb.0: @ %entry
645 ; CHECK-MVE-NEXT: vcmpe.f32 s0, s4
646 ; CHECK-MVE-NEXT: movs r1, #0
647 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
648 ; CHECK-MVE-NEXT: it le
649 ; CHECK-MVE-NEXT: movle r1, #1
650 ; CHECK-MVE-NEXT: cmp r1, #0
651 ; CHECK-MVE-NEXT: vcmpe.f32 s1, s4
652 ; CHECK-MVE-NEXT: cset r1, ne
653 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
654 ; CHECK-MVE-NEXT: mov.w r2, #0
655 ; CHECK-MVE-NEXT: vcmpe.f32 s2, s4
656 ; CHECK-MVE-NEXT: it le
657 ; CHECK-MVE-NEXT: movle r2, #1
658 ; CHECK-MVE-NEXT: cmp r2, #0
659 ; CHECK-MVE-NEXT: cset r2, ne
660 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
661 ; CHECK-MVE-NEXT: mov.w r3, #0
662 ; CHECK-MVE-NEXT: vcmpe.f32 s3, s4
663 ; CHECK-MVE-NEXT: it le
664 ; CHECK-MVE-NEXT: movle r3, #1
665 ; CHECK-MVE-NEXT: cmp r3, #0
666 ; CHECK-MVE-NEXT: cset r3, ne
667 ; CHECK-MVE-NEXT: movs r0, #0
668 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
669 ; CHECK-MVE-NEXT: it le
670 ; CHECK-MVE-NEXT: movle r0, #1
671 ; CHECK-MVE-NEXT: cmp r0, #0
672 ; CHECK-MVE-NEXT: cset r0, ne
673 ; CHECK-MVE-NEXT: lsls r0, r0, #31
674 ; CHECK-MVE-NEXT: vseleq.f32 s3, s15, s11
675 ; CHECK-MVE-NEXT: lsls r0, r3, #31
676 ; CHECK-MVE-NEXT: vseleq.f32 s2, s14, s10
677 ; CHECK-MVE-NEXT: lsls r0, r2, #31
678 ; CHECK-MVE-NEXT: vseleq.f32 s1, s13, s9
679 ; CHECK-MVE-NEXT: lsls r0, r1, #31
680 ; CHECK-MVE-NEXT: vseleq.f32 s0, s12, s8
681 ; CHECK-MVE-NEXT: bx lr
682 ;
683 ; CHECK-MVEFP-LABEL: vcmp_ule_v4f32:
684 ; CHECK-MVEFP: @ %bb.0: @ %entry
685 ; CHECK-MVEFP-NEXT: vmov r0, s4
686 ; CHECK-MVEFP-NEXT: vcmp.f32 gt, q0, r0
687 ; CHECK-MVEFP-NEXT: vpnot
688 ; CHECK-MVEFP-NEXT: vpsel q0, q2, q3
689 ; CHECK-MVEFP-NEXT: bx lr
690 entry:
691 %i = insertelement <4 x float> undef, float %src2, i32 0
692 %sp = shufflevector <4 x float> %i, <4 x float> undef, <4 x i32> zeroinitializer
693 %c = fcmp ule <4 x float> %src, %sp
694 %s = select <4 x i1> %c, <4 x float> %a, <4 x float> %b
695 ret <4 x float> %s
696 }
698 define arm_aapcs_vfpcc <4 x float> @vcmp_ord_v4f32(<4 x float> %src, float %src2, <4 x float> %a, <4 x float> %b) {
699 ; CHECK-MVE-LABEL: vcmp_ord_v4f32:
700 ; CHECK-MVE: @ %bb.0: @ %entry
701 ; CHECK-MVE-NEXT: vcmpe.f32 s0, s4
702 ; CHECK-MVE-NEXT: movs r1, #0
703 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
704 ; CHECK-MVE-NEXT: it vc
705 ; CHECK-MVE-NEXT: movvc r1, #1
706 ; CHECK-MVE-NEXT: cmp r1, #0
707 ; CHECK-MVE-NEXT: vcmpe.f32 s1, s4
708 ; CHECK-MVE-NEXT: cset r1, ne
709 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
710 ; CHECK-MVE-NEXT: mov.w r2, #0
711 ; CHECK-MVE-NEXT: vcmpe.f32 s2, s4
712 ; CHECK-MVE-NEXT: it vc
713 ; CHECK-MVE-NEXT: movvc r2, #1
714 ; CHECK-MVE-NEXT: cmp r2, #0
715 ; CHECK-MVE-NEXT: cset r2, ne
716 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
717 ; CHECK-MVE-NEXT: mov.w r3, #0
718 ; CHECK-MVE-NEXT: vcmpe.f32 s3, s4
719 ; CHECK-MVE-NEXT: it vc
720 ; CHECK-MVE-NEXT: movvc r3, #1
721 ; CHECK-MVE-NEXT: cmp r3, #0
722 ; CHECK-MVE-NEXT: cset r3, ne
723 ; CHECK-MVE-NEXT: movs r0, #0
724 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
725 ; CHECK-MVE-NEXT: it vc
726 ; CHECK-MVE-NEXT: movvc r0, #1
727 ; CHECK-MVE-NEXT: cmp r0, #0
728 ; CHECK-MVE-NEXT: cset r0, ne
729 ; CHECK-MVE-NEXT: lsls r0, r0, #31
730 ; CHECK-MVE-NEXT: vseleq.f32 s3, s15, s11
731 ; CHECK-MVE-NEXT: lsls r0, r3, #31
732 ; CHECK-MVE-NEXT: vseleq.f32 s2, s14, s10
733 ; CHECK-MVE-NEXT: lsls r0, r2, #31
734 ; CHECK-MVE-NEXT: vseleq.f32 s1, s13, s9
735 ; CHECK-MVE-NEXT: lsls r0, r1, #31
736 ; CHECK-MVE-NEXT: vseleq.f32 s0, s12, s8
737 ; CHECK-MVE-NEXT: bx lr
738 ;
739 ; CHECK-MVEFP-LABEL: vcmp_ord_v4f32:
740 ; CHECK-MVEFP: @ %bb.0: @ %entry
741 ; CHECK-MVEFP-NEXT: vmov r0, s4
742 ; CHECK-MVEFP-NEXT: vdup.32 q1, r0
743 ; CHECK-MVEFP-NEXT: vpt.f32 le, q1, q0
744 ; CHECK-MVEFP-NEXT: vcmpt.f32 lt, q0, r0
745 ; CHECK-MVEFP-NEXT: vpnot
746 ; CHECK-MVEFP-NEXT: vpsel q0, q2, q3
747 ; CHECK-MVEFP-NEXT: bx lr
748 entry:
749 %i = insertelement <4 x float> undef, float %src2, i32 0
750 %sp = shufflevector <4 x float> %i, <4 x float> undef, <4 x i32> zeroinitializer
751 %c = fcmp ord <4 x float> %src, %sp
752 %s = select <4 x i1> %c, <4 x float> %a, <4 x float> %b
753 ret <4 x float> %s
754 }
756 define arm_aapcs_vfpcc <4 x float> @vcmp_uno_v4f32(<4 x float> %src, float %src2, <4 x float> %a, <4 x float> %b) {
757 ; CHECK-MVE-LABEL: vcmp_uno_v4f32:
758 ; CHECK-MVE: @ %bb.0: @ %entry
759 ; CHECK-MVE-NEXT: vcmpe.f32 s0, s4
760 ; CHECK-MVE-NEXT: movs r1, #0
761 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
762 ; CHECK-MVE-NEXT: it vs
763 ; CHECK-MVE-NEXT: movvs r1, #1
764 ; CHECK-MVE-NEXT: cmp r1, #0
765 ; CHECK-MVE-NEXT: vcmpe.f32 s1, s4
766 ; CHECK-MVE-NEXT: cset r1, ne
767 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
768 ; CHECK-MVE-NEXT: mov.w r2, #0
769 ; CHECK-MVE-NEXT: vcmpe.f32 s2, s4
770 ; CHECK-MVE-NEXT: it vs
771 ; CHECK-MVE-NEXT: movvs r2, #1
772 ; CHECK-MVE-NEXT: cmp r2, #0
773 ; CHECK-MVE-NEXT: cset r2, ne
774 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
775 ; CHECK-MVE-NEXT: mov.w r3, #0
776 ; CHECK-MVE-NEXT: vcmpe.f32 s3, s4
777 ; CHECK-MVE-NEXT: it vs
778 ; CHECK-MVE-NEXT: movvs r3, #1
779 ; CHECK-MVE-NEXT: cmp r3, #0
780 ; CHECK-MVE-NEXT: cset r3, ne
781 ; CHECK-MVE-NEXT: movs r0, #0
782 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
783 ; CHECK-MVE-NEXT: it vs
784 ; CHECK-MVE-NEXT: movvs r0, #1
785 ; CHECK-MVE-NEXT: cmp r0, #0
786 ; CHECK-MVE-NEXT: cset r0, ne
787 ; CHECK-MVE-NEXT: lsls r0, r0, #31
788 ; CHECK-MVE-NEXT: vseleq.f32 s3, s15, s11
789 ; CHECK-MVE-NEXT: lsls r0, r3, #31
790 ; CHECK-MVE-NEXT: vseleq.f32 s2, s14, s10
791 ; CHECK-MVE-NEXT: lsls r0, r2, #31
792 ; CHECK-MVE-NEXT: vseleq.f32 s1, s13, s9
793 ; CHECK-MVE-NEXT: lsls r0, r1, #31
794 ; CHECK-MVE-NEXT: vseleq.f32 s0, s12, s8
795 ; CHECK-MVE-NEXT: bx lr
796 ;
797 ; CHECK-MVEFP-LABEL: vcmp_uno_v4f32:
798 ; CHECK-MVEFP: @ %bb.0: @ %entry
799 ; CHECK-MVEFP-NEXT: vmov r0, s4
800 ; CHECK-MVEFP-NEXT: vdup.32 q1, r0
801 ; CHECK-MVEFP-NEXT: vpt.f32 le, q1, q0
802 ; CHECK-MVEFP-NEXT: vcmpt.f32 lt, q0, r0
803 ; CHECK-MVEFP-NEXT: vpsel q0, q2, q3
804 ; CHECK-MVEFP-NEXT: bx lr
805 entry:
806 %i = insertelement <4 x float> undef, float %src2, i32 0
807 %sp = shufflevector <4 x float> %i, <4 x float> undef, <4 x i32> zeroinitializer
808 %c = fcmp uno <4 x float> %src, %sp
809 %s = select <4 x i1> %c, <4 x float> %a, <4 x float> %b
810 ret <4 x float> %s
811 }
815 define arm_aapcs_vfpcc <8 x half> @vcmp_oeq_v8f16(<8 x half> %src, half* %src2p, <8 x half> %a, <8 x half> %b) {
816 ; CHECK-MVE-LABEL: vcmp_oeq_v8f16:
817 ; CHECK-MVE: @ %bb.0: @ %entry
818 ; CHECK-MVE-NEXT: .vsave {d8, d9, d10}
819 ; CHECK-MVE-NEXT: vpush {d8, d9, d10}
820 ; CHECK-MVE-NEXT: vldr.16 s16, [r0]
821 ; CHECK-MVE-NEXT: vmovx.f16 s12, s0
822 ; CHECK-MVE-NEXT: movs r0, #0
823 ; CHECK-MVE-NEXT: vmovx.f16 s14, s8
824 ; CHECK-MVE-NEXT: vcmp.f16 s12, s16
825 ; CHECK-MVE-NEXT: vmovx.f16 s12, s4
826 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
827 ; CHECK-MVE-NEXT: it eq
828 ; CHECK-MVE-NEXT: moveq r0, #1
829 ; CHECK-MVE-NEXT: cmp r0, #0
830 ; CHECK-MVE-NEXT: vcmp.f16 s0, s16
831 ; CHECK-MVE-NEXT: cset r0, ne
832 ; CHECK-MVE-NEXT: movs r2, #0
833 ; CHECK-MVE-NEXT: lsls r0, r0, #31
834 ; CHECK-MVE-NEXT: vmovx.f16 s20, s9
835 ; CHECK-MVE-NEXT: vseleq.f16 s12, s14, s12
836 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
837 ; CHECK-MVE-NEXT: it eq
838 ; CHECK-MVE-NEXT: moveq r2, #1
839 ; CHECK-MVE-NEXT: cmp r2, #0
840 ; CHECK-MVE-NEXT: cset r2, ne
841 ; CHECK-MVE-NEXT: vmov r0, s12
842 ; CHECK-MVE-NEXT: lsls r2, r2, #31
843 ; CHECK-MVE-NEXT: vcmp.f16 s1, s16
844 ; CHECK-MVE-NEXT: vseleq.f16 s12, s8, s4
845 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
846 ; CHECK-MVE-NEXT: vmov r2, s12
847 ; CHECK-MVE-NEXT: vmovx.f16 s0, s3
848 ; CHECK-MVE-NEXT: vmov.16 q3[0], r2
849 ; CHECK-MVE-NEXT: mov.w r1, #0
850 ; CHECK-MVE-NEXT: vmov.16 q3[1], r0
851 ; CHECK-MVE-NEXT: mov.w r0, #0
852 ; CHECK-MVE-NEXT: it eq
853 ; CHECK-MVE-NEXT: moveq r0, #1
854 ; CHECK-MVE-NEXT: cmp r0, #0
855 ; CHECK-MVE-NEXT: cset r0, ne
856 ; CHECK-MVE-NEXT: lsls r0, r0, #31
857 ; CHECK-MVE-NEXT: vseleq.f16 s18, s9, s5
858 ; CHECK-MVE-NEXT: vmov r0, s18
859 ; CHECK-MVE-NEXT: vmovx.f16 s18, s1
860 ; CHECK-MVE-NEXT: vcmp.f16 s18, s16
861 ; CHECK-MVE-NEXT: vmov.16 q3[2], r0
862 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
863 ; CHECK-MVE-NEXT: mov.w r0, #0
864 ; CHECK-MVE-NEXT: it eq
865 ; CHECK-MVE-NEXT: moveq r0, #1
866 ; CHECK-MVE-NEXT: cmp r0, #0
867 ; CHECK-MVE-NEXT: cset r0, ne
868 ; CHECK-MVE-NEXT: vmovx.f16 s18, s5
869 ; CHECK-MVE-NEXT: lsls r0, r0, #31
870 ; CHECK-MVE-NEXT: vcmp.f16 s2, s16
871 ; CHECK-MVE-NEXT: vseleq.f16 s18, s20, s18
872 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
873 ; CHECK-MVE-NEXT: vmov r0, s18
874 ; CHECK-MVE-NEXT: vmovx.f16 s20, s10
875 ; CHECK-MVE-NEXT: vmov.16 q3[3], r0
876 ; CHECK-MVE-NEXT: mov.w r0, #0
877 ; CHECK-MVE-NEXT: it eq
878 ; CHECK-MVE-NEXT: moveq r0, #1
879 ; CHECK-MVE-NEXT: cmp r0, #0
880 ; CHECK-MVE-NEXT: cset r0, ne
881 ; CHECK-MVE-NEXT: lsls r0, r0, #31
882 ; CHECK-MVE-NEXT: vseleq.f16 s18, s10, s6
883 ; CHECK-MVE-NEXT: vmov r0, s18
884 ; CHECK-MVE-NEXT: vmovx.f16 s18, s2
885 ; CHECK-MVE-NEXT: vcmp.f16 s18, s16
886 ; CHECK-MVE-NEXT: vmov.16 q3[4], r0
887 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
888 ; CHECK-MVE-NEXT: mov.w r0, #0
889 ; CHECK-MVE-NEXT: it eq
890 ; CHECK-MVE-NEXT: moveq r0, #1
891 ; CHECK-MVE-NEXT: cmp r0, #0
892 ; CHECK-MVE-NEXT: cset r0, ne
893 ; CHECK-MVE-NEXT: vmovx.f16 s18, s6
894 ; CHECK-MVE-NEXT: lsls r0, r0, #31
895 ; CHECK-MVE-NEXT: vcmp.f16 s3, s16
896 ; CHECK-MVE-NEXT: vseleq.f16 s18, s20, s18
897 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
898 ; CHECK-MVE-NEXT: vmov r0, s18
899 ; CHECK-MVE-NEXT: vcmp.f16 s0, s16
900 ; CHECK-MVE-NEXT: vmov.16 q3[5], r0
901 ; CHECK-MVE-NEXT: mov.w r0, #0
902 ; CHECK-MVE-NEXT: it eq
903 ; CHECK-MVE-NEXT: moveq r0, #1
904 ; CHECK-MVE-NEXT: cmp r0, #0
905 ; CHECK-MVE-NEXT: cset r0, ne
906 ; CHECK-MVE-NEXT: vmovx.f16 s0, s7
907 ; CHECK-MVE-NEXT: lsls r0, r0, #31
908 ; CHECK-MVE-NEXT: vmovx.f16 s2, s11
909 ; CHECK-MVE-NEXT: vseleq.f16 s18, s11, s7
910 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
911 ; CHECK-MVE-NEXT: it eq
912 ; CHECK-MVE-NEXT: moveq r1, #1
913 ; CHECK-MVE-NEXT: vmov r0, s18
914 ; CHECK-MVE-NEXT: cmp r1, #0
915 ; CHECK-MVE-NEXT: vmov.16 q3[6], r0
916 ; CHECK-MVE-NEXT: cset r0, ne
917 ; CHECK-MVE-NEXT: lsls r0, r0, #31
918 ; CHECK-MVE-NEXT: vseleq.f16 s0, s2, s0
919 ; CHECK-MVE-NEXT: vmov r0, s0
920 ; CHECK-MVE-NEXT: vmov.16 q3[7], r0
921 ; CHECK-MVE-NEXT: vmov q0, q3
922 ; CHECK-MVE-NEXT: vpop {d8, d9, d10}
923 ; CHECK-MVE-NEXT: bx lr
924 ;
925 ; CHECK-MVEFP-LABEL: vcmp_oeq_v8f16:
926 ; CHECK-MVEFP: @ %bb.0: @ %entry
927 ; CHECK-MVEFP-NEXT: vldr.16 s12, [r0]
928 ; CHECK-MVEFP-NEXT: vmov r0, s12
929 ; CHECK-MVEFP-NEXT: vcmp.f16 eq, q0, r0
930 ; CHECK-MVEFP-NEXT: vpsel q0, q1, q2
931 ; CHECK-MVEFP-NEXT: bx lr
932 entry:
933 %src2 = load half, half* %src2p
934 %i = insertelement <8 x half> undef, half %src2, i32 0
935 %sp = shufflevector <8 x half> %i, <8 x half> undef, <8 x i32> zeroinitializer
936 %c = fcmp oeq <8 x half> %src, %sp
937 %s = select <8 x i1> %c, <8 x half> %a, <8 x half> %b
938 ret <8 x half> %s
939 }
941 define arm_aapcs_vfpcc <8 x half> @vcmp_one_v8f16(<8 x half> %src, half* %src2p, <8 x half> %a, <8 x half> %b) {
942 ; CHECK-MVE-LABEL: vcmp_one_v8f16:
943 ; CHECK-MVE: @ %bb.0: @ %entry
944 ; CHECK-MVE-NEXT: .vsave {d8, d9, d10}
945 ; CHECK-MVE-NEXT: vpush {d8, d9, d10}
946 ; CHECK-MVE-NEXT: vldr.16 s16, [r0]
947 ; CHECK-MVE-NEXT: vmovx.f16 s12, s0
948 ; CHECK-MVE-NEXT: movs r0, #0
949 ; CHECK-MVE-NEXT: vmovx.f16 s14, s8
950 ; CHECK-MVE-NEXT: vcmp.f16 s12, s16
951 ; CHECK-MVE-NEXT: vmovx.f16 s12, s4
952 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
953 ; CHECK-MVE-NEXT: it mi
954 ; CHECK-MVE-NEXT: movmi r0, #1
955 ; CHECK-MVE-NEXT: it gt
956 ; CHECK-MVE-NEXT: movgt r0, #1
957 ; CHECK-MVE-NEXT: cmp r0, #0
958 ; CHECK-MVE-NEXT: cset r0, ne
959 ; CHECK-MVE-NEXT: vcmp.f16 s0, s16
960 ; CHECK-MVE-NEXT: lsls r0, r0, #31
961 ; CHECK-MVE-NEXT: mov.w r2, #0
962 ; CHECK-MVE-NEXT: vseleq.f16 s12, s14, s12
963 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
964 ; CHECK-MVE-NEXT: it mi
965 ; CHECK-MVE-NEXT: movmi r2, #1
966 ; CHECK-MVE-NEXT: vmov r0, s12
967 ; CHECK-MVE-NEXT: it gt
968 ; CHECK-MVE-NEXT: movgt r2, #1
969 ; CHECK-MVE-NEXT: cmp r2, #0
970 ; CHECK-MVE-NEXT: cset r2, ne
971 ; CHECK-MVE-NEXT: vcmp.f16 s1, s16
972 ; CHECK-MVE-NEXT: lsls r2, r2, #31
973 ; CHECK-MVE-NEXT: vmovx.f16 s20, s9
974 ; CHECK-MVE-NEXT: vseleq.f16 s12, s8, s4
975 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
976 ; CHECK-MVE-NEXT: vmov r2, s12
977 ; CHECK-MVE-NEXT: vmovx.f16 s0, s3
978 ; CHECK-MVE-NEXT: vmov.16 q3[0], r2
979 ; CHECK-MVE-NEXT: mov.w r1, #0
980 ; CHECK-MVE-NEXT: vmov.16 q3[1], r0
981 ; CHECK-MVE-NEXT: mov.w r0, #0
982 ; CHECK-MVE-NEXT: it mi
983 ; CHECK-MVE-NEXT: movmi r0, #1
984 ; CHECK-MVE-NEXT: it gt
985 ; CHECK-MVE-NEXT: movgt r0, #1
986 ; CHECK-MVE-NEXT: cmp r0, #0
987 ; CHECK-MVE-NEXT: cset r0, ne
988 ; CHECK-MVE-NEXT: lsls r0, r0, #31
989 ; CHECK-MVE-NEXT: vseleq.f16 s18, s9, s5
990 ; CHECK-MVE-NEXT: vmov r0, s18
991 ; CHECK-MVE-NEXT: vmovx.f16 s18, s1
992 ; CHECK-MVE-NEXT: vcmp.f16 s18, s16
993 ; CHECK-MVE-NEXT: vmov.16 q3[2], r0
994 ; CHECK-MVE-NEXT: movs r0, #0
995 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
996 ; CHECK-MVE-NEXT: it mi
997 ; CHECK-MVE-NEXT: movmi r0, #1
998 ; CHECK-MVE-NEXT: vmovx.f16 s18, s5
999 ; CHECK-MVE-NEXT: it gt
1000 ; CHECK-MVE-NEXT: movgt r0, #1
1001 ; CHECK-MVE-NEXT: cmp r0, #0
1002 ; CHECK-MVE-NEXT: cset r0, ne
1003 ; CHECK-MVE-NEXT: vcmp.f16 s2, s16
1004 ; CHECK-MVE-NEXT: lsls r0, r0, #31
1005 ; CHECK-MVE-NEXT: vseleq.f16 s18, s20, s18
1006 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
1007 ; CHECK-MVE-NEXT: vmov r0, s18
1008 ; CHECK-MVE-NEXT: vmovx.f16 s20, s10
1009 ; CHECK-MVE-NEXT: vmov.16 q3[3], r0
1010 ; CHECK-MVE-NEXT: mov.w r0, #0
1011 ; CHECK-MVE-NEXT: it mi
1012 ; CHECK-MVE-NEXT: movmi r0, #1
1013 ; CHECK-MVE-NEXT: it gt
1014 ; CHECK-MVE-NEXT: movgt r0, #1
1015 ; CHECK-MVE-NEXT: cmp r0, #0
1016 ; CHECK-MVE-NEXT: cset r0, ne
1017 ; CHECK-MVE-NEXT: lsls r0, r0, #31
1018 ; CHECK-MVE-NEXT: vseleq.f16 s18, s10, s6
1019 ; CHECK-MVE-NEXT: vmov r0, s18
1020 ; CHECK-MVE-NEXT: vmovx.f16 s18, s2
1021 ; CHECK-MVE-NEXT: vcmp.f16 s18, s16
1022 ; CHECK-MVE-NEXT: vmov.16 q3[4], r0
1023 ; CHECK-MVE-NEXT: movs r0, #0
1024 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
1025 ; CHECK-MVE-NEXT: it mi
1026 ; CHECK-MVE-NEXT: movmi r0, #1
1027 ; CHECK-MVE-NEXT: vmovx.f16 s18, s6
1028 ; CHECK-MVE-NEXT: it gt
1029 ; CHECK-MVE-NEXT: movgt r0, #1
1030 ; CHECK-MVE-NEXT: cmp r0, #0
1031 ; CHECK-MVE-NEXT: cset r0, ne
1032 ; CHECK-MVE-NEXT: vcmp.f16 s3, s16
1033 ; CHECK-MVE-NEXT: lsls r0, r0, #31
1034 ; CHECK-MVE-NEXT: vmovx.f16 s2, s11
1035 ; CHECK-MVE-NEXT: vseleq.f16 s18, s20, s18
1036 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
1037 ; CHECK-MVE-NEXT: vmov r0, s18
1038 ; CHECK-MVE-NEXT: vcmp.f16 s0, s16
1039 ; CHECK-MVE-NEXT: vmov.16 q3[5], r0
1040 ; CHECK-MVE-NEXT: mov.w r0, #0
1041 ; CHECK-MVE-NEXT: it mi
1042 ; CHECK-MVE-NEXT: movmi r0, #1
1043 ; CHECK-MVE-NEXT: vmovx.f16 s0, s7
1044 ; CHECK-MVE-NEXT: it gt
1045 ; CHECK-MVE-NEXT: movgt r0, #1
1046 ; CHECK-MVE-NEXT: cmp r0, #0
1047 ; CHECK-MVE-NEXT: cset r0, ne
1048 ; CHECK-MVE-NEXT: lsls r0, r0, #31
1049 ; CHECK-MVE-NEXT: vseleq.f16 s18, s11, s7
1050 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
1051 ; CHECK-MVE-NEXT: it mi
1052 ; CHECK-MVE-NEXT: movmi r1, #1
1053 ; CHECK-MVE-NEXT: vmov r0, s18
1054 ; CHECK-MVE-NEXT: it gt
1055 ; CHECK-MVE-NEXT: movgt r1, #1
1056 ; CHECK-MVE-NEXT: cmp r1, #0
1057 ; CHECK-MVE-NEXT: vmov.16 q3[6], r0
1058 ; CHECK-MVE-NEXT: cset r0, ne
1059 ; CHECK-MVE-NEXT: lsls r0, r0, #31
1060 ; CHECK-MVE-NEXT: vseleq.f16 s0, s2, s0
1061 ; CHECK-MVE-NEXT: vmov r0, s0
1062 ; CHECK-MVE-NEXT: vmov.16 q3[7], r0
1063 ; CHECK-MVE-NEXT: vmov q0, q3
1064 ; CHECK-MVE-NEXT: vpop {d8, d9, d10}
1065 ; CHECK-MVE-NEXT: bx lr
1066 ;
1067 ; CHECK-MVEFP-LABEL: vcmp_one_v8f16:
1068 ; CHECK-MVEFP: @ %bb.0: @ %entry
1069 ; CHECK-MVEFP-NEXT: vldr.16 s12, [r0]
1070 ; CHECK-MVEFP-NEXT: vmov r0, s12
1071 ; CHECK-MVEFP-NEXT: vdup.16 q3, r0
1072 ; CHECK-MVEFP-NEXT: vpt.f16 le, q3, q0
1073 ; CHECK-MVEFP-NEXT: vcmpt.f16 le, q0, r0
1074 ; CHECK-MVEFP-NEXT: vpnot
1075 ; CHECK-MVEFP-NEXT: vpsel q0, q1, q2
1076 ; CHECK-MVEFP-NEXT: bx lr
1077 entry:
1078 %src2 = load half, half* %src2p
1079 %i = insertelement <8 x half> undef, half %src2, i32 0
1080 %sp = shufflevector <8 x half> %i, <8 x half> undef, <8 x i32> zeroinitializer
1081 %c = fcmp one <8 x half> %src, %sp
1082 %s = select <8 x i1> %c, <8 x half> %a, <8 x half> %b
1083 ret <8 x half> %s
1084 }
1086 define arm_aapcs_vfpcc <8 x half> @vcmp_ogt_v8f16(<8 x half> %src, half* %src2p, <8 x half> %a, <8 x half> %b) {
1087 ; CHECK-MVE-LABEL: vcmp_ogt_v8f16:
1088 ; CHECK-MVE: @ %bb.0: @ %entry
1089 ; CHECK-MVE-NEXT: .vsave {d8, d9, d10}
1090 ; CHECK-MVE-NEXT: vpush {d8, d9, d10}
1091 ; CHECK-MVE-NEXT: vldr.16 s16, [r0]
1092 ; CHECK-MVE-NEXT: vmovx.f16 s12, s0
1093 ; CHECK-MVE-NEXT: movs r0, #0
1094 ; CHECK-MVE-NEXT: vmovx.f16 s14, s8
1095 ; CHECK-MVE-NEXT: vcmpe.f16 s12, s16
1096 ; CHECK-MVE-NEXT: vmovx.f16 s12, s4
1097 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
1098 ; CHECK-MVE-NEXT: it gt
1099 ; CHECK-MVE-NEXT: movgt r0, #1
1100 ; CHECK-MVE-NEXT: cmp r0, #0
1101 ; CHECK-MVE-NEXT: vcmpe.f16 s0, s16
1102 ; CHECK-MVE-NEXT: cset r0, ne
1103 ; CHECK-MVE-NEXT: movs r2, #0
1104 ; CHECK-MVE-NEXT: lsls r0, r0, #31
1105 ; CHECK-MVE-NEXT: vmovx.f16 s20, s9
1106 ; CHECK-MVE-NEXT: vseleq.f16 s12, s14, s12
1107 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
1108 ; CHECK-MVE-NEXT: it gt
1109 ; CHECK-MVE-NEXT: movgt r2, #1
1110 ; CHECK-MVE-NEXT: cmp r2, #0
1111 ; CHECK-MVE-NEXT: cset r2, ne
1112 ; CHECK-MVE-NEXT: vmov r0, s12
1113 ; CHECK-MVE-NEXT: lsls r2, r2, #31
1114 ; CHECK-MVE-NEXT: vcmpe.f16 s1, s16
1115 ; CHECK-MVE-NEXT: vseleq.f16 s12, s8, s4
1116 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
1117 ; CHECK-MVE-NEXT: vmov r2, s12
1118 ; CHECK-MVE-NEXT: vmovx.f16 s0, s3
1119 ; CHECK-MVE-NEXT: vmov.16 q3[0], r2
1120 ; CHECK-MVE-NEXT: mov.w r1, #0
1121 ; CHECK-MVE-NEXT: vmov.16 q3[1], r0
1122 ; CHECK-MVE-NEXT: mov.w r0, #0
1123 ; CHECK-MVE-NEXT: it gt
1124 ; CHECK-MVE-NEXT: movgt r0, #1
1125 ; CHECK-MVE-NEXT: cmp r0, #0
1126 ; CHECK-MVE-NEXT: cset r0, ne
1127 ; CHECK-MVE-NEXT: lsls r0, r0, #31
1128 ; CHECK-MVE-NEXT: vseleq.f16 s18, s9, s5
1129 ; CHECK-MVE-NEXT: vmov r0, s18
1130 ; CHECK-MVE-NEXT: vmovx.f16 s18, s1
1131 ; CHECK-MVE-NEXT: vcmpe.f16 s18, s16
1132 ; CHECK-MVE-NEXT: vmov.16 q3[2], r0
1133 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
1134 ; CHECK-MVE-NEXT: mov.w r0, #0
1135 ; CHECK-MVE-NEXT: it gt
1136 ; CHECK-MVE-NEXT: movgt r0, #1
1137 ; CHECK-MVE-NEXT: cmp r0, #0
1138 ; CHECK-MVE-NEXT: cset r0, ne
1139 ; CHECK-MVE-NEXT: vmovx.f16 s18, s5
1140 ; CHECK-MVE-NEXT: lsls r0, r0, #31
1141 ; CHECK-MVE-NEXT: vcmpe.f16 s2, s16
1142 ; CHECK-MVE-NEXT: vseleq.f16 s18, s20, s18
1143 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
1144 ; CHECK-MVE-NEXT: vmov r0, s18
1145 ; CHECK-MVE-NEXT: vmovx.f16 s20, s10
1146 ; CHECK-MVE-NEXT: vmov.16 q3[3], r0
1147 ; CHECK-MVE-NEXT: mov.w r0, #0
1148 ; CHECK-MVE-NEXT: it gt
1149 ; CHECK-MVE-NEXT: movgt r0, #1
1150 ; CHECK-MVE-NEXT: cmp r0, #0
1151 ; CHECK-MVE-NEXT: cset r0, ne
1152 ; CHECK-MVE-NEXT: lsls r0, r0, #31
1153 ; CHECK-MVE-NEXT: vseleq.f16 s18, s10, s6
1154 ; CHECK-MVE-NEXT: vmov r0, s18
1155 ; CHECK-MVE-NEXT: vmovx.f16 s18, s2
1156 ; CHECK-MVE-NEXT: vcmpe.f16 s18, s16
1157 ; CHECK-MVE-NEXT: vmov.16 q3[4], r0
1158 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
1159 ; CHECK-MVE-NEXT: mov.w r0, #0
1160 ; CHECK-MVE-NEXT: it gt
1161 ; CHECK-MVE-NEXT: movgt r0, #1
1162 ; CHECK-MVE-NEXT: cmp r0, #0
1163 ; CHECK-MVE-NEXT: cset r0, ne
1164 ; CHECK-MVE-NEXT: vmovx.f16 s18, s6
1165 ; CHECK-MVE-NEXT: lsls r0, r0, #31
1166 ; CHECK-MVE-NEXT: vcmpe.f16 s3, s16
1167 ; CHECK-MVE-NEXT: vseleq.f16 s18, s20, s18
1168 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
1169 ; CHECK-MVE-NEXT: vmov r0, s18
1170 ; CHECK-MVE-NEXT: vcmpe.f16 s0, s16
1171 ; CHECK-MVE-NEXT: vmov.16 q3[5], r0
1172 ; CHECK-MVE-NEXT: mov.w r0, #0
1173 ; CHECK-MVE-NEXT: it gt
1174 ; CHECK-MVE-NEXT: movgt r0, #1
1175 ; CHECK-MVE-NEXT: cmp r0, #0
1176 ; CHECK-MVE-NEXT: cset r0, ne
1177 ; CHECK-MVE-NEXT: vmovx.f16 s0, s7
1178 ; CHECK-MVE-NEXT: lsls r0, r0, #31
1179 ; CHECK-MVE-NEXT: vmovx.f16 s2, s11
1180 ; CHECK-MVE-NEXT: vseleq.f16 s18, s11, s7
1181 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
1182 ; CHECK-MVE-NEXT: it gt
1183 ; CHECK-MVE-NEXT: movgt r1, #1
1184 ; CHECK-MVE-NEXT: vmov r0, s18
1185 ; CHECK-MVE-NEXT: cmp r1, #0
1186 ; CHECK-MVE-NEXT: vmov.16 q3[6], r0
1187 ; CHECK-MVE-NEXT: cset r0, ne
1188 ; CHECK-MVE-NEXT: lsls r0, r0, #31
1189 ; CHECK-MVE-NEXT: vseleq.f16 s0, s2, s0
1190 ; CHECK-MVE-NEXT: vmov r0, s0
1191 ; CHECK-MVE-NEXT: vmov.16 q3[7], r0
1192 ; CHECK-MVE-NEXT: vmov q0, q3
1193 ; CHECK-MVE-NEXT: vpop {d8, d9, d10}
1194 ; CHECK-MVE-NEXT: bx lr
1195 ;
1196 ; CHECK-MVEFP-LABEL: vcmp_ogt_v8f16:
1197 ; CHECK-MVEFP: @ %bb.0: @ %entry
1198 ; CHECK-MVEFP-NEXT: vldr.16 s12, [r0]
1199 ; CHECK-MVEFP-NEXT: vmov r0, s12
1200 ; CHECK-MVEFP-NEXT: vcmp.f16 gt, q0, r0
1201 ; CHECK-MVEFP-NEXT: vpsel q0, q1, q2
1202 ; CHECK-MVEFP-NEXT: bx lr
1203 entry:
1204 %src2 = load half, half* %src2p
1205 %i = insertelement <8 x half> undef, half %src2, i32 0
1206 %sp = shufflevector <8 x half> %i, <8 x half> undef, <8 x i32> zeroinitializer
1207 %c = fcmp ogt <8 x half> %src, %sp
1208 %s = select <8 x i1> %c, <8 x half> %a, <8 x half> %b
1209 ret <8 x half> %s
1210 }
1212 define arm_aapcs_vfpcc <8 x half> @vcmp_oge_v8f16(<8 x half> %src, half* %src2p, <8 x half> %a, <8 x half> %b) {
1213 ; CHECK-MVE-LABEL: vcmp_oge_v8f16:
1214 ; CHECK-MVE: @ %bb.0: @ %entry
1215 ; CHECK-MVE-NEXT: .vsave {d8, d9, d10}
1216 ; CHECK-MVE-NEXT: vpush {d8, d9, d10}
1217 ; CHECK-MVE-NEXT: vldr.16 s16, [r0]
1218 ; CHECK-MVE-NEXT: vmovx.f16 s12, s0
1219 ; CHECK-MVE-NEXT: movs r0, #0
1220 ; CHECK-MVE-NEXT: vmovx.f16 s14, s8
1221 ; CHECK-MVE-NEXT: vcmpe.f16 s12, s16
1222 ; CHECK-MVE-NEXT: vmovx.f16 s12, s4
1223 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
1224 ; CHECK-MVE-NEXT: it ge
1225 ; CHECK-MVE-NEXT: movge r0, #1
1226 ; CHECK-MVE-NEXT: cmp r0, #0
1227 ; CHECK-MVE-NEXT: vcmpe.f16 s0, s16
1228 ; CHECK-MVE-NEXT: cset r0, ne
1229 ; CHECK-MVE-NEXT: movs r2, #0
1230 ; CHECK-MVE-NEXT: lsls r0, r0, #31
1231 ; CHECK-MVE-NEXT: vmovx.f16 s20, s9
1232 ; CHECK-MVE-NEXT: vseleq.f16 s12, s14, s12
1233 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
1234 ; CHECK-MVE-NEXT: it ge
1235 ; CHECK-MVE-NEXT: movge r2, #1
1236 ; CHECK-MVE-NEXT: cmp r2, #0
1237 ; CHECK-MVE-NEXT: cset r2, ne
1238 ; CHECK-MVE-NEXT: vmov r0, s12
1239 ; CHECK-MVE-NEXT: lsls r2, r2, #31
1240 ; CHECK-MVE-NEXT: vcmpe.f16 s1, s16
1241 ; CHECK-MVE-NEXT: vseleq.f16 s12, s8, s4
1242 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
1243 ; CHECK-MVE-NEXT: vmov r2, s12
1244 ; CHECK-MVE-NEXT: vmovx.f16 s0, s3
1245 ; CHECK-MVE-NEXT: vmov.16 q3[0], r2
1246 ; CHECK-MVE-NEXT: mov.w r1, #0
1247 ; CHECK-MVE-NEXT: vmov.16 q3[1], r0
1248 ; CHECK-MVE-NEXT: mov.w r0, #0
1249 ; CHECK-MVE-NEXT: it ge
1250 ; CHECK-MVE-NEXT: movge r0, #1
1251 ; CHECK-MVE-NEXT: cmp r0, #0
1252 ; CHECK-MVE-NEXT: cset r0, ne
1253 ; CHECK-MVE-NEXT: lsls r0, r0, #31
1254 ; CHECK-MVE-NEXT: vseleq.f16 s18, s9, s5
1255 ; CHECK-MVE-NEXT: vmov r0, s18
1256 ; CHECK-MVE-NEXT: vmovx.f16 s18, s1
1257 ; CHECK-MVE-NEXT: vcmpe.f16 s18, s16
1258 ; CHECK-MVE-NEXT: vmov.16 q3[2], r0
1259 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
1260 ; CHECK-MVE-NEXT: mov.w r0, #0
1261 ; CHECK-MVE-NEXT: it ge
1262 ; CHECK-MVE-NEXT: movge r0, #1
1263 ; CHECK-MVE-NEXT: cmp r0, #0
1264 ; CHECK-MVE-NEXT: cset r0, ne
1265 ; CHECK-MVE-NEXT: vmovx.f16 s18, s5
1266 ; CHECK-MVE-NEXT: lsls r0, r0, #31
1267 ; CHECK-MVE-NEXT: vcmpe.f16 s2, s16
1268 ; CHECK-MVE-NEXT: vseleq.f16 s18, s20, s18
1269 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
1270 ; CHECK-MVE-NEXT: vmov r0, s18
1271 ; CHECK-MVE-NEXT: vmovx.f16 s20, s10
1272 ; CHECK-MVE-NEXT: vmov.16 q3[3], r0
1273 ; CHECK-MVE-NEXT: mov.w r0, #0
1274 ; CHECK-MVE-NEXT: it ge
1275 ; CHECK-MVE-NEXT: movge r0, #1
1276 ; CHECK-MVE-NEXT: cmp r0, #0
1277 ; CHECK-MVE-NEXT: cset r0, ne
1278 ; CHECK-MVE-NEXT: lsls r0, r0, #31
1279 ; CHECK-MVE-NEXT: vseleq.f16 s18, s10, s6
1280 ; CHECK-MVE-NEXT: vmov r0, s18
1281 ; CHECK-MVE-NEXT: vmovx.f16 s18, s2
1282 ; CHECK-MVE-NEXT: vcmpe.f16 s18, s16
1283 ; CHECK-MVE-NEXT: vmov.16 q3[4], r0
1284 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
1285 ; CHECK-MVE-NEXT: mov.w r0, #0
1286 ; CHECK-MVE-NEXT: it ge
1287 ; CHECK-MVE-NEXT: movge r0, #1
1288 ; CHECK-MVE-NEXT: cmp r0, #0
1289 ; CHECK-MVE-NEXT: cset r0, ne
1290 ; CHECK-MVE-NEXT: vmovx.f16 s18, s6
1291 ; CHECK-MVE-NEXT: lsls r0, r0, #31
1292 ; CHECK-MVE-NEXT: vcmpe.f16 s3, s16
1293 ; CHECK-MVE-NEXT: vseleq.f16 s18, s20, s18
1294 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
1295 ; CHECK-MVE-NEXT: vmov r0, s18
1296 ; CHECK-MVE-NEXT: vcmpe.f16 s0, s16
1297 ; CHECK-MVE-NEXT: vmov.16 q3[5], r0
1298 ; CHECK-MVE-NEXT: mov.w r0, #0
1299 ; CHECK-MVE-NEXT: it ge
1300 ; CHECK-MVE-NEXT: movge r0, #1
1301 ; CHECK-MVE-NEXT: cmp r0, #0
1302 ; CHECK-MVE-NEXT: cset r0, ne
1303 ; CHECK-MVE-NEXT: vmovx.f16 s0, s7
1304 ; CHECK-MVE-NEXT: lsls r0, r0, #31
1305 ; CHECK-MVE-NEXT: vmovx.f16 s2, s11
1306 ; CHECK-MVE-NEXT: vseleq.f16 s18, s11, s7
1307 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
1308 ; CHECK-MVE-NEXT: it ge
1309 ; CHECK-MVE-NEXT: movge r1, #1
1310 ; CHECK-MVE-NEXT: vmov r0, s18
1311 ; CHECK-MVE-NEXT: cmp r1, #0
1312 ; CHECK-MVE-NEXT: vmov.16 q3[6], r0
1313 ; CHECK-MVE-NEXT: cset r0, ne
1314 ; CHECK-MVE-NEXT: lsls r0, r0, #31
1315 ; CHECK-MVE-NEXT: vseleq.f16 s0, s2, s0
1316 ; CHECK-MVE-NEXT: vmov r0, s0
1317 ; CHECK-MVE-NEXT: vmov.16 q3[7], r0
1318 ; CHECK-MVE-NEXT: vmov q0, q3
1319 ; CHECK-MVE-NEXT: vpop {d8, d9, d10}
1320 ; CHECK-MVE-NEXT: bx lr
1321 ;
1322 ; CHECK-MVEFP-LABEL: vcmp_oge_v8f16:
1323 ; CHECK-MVEFP: @ %bb.0: @ %entry
1324 ; CHECK-MVEFP-NEXT: vldr.16 s12, [r0]
1325 ; CHECK-MVEFP-NEXT: vmov r0, s12
1326 ; CHECK-MVEFP-NEXT: vcmp.f16 ge, q0, r0
1327 ; CHECK-MVEFP-NEXT: vpsel q0, q1, q2
1328 ; CHECK-MVEFP-NEXT: bx lr
1329 entry:
1330 %src2 = load half, half* %src2p
1331 %i = insertelement <8 x half> undef, half %src2, i32 0
1332 %sp = shufflevector <8 x half> %i, <8 x half> undef, <8 x i32> zeroinitializer
1333 %c = fcmp oge <8 x half> %src, %sp
1334 %s = select <8 x i1> %c, <8 x half> %a, <8 x half> %b
1335 ret <8 x half> %s
1336 }
1338 define arm_aapcs_vfpcc <8 x half> @vcmp_olt_v8f16(<8 x half> %src, half* %src2p, <8 x half> %a, <8 x half> %b) {
1339 ; CHECK-MVE-LABEL: vcmp_olt_v8f16:
1340 ; CHECK-MVE: @ %bb.0: @ %entry
1341 ; CHECK-MVE-NEXT: .vsave {d8, d9, d10}
1342 ; CHECK-MVE-NEXT: vpush {d8, d9, d10}
1343 ; CHECK-MVE-NEXT: vldr.16 s16, [r0]
1344 ; CHECK-MVE-NEXT: vmovx.f16 s12, s0
1345 ; CHECK-MVE-NEXT: movs r0, #0
1346 ; CHECK-MVE-NEXT: vmovx.f16 s14, s8
1347 ; CHECK-MVE-NEXT: vcmpe.f16 s12, s16
1348 ; CHECK-MVE-NEXT: vmovx.f16 s12, s4
1349 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
1350 ; CHECK-MVE-NEXT: it mi
1351 ; CHECK-MVE-NEXT: movmi r0, #1
1352 ; CHECK-MVE-NEXT: cmp r0, #0
1353 ; CHECK-MVE-NEXT: vcmpe.f16 s0, s16
1354 ; CHECK-MVE-NEXT: cset r0, ne
1355 ; CHECK-MVE-NEXT: movs r2, #0
1356 ; CHECK-MVE-NEXT: lsls r0, r0, #31
1357 ; CHECK-MVE-NEXT: vmovx.f16 s20, s9
1358 ; CHECK-MVE-NEXT: vseleq.f16 s12, s14, s12
1359 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
1360 ; CHECK-MVE-NEXT: it mi
1361 ; CHECK-MVE-NEXT: movmi r2, #1
1362 ; CHECK-MVE-NEXT: cmp r2, #0
1363 ; CHECK-MVE-NEXT: cset r2, ne
1364 ; CHECK-MVE-NEXT: vmov r0, s12
1365 ; CHECK-MVE-NEXT: lsls r2, r2, #31
1366 ; CHECK-MVE-NEXT: vcmpe.f16 s1, s16
1367 ; CHECK-MVE-NEXT: vseleq.f16 s12, s8, s4
1368 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
1369 ; CHECK-MVE-NEXT: vmov r2, s12
1370 ; CHECK-MVE-NEXT: vmovx.f16 s0, s3
1371 ; CHECK-MVE-NEXT: vmov.16 q3[0], r2
1372 ; CHECK-MVE-NEXT: mov.w r1, #0
1373 ; CHECK-MVE-NEXT: vmov.16 q3[1], r0
1374 ; CHECK-MVE-NEXT: mov.w r0, #0
1375 ; CHECK-MVE-NEXT: it mi
1376 ; CHECK-MVE-NEXT: movmi r0, #1
1377 ; CHECK-MVE-NEXT: cmp r0, #0
1378 ; CHECK-MVE-NEXT: cset r0, ne
1379 ; CHECK-MVE-NEXT: lsls r0, r0, #31
1380 ; CHECK-MVE-NEXT: vseleq.f16 s18, s9, s5
1381 ; CHECK-MVE-NEXT: vmov r0, s18
1382 ; CHECK-MVE-NEXT: vmovx.f16 s18, s1
1383 ; CHECK-MVE-NEXT: vcmpe.f16 s18, s16
1384 ; CHECK-MVE-NEXT: vmov.16 q3[2], r0
1385 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
1386 ; CHECK-MVE-NEXT: mov.w r0, #0
1387 ; CHECK-MVE-NEXT: it mi
1388 ; CHECK-MVE-NEXT: movmi r0, #1
1389 ; CHECK-MVE-NEXT: cmp r0, #0
1390 ; CHECK-MVE-NEXT: cset r0, ne
1391 ; CHECK-MVE-NEXT: vmovx.f16 s18, s5
1392 ; CHECK-MVE-NEXT: lsls r0, r0, #31
1393 ; CHECK-MVE-NEXT: vcmpe.f16 s2, s16
1394 ; CHECK-MVE-NEXT: vseleq.f16 s18, s20, s18
1395 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
1396 ; CHECK-MVE-NEXT: vmov r0, s18
1397 ; CHECK-MVE-NEXT: vmovx.f16 s20, s10
1398 ; CHECK-MVE-NEXT: vmov.16 q3[3], r0
1399 ; CHECK-MVE-NEXT: mov.w r0, #0
1400 ; CHECK-MVE-NEXT: it mi
1401 ; CHECK-MVE-NEXT: movmi r0, #1
1402 ; CHECK-MVE-NEXT: cmp r0, #0
1403 ; CHECK-MVE-NEXT: cset r0, ne
1404 ; CHECK-MVE-NEXT: lsls r0, r0, #31
1405 ; CHECK-MVE-NEXT: vseleq.f16 s18, s10, s6
1406 ; CHECK-MVE-NEXT: vmov r0, s18
1407 ; CHECK-MVE-NEXT: vmovx.f16 s18, s2
1408 ; CHECK-MVE-NEXT: vcmpe.f16 s18, s16
1409 ; CHECK-MVE-NEXT: vmov.16 q3[4], r0
1410 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
1411 ; CHECK-MVE-NEXT: mov.w r0, #0
1412 ; CHECK-MVE-NEXT: it mi
1413 ; CHECK-MVE-NEXT: movmi r0, #1
1414 ; CHECK-MVE-NEXT: cmp r0, #0
1415 ; CHECK-MVE-NEXT: cset r0, ne
1416 ; CHECK-MVE-NEXT: vmovx.f16 s18, s6
1417 ; CHECK-MVE-NEXT: lsls r0, r0, #31
1418 ; CHECK-MVE-NEXT: vcmpe.f16 s3, s16
1419 ; CHECK-MVE-NEXT: vseleq.f16 s18, s20, s18
1420 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
1421 ; CHECK-MVE-NEXT: vmov r0, s18
1422 ; CHECK-MVE-NEXT: vcmpe.f16 s0, s16
1423 ; CHECK-MVE-NEXT: vmov.16 q3[5], r0
1424 ; CHECK-MVE-NEXT: mov.w r0, #0
1425 ; CHECK-MVE-NEXT: it mi
1426 ; CHECK-MVE-NEXT: movmi r0, #1
1427 ; CHECK-MVE-NEXT: cmp r0, #0
1428 ; CHECK-MVE-NEXT: cset r0, ne
1429 ; CHECK-MVE-NEXT: vmovx.f16 s0, s7
1430 ; CHECK-MVE-NEXT: lsls r0, r0, #31
1431 ; CHECK-MVE-NEXT: vmovx.f16 s2, s11
1432 ; CHECK-MVE-NEXT: vseleq.f16 s18, s11, s7
1433 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
1434 ; CHECK-MVE-NEXT: it mi
1435 ; CHECK-MVE-NEXT: movmi r1, #1
1436 ; CHECK-MVE-NEXT: vmov r0, s18
1437 ; CHECK-MVE-NEXT: cmp r1, #0
1438 ; CHECK-MVE-NEXT: vmov.16 q3[6], r0
1439 ; CHECK-MVE-NEXT: cset r0, ne
1440 ; CHECK-MVE-NEXT: lsls r0, r0, #31
1441 ; CHECK-MVE-NEXT: vseleq.f16 s0, s2, s0
1442 ; CHECK-MVE-NEXT: vmov r0, s0
1443 ; CHECK-MVE-NEXT: vmov.16 q3[7], r0
1444 ; CHECK-MVE-NEXT: vmov q0, q3
1445 ; CHECK-MVE-NEXT: vpop {d8, d9, d10}
1446 ; CHECK-MVE-NEXT: bx lr
1447 ;
1448 ; CHECK-MVEFP-LABEL: vcmp_olt_v8f16:
1449 ; CHECK-MVEFP: @ %bb.0: @ %entry
1450 ; CHECK-MVEFP-NEXT: vldr.16 s12, [r0]
1451 ; CHECK-MVEFP-NEXT: vmov r0, s12
1452 ; CHECK-MVEFP-NEXT: vdup.16 q3, r0
1453 ; CHECK-MVEFP-NEXT: vcmp.f16 gt, q3, q0
1454 ; CHECK-MVEFP-NEXT: vpsel q0, q1, q2
1455 ; CHECK-MVEFP-NEXT: bx lr
1456 entry:
1457 %src2 = load half, half* %src2p
1458 %i = insertelement <8 x half> undef, half %src2, i32 0
1459 %sp = shufflevector <8 x half> %i, <8 x half> undef, <8 x i32> zeroinitializer
1460 %c = fcmp olt <8 x half> %src, %sp
1461 %s = select <8 x i1> %c, <8 x half> %a, <8 x half> %b
1462 ret <8 x half> %s
1463 }
1465 define arm_aapcs_vfpcc <8 x half> @vcmp_ole_v8f16(<8 x half> %src, half* %src2p, <8 x half> %a, <8 x half> %b) {
1466 ; CHECK-MVE-LABEL: vcmp_ole_v8f16:
1467 ; CHECK-MVE: @ %bb.0: @ %entry
1468 ; CHECK-MVE-NEXT: .vsave {d8, d9, d10}
1469 ; CHECK-MVE-NEXT: vpush {d8, d9, d10}
1470 ; CHECK-MVE-NEXT: vldr.16 s16, [r0]
1471 ; CHECK-MVE-NEXT: vmovx.f16 s12, s0
1472 ; CHECK-MVE-NEXT: movs r0, #0
1473 ; CHECK-MVE-NEXT: vmovx.f16 s14, s8
1474 ; CHECK-MVE-NEXT: vcmpe.f16 s12, s16
1475 ; CHECK-MVE-NEXT: vmovx.f16 s12, s4
1476 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
1477 ; CHECK-MVE-NEXT: it ls
1478 ; CHECK-MVE-NEXT: movls r0, #1
1479 ; CHECK-MVE-NEXT: cmp r0, #0
1480 ; CHECK-MVE-NEXT: vcmpe.f16 s0, s16
1481 ; CHECK-MVE-NEXT: cset r0, ne
1482 ; CHECK-MVE-NEXT: movs r2, #0
1483 ; CHECK-MVE-NEXT: lsls r0, r0, #31
1484 ; CHECK-MVE-NEXT: vmovx.f16 s20, s9
1485 ; CHECK-MVE-NEXT: vseleq.f16 s12, s14, s12
1486 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
1487 ; CHECK-MVE-NEXT: it ls
1488 ; CHECK-MVE-NEXT: movls r2, #1
1489 ; CHECK-MVE-NEXT: cmp r2, #0
1490 ; CHECK-MVE-NEXT: cset r2, ne
1491 ; CHECK-MVE-NEXT: vmov r0, s12
1492 ; CHECK-MVE-NEXT: lsls r2, r2, #31
1493 ; CHECK-MVE-NEXT: vcmpe.f16 s1, s16
1494 ; CHECK-MVE-NEXT: vseleq.f16 s12, s8, s4
1495 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
1496 ; CHECK-MVE-NEXT: vmov r2, s12
1497 ; CHECK-MVE-NEXT: vmovx.f16 s0, s3
1498 ; CHECK-MVE-NEXT: vmov.16 q3[0], r2
1499 ; CHECK-MVE-NEXT: mov.w r1, #0
1500 ; CHECK-MVE-NEXT: vmov.16 q3[1], r0
1501 ; CHECK-MVE-NEXT: mov.w r0, #0
1502 ; CHECK-MVE-NEXT: it ls
1503 ; CHECK-MVE-NEXT: movls r0, #1
1504 ; CHECK-MVE-NEXT: cmp r0, #0
1505 ; CHECK-MVE-NEXT: cset r0, ne
1506 ; CHECK-MVE-NEXT: lsls r0, r0, #31
1507 ; CHECK-MVE-NEXT: vseleq.f16 s18, s9, s5
1508 ; CHECK-MVE-NEXT: vmov r0, s18
1509 ; CHECK-MVE-NEXT: vmovx.f16 s18, s1
1510 ; CHECK-MVE-NEXT: vcmpe.f16 s18, s16
1511 ; CHECK-MVE-NEXT: vmov.16 q3[2], r0
1512 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
1513 ; CHECK-MVE-NEXT: mov.w r0, #0
1514 ; CHECK-MVE-NEXT: it ls
1515 ; CHECK-MVE-NEXT: movls r0, #1
1516 ; CHECK-MVE-NEXT: cmp r0, #0
1517 ; CHECK-MVE-NEXT: cset r0, ne
1518 ; CHECK-MVE-NEXT: vmovx.f16 s18, s5
1519 ; CHECK-MVE-NEXT: lsls r0, r0, #31
1520 ; CHECK-MVE-NEXT: vcmpe.f16 s2, s16
1521 ; CHECK-MVE-NEXT: vseleq.f16 s18, s20, s18
1522 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
1523 ; CHECK-MVE-NEXT: vmov r0, s18
1524 ; CHECK-MVE-NEXT: vmovx.f16 s20, s10
1525 ; CHECK-MVE-NEXT: vmov.16 q3[3], r0
1526 ; CHECK-MVE-NEXT: mov.w r0, #0
1527 ; CHECK-MVE-NEXT: it ls
1528 ; CHECK-MVE-NEXT: movls r0, #1
1529 ; CHECK-MVE-NEXT: cmp r0, #0
1530 ; CHECK-MVE-NEXT: cset r0, ne
1531 ; CHECK-MVE-NEXT: lsls r0, r0, #31
1532 ; CHECK-MVE-NEXT: vseleq.f16 s18, s10, s6
1533 ; CHECK-MVE-NEXT: vmov r0, s18
1534 ; CHECK-MVE-NEXT: vmovx.f16 s18, s2
1535 ; CHECK-MVE-NEXT: vcmpe.f16 s18, s16
1536 ; CHECK-MVE-NEXT: vmov.16 q3[4], r0
1537 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
1538 ; CHECK-MVE-NEXT: mov.w r0, #0
1539 ; CHECK-MVE-NEXT: it ls
1540 ; CHECK-MVE-NEXT: movls r0, #1
1541 ; CHECK-MVE-NEXT: cmp r0, #0
1542 ; CHECK-MVE-NEXT: cset r0, ne
1543 ; CHECK-MVE-NEXT: vmovx.f16 s18, s6
1544 ; CHECK-MVE-NEXT: lsls r0, r0, #31
1545 ; CHECK-MVE-NEXT: vcmpe.f16 s3, s16
1546 ; CHECK-MVE-NEXT: vseleq.f16 s18, s20, s18
1547 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
1548 ; CHECK-MVE-NEXT: vmov r0, s18
1549 ; CHECK-MVE-NEXT: vcmpe.f16 s0, s16
1550 ; CHECK-MVE-NEXT: vmov.16 q3[5], r0
1551 ; CHECK-MVE-NEXT: mov.w r0, #0
1552 ; CHECK-MVE-NEXT: it ls
1553 ; CHECK-MVE-NEXT: movls r0, #1
1554 ; CHECK-MVE-NEXT: cmp r0, #0
1555 ; CHECK-MVE-NEXT: cset r0, ne
1556 ; CHECK-MVE-NEXT: vmovx.f16 s0, s7
1557 ; CHECK-MVE-NEXT: lsls r0, r0, #31
1558 ; CHECK-MVE-NEXT: vmovx.f16 s2, s11
1559 ; CHECK-MVE-NEXT: vseleq.f16 s18, s11, s7
1560 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
1561 ; CHECK-MVE-NEXT: it ls
1562 ; CHECK-MVE-NEXT: movls r1, #1
1563 ; CHECK-MVE-NEXT: vmov r0, s18
1564 ; CHECK-MVE-NEXT: cmp r1, #0
1565 ; CHECK-MVE-NEXT: vmov.16 q3[6], r0
1566 ; CHECK-MVE-NEXT: cset r0, ne
1567 ; CHECK-MVE-NEXT: lsls r0, r0, #31
1568 ; CHECK-MVE-NEXT: vseleq.f16 s0, s2, s0
1569 ; CHECK-MVE-NEXT: vmov r0, s0
1570 ; CHECK-MVE-NEXT: vmov.16 q3[7], r0
1571 ; CHECK-MVE-NEXT: vmov q0, q3
1572 ; CHECK-MVE-NEXT: vpop {d8, d9, d10}
1573 ; CHECK-MVE-NEXT: bx lr
1574 ;
1575 ; CHECK-MVEFP-LABEL: vcmp_ole_v8f16:
1576 ; CHECK-MVEFP: @ %bb.0: @ %entry
1577 ; CHECK-MVEFP-NEXT: vldr.16 s12, [r0]
1578 ; CHECK-MVEFP-NEXT: vmov r0, s12
1579 ; CHECK-MVEFP-NEXT: vdup.16 q3, r0
1580 ; CHECK-MVEFP-NEXT: vcmp.f16 ge, q3, q0
1581 ; CHECK-MVEFP-NEXT: vpsel q0, q1, q2
1582 ; CHECK-MVEFP-NEXT: bx lr
1583 entry:
1584 %src2 = load half, half* %src2p
1585 %i = insertelement <8 x half> undef, half %src2, i32 0
1586 %sp = shufflevector <8 x half> %i, <8 x half> undef, <8 x i32> zeroinitializer
1587 %c = fcmp ole <8 x half> %src, %sp
1588 %s = select <8 x i1> %c, <8 x half> %a, <8 x half> %b
1589 ret <8 x half> %s
1590 }
1592 define arm_aapcs_vfpcc <8 x half> @vcmp_ueq_v8f16(<8 x half> %src, half* %src2p, <8 x half> %a, <8 x half> %b) {
1593 ; CHECK-MVE-LABEL: vcmp_ueq_v8f16:
1594 ; CHECK-MVE: @ %bb.0: @ %entry
1595 ; CHECK-MVE-NEXT: .vsave {d8, d9, d10}
1596 ; CHECK-MVE-NEXT: vpush {d8, d9, d10}
1597 ; CHECK-MVE-NEXT: vldr.16 s16, [r0]
1598 ; CHECK-MVE-NEXT: vmovx.f16 s12, s0
1599 ; CHECK-MVE-NEXT: movs r0, #0
1600 ; CHECK-MVE-NEXT: vmovx.f16 s14, s8
1601 ; CHECK-MVE-NEXT: vcmp.f16 s12, s16
1602 ; CHECK-MVE-NEXT: vmovx.f16 s12, s4
1603 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
1604 ; CHECK-MVE-NEXT: it eq
1605 ; CHECK-MVE-NEXT: moveq r0, #1
1606 ; CHECK-MVE-NEXT: it vs
1607 ; CHECK-MVE-NEXT: movvs r0, #1
1608 ; CHECK-MVE-NEXT: cmp r0, #0
1609 ; CHECK-MVE-NEXT: cset r0, ne
1610 ; CHECK-MVE-NEXT: vcmp.f16 s0, s16
1611 ; CHECK-MVE-NEXT: lsls r0, r0, #31
1612 ; CHECK-MVE-NEXT: mov.w r2, #0
1613 ; CHECK-MVE-NEXT: vseleq.f16 s12, s14, s12
1614 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
1615 ; CHECK-MVE-NEXT: it eq
1616 ; CHECK-MVE-NEXT: moveq r2, #1
1617 ; CHECK-MVE-NEXT: vmov r0, s12
1618 ; CHECK-MVE-NEXT: it vs
1619 ; CHECK-MVE-NEXT: movvs r2, #1
1620 ; CHECK-MVE-NEXT: cmp r2, #0
1621 ; CHECK-MVE-NEXT: cset r2, ne
1622 ; CHECK-MVE-NEXT: vcmp.f16 s1, s16
1623 ; CHECK-MVE-NEXT: lsls r2, r2, #31
1624 ; CHECK-MVE-NEXT: vmovx.f16 s20, s9
1625 ; CHECK-MVE-NEXT: vseleq.f16 s12, s8, s4
1626 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
1627 ; CHECK-MVE-NEXT: vmov r2, s12
1628 ; CHECK-MVE-NEXT: vmovx.f16 s0, s3
1629 ; CHECK-MVE-NEXT: vmov.16 q3[0], r2
1630 ; CHECK-MVE-NEXT: mov.w r1, #0
1631 ; CHECK-MVE-NEXT: vmov.16 q3[1], r0
1632 ; CHECK-MVE-NEXT: mov.w r0, #0
1633 ; CHECK-MVE-NEXT: it eq
1634 ; CHECK-MVE-NEXT: moveq r0, #1
1635 ; CHECK-MVE-NEXT: it vs
1636 ; CHECK-MVE-NEXT: movvs r0, #1
1637 ; CHECK-MVE-NEXT: cmp r0, #0
1638 ; CHECK-MVE-NEXT: cset r0, ne
1639 ; CHECK-MVE-NEXT: lsls r0, r0, #31
1640 ; CHECK-MVE-NEXT: vseleq.f16 s18, s9, s5
1641 ; CHECK-MVE-NEXT: vmov r0, s18
1642 ; CHECK-MVE-NEXT: vmovx.f16 s18, s1
1643 ; CHECK-MVE-NEXT: vcmp.f16 s18, s16
1644 ; CHECK-MVE-NEXT: vmov.16 q3[2], r0
1645 ; CHECK-MVE-NEXT: movs r0, #0
1646 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
1647 ; CHECK-MVE-NEXT: it eq
1648 ; CHECK-MVE-NEXT: moveq r0, #1
1649 ; CHECK-MVE-NEXT: vmovx.f16 s18, s5
1650 ; CHECK-MVE-NEXT: it vs
1651 ; CHECK-MVE-NEXT: movvs r0, #1
1652 ; CHECK-MVE-NEXT: cmp r0, #0
1653 ; CHECK-MVE-NEXT: cset r0, ne
1654 ; CHECK-MVE-NEXT: vcmp.f16 s2, s16
1655 ; CHECK-MVE-NEXT: lsls r0, r0, #31
1656 ; CHECK-MVE-NEXT: vseleq.f16 s18, s20, s18
1657 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
1658 ; CHECK-MVE-NEXT: vmov r0, s18
1659 ; CHECK-MVE-NEXT: vmovx.f16 s20, s10
1660 ; CHECK-MVE-NEXT: vmov.16 q3[3], r0
1661 ; CHECK-MVE-NEXT: mov.w r0, #0
1662 ; CHECK-MVE-NEXT: it eq
1663 ; CHECK-MVE-NEXT: moveq r0, #1
1664 ; CHECK-MVE-NEXT: it vs
1665 ; CHECK-MVE-NEXT: movvs r0, #1
1666 ; CHECK-MVE-NEXT: cmp r0, #0
1667 ; CHECK-MVE-NEXT: cset r0, ne
1668 ; CHECK-MVE-NEXT: lsls r0, r0, #31
1669 ; CHECK-MVE-NEXT: vseleq.f16 s18, s10, s6
1670 ; CHECK-MVE-NEXT: vmov r0, s18
1671 ; CHECK-MVE-NEXT: vmovx.f16 s18, s2
1672 ; CHECK-MVE-NEXT: vcmp.f16 s18, s16
1673 ; CHECK-MVE-NEXT: vmov.16 q3[4], r0
1674 ; CHECK-MVE-NEXT: movs r0, #0
1675 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
1676 ; CHECK-MVE-NEXT: it eq
1677 ; CHECK-MVE-NEXT: moveq r0, #1
1678 ; CHECK-MVE-NEXT: vmovx.f16 s18, s6
1679 ; CHECK-MVE-NEXT: it vs
1680 ; CHECK-MVE-NEXT: movvs r0, #1
1681 ; CHECK-MVE-NEXT: cmp r0, #0
1682 ; CHECK-MVE-NEXT: cset r0, ne
1683 ; CHECK-MVE-NEXT: vcmp.f16 s3, s16
1684 ; CHECK-MVE-NEXT: lsls r0, r0, #31
1685 ; CHECK-MVE-NEXT: vmovx.f16 s2, s11
1686 ; CHECK-MVE-NEXT: vseleq.f16 s18, s20, s18
1687 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
1688 ; CHECK-MVE-NEXT: vmov r0, s18
1689 ; CHECK-MVE-NEXT: vcmp.f16 s0, s16
1690 ; CHECK-MVE-NEXT: vmov.16 q3[5], r0
1691 ; CHECK-MVE-NEXT: mov.w r0, #0
1692 ; CHECK-MVE-NEXT: it eq
1693 ; CHECK-MVE-NEXT: moveq r0, #1
1694 ; CHECK-MVE-NEXT: vmovx.f16 s0, s7
1695 ; CHECK-MVE-NEXT: it vs
1696 ; CHECK-MVE-NEXT: movvs r0, #1
1697 ; CHECK-MVE-NEXT: cmp r0, #0
1698 ; CHECK-MVE-NEXT: cset r0, ne
1699 ; CHECK-MVE-NEXT: lsls r0, r0, #31
1700 ; CHECK-MVE-NEXT: vseleq.f16 s18, s11, s7
1701 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
1702 ; CHECK-MVE-NEXT: it eq
1703 ; CHECK-MVE-NEXT: moveq r1, #1
1704 ; CHECK-MVE-NEXT: vmov r0, s18
1705 ; CHECK-MVE-NEXT: it vs
1706 ; CHECK-MVE-NEXT: movvs r1, #1
1707 ; CHECK-MVE-NEXT: cmp r1, #0
1708 ; CHECK-MVE-NEXT: vmov.16 q3[6], r0
1709 ; CHECK-MVE-NEXT: cset r0, ne
1710 ; CHECK-MVE-NEXT: lsls r0, r0, #31
1711 ; CHECK-MVE-NEXT: vseleq.f16 s0, s2, s0
1712 ; CHECK-MVE-NEXT: vmov r0, s0
1713 ; CHECK-MVE-NEXT: vmov.16 q3[7], r0
1714 ; CHECK-MVE-NEXT: vmov q0, q3
1715 ; CHECK-MVE-NEXT: vpop {d8, d9, d10}
1716 ; CHECK-MVE-NEXT: bx lr
1717 ;
1718 ; CHECK-MVEFP-LABEL: vcmp_ueq_v8f16:
1719 ; CHECK-MVEFP: @ %bb.0: @ %entry
1720 ; CHECK-MVEFP-NEXT: vldr.16 s12, [r0]
1721 ; CHECK-MVEFP-NEXT: vmov r0, s12
1722 ; CHECK-MVEFP-NEXT: vdup.16 q3, r0
1723 ; CHECK-MVEFP-NEXT: vpt.f16 le, q3, q0
1724 ; CHECK-MVEFP-NEXT: vcmpt.f16 le, q0, r0
1725 ; CHECK-MVEFP-NEXT: vpsel q0, q1, q2
1726 ; CHECK-MVEFP-NEXT: bx lr
1727 entry:
1728 %src2 = load half, half* %src2p
1729 %i = insertelement <8 x half> undef, half %src2, i32 0
1730 %sp = shufflevector <8 x half> %i, <8 x half> undef, <8 x i32> zeroinitializer
1731 %c = fcmp ueq <8 x half> %src, %sp
1732 %s = select <8 x i1> %c, <8 x half> %a, <8 x half> %b
1733 ret <8 x half> %s
1734 }
1736 define arm_aapcs_vfpcc <8 x half> @vcmp_une_v8f16(<8 x half> %src, half* %src2p, <8 x half> %a, <8 x half> %b) {
1737 ; CHECK-MVE-LABEL: vcmp_une_v8f16:
1738 ; CHECK-MVE: @ %bb.0: @ %entry
1739 ; CHECK-MVE-NEXT: .vsave {d8, d9, d10}
1740 ; CHECK-MVE-NEXT: vpush {d8, d9, d10}
1741 ; CHECK-MVE-NEXT: vldr.16 s16, [r0]
1742 ; CHECK-MVE-NEXT: vmovx.f16 s12, s0
1743 ; CHECK-MVE-NEXT: movs r0, #0
1744 ; CHECK-MVE-NEXT: vmovx.f16 s14, s8
1745 ; CHECK-MVE-NEXT: vcmp.f16 s12, s16
1746 ; CHECK-MVE-NEXT: vmovx.f16 s12, s4
1747 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
1748 ; CHECK-MVE-NEXT: it ne
1749 ; CHECK-MVE-NEXT: movne r0, #1
1750 ; CHECK-MVE-NEXT: cmp r0, #0
1751 ; CHECK-MVE-NEXT: vcmp.f16 s0, s16
1752 ; CHECK-MVE-NEXT: cset r0, ne
1753 ; CHECK-MVE-NEXT: movs r2, #0
1754 ; CHECK-MVE-NEXT: lsls r0, r0, #31
1755 ; CHECK-MVE-NEXT: vmovx.f16 s20, s9
1756 ; CHECK-MVE-NEXT: vseleq.f16 s12, s14, s12
1757 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
1758 ; CHECK-MVE-NEXT: it ne
1759 ; CHECK-MVE-NEXT: movne r2, #1
1760 ; CHECK-MVE-NEXT: cmp r2, #0
1761 ; CHECK-MVE-NEXT: cset r2, ne
1762 ; CHECK-MVE-NEXT: vmov r0, s12
1763 ; CHECK-MVE-NEXT: lsls r2, r2, #31
1764 ; CHECK-MVE-NEXT: vcmp.f16 s1, s16
1765 ; CHECK-MVE-NEXT: vseleq.f16 s12, s8, s4
1766 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
1767 ; CHECK-MVE-NEXT: vmov r2, s12
1768 ; CHECK-MVE-NEXT: vmovx.f16 s0, s3
1769 ; CHECK-MVE-NEXT: vmov.16 q3[0], r2
1770 ; CHECK-MVE-NEXT: mov.w r1, #0
1771 ; CHECK-MVE-NEXT: vmov.16 q3[1], r0
1772 ; CHECK-MVE-NEXT: mov.w r0, #0
1773 ; CHECK-MVE-NEXT: it ne
1774 ; CHECK-MVE-NEXT: movne r0, #1
1775 ; CHECK-MVE-NEXT: cmp r0, #0
1776 ; CHECK-MVE-NEXT: cset r0, ne
1777 ; CHECK-MVE-NEXT: lsls r0, r0, #31
1778 ; CHECK-MVE-NEXT: vseleq.f16 s18, s9, s5
1779 ; CHECK-MVE-NEXT: vmov r0, s18
1780 ; CHECK-MVE-NEXT: vmovx.f16 s18, s1
1781 ; CHECK-MVE-NEXT: vcmp.f16 s18, s16
1782 ; CHECK-MVE-NEXT: vmov.16 q3[2], r0
1783 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
1784 ; CHECK-MVE-NEXT: mov.w r0, #0
1785 ; CHECK-MVE-NEXT: it ne
1786 ; CHECK-MVE-NEXT: movne r0, #1
1787 ; CHECK-MVE-NEXT: cmp r0, #0
1788 ; CHECK-MVE-NEXT: cset r0, ne
1789 ; CHECK-MVE-NEXT: vmovx.f16 s18, s5
1790 ; CHECK-MVE-NEXT: lsls r0, r0, #31
1791 ; CHECK-MVE-NEXT: vcmp.f16 s2, s16
1792 ; CHECK-MVE-NEXT: vseleq.f16 s18, s20, s18
1793 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
1794 ; CHECK-MVE-NEXT: vmov r0, s18
1795 ; CHECK-MVE-NEXT: vmovx.f16 s20, s10
1796 ; CHECK-MVE-NEXT: vmov.16 q3[3], r0
1797 ; CHECK-MVE-NEXT: mov.w r0, #0
1798 ; CHECK-MVE-NEXT: it ne
1799 ; CHECK-MVE-NEXT: movne r0, #1
1800 ; CHECK-MVE-NEXT: cmp r0, #0
1801 ; CHECK-MVE-NEXT: cset r0, ne
1802 ; CHECK-MVE-NEXT: lsls r0, r0, #31
1803 ; CHECK-MVE-NEXT: vseleq.f16 s18, s10, s6
1804 ; CHECK-MVE-NEXT: vmov r0, s18
1805 ; CHECK-MVE-NEXT: vmovx.f16 s18, s2
1806 ; CHECK-MVE-NEXT: vcmp.f16 s18, s16
1807 ; CHECK-MVE-NEXT: vmov.16 q3[4], r0
1808 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
1809 ; CHECK-MVE-NEXT: mov.w r0, #0
1810 ; CHECK-MVE-NEXT: it ne
1811 ; CHECK-MVE-NEXT: movne r0, #1
1812 ; CHECK-MVE-NEXT: cmp r0, #0
1813 ; CHECK-MVE-NEXT: cset r0, ne
1814 ; CHECK-MVE-NEXT: vmovx.f16 s18, s6
1815 ; CHECK-MVE-NEXT: lsls r0, r0, #31
1816 ; CHECK-MVE-NEXT: vcmp.f16 s3, s16
1817 ; CHECK-MVE-NEXT: vseleq.f16 s18, s20, s18
1818 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
1819 ; CHECK-MVE-NEXT: vmov r0, s18
1820 ; CHECK-MVE-NEXT: vcmp.f16 s0, s16
1821 ; CHECK-MVE-NEXT: vmov.16 q3[5], r0
1822 ; CHECK-MVE-NEXT: mov.w r0, #0
1823 ; CHECK-MVE-NEXT: it ne
1824 ; CHECK-MVE-NEXT: movne r0, #1
1825 ; CHECK-MVE-NEXT: cmp r0, #0
1826 ; CHECK-MVE-NEXT: cset r0, ne
1827 ; CHECK-MVE-NEXT: vmovx.f16 s0, s7
1828 ; CHECK-MVE-NEXT: lsls r0, r0, #31
1829 ; CHECK-MVE-NEXT: vmovx.f16 s2, s11
1830 ; CHECK-MVE-NEXT: vseleq.f16 s18, s11, s7
1831 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
1832 ; CHECK-MVE-NEXT: it ne
1833 ; CHECK-MVE-NEXT: movne r1, #1
1834 ; CHECK-MVE-NEXT: vmov r0, s18
1835 ; CHECK-MVE-NEXT: cmp r1, #0
1836 ; CHECK-MVE-NEXT: vmov.16 q3[6], r0
1837 ; CHECK-MVE-NEXT: cset r0, ne
1838 ; CHECK-MVE-NEXT: lsls r0, r0, #31
1839 ; CHECK-MVE-NEXT: vseleq.f16 s0, s2, s0
1840 ; CHECK-MVE-NEXT: vmov r0, s0
1841 ; CHECK-MVE-NEXT: vmov.16 q3[7], r0
1842 ; CHECK-MVE-NEXT: vmov q0, q3
1843 ; CHECK-MVE-NEXT: vpop {d8, d9, d10}
1844 ; CHECK-MVE-NEXT: bx lr
1845 ;
1846 ; CHECK-MVEFP-LABEL: vcmp_une_v8f16:
1847 ; CHECK-MVEFP: @ %bb.0: @ %entry
1848 ; CHECK-MVEFP-NEXT: vldr.16 s12, [r0]
1849 ; CHECK-MVEFP-NEXT: vmov r0, s12
1850 ; CHECK-MVEFP-NEXT: vcmp.f16 ne, q0, r0
1851 ; CHECK-MVEFP-NEXT: vpsel q0, q1, q2
1852 ; CHECK-MVEFP-NEXT: bx lr
1853 entry:
1854 %src2 = load half, half* %src2p
1855 %i = insertelement <8 x half> undef, half %src2, i32 0
1856 %sp = shufflevector <8 x half> %i, <8 x half> undef, <8 x i32> zeroinitializer
1857 %c = fcmp une <8 x half> %src, %sp
1858 %s = select <8 x i1> %c, <8 x half> %a, <8 x half> %b
1859 ret <8 x half> %s
1860 }
1862 define arm_aapcs_vfpcc <8 x half> @vcmp_ugt_v8f16(<8 x half> %src, half* %src2p, <8 x half> %a, <8 x half> %b) {
1863 ; CHECK-MVE-LABEL: vcmp_ugt_v8f16:
1864 ; CHECK-MVE: @ %bb.0: @ %entry
1865 ; CHECK-MVE-NEXT: .vsave {d8, d9, d10}
1866 ; CHECK-MVE-NEXT: vpush {d8, d9, d10}
1867 ; CHECK-MVE-NEXT: vldr.16 s16, [r0]
1868 ; CHECK-MVE-NEXT: vmovx.f16 s12, s0
1869 ; CHECK-MVE-NEXT: movs r0, #0
1870 ; CHECK-MVE-NEXT: vmovx.f16 s14, s8
1871 ; CHECK-MVE-NEXT: vcmpe.f16 s12, s16
1872 ; CHECK-MVE-NEXT: vmovx.f16 s12, s4
1873 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
1874 ; CHECK-MVE-NEXT: it hi
1875 ; CHECK-MVE-NEXT: movhi r0, #1
1876 ; CHECK-MVE-NEXT: cmp r0, #0
1877 ; CHECK-MVE-NEXT: vcmpe.f16 s0, s16
1878 ; CHECK-MVE-NEXT: cset r0, ne
1879 ; CHECK-MVE-NEXT: movs r2, #0
1880 ; CHECK-MVE-NEXT: lsls r0, r0, #31
1881 ; CHECK-MVE-NEXT: vmovx.f16 s20, s9
1882 ; CHECK-MVE-NEXT: vseleq.f16 s12, s14, s12
1883 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
1884 ; CHECK-MVE-NEXT: it hi
1885 ; CHECK-MVE-NEXT: movhi r2, #1
1886 ; CHECK-MVE-NEXT: cmp r2, #0
1887 ; CHECK-MVE-NEXT: cset r2, ne
1888 ; CHECK-MVE-NEXT: vmov r0, s12
1889 ; CHECK-MVE-NEXT: lsls r2, r2, #31
1890 ; CHECK-MVE-NEXT: vcmpe.f16 s1, s16
1891 ; CHECK-MVE-NEXT: vseleq.f16 s12, s8, s4
1892 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
1893 ; CHECK-MVE-NEXT: vmov r2, s12
1894 ; CHECK-MVE-NEXT: vmovx.f16 s0, s3
1895 ; CHECK-MVE-NEXT: vmov.16 q3[0], r2
1896 ; CHECK-MVE-NEXT: mov.w r1, #0
1897 ; CHECK-MVE-NEXT: vmov.16 q3[1], r0
1898 ; CHECK-MVE-NEXT: mov.w r0, #0
1899 ; CHECK-MVE-NEXT: it hi
1900 ; CHECK-MVE-NEXT: movhi r0, #1
1901 ; CHECK-MVE-NEXT: cmp r0, #0
1902 ; CHECK-MVE-NEXT: cset r0, ne
1903 ; CHECK-MVE-NEXT: lsls r0, r0, #31
1904 ; CHECK-MVE-NEXT: vseleq.f16 s18, s9, s5
1905 ; CHECK-MVE-NEXT: vmov r0, s18
1906 ; CHECK-MVE-NEXT: vmovx.f16 s18, s1
1907 ; CHECK-MVE-NEXT: vcmpe.f16 s18, s16
1908 ; CHECK-MVE-NEXT: vmov.16 q3[2], r0
1909 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
1910 ; CHECK-MVE-NEXT: mov.w r0, #0
1911 ; CHECK-MVE-NEXT: it hi
1912 ; CHECK-MVE-NEXT: movhi r0, #1
1913 ; CHECK-MVE-NEXT: cmp r0, #0
1914 ; CHECK-MVE-NEXT: cset r0, ne
1915 ; CHECK-MVE-NEXT: vmovx.f16 s18, s5
1916 ; CHECK-MVE-NEXT: lsls r0, r0, #31
1917 ; CHECK-MVE-NEXT: vcmpe.f16 s2, s16
1918 ; CHECK-MVE-NEXT: vseleq.f16 s18, s20, s18
1919 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
1920 ; CHECK-MVE-NEXT: vmov r0, s18
1921 ; CHECK-MVE-NEXT: vmovx.f16 s20, s10
1922 ; CHECK-MVE-NEXT: vmov.16 q3[3], r0
1923 ; CHECK-MVE-NEXT: mov.w r0, #0
1924 ; CHECK-MVE-NEXT: it hi
1925 ; CHECK-MVE-NEXT: movhi r0, #1
1926 ; CHECK-MVE-NEXT: cmp r0, #0
1927 ; CHECK-MVE-NEXT: cset r0, ne
1928 ; CHECK-MVE-NEXT: lsls r0, r0, #31
1929 ; CHECK-MVE-NEXT: vseleq.f16 s18, s10, s6
1930 ; CHECK-MVE-NEXT: vmov r0, s18
1931 ; CHECK-MVE-NEXT: vmovx.f16 s18, s2
1932 ; CHECK-MVE-NEXT: vcmpe.f16 s18, s16
1933 ; CHECK-MVE-NEXT: vmov.16 q3[4], r0
1934 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
1935 ; CHECK-MVE-NEXT: mov.w r0, #0
1936 ; CHECK-MVE-NEXT: it hi
1937 ; CHECK-MVE-NEXT: movhi r0, #1
1938 ; CHECK-MVE-NEXT: cmp r0, #0
1939 ; CHECK-MVE-NEXT: cset r0, ne
1940 ; CHECK-MVE-NEXT: vmovx.f16 s18, s6
1941 ; CHECK-MVE-NEXT: lsls r0, r0, #31
1942 ; CHECK-MVE-NEXT: vcmpe.f16 s3, s16
1943 ; CHECK-MVE-NEXT: vseleq.f16 s18, s20, s18
1944 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
1945 ; CHECK-MVE-NEXT: vmov r0, s18
1946 ; CHECK-MVE-NEXT: vcmpe.f16 s0, s16
1947 ; CHECK-MVE-NEXT: vmov.16 q3[5], r0
1948 ; CHECK-MVE-NEXT: mov.w r0, #0
1949 ; CHECK-MVE-NEXT: it hi
1950 ; CHECK-MVE-NEXT: movhi r0, #1
1951 ; CHECK-MVE-NEXT: cmp r0, #0
1952 ; CHECK-MVE-NEXT: cset r0, ne
1953 ; CHECK-MVE-NEXT: vmovx.f16 s0, s7
1954 ; CHECK-MVE-NEXT: lsls r0, r0, #31
1955 ; CHECK-MVE-NEXT: vmovx.f16 s2, s11
1956 ; CHECK-MVE-NEXT: vseleq.f16 s18, s11, s7
1957 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
1958 ; CHECK-MVE-NEXT: it hi
1959 ; CHECK-MVE-NEXT: movhi r1, #1
1960 ; CHECK-MVE-NEXT: vmov r0, s18
1961 ; CHECK-MVE-NEXT: cmp r1, #0
1962 ; CHECK-MVE-NEXT: vmov.16 q3[6], r0
1963 ; CHECK-MVE-NEXT: cset r0, ne
1964 ; CHECK-MVE-NEXT: lsls r0, r0, #31
1965 ; CHECK-MVE-NEXT: vseleq.f16 s0, s2, s0
1966 ; CHECK-MVE-NEXT: vmov r0, s0
1967 ; CHECK-MVE-NEXT: vmov.16 q3[7], r0
1968 ; CHECK-MVE-NEXT: vmov q0, q3
1969 ; CHECK-MVE-NEXT: vpop {d8, d9, d10}
1970 ; CHECK-MVE-NEXT: bx lr
1971 ;
1972 ; CHECK-MVEFP-LABEL: vcmp_ugt_v8f16:
1973 ; CHECK-MVEFP: @ %bb.0: @ %entry
1974 ; CHECK-MVEFP-NEXT: vldr.16 s12, [r0]
1975 ; CHECK-MVEFP-NEXT: vmov r0, s12
1976 ; CHECK-MVEFP-NEXT: vdup.16 q3, r0
1977 ; CHECK-MVEFP-NEXT: vcmp.f16 ge, q3, q0
1978 ; CHECK-MVEFP-NEXT: vpnot
1979 ; CHECK-MVEFP-NEXT: vpsel q0, q1, q2
1980 ; CHECK-MVEFP-NEXT: bx lr
1981 entry:
1982 %src2 = load half, half* %src2p
1983 %i = insertelement <8 x half> undef, half %src2, i32 0
1984 %sp = shufflevector <8 x half> %i, <8 x half> undef, <8 x i32> zeroinitializer
1985 %c = fcmp ugt <8 x half> %src, %sp
1986 %s = select <8 x i1> %c, <8 x half> %a, <8 x half> %b
1987 ret <8 x half> %s
1988 }
1990 define arm_aapcs_vfpcc <8 x half> @vcmp_uge_v8f16(<8 x half> %src, half* %src2p, <8 x half> %a, <8 x half> %b) {
1991 ; CHECK-MVE-LABEL: vcmp_uge_v8f16:
1992 ; CHECK-MVE: @ %bb.0: @ %entry
1993 ; CHECK-MVE-NEXT: .vsave {d8, d9, d10}
1994 ; CHECK-MVE-NEXT: vpush {d8, d9, d10}
1995 ; CHECK-MVE-NEXT: vldr.16 s16, [r0]
1996 ; CHECK-MVE-NEXT: vmovx.f16 s12, s0
1997 ; CHECK-MVE-NEXT: movs r0, #0
1998 ; CHECK-MVE-NEXT: vmovx.f16 s14, s8
1999 ; CHECK-MVE-NEXT: vcmpe.f16 s12, s16
2000 ; CHECK-MVE-NEXT: vmovx.f16 s12, s4
2001 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
2002 ; CHECK-MVE-NEXT: it pl
2003 ; CHECK-MVE-NEXT: movpl r0, #1
2004 ; CHECK-MVE-NEXT: cmp r0, #0
2005 ; CHECK-MVE-NEXT: vcmpe.f16 s0, s16
2006 ; CHECK-MVE-NEXT: cset r0, ne
2007 ; CHECK-MVE-NEXT: movs r2, #0
2008 ; CHECK-MVE-NEXT: lsls r0, r0, #31
2009 ; CHECK-MVE-NEXT: vmovx.f16 s20, s9
2010 ; CHECK-MVE-NEXT: vseleq.f16 s12, s14, s12
2011 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
2012 ; CHECK-MVE-NEXT: it pl
2013 ; CHECK-MVE-NEXT: movpl r2, #1
2014 ; CHECK-MVE-NEXT: cmp r2, #0
2015 ; CHECK-MVE-NEXT: cset r2, ne
2016 ; CHECK-MVE-NEXT: vmov r0, s12
2017 ; CHECK-MVE-NEXT: lsls r2, r2, #31
2018 ; CHECK-MVE-NEXT: vcmpe.f16 s1, s16
2019 ; CHECK-MVE-NEXT: vseleq.f16 s12, s8, s4
2020 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
2021 ; CHECK-MVE-NEXT: vmov r2, s12
2022 ; CHECK-MVE-NEXT: vmovx.f16 s0, s3
2023 ; CHECK-MVE-NEXT: vmov.16 q3[0], r2
2024 ; CHECK-MVE-NEXT: mov.w r1, #0
2025 ; CHECK-MVE-NEXT: vmov.16 q3[1], r0
2026 ; CHECK-MVE-NEXT: mov.w r0, #0
2027 ; CHECK-MVE-NEXT: it pl
2028 ; CHECK-MVE-NEXT: movpl r0, #1
2029 ; CHECK-MVE-NEXT: cmp r0, #0
2030 ; CHECK-MVE-NEXT: cset r0, ne
2031 ; CHECK-MVE-NEXT: lsls r0, r0, #31
2032 ; CHECK-MVE-NEXT: vseleq.f16 s18, s9, s5
2033 ; CHECK-MVE-NEXT: vmov r0, s18
2034 ; CHECK-MVE-NEXT: vmovx.f16 s18, s1
2035 ; CHECK-MVE-NEXT: vcmpe.f16 s18, s16
2036 ; CHECK-MVE-NEXT: vmov.16 q3[2], r0
2037 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
2038 ; CHECK-MVE-NEXT: mov.w r0, #0
2039 ; CHECK-MVE-NEXT: it pl
2040 ; CHECK-MVE-NEXT: movpl r0, #1
2041 ; CHECK-MVE-NEXT: cmp r0, #0
2042 ; CHECK-MVE-NEXT: cset r0, ne
2043 ; CHECK-MVE-NEXT: vmovx.f16 s18, s5
2044 ; CHECK-MVE-NEXT: lsls r0, r0, #31
2045 ; CHECK-MVE-NEXT: vcmpe.f16 s2, s16
2046 ; CHECK-MVE-NEXT: vseleq.f16 s18, s20, s18
2047 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
2048 ; CHECK-MVE-NEXT: vmov r0, s18
2049 ; CHECK-MVE-NEXT: vmovx.f16 s20, s10
2050 ; CHECK-MVE-NEXT: vmov.16 q3[3], r0
2051 ; CHECK-MVE-NEXT: mov.w r0, #0
2052 ; CHECK-MVE-NEXT: it pl
2053 ; CHECK-MVE-NEXT: movpl r0, #1
2054 ; CHECK-MVE-NEXT: cmp r0, #0
2055 ; CHECK-MVE-NEXT: cset r0, ne
2056 ; CHECK-MVE-NEXT: lsls r0, r0, #31
2057 ; CHECK-MVE-NEXT: vseleq.f16 s18, s10, s6
2058 ; CHECK-MVE-NEXT: vmov r0, s18
2059 ; CHECK-MVE-NEXT: vmovx.f16 s18, s2
2060 ; CHECK-MVE-NEXT: vcmpe.f16 s18, s16
2061 ; CHECK-MVE-NEXT: vmov.16 q3[4], r0
2062 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
2063 ; CHECK-MVE-NEXT: mov.w r0, #0
2064 ; CHECK-MVE-NEXT: it pl
2065 ; CHECK-MVE-NEXT: movpl r0, #1
2066 ; CHECK-MVE-NEXT: cmp r0, #0
2067 ; CHECK-MVE-NEXT: cset r0, ne
2068 ; CHECK-MVE-NEXT: vmovx.f16 s18, s6
2069 ; CHECK-MVE-NEXT: lsls r0, r0, #31
2070 ; CHECK-MVE-NEXT: vcmpe.f16 s3, s16
2071 ; CHECK-MVE-NEXT: vseleq.f16 s18, s20, s18
2072 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
2073 ; CHECK-MVE-NEXT: vmov r0, s18
2074 ; CHECK-MVE-NEXT: vcmpe.f16 s0, s16
2075 ; CHECK-MVE-NEXT: vmov.16 q3[5], r0
2076 ; CHECK-MVE-NEXT: mov.w r0, #0
2077 ; CHECK-MVE-NEXT: it pl
2078 ; CHECK-MVE-NEXT: movpl r0, #1
2079 ; CHECK-MVE-NEXT: cmp r0, #0
2080 ; CHECK-MVE-NEXT: cset r0, ne
2081 ; CHECK-MVE-NEXT: vmovx.f16 s0, s7
2082 ; CHECK-MVE-NEXT: lsls r0, r0, #31
2083 ; CHECK-MVE-NEXT: vmovx.f16 s2, s11
2084 ; CHECK-MVE-NEXT: vseleq.f16 s18, s11, s7
2085 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
2086 ; CHECK-MVE-NEXT: it pl
2087 ; CHECK-MVE-NEXT: movpl r1, #1
2088 ; CHECK-MVE-NEXT: vmov r0, s18
2089 ; CHECK-MVE-NEXT: cmp r1, #0
2090 ; CHECK-MVE-NEXT: vmov.16 q3[6], r0
2091 ; CHECK-MVE-NEXT: cset r0, ne
2092 ; CHECK-MVE-NEXT: lsls r0, r0, #31
2093 ; CHECK-MVE-NEXT: vseleq.f16 s0, s2, s0
2094 ; CHECK-MVE-NEXT: vmov r0, s0
2095 ; CHECK-MVE-NEXT: vmov.16 q3[7], r0
2096 ; CHECK-MVE-NEXT: vmov q0, q3
2097 ; CHECK-MVE-NEXT: vpop {d8, d9, d10}
2098 ; CHECK-MVE-NEXT: bx lr
2099 ;
2100 ; CHECK-MVEFP-LABEL: vcmp_uge_v8f16:
2101 ; CHECK-MVEFP: @ %bb.0: @ %entry
2102 ; CHECK-MVEFP-NEXT: vldr.16 s12, [r0]
2103 ; CHECK-MVEFP-NEXT: vmov r0, s12
2104 ; CHECK-MVEFP-NEXT: vdup.16 q3, r0
2105 ; CHECK-MVEFP-NEXT: vcmp.f16 gt, q3, q0
2106 ; CHECK-MVEFP-NEXT: vpnot
2107 ; CHECK-MVEFP-NEXT: vpsel q0, q1, q2
2108 ; CHECK-MVEFP-NEXT: bx lr
2109 entry:
2110 %src2 = load half, half* %src2p
2111 %i = insertelement <8 x half> undef, half %src2, i32 0
2112 %sp = shufflevector <8 x half> %i, <8 x half> undef, <8 x i32> zeroinitializer
2113 %c = fcmp uge <8 x half> %src, %sp
2114 %s = select <8 x i1> %c, <8 x half> %a, <8 x half> %b
2115 ret <8 x half> %s
2116 }
2118 define arm_aapcs_vfpcc <8 x half> @vcmp_ult_v8f16(<8 x half> %src, half* %src2p, <8 x half> %a, <8 x half> %b) {
2119 ; CHECK-MVE-LABEL: vcmp_ult_v8f16:
2120 ; CHECK-MVE: @ %bb.0: @ %entry
2121 ; CHECK-MVE-NEXT: .vsave {d8, d9, d10}
2122 ; CHECK-MVE-NEXT: vpush {d8, d9, d10}
2123 ; CHECK-MVE-NEXT: vldr.16 s16, [r0]
2124 ; CHECK-MVE-NEXT: vmovx.f16 s12, s0
2125 ; CHECK-MVE-NEXT: movs r0, #0
2126 ; CHECK-MVE-NEXT: vmovx.f16 s14, s8
2127 ; CHECK-MVE-NEXT: vcmpe.f16 s12, s16
2128 ; CHECK-MVE-NEXT: vmovx.f16 s12, s4
2129 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
2130 ; CHECK-MVE-NEXT: it lt
2131 ; CHECK-MVE-NEXT: movlt r0, #1
2132 ; CHECK-MVE-NEXT: cmp r0, #0
2133 ; CHECK-MVE-NEXT: vcmpe.f16 s0, s16
2134 ; CHECK-MVE-NEXT: cset r0, ne
2135 ; CHECK-MVE-NEXT: movs r2, #0
2136 ; CHECK-MVE-NEXT: lsls r0, r0, #31
2137 ; CHECK-MVE-NEXT: vmovx.f16 s20, s9
2138 ; CHECK-MVE-NEXT: vseleq.f16 s12, s14, s12
2139 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
2140 ; CHECK-MVE-NEXT: it lt
2141 ; CHECK-MVE-NEXT: movlt r2, #1
2142 ; CHECK-MVE-NEXT: cmp r2, #0
2143 ; CHECK-MVE-NEXT: cset r2, ne
2144 ; CHECK-MVE-NEXT: vmov r0, s12
2145 ; CHECK-MVE-NEXT: lsls r2, r2, #31
2146 ; CHECK-MVE-NEXT: vcmpe.f16 s1, s16
2147 ; CHECK-MVE-NEXT: vseleq.f16 s12, s8, s4
2148 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
2149 ; CHECK-MVE-NEXT: vmov r2, s12
2150 ; CHECK-MVE-NEXT: vmovx.f16 s0, s3
2151 ; CHECK-MVE-NEXT: vmov.16 q3[0], r2
2152 ; CHECK-MVE-NEXT: mov.w r1, #0
2153 ; CHECK-MVE-NEXT: vmov.16 q3[1], r0
2154 ; CHECK-MVE-NEXT: mov.w r0, #0
2155 ; CHECK-MVE-NEXT: it lt
2156 ; CHECK-MVE-NEXT: movlt r0, #1
2157 ; CHECK-MVE-NEXT: cmp r0, #0
2158 ; CHECK-MVE-NEXT: cset r0, ne
2159 ; CHECK-MVE-NEXT: lsls r0, r0, #31
2160 ; CHECK-MVE-NEXT: vseleq.f16 s18, s9, s5
2161 ; CHECK-MVE-NEXT: vmov r0, s18
2162 ; CHECK-MVE-NEXT: vmovx.f16 s18, s1
2163 ; CHECK-MVE-NEXT: vcmpe.f16 s18, s16
2164 ; CHECK-MVE-NEXT: vmov.16 q3[2], r0
2165 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
2166 ; CHECK-MVE-NEXT: mov.w r0, #0
2167 ; CHECK-MVE-NEXT: it lt
2168 ; CHECK-MVE-NEXT: movlt r0, #1
2169 ; CHECK-MVE-NEXT: cmp r0, #0
2170 ; CHECK-MVE-NEXT: cset r0, ne
2171 ; CHECK-MVE-NEXT: vmovx.f16 s18, s5
2172 ; CHECK-MVE-NEXT: lsls r0, r0, #31
2173 ; CHECK-MVE-NEXT: vcmpe.f16 s2, s16
2174 ; CHECK-MVE-NEXT: vseleq.f16 s18, s20, s18
2175 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
2176 ; CHECK-MVE-NEXT: vmov r0, s18
2177 ; CHECK-MVE-NEXT: vmovx.f16 s20, s10
2178 ; CHECK-MVE-NEXT: vmov.16 q3[3], r0
2179 ; CHECK-MVE-NEXT: mov.w r0, #0
2180 ; CHECK-MVE-NEXT: it lt
2181 ; CHECK-MVE-NEXT: movlt r0, #1
2182 ; CHECK-MVE-NEXT: cmp r0, #0
2183 ; CHECK-MVE-NEXT: cset r0, ne
2184 ; CHECK-MVE-NEXT: lsls r0, r0, #31
2185 ; CHECK-MVE-NEXT: vseleq.f16 s18, s10, s6
2186 ; CHECK-MVE-NEXT: vmov r0, s18
2187 ; CHECK-MVE-NEXT: vmovx.f16 s18, s2
2188 ; CHECK-MVE-NEXT: vcmpe.f16 s18, s16
2189 ; CHECK-MVE-NEXT: vmov.16 q3[4], r0
2190 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
2191 ; CHECK-MVE-NEXT: mov.w r0, #0
2192 ; CHECK-MVE-NEXT: it lt
2193 ; CHECK-MVE-NEXT: movlt r0, #1
2194 ; CHECK-MVE-NEXT: cmp r0, #0
2195 ; CHECK-MVE-NEXT: cset r0, ne
2196 ; CHECK-MVE-NEXT: vmovx.f16 s18, s6
2197 ; CHECK-MVE-NEXT: lsls r0, r0, #31
2198 ; CHECK-MVE-NEXT: vcmpe.f16 s3, s16
2199 ; CHECK-MVE-NEXT: vseleq.f16 s18, s20, s18
2200 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
2201 ; CHECK-MVE-NEXT: vmov r0, s18
2202 ; CHECK-MVE-NEXT: vcmpe.f16 s0, s16
2203 ; CHECK-MVE-NEXT: vmov.16 q3[5], r0
2204 ; CHECK-MVE-NEXT: mov.w r0, #0
2205 ; CHECK-MVE-NEXT: it lt
2206 ; CHECK-MVE-NEXT: movlt r0, #1
2207 ; CHECK-MVE-NEXT: cmp r0, #0
2208 ; CHECK-MVE-NEXT: cset r0, ne
2209 ; CHECK-MVE-NEXT: vmovx.f16 s0, s7
2210 ; CHECK-MVE-NEXT: lsls r0, r0, #31
2211 ; CHECK-MVE-NEXT: vmovx.f16 s2, s11
2212 ; CHECK-MVE-NEXT: vseleq.f16 s18, s11, s7
2213 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
2214 ; CHECK-MVE-NEXT: it lt
2215 ; CHECK-MVE-NEXT: movlt r1, #1
2216 ; CHECK-MVE-NEXT: vmov r0, s18
2217 ; CHECK-MVE-NEXT: cmp r1, #0
2218 ; CHECK-MVE-NEXT: vmov.16 q3[6], r0
2219 ; CHECK-MVE-NEXT: cset r0, ne
2220 ; CHECK-MVE-NEXT: lsls r0, r0, #31
2221 ; CHECK-MVE-NEXT: vseleq.f16 s0, s2, s0
2222 ; CHECK-MVE-NEXT: vmov r0, s0
2223 ; CHECK-MVE-NEXT: vmov.16 q3[7], r0
2224 ; CHECK-MVE-NEXT: vmov q0, q3
2225 ; CHECK-MVE-NEXT: vpop {d8, d9, d10}
2226 ; CHECK-MVE-NEXT: bx lr
2227 ;
2228 ; CHECK-MVEFP-LABEL: vcmp_ult_v8f16:
2229 ; CHECK-MVEFP: @ %bb.0: @ %entry
2230 ; CHECK-MVEFP-NEXT: vldr.16 s12, [r0]
2231 ; CHECK-MVEFP-NEXT: vmov r0, s12
2232 ; CHECK-MVEFP-NEXT: vcmp.f16 ge, q0, r0
2233 ; CHECK-MVEFP-NEXT: vpnot
2234 ; CHECK-MVEFP-NEXT: vpsel q0, q1, q2
2235 ; CHECK-MVEFP-NEXT: bx lr
2236 entry:
2237 %src2 = load half, half* %src2p
2238 %i = insertelement <8 x half> undef, half %src2, i32 0
2239 %sp = shufflevector <8 x half> %i, <8 x half> undef, <8 x i32> zeroinitializer
2240 %c = fcmp ult <8 x half> %src, %sp
2241 %s = select <8 x i1> %c, <8 x half> %a, <8 x half> %b
2242 ret <8 x half> %s
2243 }
2245 define arm_aapcs_vfpcc <8 x half> @vcmp_ule_v8f16(<8 x half> %src, half* %src2p, <8 x half> %a, <8 x half> %b) {
2246 ; CHECK-MVE-LABEL: vcmp_ule_v8f16:
2247 ; CHECK-MVE: @ %bb.0: @ %entry
2248 ; CHECK-MVE-NEXT: .vsave {d8, d9, d10}
2249 ; CHECK-MVE-NEXT: vpush {d8, d9, d10}
2250 ; CHECK-MVE-NEXT: vldr.16 s16, [r0]
2251 ; CHECK-MVE-NEXT: vmovx.f16 s12, s0
2252 ; CHECK-MVE-NEXT: movs r0, #0
2253 ; CHECK-MVE-NEXT: vmovx.f16 s14, s8
2254 ; CHECK-MVE-NEXT: vcmpe.f16 s12, s16
2255 ; CHECK-MVE-NEXT: vmovx.f16 s12, s4
2256 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
2257 ; CHECK-MVE-NEXT: it le
2258 ; CHECK-MVE-NEXT: movle r0, #1
2259 ; CHECK-MVE-NEXT: cmp r0, #0
2260 ; CHECK-MVE-NEXT: vcmpe.f16 s0, s16
2261 ; CHECK-MVE-NEXT: cset r0, ne
2262 ; CHECK-MVE-NEXT: movs r2, #0
2263 ; CHECK-MVE-NEXT: lsls r0, r0, #31
2264 ; CHECK-MVE-NEXT: vmovx.f16 s20, s9
2265 ; CHECK-MVE-NEXT: vseleq.f16 s12, s14, s12
2266 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
2267 ; CHECK-MVE-NEXT: it le
2268 ; CHECK-MVE-NEXT: movle r2, #1
2269 ; CHECK-MVE-NEXT: cmp r2, #0
2270 ; CHECK-MVE-NEXT: cset r2, ne
2271 ; CHECK-MVE-NEXT: vmov r0, s12
2272 ; CHECK-MVE-NEXT: lsls r2, r2, #31
2273 ; CHECK-MVE-NEXT: vcmpe.f16 s1, s16
2274 ; CHECK-MVE-NEXT: vseleq.f16 s12, s8, s4
2275 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
2276 ; CHECK-MVE-NEXT: vmov r2, s12
2277 ; CHECK-MVE-NEXT: vmovx.f16 s0, s3
2278 ; CHECK-MVE-NEXT: vmov.16 q3[0], r2
2279 ; CHECK-MVE-NEXT: mov.w r1, #0
2280 ; CHECK-MVE-NEXT: vmov.16 q3[1], r0
2281 ; CHECK-MVE-NEXT: mov.w r0, #0
2282 ; CHECK-MVE-NEXT: it le
2283 ; CHECK-MVE-NEXT: movle r0, #1
2284 ; CHECK-MVE-NEXT: cmp r0, #0
2285 ; CHECK-MVE-NEXT: cset r0, ne
2286 ; CHECK-MVE-NEXT: lsls r0, r0, #31
2287 ; CHECK-MVE-NEXT: vseleq.f16 s18, s9, s5
2288 ; CHECK-MVE-NEXT: vmov r0, s18
2289 ; CHECK-MVE-NEXT: vmovx.f16 s18, s1
2290 ; CHECK-MVE-NEXT: vcmpe.f16 s18, s16
2291 ; CHECK-MVE-NEXT: vmov.16 q3[2], r0
2292 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
2293 ; CHECK-MVE-NEXT: mov.w r0, #0
2294 ; CHECK-MVE-NEXT: it le
2295 ; CHECK-MVE-NEXT: movle r0, #1
2296 ; CHECK-MVE-NEXT: cmp r0, #0
2297 ; CHECK-MVE-NEXT: cset r0, ne
2298 ; CHECK-MVE-NEXT: vmovx.f16 s18, s5
2299 ; CHECK-MVE-NEXT: lsls r0, r0, #31
2300 ; CHECK-MVE-NEXT: vcmpe.f16 s2, s16
2301 ; CHECK-MVE-NEXT: vseleq.f16 s18, s20, s18
2302 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
2303 ; CHECK-MVE-NEXT: vmov r0, s18
2304 ; CHECK-MVE-NEXT: vmovx.f16 s20, s10
2305 ; CHECK-MVE-NEXT: vmov.16 q3[3], r0
2306 ; CHECK-MVE-NEXT: mov.w r0, #0
2307 ; CHECK-MVE-NEXT: it le
2308 ; CHECK-MVE-NEXT: movle r0, #1
2309 ; CHECK-MVE-NEXT: cmp r0, #0
2310 ; CHECK-MVE-NEXT: cset r0, ne
2311 ; CHECK-MVE-NEXT: lsls r0, r0, #31
2312 ; CHECK-MVE-NEXT: vseleq.f16 s18, s10, s6
2313 ; CHECK-MVE-NEXT: vmov r0, s18
2314 ; CHECK-MVE-NEXT: vmovx.f16 s18, s2
2315 ; CHECK-MVE-NEXT: vcmpe.f16 s18, s16
2316 ; CHECK-MVE-NEXT: vmov.16 q3[4], r0
2317 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
2318 ; CHECK-MVE-NEXT: mov.w r0, #0
2319 ; CHECK-MVE-NEXT: it le
2320 ; CHECK-MVE-NEXT: movle r0, #1
2321 ; CHECK-MVE-NEXT: cmp r0, #0
2322 ; CHECK-MVE-NEXT: cset r0, ne
2323 ; CHECK-MVE-NEXT: vmovx.f16 s18, s6
2324 ; CHECK-MVE-NEXT: lsls r0, r0, #31
2325 ; CHECK-MVE-NEXT: vcmpe.f16 s3, s16
2326 ; CHECK-MVE-NEXT: vseleq.f16 s18, s20, s18
2327 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
2328 ; CHECK-MVE-NEXT: vmov r0, s18
2329 ; CHECK-MVE-NEXT: vcmpe.f16 s0, s16
2330 ; CHECK-MVE-NEXT: vmov.16 q3[5], r0
2331 ; CHECK-MVE-NEXT: mov.w r0, #0
2332 ; CHECK-MVE-NEXT: it le
2333 ; CHECK-MVE-NEXT: movle r0, #1
2334 ; CHECK-MVE-NEXT: cmp r0, #0
2335 ; CHECK-MVE-NEXT: cset r0, ne
2336 ; CHECK-MVE-NEXT: vmovx.f16 s0, s7
2337 ; CHECK-MVE-NEXT: lsls r0, r0, #31
2338 ; CHECK-MVE-NEXT: vmovx.f16 s2, s11
2339 ; CHECK-MVE-NEXT: vseleq.f16 s18, s11, s7
2340 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
2341 ; CHECK-MVE-NEXT: it le
2342 ; CHECK-MVE-NEXT: movle r1, #1
2343 ; CHECK-MVE-NEXT: vmov r0, s18
2344 ; CHECK-MVE-NEXT: cmp r1, #0
2345 ; CHECK-MVE-NEXT: vmov.16 q3[6], r0
2346 ; CHECK-MVE-NEXT: cset r0, ne
2347 ; CHECK-MVE-NEXT: lsls r0, r0, #31
2348 ; CHECK-MVE-NEXT: vseleq.f16 s0, s2, s0
2349 ; CHECK-MVE-NEXT: vmov r0, s0
2350 ; CHECK-MVE-NEXT: vmov.16 q3[7], r0
2351 ; CHECK-MVE-NEXT: vmov q0, q3
2352 ; CHECK-MVE-NEXT: vpop {d8, d9, d10}
2353 ; CHECK-MVE-NEXT: bx lr
2354 ;
2355 ; CHECK-MVEFP-LABEL: vcmp_ule_v8f16:
2356 ; CHECK-MVEFP: @ %bb.0: @ %entry
2357 ; CHECK-MVEFP-NEXT: vldr.16 s12, [r0]
2358 ; CHECK-MVEFP-NEXT: vmov r0, s12
2359 ; CHECK-MVEFP-NEXT: vcmp.f16 gt, q0, r0
2360 ; CHECK-MVEFP-NEXT: vpnot
2361 ; CHECK-MVEFP-NEXT: vpsel q0, q1, q2
2362 ; CHECK-MVEFP-NEXT: bx lr
2363 entry:
2364 %src2 = load half, half* %src2p
2365 %i = insertelement <8 x half> undef, half %src2, i32 0
2366 %sp = shufflevector <8 x half> %i, <8 x half> undef, <8 x i32> zeroinitializer
2367 %c = fcmp ule <8 x half> %src, %sp
2368 %s = select <8 x i1> %c, <8 x half> %a, <8 x half> %b
2369 ret <8 x half> %s
2370 }
2372 define arm_aapcs_vfpcc <8 x half> @vcmp_ord_v8f16(<8 x half> %src, half* %src2p, <8 x half> %a, <8 x half> %b) {
2373 ; CHECK-MVE-LABEL: vcmp_ord_v8f16:
2374 ; CHECK-MVE: @ %bb.0: @ %entry
2375 ; CHECK-MVE-NEXT: .vsave {d8, d9, d10}
2376 ; CHECK-MVE-NEXT: vpush {d8, d9, d10}
2377 ; CHECK-MVE-NEXT: vldr.16 s16, [r0]
2378 ; CHECK-MVE-NEXT: vmovx.f16 s12, s0
2379 ; CHECK-MVE-NEXT: movs r0, #0
2380 ; CHECK-MVE-NEXT: vmovx.f16 s14, s8
2381 ; CHECK-MVE-NEXT: vcmpe.f16 s12, s16
2382 ; CHECK-MVE-NEXT: vmovx.f16 s12, s4
2383 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
2384 ; CHECK-MVE-NEXT: it vc
2385 ; CHECK-MVE-NEXT: movvc r0, #1
2386 ; CHECK-MVE-NEXT: cmp r0, #0
2387 ; CHECK-MVE-NEXT: vcmpe.f16 s0, s16
2388 ; CHECK-MVE-NEXT: cset r0, ne
2389 ; CHECK-MVE-NEXT: movs r2, #0
2390 ; CHECK-MVE-NEXT: lsls r0, r0, #31
2391 ; CHECK-MVE-NEXT: vmovx.f16 s20, s9
2392 ; CHECK-MVE-NEXT: vseleq.f16 s12, s14, s12
2393 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
2394 ; CHECK-MVE-NEXT: it vc
2395 ; CHECK-MVE-NEXT: movvc r2, #1
2396 ; CHECK-MVE-NEXT: cmp r2, #0
2397 ; CHECK-MVE-NEXT: cset r2, ne
2398 ; CHECK-MVE-NEXT: vmov r0, s12
2399 ; CHECK-MVE-NEXT: lsls r2, r2, #31
2400 ; CHECK-MVE-NEXT: vcmpe.f16 s1, s16
2401 ; CHECK-MVE-NEXT: vseleq.f16 s12, s8, s4
2402 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
2403 ; CHECK-MVE-NEXT: vmov r2, s12
2404 ; CHECK-MVE-NEXT: vmovx.f16 s0, s3
2405 ; CHECK-MVE-NEXT: vmov.16 q3[0], r2
2406 ; CHECK-MVE-NEXT: mov.w r1, #0
2407 ; CHECK-MVE-NEXT: vmov.16 q3[1], r0
2408 ; CHECK-MVE-NEXT: mov.w r0, #0
2409 ; CHECK-MVE-NEXT: it vc
2410 ; CHECK-MVE-NEXT: movvc r0, #1
2411 ; CHECK-MVE-NEXT: cmp r0, #0
2412 ; CHECK-MVE-NEXT: cset r0, ne
2413 ; CHECK-MVE-NEXT: lsls r0, r0, #31
2414 ; CHECK-MVE-NEXT: vseleq.f16 s18, s9, s5
2415 ; CHECK-MVE-NEXT: vmov r0, s18
2416 ; CHECK-MVE-NEXT: vmovx.f16 s18, s1
2417 ; CHECK-MVE-NEXT: vcmpe.f16 s18, s16
2418 ; CHECK-MVE-NEXT: vmov.16 q3[2], r0
2419 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
2420 ; CHECK-MVE-NEXT: mov.w r0, #0
2421 ; CHECK-MVE-NEXT: it vc
2422 ; CHECK-MVE-NEXT: movvc r0, #1
2423 ; CHECK-MVE-NEXT: cmp r0, #0
2424 ; CHECK-MVE-NEXT: cset r0, ne
2425 ; CHECK-MVE-NEXT: vmovx.f16 s18, s5
2426 ; CHECK-MVE-NEXT: lsls r0, r0, #31
2427 ; CHECK-MVE-NEXT: vcmpe.f16 s2, s16
2428 ; CHECK-MVE-NEXT: vseleq.f16 s18, s20, s18
2429 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
2430 ; CHECK-MVE-NEXT: vmov r0, s18
2431 ; CHECK-MVE-NEXT: vmovx.f16 s20, s10
2432 ; CHECK-MVE-NEXT: vmov.16 q3[3], r0
2433 ; CHECK-MVE-NEXT: mov.w r0, #0
2434 ; CHECK-MVE-NEXT: it vc
2435 ; CHECK-MVE-NEXT: movvc r0, #1
2436 ; CHECK-MVE-NEXT: cmp r0, #0
2437 ; CHECK-MVE-NEXT: cset r0, ne
2438 ; CHECK-MVE-NEXT: lsls r0, r0, #31
2439 ; CHECK-MVE-NEXT: vseleq.f16 s18, s10, s6
2440 ; CHECK-MVE-NEXT: vmov r0, s18
2441 ; CHECK-MVE-NEXT: vmovx.f16 s18, s2
2442 ; CHECK-MVE-NEXT: vcmpe.f16 s18, s16
2443 ; CHECK-MVE-NEXT: vmov.16 q3[4], r0
2444 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
2445 ; CHECK-MVE-NEXT: mov.w r0, #0
2446 ; CHECK-MVE-NEXT: it vc
2447 ; CHECK-MVE-NEXT: movvc r0, #1
2448 ; CHECK-MVE-NEXT: cmp r0, #0
2449 ; CHECK-MVE-NEXT: cset r0, ne
2450 ; CHECK-MVE-NEXT: vmovx.f16 s18, s6
2451 ; CHECK-MVE-NEXT: lsls r0, r0, #31
2452 ; CHECK-MVE-NEXT: vcmpe.f16 s3, s16
2453 ; CHECK-MVE-NEXT: vseleq.f16 s18, s20, s18
2454 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
2455 ; CHECK-MVE-NEXT: vmov r0, s18
2456 ; CHECK-MVE-NEXT: vcmpe.f16 s0, s16
2457 ; CHECK-MVE-NEXT: vmov.16 q3[5], r0
2458 ; CHECK-MVE-NEXT: mov.w r0, #0
2459 ; CHECK-MVE-NEXT: it vc
2460 ; CHECK-MVE-NEXT: movvc r0, #1
2461 ; CHECK-MVE-NEXT: cmp r0, #0
2462 ; CHECK-MVE-NEXT: cset r0, ne
2463 ; CHECK-MVE-NEXT: vmovx.f16 s0, s7
2464 ; CHECK-MVE-NEXT: lsls r0, r0, #31
2465 ; CHECK-MVE-NEXT: vmovx.f16 s2, s11
2466 ; CHECK-MVE-NEXT: vseleq.f16 s18, s11, s7
2467 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
2468 ; CHECK-MVE-NEXT: it vc
2469 ; CHECK-MVE-NEXT: movvc r1, #1
2470 ; CHECK-MVE-NEXT: vmov r0, s18
2471 ; CHECK-MVE-NEXT: cmp r1, #0
2472 ; CHECK-MVE-NEXT: vmov.16 q3[6], r0
2473 ; CHECK-MVE-NEXT: cset r0, ne
2474 ; CHECK-MVE-NEXT: lsls r0, r0, #31
2475 ; CHECK-MVE-NEXT: vseleq.f16 s0, s2, s0
2476 ; CHECK-MVE-NEXT: vmov r0, s0
2477 ; CHECK-MVE-NEXT: vmov.16 q3[7], r0
2478 ; CHECK-MVE-NEXT: vmov q0, q3
2479 ; CHECK-MVE-NEXT: vpop {d8, d9, d10}
2480 ; CHECK-MVE-NEXT: bx lr
2481 ;
2482 ; CHECK-MVEFP-LABEL: vcmp_ord_v8f16:
2483 ; CHECK-MVEFP: @ %bb.0: @ %entry
2484 ; CHECK-MVEFP-NEXT: vldr.16 s12, [r0]
2485 ; CHECK-MVEFP-NEXT: vmov r0, s12
2486 ; CHECK-MVEFP-NEXT: vdup.16 q3, r0
2487 ; CHECK-MVEFP-NEXT: vpt.f16 le, q3, q0
2488 ; CHECK-MVEFP-NEXT: vcmpt.f16 lt, q0, r0
2489 ; CHECK-MVEFP-NEXT: vpnot
2490 ; CHECK-MVEFP-NEXT: vpsel q0, q1, q2
2491 ; CHECK-MVEFP-NEXT: bx lr
2492 entry:
2493 %src2 = load half, half* %src2p
2494 %i = insertelement <8 x half> undef, half %src2, i32 0
2495 %sp = shufflevector <8 x half> %i, <8 x half> undef, <8 x i32> zeroinitializer
2496 %c = fcmp ord <8 x half> %src, %sp
2497 %s = select <8 x i1> %c, <8 x half> %a, <8 x half> %b
2498 ret <8 x half> %s
2499 }
2501 define arm_aapcs_vfpcc <8 x half> @vcmp_uno_v8f16(<8 x half> %src, half* %src2p, <8 x half> %a, <8 x half> %b) {
2502 ; CHECK-MVE-LABEL: vcmp_uno_v8f16:
2503 ; CHECK-MVE: @ %bb.0: @ %entry
2504 ; CHECK-MVE-NEXT: .vsave {d8, d9, d10}
2505 ; CHECK-MVE-NEXT: vpush {d8, d9, d10}
2506 ; CHECK-MVE-NEXT: vldr.16 s16, [r0]
2507 ; CHECK-MVE-NEXT: vmovx.f16 s12, s0
2508 ; CHECK-MVE-NEXT: movs r0, #0
2509 ; CHECK-MVE-NEXT: vmovx.f16 s14, s8
2510 ; CHECK-MVE-NEXT: vcmpe.f16 s12, s16
2511 ; CHECK-MVE-NEXT: vmovx.f16 s12, s4
2512 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
2513 ; CHECK-MVE-NEXT: it vs
2514 ; CHECK-MVE-NEXT: movvs r0, #1
2515 ; CHECK-MVE-NEXT: cmp r0, #0
2516 ; CHECK-MVE-NEXT: vcmpe.f16 s0, s16
2517 ; CHECK-MVE-NEXT: cset r0, ne
2518 ; CHECK-MVE-NEXT: movs r2, #0
2519 ; CHECK-MVE-NEXT: lsls r0, r0, #31
2520 ; CHECK-MVE-NEXT: vmovx.f16 s20, s9
2521 ; CHECK-MVE-NEXT: vseleq.f16 s12, s14, s12
2522 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
2523 ; CHECK-MVE-NEXT: it vs
2524 ; CHECK-MVE-NEXT: movvs r2, #1
2525 ; CHECK-MVE-NEXT: cmp r2, #0
2526 ; CHECK-MVE-NEXT: cset r2, ne
2527 ; CHECK-MVE-NEXT: vmov r0, s12
2528 ; CHECK-MVE-NEXT: lsls r2, r2, #31
2529 ; CHECK-MVE-NEXT: vcmpe.f16 s1, s16
2530 ; CHECK-MVE-NEXT: vseleq.f16 s12, s8, s4
2531 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
2532 ; CHECK-MVE-NEXT: vmov r2, s12
2533 ; CHECK-MVE-NEXT: vmovx.f16 s0, s3
2534 ; CHECK-MVE-NEXT: vmov.16 q3[0], r2
2535 ; CHECK-MVE-NEXT: mov.w r1, #0
2536 ; CHECK-MVE-NEXT: vmov.16 q3[1], r0
2537 ; CHECK-MVE-NEXT: mov.w r0, #0
2538 ; CHECK-MVE-NEXT: it vs
2539 ; CHECK-MVE-NEXT: movvs r0, #1
2540 ; CHECK-MVE-NEXT: cmp r0, #0
2541 ; CHECK-MVE-NEXT: cset r0, ne
2542 ; CHECK-MVE-NEXT: lsls r0, r0, #31
2543 ; CHECK-MVE-NEXT: vseleq.f16 s18, s9, s5
2544 ; CHECK-MVE-NEXT: vmov r0, s18
2545 ; CHECK-MVE-NEXT: vmovx.f16 s18, s1
2546 ; CHECK-MVE-NEXT: vcmpe.f16 s18, s16
2547 ; CHECK-MVE-NEXT: vmov.16 q3[2], r0
2548 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
2549 ; CHECK-MVE-NEXT: mov.w r0, #0
2550 ; CHECK-MVE-NEXT: it vs
2551 ; CHECK-MVE-NEXT: movvs r0, #1
2552 ; CHECK-MVE-NEXT: cmp r0, #0
2553 ; CHECK-MVE-NEXT: cset r0, ne
2554 ; CHECK-MVE-NEXT: vmovx.f16 s18, s5
2555 ; CHECK-MVE-NEXT: lsls r0, r0, #31
2556 ; CHECK-MVE-NEXT: vcmpe.f16 s2, s16
2557 ; CHECK-MVE-NEXT: vseleq.f16 s18, s20, s18
2558 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
2559 ; CHECK-MVE-NEXT: vmov r0, s18
2560 ; CHECK-MVE-NEXT: vmovx.f16 s20, s10
2561 ; CHECK-MVE-NEXT: vmov.16 q3[3], r0
2562 ; CHECK-MVE-NEXT: mov.w r0, #0
2563 ; CHECK-MVE-NEXT: it vs
2564 ; CHECK-MVE-NEXT: movvs r0, #1
2565 ; CHECK-MVE-NEXT: cmp r0, #0
2566 ; CHECK-MVE-NEXT: cset r0, ne
2567 ; CHECK-MVE-NEXT: lsls r0, r0, #31
2568 ; CHECK-MVE-NEXT: vseleq.f16 s18, s10, s6
2569 ; CHECK-MVE-NEXT: vmov r0, s18
2570 ; CHECK-MVE-NEXT: vmovx.f16 s18, s2
2571 ; CHECK-MVE-NEXT: vcmpe.f16 s18, s16
2572 ; CHECK-MVE-NEXT: vmov.16 q3[4], r0
2573 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
2574 ; CHECK-MVE-NEXT: mov.w r0, #0
2575 ; CHECK-MVE-NEXT: it vs
2576 ; CHECK-MVE-NEXT: movvs r0, #1
2577 ; CHECK-MVE-NEXT: cmp r0, #0
2578 ; CHECK-MVE-NEXT: cset r0, ne
2579 ; CHECK-MVE-NEXT: vmovx.f16 s18, s6
2580 ; CHECK-MVE-NEXT: lsls r0, r0, #31
2581 ; CHECK-MVE-NEXT: vcmpe.f16 s3, s16
2582 ; CHECK-MVE-NEXT: vseleq.f16 s18, s20, s18
2583 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
2584 ; CHECK-MVE-NEXT: vmov r0, s18
2585 ; CHECK-MVE-NEXT: vcmpe.f16 s0, s16
2586 ; CHECK-MVE-NEXT: vmov.16 q3[5], r0
2587 ; CHECK-MVE-NEXT: mov.w r0, #0
2588 ; CHECK-MVE-NEXT: it vs
2589 ; CHECK-MVE-NEXT: movvs r0, #1
2590 ; CHECK-MVE-NEXT: cmp r0, #0
2591 ; CHECK-MVE-NEXT: cset r0, ne
2592 ; CHECK-MVE-NEXT: vmovx.f16 s0, s7
2593 ; CHECK-MVE-NEXT: lsls r0, r0, #31
2594 ; CHECK-MVE-NEXT: vmovx.f16 s2, s11
2595 ; CHECK-MVE-NEXT: vseleq.f16 s18, s11, s7
2596 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
2597 ; CHECK-MVE-NEXT: it vs
2598 ; CHECK-MVE-NEXT: movvs r1, #1
2599 ; CHECK-MVE-NEXT: vmov r0, s18
2600 ; CHECK-MVE-NEXT: cmp r1, #0
2601 ; CHECK-MVE-NEXT: vmov.16 q3[6], r0
2602 ; CHECK-MVE-NEXT: cset r0, ne
2603 ; CHECK-MVE-NEXT: lsls r0, r0, #31
2604 ; CHECK-MVE-NEXT: vseleq.f16 s0, s2, s0
2605 ; CHECK-MVE-NEXT: vmov r0, s0
2606 ; CHECK-MVE-NEXT: vmov.16 q3[7], r0
2607 ; CHECK-MVE-NEXT: vmov q0, q3
2608 ; CHECK-MVE-NEXT: vpop {d8, d9, d10}
2609 ; CHECK-MVE-NEXT: bx lr
2610 ;
2611 ; CHECK-MVEFP-LABEL: vcmp_uno_v8f16:
2612 ; CHECK-MVEFP: @ %bb.0: @ %entry
2613 ; CHECK-MVEFP-NEXT: vldr.16 s12, [r0]
2614 ; CHECK-MVEFP-NEXT: vmov r0, s12
2615 ; CHECK-MVEFP-NEXT: vdup.16 q3, r0
2616 ; CHECK-MVEFP-NEXT: vpt.f16 le, q3, q0
2617 ; CHECK-MVEFP-NEXT: vcmpt.f16 lt, q0, r0
2618 ; CHECK-MVEFP-NEXT: vpsel q0, q1, q2
2619 ; CHECK-MVEFP-NEXT: bx lr
2620 entry:
2621 %src2 = load half, half* %src2p
2622 %i = insertelement <8 x half> undef, half %src2, i32 0
2623 %sp = shufflevector <8 x half> %i, <8 x half> undef, <8 x i32> zeroinitializer
2624 %c = fcmp uno <8 x half> %src, %sp
2625 %s = select <8 x i1> %c, <8 x half> %a, <8 x half> %b
2626 ret <8 x half> %s
2627 }