2 * DA9150 Core MFD Driver
4 * Copyright (c) 2014 Dialog Semiconductor
6 * Author: Adam Thomson <Adam.Thomson.Opensource@diasemi.com>
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
14 #include <linux/kernel.h>
15 #include <linux/module.h>
16 #include <linux/platform_device.h>
17 #include <linux/i2c.h>
18 #include <linux/regmap.h>
19 #include <linux/slab.h>
20 #include <linux/irq.h>
21 #include <linux/interrupt.h>
22 #include <linux/mfd/core.h>
23 #include <linux/mfd/da9150/core.h>
24 #include <linux/mfd/da9150/registers.h>
26 /* Raw device access, used for QIF */
27 static int da9150_i2c_read_device(struct i2c_client
*client
, u8 addr
, int count
,
34 * Read is split into two transfers as device expects STOP/START rather
35 * than repeated start to carry out this kind of access.
39 xfer
.addr
= client
->addr
;
44 ret
= i2c_transfer(client
->adapter
, &xfer
, 1);
53 xfer
.addr
= client
->addr
;
54 xfer
.flags
= I2C_M_RD
;
58 ret
= i2c_transfer(client
->adapter
, &xfer
, 1);
67 static int da9150_i2c_write_device(struct i2c_client
*client
, u8 addr
,
68 int count
, const u8
*buf
)
74 reg_data
= kzalloc(1 + count
, GFP_KERNEL
);
79 memcpy(®_data
[1], buf
, count
);
81 /* Write address & data */
82 xfer
.addr
= client
->addr
;
87 ret
= i2c_transfer(client
->adapter
, &xfer
, 1);
97 static bool da9150_volatile_reg(struct device
*dev
, unsigned int reg
)
100 case DA9150_PAGE_CON
:
101 case DA9150_STATUS_A
:
102 case DA9150_STATUS_B
:
103 case DA9150_STATUS_C
:
104 case DA9150_STATUS_D
:
105 case DA9150_STATUS_E
:
106 case DA9150_STATUS_F
:
107 case DA9150_STATUS_G
:
108 case DA9150_STATUS_H
:
109 case DA9150_STATUS_I
:
110 case DA9150_STATUS_J
:
111 case DA9150_STATUS_K
:
112 case DA9150_STATUS_L
:
113 case DA9150_STATUS_N
:
114 case DA9150_FAULT_LOG_A
:
115 case DA9150_FAULT_LOG_B
:
120 case DA9150_CONTROL_B
:
121 case DA9150_CONTROL_C
:
122 case DA9150_GPADC_MAN
:
123 case DA9150_GPADC_RES_A
:
124 case DA9150_GPADC_RES_B
:
125 case DA9150_ADETVB_CFG_C
:
126 case DA9150_ADETD_STAT
:
127 case DA9150_ADET_CMPSTAT
:
128 case DA9150_ADET_CTRL_A
:
129 case DA9150_PPR_TCTR_B
:
130 case DA9150_COREBTLD_STAT_A
:
131 case DA9150_CORE_DATA_A
:
132 case DA9150_CORE_DATA_B
:
133 case DA9150_CORE_DATA_C
:
134 case DA9150_CORE_DATA_D
:
135 case DA9150_CORE2WIRE_STAT_A
:
136 case DA9150_FW_CTRL_C
:
137 case DA9150_FG_CTRL_B
:
138 case DA9150_FW_CTRL_B
:
139 case DA9150_GPADC_CMAN
:
140 case DA9150_GPADC_CRES_A
:
141 case DA9150_GPADC_CRES_B
:
142 case DA9150_CC_ICHG_RES_A
:
143 case DA9150_CC_ICHG_RES_B
:
144 case DA9150_CC_IAVG_RES_A
:
145 case DA9150_CC_IAVG_RES_B
:
146 case DA9150_TAUX_CTRL_A
:
147 case DA9150_TAUX_VALUE_H
:
148 case DA9150_TAUX_VALUE_L
:
149 case DA9150_TBAT_RES_A
:
150 case DA9150_TBAT_RES_B
:
157 static const struct regmap_range_cfg da9150_range_cfg
[] = {
159 .range_min
= DA9150_PAGE_CON
,
160 .range_max
= DA9150_TBAT_RES_B
,
161 .selector_reg
= DA9150_PAGE_CON
,
162 .selector_mask
= DA9150_I2C_PAGE_MASK
,
163 .selector_shift
= DA9150_I2C_PAGE_SHIFT
,
169 static const struct regmap_config da9150_regmap_config
= {
172 .ranges
= da9150_range_cfg
,
173 .num_ranges
= ARRAY_SIZE(da9150_range_cfg
),
174 .max_register
= DA9150_TBAT_RES_B
,
176 .cache_type
= REGCACHE_RBTREE
,
178 .volatile_reg
= da9150_volatile_reg
,
181 void da9150_read_qif(struct da9150
*da9150
, u8 addr
, int count
, u8
*buf
)
185 ret
= da9150_i2c_read_device(da9150
->core_qif
, addr
, count
, buf
);
187 dev_err(da9150
->dev
, "Failed to read from QIF 0x%x: %d\n",
190 EXPORT_SYMBOL_GPL(da9150_read_qif
);
192 void da9150_write_qif(struct da9150
*da9150
, u8 addr
, int count
, const u8
*buf
)
196 ret
= da9150_i2c_write_device(da9150
->core_qif
, addr
, count
, buf
);
198 dev_err(da9150
->dev
, "Failed to write to QIF 0x%x: %d\n",
201 EXPORT_SYMBOL_GPL(da9150_write_qif
);
203 u8
da9150_reg_read(struct da9150
*da9150
, u16 reg
)
207 ret
= regmap_read(da9150
->regmap
, reg
, &val
);
209 dev_err(da9150
->dev
, "Failed to read from reg 0x%x: %d\n",
214 EXPORT_SYMBOL_GPL(da9150_reg_read
);
216 void da9150_reg_write(struct da9150
*da9150
, u16 reg
, u8 val
)
220 ret
= regmap_write(da9150
->regmap
, reg
, val
);
222 dev_err(da9150
->dev
, "Failed to write to reg 0x%x: %d\n",
225 EXPORT_SYMBOL_GPL(da9150_reg_write
);
227 void da9150_set_bits(struct da9150
*da9150
, u16 reg
, u8 mask
, u8 val
)
231 ret
= regmap_update_bits(da9150
->regmap
, reg
, mask
, val
);
233 dev_err(da9150
->dev
, "Failed to set bits in reg 0x%x: %d\n",
236 EXPORT_SYMBOL_GPL(da9150_set_bits
);
238 void da9150_bulk_read(struct da9150
*da9150
, u16 reg
, int count
, u8
*buf
)
242 ret
= regmap_bulk_read(da9150
->regmap
, reg
, buf
, count
);
244 dev_err(da9150
->dev
, "Failed to bulk read from reg 0x%x: %d\n",
247 EXPORT_SYMBOL_GPL(da9150_bulk_read
);
249 void da9150_bulk_write(struct da9150
*da9150
, u16 reg
, int count
, const u8
*buf
)
253 ret
= regmap_raw_write(da9150
->regmap
, reg
, buf
, count
);
255 dev_err(da9150
->dev
, "Failed to bulk write to reg 0x%x %d\n",
258 EXPORT_SYMBOL_GPL(da9150_bulk_write
);
260 static const struct regmap_irq da9150_irqs
[] = {
261 [DA9150_IRQ_VBUS
] = {
263 .mask
= DA9150_E_VBUS_MASK
,
267 .mask
= DA9150_E_CHG_MASK
,
269 [DA9150_IRQ_TCLASS
] = {
271 .mask
= DA9150_E_TCLASS_MASK
,
273 [DA9150_IRQ_TJUNC
] = {
275 .mask
= DA9150_E_TJUNC_MASK
,
277 [DA9150_IRQ_VFAULT
] = {
279 .mask
= DA9150_E_VFAULT_MASK
,
281 [DA9150_IRQ_CONF
] = {
283 .mask
= DA9150_E_CONF_MASK
,
287 .mask
= DA9150_E_DAT_MASK
,
289 [DA9150_IRQ_DTYPE
] = {
291 .mask
= DA9150_E_DTYPE_MASK
,
295 .mask
= DA9150_E_ID_MASK
,
299 .mask
= DA9150_E_ADP_MASK
,
301 [DA9150_IRQ_SESS_END
] = {
303 .mask
= DA9150_E_SESS_END_MASK
,
305 [DA9150_IRQ_SESS_VLD
] = {
307 .mask
= DA9150_E_SESS_VLD_MASK
,
311 .mask
= DA9150_E_FG_MASK
,
315 .mask
= DA9150_E_GP_MASK
,
317 [DA9150_IRQ_TBAT
] = {
319 .mask
= DA9150_E_TBAT_MASK
,
321 [DA9150_IRQ_GPIOA
] = {
323 .mask
= DA9150_E_GPIOA_MASK
,
325 [DA9150_IRQ_GPIOB
] = {
327 .mask
= DA9150_E_GPIOB_MASK
,
329 [DA9150_IRQ_GPIOC
] = {
331 .mask
= DA9150_E_GPIOC_MASK
,
333 [DA9150_IRQ_GPIOD
] = {
335 .mask
= DA9150_E_GPIOD_MASK
,
337 [DA9150_IRQ_GPADC
] = {
339 .mask
= DA9150_E_GPADC_MASK
,
341 [DA9150_IRQ_WKUP
] = {
343 .mask
= DA9150_E_WKUP_MASK
,
347 static const struct regmap_irq_chip da9150_regmap_irq_chip
= {
348 .name
= "da9150_irq",
349 .status_base
= DA9150_EVENT_E
,
350 .mask_base
= DA9150_IRQ_MASK_E
,
351 .ack_base
= DA9150_EVENT_E
,
352 .num_regs
= DA9150_NUM_IRQ_REGS
,
354 .num_irqs
= ARRAY_SIZE(da9150_irqs
),
357 static struct resource da9150_gpadc_resources
[] = {
358 DEFINE_RES_IRQ_NAMED(DA9150_IRQ_GPADC
, "GPADC"),
361 static struct resource da9150_charger_resources
[] = {
362 DEFINE_RES_IRQ_NAMED(DA9150_IRQ_CHG
, "CHG_STATUS"),
363 DEFINE_RES_IRQ_NAMED(DA9150_IRQ_TJUNC
, "CHG_TJUNC"),
364 DEFINE_RES_IRQ_NAMED(DA9150_IRQ_VFAULT
, "CHG_VFAULT"),
365 DEFINE_RES_IRQ_NAMED(DA9150_IRQ_VBUS
, "CHG_VBUS"),
368 static struct resource da9150_fg_resources
[] = {
369 DEFINE_RES_IRQ_NAMED(DA9150_IRQ_FG
, "FG"),
372 enum da9150_dev_idx
{
373 DA9150_GPADC_IDX
= 0,
378 static struct mfd_cell da9150_devs
[] = {
379 [DA9150_GPADC_IDX
] = {
380 .name
= "da9150-gpadc",
381 .of_compatible
= "dlg,da9150-gpadc",
382 .resources
= da9150_gpadc_resources
,
383 .num_resources
= ARRAY_SIZE(da9150_gpadc_resources
),
385 [DA9150_CHARGER_IDX
] = {
386 .name
= "da9150-charger",
387 .of_compatible
= "dlg,da9150-charger",
388 .resources
= da9150_charger_resources
,
389 .num_resources
= ARRAY_SIZE(da9150_charger_resources
),
392 .name
= "da9150-fuel-gauge",
393 .of_compatible
= "dlg,da9150-fuel-gauge",
394 .resources
= da9150_fg_resources
,
395 .num_resources
= ARRAY_SIZE(da9150_fg_resources
),
399 static int da9150_probe(struct i2c_client
*client
,
400 const struct i2c_device_id
*id
)
402 struct da9150
*da9150
;
403 struct da9150_pdata
*pdata
= dev_get_platdata(&client
->dev
);
407 da9150
= devm_kzalloc(&client
->dev
, sizeof(*da9150
), GFP_KERNEL
);
411 da9150
->dev
= &client
->dev
;
412 da9150
->irq
= client
->irq
;
413 i2c_set_clientdata(client
, da9150
);
415 da9150
->regmap
= devm_regmap_init_i2c(client
, &da9150_regmap_config
);
416 if (IS_ERR(da9150
->regmap
)) {
417 ret
= PTR_ERR(da9150
->regmap
);
418 dev_err(da9150
->dev
, "Failed to allocate register map: %d\n",
423 /* Setup secondary I2C interface for QIF access */
424 qif_addr
= da9150_reg_read(da9150
, DA9150_CORE2WIRE_CTRL_A
);
425 qif_addr
= (qif_addr
& DA9150_CORE_BASE_ADDR_MASK
) >> 1;
426 qif_addr
|= DA9150_QIF_I2C_ADDR_LSB
;
427 da9150
->core_qif
= i2c_new_dummy(client
->adapter
, qif_addr
);
428 if (!da9150
->core_qif
) {
429 dev_err(da9150
->dev
, "Failed to attach QIF client\n");
433 i2c_set_clientdata(da9150
->core_qif
, da9150
);
436 da9150
->irq_base
= pdata
->irq_base
;
438 da9150_devs
[DA9150_FG_IDX
].platform_data
= pdata
->fg_pdata
;
439 da9150_devs
[DA9150_FG_IDX
].pdata_size
=
440 sizeof(struct da9150_fg_pdata
);
442 da9150
->irq_base
= -1;
445 ret
= regmap_add_irq_chip(da9150
->regmap
, da9150
->irq
,
446 IRQF_TRIGGER_LOW
| IRQF_ONESHOT
,
447 da9150
->irq_base
, &da9150_regmap_irq_chip
,
448 &da9150
->regmap_irq_data
);
450 dev_err(da9150
->dev
, "Failed to add regmap irq chip: %d\n",
452 goto regmap_irq_fail
;
456 da9150
->irq_base
= regmap_irq_chip_get_base(da9150
->regmap_irq_data
);
458 enable_irq_wake(da9150
->irq
);
460 ret
= mfd_add_devices(da9150
->dev
, -1, da9150_devs
,
461 ARRAY_SIZE(da9150_devs
), NULL
,
462 da9150
->irq_base
, NULL
);
464 dev_err(da9150
->dev
, "Failed to add child devices: %d\n", ret
);
471 regmap_del_irq_chip(da9150
->irq
, da9150
->regmap_irq_data
);
473 i2c_unregister_device(da9150
->core_qif
);
478 static int da9150_remove(struct i2c_client
*client
)
480 struct da9150
*da9150
= i2c_get_clientdata(client
);
482 regmap_del_irq_chip(da9150
->irq
, da9150
->regmap_irq_data
);
483 mfd_remove_devices(da9150
->dev
);
484 i2c_unregister_device(da9150
->core_qif
);
489 static void da9150_shutdown(struct i2c_client
*client
)
491 struct da9150
*da9150
= i2c_get_clientdata(client
);
493 /* Make sure we have a wakup source for the device */
494 da9150_set_bits(da9150
, DA9150_CONFIG_D
,
495 DA9150_WKUP_PM_EN_MASK
,
496 DA9150_WKUP_PM_EN_MASK
);
498 /* Set device to DISABLED mode */
499 da9150_set_bits(da9150
, DA9150_CONTROL_C
,
500 DA9150_DISABLE_MASK
, DA9150_DISABLE_MASK
);
503 static const struct i2c_device_id da9150_i2c_id
[] = {
507 MODULE_DEVICE_TABLE(i2c
, da9150_i2c_id
);
509 static const struct of_device_id da9150_of_match
[] = {
510 { .compatible
= "dlg,da9150", },
513 MODULE_DEVICE_TABLE(of
, da9150_of_match
);
515 static struct i2c_driver da9150_driver
= {
518 .of_match_table
= of_match_ptr(da9150_of_match
),
520 .probe
= da9150_probe
,
521 .remove
= da9150_remove
,
522 .shutdown
= da9150_shutdown
,
523 .id_table
= da9150_i2c_id
,
526 module_i2c_driver(da9150_driver
);
528 MODULE_DESCRIPTION("MFD Core Driver for DA9150");
529 MODULE_AUTHOR("Adam Thomson <Adam.Thomson.Opensource@diasemi.com>");
530 MODULE_LICENSE("GPL");