arch/arc/kernel/setup.c

   1 /*
   2  * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License version 2 as
   6  * published by the Free Software Foundation.
   7  */
   8
   9 #include <linux/seq_file.h>
  10 #include <linux/fs.h>
  11 #include <linux/delay.h>
  12 #include <linux/root_dev.h>
  13 #include <linux/console.h>
  14 #include <linux/module.h>
  15 #include <linux/cpu.h>
  16 #include <linux/of_fdt.h>
  17 #include <linux/of.h>
  18 #include <linux/cache.h>
  19 #include <asm/sections.h>
  20 #include <asm/arcregs.h>
  21 #include <asm/tlb.h>
  22 #include <asm/setup.h>
  23 #include <asm/page.h>
  24 #include <asm/irq.h>
  25 #include <asm/unwind.h>
  26 #include <asm/mach_desc.h>
  27 #include <asm/smp.h>
  28
  29 #define FIX_PTR(x)  __asm__ __volatile__(";" : "+r"(x))
  30
  31 unsigned int intr_to_DE_cnt;
  32
  33 /* Part of U-boot ABI: see head.S */
  34 int __initdata uboot_tag;
  35 char __initdata *uboot_arg;
  36
  37 const struct machine_desc *machine_desc;
  38
  39 struct task_struct *_current_task[NR_CPUS];     /* For stack switching */
  40
  41 struct cpuinfo_arc cpuinfo_arc700[NR_CPUS];
  42
  43 static const struct cpuinfo_data arc_cpu_tbl[] = {
  44 #ifdef CONFIG_ISA_ARCOMPACT
  45         { {0x20, "ARC 600"      }, 0x2F},
  46         { {0x30, "ARC 700"      }, 0x33},
  47         { {0x34, "ARC 700 R4.10"}, 0x34},
  48         { {0x35, "ARC 700 R4.11"}, 0x35},
  49 #else
  50         { {0x50, "ARC HS38 R2.0"}, 0x51},
  51         { {0x52, "ARC HS38 R2.1"}, 0x52},
  52         { {0x53, "ARC HS38 R3.0"}, 0x53},
  53 #endif
  54         { {0x00, NULL           } }
  55 };
  56
  57 static void read_decode_ccm_bcr(struct cpuinfo_arc *cpu)
  58 {
  59         if (is_isa_arcompact()) {
  60                 struct bcr_iccm_arcompact iccm;
  61                 struct bcr_dccm_arcompact dccm;
  62
  63                 READ_BCR(ARC_REG_ICCM_BUILD, iccm);
  64                 if (iccm.ver) {
  65                         cpu->iccm.sz = 4096 << iccm.sz; /* 8K to 512K */
  66                         cpu->iccm.base_addr = iccm.base << 16;
  67                 }
  68
  69                 READ_BCR(ARC_REG_DCCM_BUILD, dccm);
  70                 if (dccm.ver) {
  71                         unsigned long base;
  72                         cpu->dccm.sz = 2048 << dccm.sz; /* 2K to 256K */
  73
  74                         base = read_aux_reg(ARC_REG_DCCM_BASE_BUILD);
  75                         cpu->dccm.base_addr = base & ~0xF;
  76                 }
  77         } else {
  78                 struct bcr_iccm_arcv2 iccm;
  79                 struct bcr_dccm_arcv2 dccm;
  80                 unsigned long region;
  81
  82                 READ_BCR(ARC_REG_ICCM_BUILD, iccm);
  83                 if (iccm.ver) {
  84                         cpu->iccm.sz = 256 << iccm.sz00;        /* 512B to 16M */
  85                         if (iccm.sz00 == 0xF && iccm.sz01 > 0)
  86                                 cpu->iccm.sz <<= iccm.sz01;
  87
  88                         region = read_aux_reg(ARC_REG_AUX_ICCM);
  89                         cpu->iccm.base_addr = region & 0xF0000000;
  90                 }
  91
  92                 READ_BCR(ARC_REG_DCCM_BUILD, dccm);
  93                 if (dccm.ver) {
  94                         cpu->dccm.sz = 256 << dccm.sz0;
  95                         if (dccm.sz0 == 0xF && dccm.sz1 > 0)
  96                                 cpu->dccm.sz <<= dccm.sz1;
  97
  98                         region = read_aux_reg(ARC_REG_AUX_DCCM);
  99                         cpu->dccm.base_addr = region & 0xF0000000;
 100                 }
 101         }
 102 }
 103
 104 static void read_arc_build_cfg_regs(void)
 105 {
 106         struct bcr_timer timer;
 107         struct bcr_generic bcr;
 108         struct cpuinfo_arc *cpu = &cpuinfo_arc700[smp_processor_id()];
 109         const struct cpuinfo_data *tbl;
 110
 111         FIX_PTR(cpu);
 112
 113         READ_BCR(AUX_IDENTITY, cpu->core);
 114         READ_BCR(ARC_REG_ISA_CFG_BCR, cpu->isa);
 115
 116         for (tbl = &arc_cpu_tbl[0]; tbl->info.id != 0; tbl++) {
 117                 if ((cpu->core.family >= tbl->info.id) &&
 118                     (cpu->core.family <= tbl->up_range)) {
 119                         cpu->details = tbl->info.str;
 120                         break;
 121                 }
 122         }
 123
 124         if (tbl->info.id == 0)
 125                 cpu->details = "UNKNOWN";
 126
 127         READ_BCR(ARC_REG_TIMERS_BCR, timer);
 128         cpu->extn.timer0 = timer.t0;
 129         cpu->extn.timer1 = timer.t1;
 130         cpu->extn.rtc = timer.rtc;
 131
 132         cpu->vec_base = read_aux_reg(AUX_INTR_VEC_BASE);
 133
 134         READ_BCR(ARC_REG_MUL_BCR, cpu->extn_mpy);
 135
 136         cpu->extn.norm = read_aux_reg(ARC_REG_NORM_BCR) > 1 ? 1 : 0; /* 2,3 */
 137         cpu->extn.barrel = read_aux_reg(ARC_REG_BARREL_BCR) > 1 ? 1 : 0; /* 2,3 */
 138         cpu->extn.swap = read_aux_reg(ARC_REG_SWAP_BCR) ? 1 : 0;        /* 1,3 */
 139         cpu->extn.crc = read_aux_reg(ARC_REG_CRC_BCR) ? 1 : 0;
 140         cpu->extn.minmax = read_aux_reg(ARC_REG_MIXMAX_BCR) > 1 ? 1 : 0; /* 2 */
 141         cpu->extn.swape = (cpu->core.family >= 0x34) ? 1 :
 142                                 IS_ENABLED(CONFIG_ARC_HAS_SWAPE);
 143
 144         READ_BCR(ARC_REG_XY_MEM_BCR, cpu->extn_xymem);
 145
 146         /* Read CCM BCRs for boot reporting even if not enabled in Kconfig */
 147         read_decode_ccm_bcr(cpu);
 148
 149         read_decode_mmu_bcr();
 150         read_decode_cache_bcr();
 151
 152         if (is_isa_arcompact()) {
 153                 struct bcr_fp_arcompact sp, dp;
 154                 struct bcr_bpu_arcompact bpu;
 155
 156                 READ_BCR(ARC_REG_FP_BCR, sp);
 157                 READ_BCR(ARC_REG_DPFP_BCR, dp);
 158                 cpu->extn.fpu_sp = sp.ver ? 1 : 0;
 159                 cpu->extn.fpu_dp = dp.ver ? 1 : 0;
 160
 161                 READ_BCR(ARC_REG_BPU_BCR, bpu);
 162                 cpu->bpu.ver = bpu.ver;
 163                 cpu->bpu.full = bpu.fam ? 1 : 0;
 164                 if (bpu.ent) {
 165                         cpu->bpu.num_cache = 256 << (bpu.ent - 1);
 166                         cpu->bpu.num_pred = 256 << (bpu.ent - 1);
 167                 }
 168         } else {
 169                 struct bcr_fp_arcv2 spdp;
 170                 struct bcr_bpu_arcv2 bpu;
 171
 172                 READ_BCR(ARC_REG_FP_V2_BCR, spdp);
 173                 cpu->extn.fpu_sp = spdp.sp ? 1 : 0;
 174                 cpu->extn.fpu_dp = spdp.dp ? 1 : 0;
 175
 176                 READ_BCR(ARC_REG_BPU_BCR, bpu);
 177                 cpu->bpu.ver = bpu.ver;
 178                 cpu->bpu.full = bpu.ft;
 179                 cpu->bpu.num_cache = 256 << bpu.bce;
 180                 cpu->bpu.num_pred = 2048 << bpu.pte;
 181         }
 182
 183         READ_BCR(ARC_REG_AP_BCR, bcr);
 184         cpu->extn.ap = bcr.ver ? 1 : 0;
 185
 186         READ_BCR(ARC_REG_SMART_BCR, bcr);
 187         cpu->extn.smart = bcr.ver ? 1 : 0;
 188
 189         READ_BCR(ARC_REG_RTT_BCR, bcr);
 190         cpu->extn.rtt = bcr.ver ? 1 : 0;
 191
 192         cpu->extn.debug = cpu->extn.ap | cpu->extn.smart | cpu->extn.rtt;
 193
 194         /* some hacks for lack of feature BCR info in old ARC700 cores */
 195         if (is_isa_arcompact()) {
 196                 if (!cpu->isa.ver)      /* ISA BCR absent, use Kconfig info */
 197                         cpu->isa.atomic = IS_ENABLED(CONFIG_ARC_HAS_LLSC);
 198                 else
 199                         cpu->isa.atomic = cpu->isa.atomic1;
 200
 201                 cpu->isa.be = IS_ENABLED(CONFIG_CPU_BIG_ENDIAN);
 202         }
 203 }
 204
 205 static char *arc_cpu_mumbojumbo(int cpu_id, char *buf, int len)
 206 {
 207         struct cpuinfo_arc *cpu = &cpuinfo_arc700[cpu_id];
 208         struct bcr_identity *core = &cpu->core;
 209         int i, n = 0;
 210
 211         FIX_PTR(cpu);
 212
 213         n += scnprintf(buf + n, len - n,
 214                        "\nIDENTITY\t: ARCVER [%#02x] ARCNUM [%#02x] CHIPID [%#4x]\n",
 215                        core->family, core->cpu_id, core->chip_id);
 216
 217         n += scnprintf(buf + n, len - n, "processor [%d]\t: %s (%s ISA) %s\n",
 218                        cpu_id, cpu->details,
 219                        is_isa_arcompact() ? "ARCompact" : "ARCv2",
 220                        IS_AVAIL1(cpu->isa.be, "[Big-Endian]"));
 221
 222         n += scnprintf(buf + n, len - n, "Timers\t\t: %s%s%s%s\nISA Extn\t: ",
 223                        IS_AVAIL1(cpu->extn.timer0, "Timer0 "),
 224                        IS_AVAIL1(cpu->extn.timer1, "Timer1 "),
 225                        IS_AVAIL2(cpu->extn.rtc, "Local-64-bit-Ctr ",
 226                                  CONFIG_ARC_HAS_RTC));
 227
 228         n += i = scnprintf(buf + n, len - n, "%s%s%s%s%s",
 229                            IS_AVAIL2(cpu->isa.atomic, "atomic ", CONFIG_ARC_HAS_LLSC),
 230                            IS_AVAIL2(cpu->isa.ldd, "ll64 ", CONFIG_ARC_HAS_LL64),
 231                            IS_AVAIL1(cpu->isa.unalign, "unalign (not used)"));
 232
 233         if (i)
 234                 n += scnprintf(buf + n, len - n, "\n\t\t: ");
 235
 236         if (cpu->extn_mpy.ver) {
 237                 if (cpu->extn_mpy.ver <= 0x2) { /* ARCompact */
 238                         n += scnprintf(buf + n, len - n, "mpy ");
 239                 } else {
 240                         int opt = 2;    /* stock MPY/MPYH */
 241
 242                         if (cpu->extn_mpy.dsp)  /* OPT 7-9 */
 243                                 opt = cpu->extn_mpy.dsp + 6;
 244
 245                         n += scnprintf(buf + n, len - n, "mpy[opt %d] ", opt);
 246                 }
 247         }
 248
 249         n += scnprintf(buf + n, len - n, "%s%s%s%s%s%s%s%s\n",
 250                        IS_AVAIL1(cpu->isa.div_rem, "div_rem "),
 251                        IS_AVAIL1(cpu->extn.norm, "norm "),
 252                        IS_AVAIL1(cpu->extn.barrel, "barrel-shift "),
 253                        IS_AVAIL1(cpu->extn.swap, "swap "),
 254                        IS_AVAIL1(cpu->extn.minmax, "minmax "),
 255                        IS_AVAIL1(cpu->extn.crc, "crc "),
 256                        IS_AVAIL2(cpu->extn.swape, "swape", CONFIG_ARC_HAS_SWAPE));
 257
 258         if (cpu->bpu.ver)
 259                 n += scnprintf(buf + n, len - n,
 260                               "BPU\t\t: %s%s match, cache:%d, Predict Table:%d\n",
 261                               IS_AVAIL1(cpu->bpu.full, "full"),
 262                               IS_AVAIL1(!cpu->bpu.full, "partial"),
 263                               cpu->bpu.num_cache, cpu->bpu.num_pred);
 264
 265         return buf;
 266 }
 267
 268 static char *arc_extn_mumbojumbo(int cpu_id, char *buf, int len)
 269 {
 270         int n = 0;
 271         struct cpuinfo_arc *cpu = &cpuinfo_arc700[cpu_id];
 272
 273         FIX_PTR(cpu);
 274
 275         n += scnprintf(buf + n, len - n, "Vector Table\t: %#x\n", cpu->vec_base);
 276
 277         if (cpu->extn.fpu_sp || cpu->extn.fpu_dp)
 278                 n += scnprintf(buf + n, len - n, "FPU\t\t: %s%s\n",
 279                                IS_AVAIL1(cpu->extn.fpu_sp, "SP "),
 280                                IS_AVAIL1(cpu->extn.fpu_dp, "DP "));
 281
 282         if (cpu->extn.debug)
 283                 n += scnprintf(buf + n, len - n, "DEBUG\t\t: %s%s%s\n",
 284                                IS_AVAIL1(cpu->extn.ap, "ActionPoint "),
 285                                IS_AVAIL1(cpu->extn.smart, "smaRT "),
 286                                IS_AVAIL1(cpu->extn.rtt, "RTT "));
 287
 288         if (cpu->dccm.sz || cpu->iccm.sz)
 289                 n += scnprintf(buf + n, len - n, "Extn [CCM]\t: DCCM @ %x, %d KB / ICCM: @ %x, %d KB\n",
 290                                cpu->dccm.base_addr, TO_KB(cpu->dccm.sz),
 291                                cpu->iccm.base_addr, TO_KB(cpu->iccm.sz));
 292
 293         n += scnprintf(buf + n, len - n, "OS ABI [v%d]\t: %s\n",
 294                         EF_ARC_OSABI_CURRENT >> 8,
 295                         EF_ARC_OSABI_CURRENT == EF_ARC_OSABI_V3 ?
 296                         "no-legacy-syscalls" : "64-bit data any register aligned");
 297
 298         return buf;
 299 }
 300
 301 static void arc_chk_core_config(void)
 302 {
 303         struct cpuinfo_arc *cpu = &cpuinfo_arc700[smp_processor_id()];
 304         int fpu_enabled;
 305
 306         if (!cpu->extn.timer0)
 307                 panic("Timer0 is not present!\n");
 308
 309         if (!cpu->extn.timer1)
 310                 panic("Timer1 is not present!\n");
 311
 312 #ifdef CONFIG_ARC_HAS_DCCM
 313         /*
 314          * DCCM can be arbit placed in hardware.
 315          * Make sure it's placement/sz matches what Linux is built with
 316          */
 317         if ((unsigned int)__arc_dccm_base != cpu->dccm.base_addr)
 318                 panic("Linux built with incorrect DCCM Base address\n");
 319
 320         if (CONFIG_ARC_DCCM_SZ != cpu->dccm.sz)
 321                 panic("Linux built with incorrect DCCM Size\n");
 322 #endif
 323
 324 #ifdef CONFIG_ARC_HAS_ICCM
 325         if (CONFIG_ARC_ICCM_SZ != cpu->iccm.sz)
 326                 panic("Linux built with incorrect ICCM Size\n");
 327 #endif
 328
 329         /*
 330          * FP hardware/software config sanity
 331          * -If hardware contains DPFP, kernel needs to save/restore FPU state
 332          * -If not, it will crash trying to save/restore the non-existant regs
 333          *
 334          * (only DPDP checked since SP has no arch visible regs)
 335          */
 336         fpu_enabled = IS_ENABLED(CONFIG_ARC_FPU_SAVE_RESTORE);
 337
 338         if (cpu->extn.fpu_dp && !fpu_enabled)
 339                 pr_warn("CONFIG_ARC_FPU_SAVE_RESTORE needed for working apps\n");
 340         else if (!cpu->extn.fpu_dp && fpu_enabled)
 341                 panic("FPU non-existent, disable CONFIG_ARC_FPU_SAVE_RESTORE\n");
 342 }
 343
 344 /*
 345  * Initialize and setup the processor core
 346  * This is called by all the CPUs thus should not do special case stuff
 347  *    such as only for boot CPU etc
 348  */
 349
 350 void setup_processor(void)
 351 {
 352         char str[512];
 353         int cpu_id = smp_processor_id();
 354
 355         read_arc_build_cfg_regs();
 356         arc_init_IRQ();
 357
 358         printk(arc_cpu_mumbojumbo(cpu_id, str, sizeof(str)));
 359
 360         arc_mmu_init();
 361         arc_cache_init();
 362
 363         printk(arc_extn_mumbojumbo(cpu_id, str, sizeof(str)));
 364         printk(arc_platform_smp_cpuinfo());
 365
 366         arc_chk_core_config();
 367 }
 368
 369 static inline int is_kernel(unsigned long addr)
 370 {
 371         if (addr >= (unsigned long)_stext && addr <= (unsigned long)_end)
 372                 return 1;
 373         return 0;
 374 }
 375
 376 void __init setup_arch(char **cmdline_p)
 377 {
 378 #ifdef CONFIG_ARC_UBOOT_SUPPORT
 379         /* make sure that uboot passed pointer to cmdline/dtb is valid */
 380         if (uboot_tag && is_kernel((unsigned long)uboot_arg))
 381                 panic("Invalid uboot arg\n");
 382
 383         /* See if u-boot passed an external Device Tree blob */
 384         machine_desc = setup_machine_fdt(uboot_arg);    /* uboot_tag == 2 */
 385         if (!machine_desc)
 386 #endif
 387         {
 388                 /* No, so try the embedded one */
 389                 machine_desc = setup_machine_fdt(__dtb_start);
 390                 if (!machine_desc)
 391                         panic("Embedded DT invalid\n");
 392
 393                 /*
 394                  * If we are here, it is established that @uboot_arg didn't
 395                  * point to DT blob. Instead if u-boot says it is cmdline,
 396                  * append to embedded DT cmdline.
 397                  * setup_machine_fdt() would have populated @boot_command_line
 398                  */
 399                 if (uboot_tag == 1) {
 400                         /* Ensure a whitespace between the 2 cmdlines */
 401                         strlcat(boot_command_line, " ", COMMAND_LINE_SIZE);
 402                         strlcat(boot_command_line, uboot_arg,
 403                                 COMMAND_LINE_SIZE);
 404                 }
 405         }
 406
 407         /* Save unparsed command line copy for /proc/cmdline */
 408         *cmdline_p = boot_command_line;
 409
 410         /* To force early parsing of things like mem=xxx */
 411         parse_early_param();
 412
 413         /* Platform/board specific: e.g. early console registration */
 414         if (machine_desc->init_early)
 415                 machine_desc->init_early();
 416
 417         smp_init_cpus();
 418
 419         setup_processor();
 420         setup_arch_memory();
 421
 422         /* copy flat DT out of .init and then unflatten it */
 423         unflatten_and_copy_device_tree();
 424
 425         /* Can be issue if someone passes cmd line arg "ro"
 426          * But that is unlikely so keeping it as it is
 427          */
 428         root_mountflags &= ~MS_RDONLY;
 429
 430 #if defined(CONFIG_VT) && defined(CONFIG_DUMMY_CONSOLE)
 431         conswitchp = &dummy_con;
 432 #endif
 433
 434         arc_unwind_init();
 435 }
 436
 437 static int __init customize_machine(void)
 438 {
 439         if (machine_desc->init_machine)
 440                 machine_desc->init_machine();
 441
 442         return 0;
 443 }
 444 arch_initcall(customize_machine);
 445
 446 static int __init init_late_machine(void)
 447 {
 448         if (machine_desc->init_late)
 449                 machine_desc->init_late();
 450
 451         return 0;
 452 }
 453 late_initcall(init_late_machine);
 454 /*
 455  *  Get CPU information for use by the procfs.
 456  */
 457
 458 #define cpu_to_ptr(c)   ((void *)(0xFFFF0000 | (unsigned int)(c)))
 459 #define ptr_to_cpu(p)   (~0xFFFF0000UL & (unsigned int)(p))
 460
 461 static int show_cpuinfo(struct seq_file *m, void *v)
 462 {
 463         char *str;
 464         int cpu_id = ptr_to_cpu(v);
 465         struct device_node *core_clk = of_find_node_by_name(NULL, "core_clk");
 466         u32 freq = 0;
 467
 468         if (!cpu_online(cpu_id)) {
 469                 seq_printf(m, "processor [%d]\t: Offline\n", cpu_id);
 470                 goto done;
 471         }
 472
 473         str = (char *)__get_free_page(GFP_TEMPORARY);
 474         if (!str)
 475                 goto done;
 476
 477         seq_printf(m, arc_cpu_mumbojumbo(cpu_id, str, PAGE_SIZE));
 478
 479         of_property_read_u32(core_clk, "clock-frequency", &freq);
 480         if (freq)
 481                 seq_printf(m, "CPU speed\t: %u.%02u Mhz\n",
 482                            freq / 1000000, (freq / 10000) % 100);
 483
 484         seq_printf(m, "Bogo MIPS\t: %lu.%02lu\n",
 485                    loops_per_jiffy / (500000 / HZ),
 486                    (loops_per_jiffy / (5000 / HZ)) % 100);
 487
 488         seq_printf(m, arc_mmu_mumbojumbo(cpu_id, str, PAGE_SIZE));
 489         seq_printf(m, arc_cache_mumbojumbo(cpu_id, str, PAGE_SIZE));
 490         seq_printf(m, arc_extn_mumbojumbo(cpu_id, str, PAGE_SIZE));
 491         seq_printf(m, arc_platform_smp_cpuinfo());
 492
 493         free_page((unsigned long)str);
 494 done:
 495         seq_printf(m, "\n");
 496
 497         return 0;
 498 }
 499
 500 static void *c_start(struct seq_file *m, loff_t *pos)
 501 {
 502         /*
 503          * Callback returns cpu-id to iterator for show routine, NULL to stop.
 504          * However since NULL is also a valid cpu-id (0), we use a round-about
 505          * way to pass it w/o having to kmalloc/free a 2 byte string.
 506          * Encode cpu-id as 0xFFcccc, which is decoded by show routine.
 507          */
 508         return *pos < nr_cpu_ids ? cpu_to_ptr(*pos) : NULL;
 509 }
 510
 511 static void *c_next(struct seq_file *m, void *v, loff_t *pos)
 512 {
 513         ++*pos;
 514         return c_start(m, pos);
 515 }
 516
 517 static void c_stop(struct seq_file *m, void *v)
 518 {
 519 }
 520
 521 const struct seq_operations cpuinfo_op = {
 522         .start  = c_start,
 523         .next   = c_next,
 524         .stop   = c_stop,
 525         .show   = show_cpuinfo
 526 };
 527
 528 static DEFINE_PER_CPU(struct cpu, cpu_topology);
 529
 530 static int __init topology_init(void)
 531 {
 532         int cpu;
 533
 534         for_each_present_cpu(cpu)
 535             register_cpu(&per_cpu(cpu_topology, cpu), cpu);
 536
 537         return 0;
 538 }
 539
 540 subsys_initcall(topology_init);