1 // SPDX-License-Identifier: GPL-2.0+
3 * Core PHY library, taken from phy.c
5 #include <linux/export.h>
10 * phy_speed_to_str - Return a string representing the PHY link speed
12 * @speed: Speed of the link
14 const char *phy_speed_to_str(int speed
)
16 BUILD_BUG_ON_MSG(__ETHTOOL_LINK_MODE_MASK_NBITS
!= 103,
17 "Enum ethtool_link_mode_bit_indices and phylib are out of sync. "
18 "If a speed or mode has been added please update phy_speed_to_str "
19 "and the PHY settings array.\n");
57 return "Unsupported (update phy-core.c)";
60 EXPORT_SYMBOL_GPL(phy_speed_to_str
);
63 * phy_duplex_to_str - Return string describing the duplex
65 * @duplex: Duplex setting to describe
67 const char *phy_duplex_to_str(unsigned int duplex
)
69 if (duplex
== DUPLEX_HALF
)
71 if (duplex
== DUPLEX_FULL
)
73 if (duplex
== DUPLEX_UNKNOWN
)
75 return "Unsupported (update phy-core.c)";
77 EXPORT_SYMBOL_GPL(phy_duplex_to_str
);
80 * phy_rate_matching_to_str - Return a string describing the rate matching
82 * @rate_matching: Type of rate matching to describe
84 const char *phy_rate_matching_to_str(int rate_matching
)
86 switch (rate_matching
) {
89 case RATE_MATCH_PAUSE
:
93 case RATE_MATCH_OPEN_LOOP
:
96 return "Unsupported (update phy-core.c)";
98 EXPORT_SYMBOL_GPL(phy_rate_matching_to_str
);
101 * phy_interface_num_ports - Return the number of links that can be carried by
102 * a given MAC-PHY physical link. Returns 0 if this is
103 * unknown, the number of links else.
105 * @interface: The interface mode we want to get the number of ports
107 int phy_interface_num_ports(phy_interface_t interface
)
110 case PHY_INTERFACE_MODE_NA
:
112 case PHY_INTERFACE_MODE_INTERNAL
:
113 case PHY_INTERFACE_MODE_MII
:
114 case PHY_INTERFACE_MODE_GMII
:
115 case PHY_INTERFACE_MODE_TBI
:
116 case PHY_INTERFACE_MODE_REVMII
:
117 case PHY_INTERFACE_MODE_RMII
:
118 case PHY_INTERFACE_MODE_REVRMII
:
119 case PHY_INTERFACE_MODE_RGMII
:
120 case PHY_INTERFACE_MODE_RGMII_ID
:
121 case PHY_INTERFACE_MODE_RGMII_RXID
:
122 case PHY_INTERFACE_MODE_RGMII_TXID
:
123 case PHY_INTERFACE_MODE_RTBI
:
124 case PHY_INTERFACE_MODE_XGMII
:
125 case PHY_INTERFACE_MODE_XLGMII
:
126 case PHY_INTERFACE_MODE_MOCA
:
127 case PHY_INTERFACE_MODE_TRGMII
:
128 case PHY_INTERFACE_MODE_USXGMII
:
129 case PHY_INTERFACE_MODE_SGMII
:
130 case PHY_INTERFACE_MODE_SMII
:
131 case PHY_INTERFACE_MODE_1000BASEX
:
132 case PHY_INTERFACE_MODE_2500BASEX
:
133 case PHY_INTERFACE_MODE_5GBASER
:
134 case PHY_INTERFACE_MODE_10GBASER
:
135 case PHY_INTERFACE_MODE_25GBASER
:
136 case PHY_INTERFACE_MODE_10GKR
:
137 case PHY_INTERFACE_MODE_100BASEX
:
138 case PHY_INTERFACE_MODE_RXAUI
:
139 case PHY_INTERFACE_MODE_XAUI
:
140 case PHY_INTERFACE_MODE_1000BASEKX
:
142 case PHY_INTERFACE_MODE_QSGMII
:
143 case PHY_INTERFACE_MODE_QUSGMII
:
144 case PHY_INTERFACE_MODE_10G_QXGMII
:
146 case PHY_INTERFACE_MODE_PSGMII
:
148 case PHY_INTERFACE_MODE_MAX
:
149 WARN_ONCE(1, "PHY_INTERFACE_MODE_MAX isn't a valid interface mode");
154 EXPORT_SYMBOL_GPL(phy_interface_num_ports
);
156 /* A mapping of all SUPPORTED settings to speed/duplex. This table
157 * must be grouped by speed and sorted in descending match priority
158 * - iow, descending speed.
161 #define PHY_SETTING(s, d, b) { .speed = SPEED_ ## s, .duplex = DUPLEX_ ## d, \
162 .bit = ETHTOOL_LINK_MODE_ ## b ## _BIT}
164 static const struct phy_setting settings
[] = {
166 PHY_SETTING( 800000, FULL
, 800000baseCR8_Full
),
167 PHY_SETTING( 800000, FULL
, 800000baseKR8_Full
),
168 PHY_SETTING( 800000, FULL
, 800000baseDR8_Full
),
169 PHY_SETTING( 800000, FULL
, 800000baseDR8_2_Full
),
170 PHY_SETTING( 800000, FULL
, 800000baseSR8_Full
),
171 PHY_SETTING( 800000, FULL
, 800000baseVR8_Full
),
173 PHY_SETTING( 400000, FULL
, 400000baseCR8_Full
),
174 PHY_SETTING( 400000, FULL
, 400000baseKR8_Full
),
175 PHY_SETTING( 400000, FULL
, 400000baseLR8_ER8_FR8_Full
),
176 PHY_SETTING( 400000, FULL
, 400000baseDR8_Full
),
177 PHY_SETTING( 400000, FULL
, 400000baseSR8_Full
),
178 PHY_SETTING( 400000, FULL
, 400000baseCR4_Full
),
179 PHY_SETTING( 400000, FULL
, 400000baseKR4_Full
),
180 PHY_SETTING( 400000, FULL
, 400000baseLR4_ER4_FR4_Full
),
181 PHY_SETTING( 400000, FULL
, 400000baseDR4_Full
),
182 PHY_SETTING( 400000, FULL
, 400000baseSR4_Full
),
184 PHY_SETTING( 200000, FULL
, 200000baseCR4_Full
),
185 PHY_SETTING( 200000, FULL
, 200000baseKR4_Full
),
186 PHY_SETTING( 200000, FULL
, 200000baseLR4_ER4_FR4_Full
),
187 PHY_SETTING( 200000, FULL
, 200000baseDR4_Full
),
188 PHY_SETTING( 200000, FULL
, 200000baseSR4_Full
),
189 PHY_SETTING( 200000, FULL
, 200000baseCR2_Full
),
190 PHY_SETTING( 200000, FULL
, 200000baseKR2_Full
),
191 PHY_SETTING( 200000, FULL
, 200000baseLR2_ER2_FR2_Full
),
192 PHY_SETTING( 200000, FULL
, 200000baseDR2_Full
),
193 PHY_SETTING( 200000, FULL
, 200000baseSR2_Full
),
195 PHY_SETTING( 100000, FULL
, 100000baseCR4_Full
),
196 PHY_SETTING( 100000, FULL
, 100000baseKR4_Full
),
197 PHY_SETTING( 100000, FULL
, 100000baseLR4_ER4_Full
),
198 PHY_SETTING( 100000, FULL
, 100000baseSR4_Full
),
199 PHY_SETTING( 100000, FULL
, 100000baseCR2_Full
),
200 PHY_SETTING( 100000, FULL
, 100000baseKR2_Full
),
201 PHY_SETTING( 100000, FULL
, 100000baseLR2_ER2_FR2_Full
),
202 PHY_SETTING( 100000, FULL
, 100000baseDR2_Full
),
203 PHY_SETTING( 100000, FULL
, 100000baseSR2_Full
),
204 PHY_SETTING( 100000, FULL
, 100000baseCR_Full
),
205 PHY_SETTING( 100000, FULL
, 100000baseKR_Full
),
206 PHY_SETTING( 100000, FULL
, 100000baseLR_ER_FR_Full
),
207 PHY_SETTING( 100000, FULL
, 100000baseDR_Full
),
208 PHY_SETTING( 100000, FULL
, 100000baseSR_Full
),
210 PHY_SETTING( 56000, FULL
, 56000baseCR4_Full
),
211 PHY_SETTING( 56000, FULL
, 56000baseKR4_Full
),
212 PHY_SETTING( 56000, FULL
, 56000baseLR4_Full
),
213 PHY_SETTING( 56000, FULL
, 56000baseSR4_Full
),
215 PHY_SETTING( 50000, FULL
, 50000baseCR2_Full
),
216 PHY_SETTING( 50000, FULL
, 50000baseKR2_Full
),
217 PHY_SETTING( 50000, FULL
, 50000baseSR2_Full
),
218 PHY_SETTING( 50000, FULL
, 50000baseCR_Full
),
219 PHY_SETTING( 50000, FULL
, 50000baseKR_Full
),
220 PHY_SETTING( 50000, FULL
, 50000baseLR_ER_FR_Full
),
221 PHY_SETTING( 50000, FULL
, 50000baseDR_Full
),
222 PHY_SETTING( 50000, FULL
, 50000baseSR_Full
),
224 PHY_SETTING( 40000, FULL
, 40000baseCR4_Full
),
225 PHY_SETTING( 40000, FULL
, 40000baseKR4_Full
),
226 PHY_SETTING( 40000, FULL
, 40000baseLR4_Full
),
227 PHY_SETTING( 40000, FULL
, 40000baseSR4_Full
),
229 PHY_SETTING( 25000, FULL
, 25000baseCR_Full
),
230 PHY_SETTING( 25000, FULL
, 25000baseKR_Full
),
231 PHY_SETTING( 25000, FULL
, 25000baseSR_Full
),
233 PHY_SETTING( 20000, FULL
, 20000baseKR2_Full
),
234 PHY_SETTING( 20000, FULL
, 20000baseMLD2_Full
),
236 PHY_SETTING( 10000, FULL
, 10000baseCR_Full
),
237 PHY_SETTING( 10000, FULL
, 10000baseER_Full
),
238 PHY_SETTING( 10000, FULL
, 10000baseKR_Full
),
239 PHY_SETTING( 10000, FULL
, 10000baseKX4_Full
),
240 PHY_SETTING( 10000, FULL
, 10000baseLR_Full
),
241 PHY_SETTING( 10000, FULL
, 10000baseLRM_Full
),
242 PHY_SETTING( 10000, FULL
, 10000baseR_FEC
),
243 PHY_SETTING( 10000, FULL
, 10000baseSR_Full
),
244 PHY_SETTING( 10000, FULL
, 10000baseT_Full
),
246 PHY_SETTING( 5000, FULL
, 5000baseT_Full
),
248 PHY_SETTING( 2500, FULL
, 2500baseT_Full
),
249 PHY_SETTING( 2500, FULL
, 2500baseX_Full
),
251 PHY_SETTING( 1000, FULL
, 1000baseT_Full
),
252 PHY_SETTING( 1000, HALF
, 1000baseT_Half
),
253 PHY_SETTING( 1000, FULL
, 1000baseT1_Full
),
254 PHY_SETTING( 1000, FULL
, 1000baseX_Full
),
255 PHY_SETTING( 1000, FULL
, 1000baseKX_Full
),
257 PHY_SETTING( 100, FULL
, 100baseT_Full
),
258 PHY_SETTING( 100, FULL
, 100baseT1_Full
),
259 PHY_SETTING( 100, HALF
, 100baseT_Half
),
260 PHY_SETTING( 100, HALF
, 100baseFX_Half
),
261 PHY_SETTING( 100, FULL
, 100baseFX_Full
),
263 PHY_SETTING( 10, FULL
, 10baseT_Full
),
264 PHY_SETTING( 10, HALF
, 10baseT_Half
),
265 PHY_SETTING( 10, FULL
, 10baseT1L_Full
),
266 PHY_SETTING( 10, FULL
, 10baseT1S_Full
),
267 PHY_SETTING( 10, HALF
, 10baseT1S_Half
),
268 PHY_SETTING( 10, HALF
, 10baseT1S_P2MP_Half
),
269 PHY_SETTING( 10, FULL
, 10baseT1BRR_Full
),
274 * phy_lookup_setting - lookup a PHY setting
275 * @speed: speed to match
276 * @duplex: duplex to match
277 * @mask: allowed link modes
278 * @exact: an exact match is required
280 * Search the settings array for a setting that matches the speed and
281 * duplex, and which is supported.
283 * If @exact is unset, either an exact match or %NULL for no match will
286 * If @exact is set, an exact match, the fastest supported setting at
287 * or below the specified speed, the slowest supported setting, or if
288 * they all fail, %NULL will be returned.
290 const struct phy_setting
*
291 phy_lookup_setting(int speed
, int duplex
, const unsigned long *mask
, bool exact
)
293 const struct phy_setting
*p
, *match
= NULL
, *last
= NULL
;
296 for (i
= 0, p
= settings
; i
< ARRAY_SIZE(settings
); i
++, p
++) {
297 if (p
->bit
< __ETHTOOL_LINK_MODE_MASK_NBITS
&&
298 test_bit(p
->bit
, mask
)) {
300 if (p
->speed
== speed
&& p
->duplex
== duplex
) {
301 /* Exact match for speed and duplex */
305 if (!match
&& p
->speed
<= speed
)
309 if (p
->speed
< speed
)
315 if (!match
&& !exact
)
320 EXPORT_SYMBOL_GPL(phy_lookup_setting
);
322 size_t phy_speeds(unsigned int *speeds
, size_t size
,
328 for (i
= 0, count
= 0; i
< ARRAY_SIZE(settings
) && count
< size
; i
++)
329 if (settings
[i
].bit
< __ETHTOOL_LINK_MODE_MASK_NBITS
&&
330 test_bit(settings
[i
].bit
, mask
) &&
331 (count
== 0 || speeds
[count
- 1] != settings
[i
].speed
))
332 speeds
[count
++] = settings
[i
].speed
;
337 static void __set_linkmode_max_speed(u32 max_speed
, unsigned long *addr
)
339 const struct phy_setting
*p
;
342 for (i
= 0, p
= settings
; i
< ARRAY_SIZE(settings
); i
++, p
++) {
343 if (p
->speed
> max_speed
)
344 linkmode_clear_bit(p
->bit
, addr
);
350 static void __set_phy_supported(struct phy_device
*phydev
, u32 max_speed
)
352 __set_linkmode_max_speed(max_speed
, phydev
->supported
);
356 * phy_set_max_speed - Set the maximum speed the PHY should support
358 * @phydev: The phy_device struct
359 * @max_speed: Maximum speed
361 * The PHY might be more capable than the MAC. For example a Fast Ethernet
362 * is connected to a 1G PHY. This function allows the MAC to indicate its
363 * maximum speed, and so limit what the PHY will advertise.
365 void phy_set_max_speed(struct phy_device
*phydev
, u32 max_speed
)
367 __set_phy_supported(phydev
, max_speed
);
369 phy_advertise_supported(phydev
);
371 EXPORT_SYMBOL(phy_set_max_speed
);
373 void of_set_phy_supported(struct phy_device
*phydev
)
375 struct device_node
*node
= phydev
->mdio
.dev
.of_node
;
378 if (!IS_ENABLED(CONFIG_OF_MDIO
))
384 if (!of_property_read_u32(node
, "max-speed", &max_speed
))
385 __set_phy_supported(phydev
, max_speed
);
388 void of_set_phy_eee_broken(struct phy_device
*phydev
)
390 struct device_node
*node
= phydev
->mdio
.dev
.of_node
;
393 if (!IS_ENABLED(CONFIG_OF_MDIO
))
399 if (of_property_read_bool(node
, "eee-broken-100tx"))
400 broken
|= MDIO_EEE_100TX
;
401 if (of_property_read_bool(node
, "eee-broken-1000t"))
402 broken
|= MDIO_EEE_1000T
;
403 if (of_property_read_bool(node
, "eee-broken-10gt"))
404 broken
|= MDIO_EEE_10GT
;
405 if (of_property_read_bool(node
, "eee-broken-1000kx"))
406 broken
|= MDIO_EEE_1000KX
;
407 if (of_property_read_bool(node
, "eee-broken-10gkx4"))
408 broken
|= MDIO_EEE_10GKX4
;
409 if (of_property_read_bool(node
, "eee-broken-10gkr"))
410 broken
|= MDIO_EEE_10GKR
;
412 phydev
->eee_broken_modes
= broken
;
416 * phy_resolve_aneg_pause - Determine pause autoneg results
418 * @phydev: The phy_device struct
420 * Once autoneg has completed the local pause settings can be
421 * resolved. Determine if pause and asymmetric pause should be used
425 void phy_resolve_aneg_pause(struct phy_device
*phydev
)
427 if (phydev
->duplex
== DUPLEX_FULL
) {
428 phydev
->pause
= linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT
,
429 phydev
->lp_advertising
);
430 phydev
->asym_pause
= linkmode_test_bit(
431 ETHTOOL_LINK_MODE_Asym_Pause_BIT
,
432 phydev
->lp_advertising
);
435 EXPORT_SYMBOL_GPL(phy_resolve_aneg_pause
);
438 * phy_resolve_aneg_linkmode - resolve the advertisements into PHY settings
439 * @phydev: The phy_device struct
441 * Resolve our and the link partner advertisements into their corresponding
442 * speed and duplex. If full duplex was negotiated, extract the pause mode
443 * from the link partner mask.
445 void phy_resolve_aneg_linkmode(struct phy_device
*phydev
)
447 __ETHTOOL_DECLARE_LINK_MODE_MASK(common
);
450 linkmode_and(common
, phydev
->lp_advertising
, phydev
->advertising
);
452 for (i
= 0; i
< ARRAY_SIZE(settings
); i
++)
453 if (test_bit(settings
[i
].bit
, common
)) {
454 phydev
->speed
= settings
[i
].speed
;
455 phydev
->duplex
= settings
[i
].duplex
;
459 phy_resolve_aneg_pause(phydev
);
461 EXPORT_SYMBOL_GPL(phy_resolve_aneg_linkmode
);
464 * phy_check_downshift - check whether downshift occurred
465 * @phydev: The phy_device struct
467 * Check whether a downshift to a lower speed occurred. If this should be the
468 * case warn the user.
469 * Prerequisite for detecting downshift is that PHY driver implements the
470 * read_status callback and sets phydev->speed to the actual link speed.
472 void phy_check_downshift(struct phy_device
*phydev
)
474 __ETHTOOL_DECLARE_LINK_MODE_MASK(common
);
475 int i
, speed
= SPEED_UNKNOWN
;
477 phydev
->downshifted_rate
= 0;
479 if (phydev
->autoneg
== AUTONEG_DISABLE
||
480 phydev
->speed
== SPEED_UNKNOWN
)
483 linkmode_and(common
, phydev
->lp_advertising
, phydev
->advertising
);
485 for (i
= 0; i
< ARRAY_SIZE(settings
); i
++)
486 if (test_bit(settings
[i
].bit
, common
)) {
487 speed
= settings
[i
].speed
;
491 if (speed
== SPEED_UNKNOWN
|| phydev
->speed
>= speed
)
494 phydev_warn(phydev
, "Downshift occurred from negotiated speed %s to actual speed %s, check cabling!\n",
495 phy_speed_to_str(speed
), phy_speed_to_str(phydev
->speed
));
497 phydev
->downshifted_rate
= 1;
499 EXPORT_SYMBOL_GPL(phy_check_downshift
);
501 static int phy_resolve_min_speed(struct phy_device
*phydev
, bool fdx_only
)
503 __ETHTOOL_DECLARE_LINK_MODE_MASK(common
);
504 int i
= ARRAY_SIZE(settings
);
506 linkmode_and(common
, phydev
->lp_advertising
, phydev
->advertising
);
509 if (test_bit(settings
[i
].bit
, common
)) {
510 if (fdx_only
&& settings
[i
].duplex
!= DUPLEX_FULL
)
512 return settings
[i
].speed
;
516 return SPEED_UNKNOWN
;
519 int phy_speed_down_core(struct phy_device
*phydev
)
521 int min_common_speed
= phy_resolve_min_speed(phydev
, true);
523 if (min_common_speed
== SPEED_UNKNOWN
)
526 __set_linkmode_max_speed(min_common_speed
, phydev
->advertising
);
531 static void mmd_phy_indirect(struct mii_bus
*bus
, int phy_addr
, int devad
,
534 /* Write the desired MMD Devad */
535 __mdiobus_write(bus
, phy_addr
, MII_MMD_CTRL
, devad
);
537 /* Write the desired MMD register address */
538 __mdiobus_write(bus
, phy_addr
, MII_MMD_DATA
, regnum
);
540 /* Select the Function : DATA with no post increment */
541 __mdiobus_write(bus
, phy_addr
, MII_MMD_CTRL
,
542 devad
| MII_MMD_CTRL_NOINCR
);
545 static int mmd_phy_read(struct mii_bus
*bus
, int phy_addr
, bool is_c45
,
546 int devad
, u32 regnum
)
549 return __mdiobus_c45_read(bus
, phy_addr
, devad
, regnum
);
551 mmd_phy_indirect(bus
, phy_addr
, devad
, regnum
);
552 /* Read the content of the MMD's selected register */
553 return __mdiobus_read(bus
, phy_addr
, MII_MMD_DATA
);
556 static int mmd_phy_write(struct mii_bus
*bus
, int phy_addr
, bool is_c45
,
557 int devad
, u32 regnum
, u16 val
)
560 return __mdiobus_c45_write(bus
, phy_addr
, devad
, regnum
, val
);
562 mmd_phy_indirect(bus
, phy_addr
, devad
, regnum
);
563 /* Write the data into MMD's selected register */
564 return __mdiobus_write(bus
, phy_addr
, MII_MMD_DATA
, val
);
568 * __phy_read_mmd - Convenience function for reading a register
569 * from an MMD on a given PHY.
570 * @phydev: The phy_device struct
571 * @devad: The MMD to read from (0..31)
572 * @regnum: The register on the MMD to read (0..65535)
574 * Same rules as for __phy_read();
576 int __phy_read_mmd(struct phy_device
*phydev
, int devad
, u32 regnum
)
578 if (regnum
> (u16
)~0 || devad
> 32)
581 if (phydev
->drv
&& phydev
->drv
->read_mmd
)
582 return phydev
->drv
->read_mmd(phydev
, devad
, regnum
);
584 return mmd_phy_read(phydev
->mdio
.bus
, phydev
->mdio
.addr
,
585 phydev
->is_c45
, devad
, regnum
);
587 EXPORT_SYMBOL(__phy_read_mmd
);
590 * phy_read_mmd - Convenience function for reading a register
591 * from an MMD on a given PHY.
592 * @phydev: The phy_device struct
593 * @devad: The MMD to read from
594 * @regnum: The register on the MMD to read
596 * Same rules as for phy_read();
598 int phy_read_mmd(struct phy_device
*phydev
, int devad
, u32 regnum
)
602 phy_lock_mdio_bus(phydev
);
603 ret
= __phy_read_mmd(phydev
, devad
, regnum
);
604 phy_unlock_mdio_bus(phydev
);
608 EXPORT_SYMBOL(phy_read_mmd
);
611 * __phy_write_mmd - Convenience function for writing a register
612 * on an MMD on a given PHY.
613 * @phydev: The phy_device struct
614 * @devad: The MMD to read from
615 * @regnum: The register on the MMD to read
616 * @val: value to write to @regnum
618 * Same rules as for __phy_write();
620 int __phy_write_mmd(struct phy_device
*phydev
, int devad
, u32 regnum
, u16 val
)
622 if (regnum
> (u16
)~0 || devad
> 32)
625 if (phydev
->drv
&& phydev
->drv
->write_mmd
)
626 return phydev
->drv
->write_mmd(phydev
, devad
, regnum
, val
);
628 return mmd_phy_write(phydev
->mdio
.bus
, phydev
->mdio
.addr
,
629 phydev
->is_c45
, devad
, regnum
, val
);
631 EXPORT_SYMBOL(__phy_write_mmd
);
634 * phy_write_mmd - Convenience function for writing a register
635 * on an MMD on a given PHY.
636 * @phydev: The phy_device struct
637 * @devad: The MMD to read from
638 * @regnum: The register on the MMD to read
639 * @val: value to write to @regnum
641 * Same rules as for phy_write();
643 int phy_write_mmd(struct phy_device
*phydev
, int devad
, u32 regnum
, u16 val
)
647 phy_lock_mdio_bus(phydev
);
648 ret
= __phy_write_mmd(phydev
, devad
, regnum
, val
);
649 phy_unlock_mdio_bus(phydev
);
653 EXPORT_SYMBOL(phy_write_mmd
);
656 * __phy_package_read_mmd - read MMD reg relative to PHY package base addr
657 * @phydev: The phy_device struct
658 * @addr_offset: The offset to be added to PHY package base_addr
659 * @devad: The MMD to read from
660 * @regnum: The register on the MMD to read
662 * Convenience helper for reading a register of an MMD on a given PHY
663 * using the PHY package base address. The base address is added to
664 * the addr_offset value.
666 * Same calling rules as for __phy_read();
668 * NOTE: It's assumed that the entire PHY package is either C22 or C45.
670 int __phy_package_read_mmd(struct phy_device
*phydev
,
671 unsigned int addr_offset
, int devad
,
674 int addr
= phy_package_address(phydev
, addr_offset
);
679 if (regnum
> (u16
)~0 || devad
> 32)
682 return mmd_phy_read(phydev
->mdio
.bus
, addr
, phydev
->is_c45
, devad
,
685 EXPORT_SYMBOL(__phy_package_read_mmd
);
688 * phy_package_read_mmd - read MMD reg relative to PHY package base addr
689 * @phydev: The phy_device struct
690 * @addr_offset: The offset to be added to PHY package base_addr
691 * @devad: The MMD to read from
692 * @regnum: The register on the MMD to read
694 * Convenience helper for reading a register of an MMD on a given PHY
695 * using the PHY package base address. The base address is added to
696 * the addr_offset value.
698 * Same calling rules as for phy_read();
700 * NOTE: It's assumed that the entire PHY package is either C22 or C45.
702 int phy_package_read_mmd(struct phy_device
*phydev
,
703 unsigned int addr_offset
, int devad
,
706 int addr
= phy_package_address(phydev
, addr_offset
);
712 if (regnum
> (u16
)~0 || devad
> 32)
715 phy_lock_mdio_bus(phydev
);
716 val
= mmd_phy_read(phydev
->mdio
.bus
, addr
, phydev
->is_c45
, devad
,
718 phy_unlock_mdio_bus(phydev
);
722 EXPORT_SYMBOL(phy_package_read_mmd
);
725 * __phy_package_write_mmd - write MMD reg relative to PHY package base addr
726 * @phydev: The phy_device struct
727 * @addr_offset: The offset to be added to PHY package base_addr
728 * @devad: The MMD to write to
729 * @regnum: The register on the MMD to write
730 * @val: value to write to @regnum
732 * Convenience helper for writing a register of an MMD on a given PHY
733 * using the PHY package base address. The base address is added to
734 * the addr_offset value.
736 * Same calling rules as for __phy_write();
738 * NOTE: It's assumed that the entire PHY package is either C22 or C45.
740 int __phy_package_write_mmd(struct phy_device
*phydev
,
741 unsigned int addr_offset
, int devad
,
744 int addr
= phy_package_address(phydev
, addr_offset
);
749 if (regnum
> (u16
)~0 || devad
> 32)
752 return mmd_phy_write(phydev
->mdio
.bus
, addr
, phydev
->is_c45
, devad
,
755 EXPORT_SYMBOL(__phy_package_write_mmd
);
758 * phy_package_write_mmd - write MMD reg relative to PHY package base addr
759 * @phydev: The phy_device struct
760 * @addr_offset: The offset to be added to PHY package base_addr
761 * @devad: The MMD to write to
762 * @regnum: The register on the MMD to write
763 * @val: value to write to @regnum
765 * Convenience helper for writing a register of an MMD on a given PHY
766 * using the PHY package base address. The base address is added to
767 * the addr_offset value.
769 * Same calling rules as for phy_write();
771 * NOTE: It's assumed that the entire PHY package is either C22 or C45.
773 int phy_package_write_mmd(struct phy_device
*phydev
,
774 unsigned int addr_offset
, int devad
,
777 int addr
= phy_package_address(phydev
, addr_offset
);
783 if (regnum
> (u16
)~0 || devad
> 32)
786 phy_lock_mdio_bus(phydev
);
787 ret
= mmd_phy_write(phydev
->mdio
.bus
, addr
, phydev
->is_c45
, devad
,
789 phy_unlock_mdio_bus(phydev
);
793 EXPORT_SYMBOL(phy_package_write_mmd
);
796 * phy_modify_changed - Function for modifying a PHY register
797 * @phydev: the phy_device struct
798 * @regnum: register number to modify
799 * @mask: bit mask of bits to clear
800 * @set: new value of bits set in mask to write to @regnum
802 * NOTE: MUST NOT be called from interrupt context,
803 * because the bus read/write functions may wait for an interrupt
804 * to conclude the operation.
806 * Returns negative errno, 0 if there was no change, and 1 in case of change
808 int phy_modify_changed(struct phy_device
*phydev
, u32 regnum
, u16 mask
, u16 set
)
812 phy_lock_mdio_bus(phydev
);
813 ret
= __phy_modify_changed(phydev
, regnum
, mask
, set
);
814 phy_unlock_mdio_bus(phydev
);
818 EXPORT_SYMBOL_GPL(phy_modify_changed
);
821 * __phy_modify - Convenience function for modifying a PHY register
822 * @phydev: the phy_device struct
823 * @regnum: register number to modify
824 * @mask: bit mask of bits to clear
825 * @set: new value of bits set in mask to write to @regnum
827 * NOTE: MUST NOT be called from interrupt context,
828 * because the bus read/write functions may wait for an interrupt
829 * to conclude the operation.
831 int __phy_modify(struct phy_device
*phydev
, u32 regnum
, u16 mask
, u16 set
)
835 ret
= __phy_modify_changed(phydev
, regnum
, mask
, set
);
837 return ret
< 0 ? ret
: 0;
839 EXPORT_SYMBOL_GPL(__phy_modify
);
842 * phy_modify - Convenience function for modifying a given PHY register
843 * @phydev: the phy_device struct
844 * @regnum: register number to write
845 * @mask: bit mask of bits to clear
846 * @set: new value of bits set in mask to write to @regnum
848 * NOTE: MUST NOT be called from interrupt context,
849 * because the bus read/write functions may wait for an interrupt
850 * to conclude the operation.
852 int phy_modify(struct phy_device
*phydev
, u32 regnum
, u16 mask
, u16 set
)
856 phy_lock_mdio_bus(phydev
);
857 ret
= __phy_modify(phydev
, regnum
, mask
, set
);
858 phy_unlock_mdio_bus(phydev
);
862 EXPORT_SYMBOL_GPL(phy_modify
);
865 * __phy_modify_mmd_changed - Function for modifying a register on MMD
866 * @phydev: the phy_device struct
867 * @devad: the MMD containing register to modify
868 * @regnum: register number to modify
869 * @mask: bit mask of bits to clear
870 * @set: new value of bits set in mask to write to @regnum
872 * Unlocked helper function which allows a MMD register to be modified as
873 * new register value = (old register value & ~mask) | set
875 * Returns negative errno, 0 if there was no change, and 1 in case of change
877 int __phy_modify_mmd_changed(struct phy_device
*phydev
, int devad
, u32 regnum
,
882 ret
= __phy_read_mmd(phydev
, devad
, regnum
);
886 new = (ret
& ~mask
) | set
;
890 ret
= __phy_write_mmd(phydev
, devad
, regnum
, new);
892 return ret
< 0 ? ret
: 1;
894 EXPORT_SYMBOL_GPL(__phy_modify_mmd_changed
);
897 * phy_modify_mmd_changed - Function for modifying a register on MMD
898 * @phydev: the phy_device struct
899 * @devad: the MMD containing register to modify
900 * @regnum: register number to modify
901 * @mask: bit mask of bits to clear
902 * @set: new value of bits set in mask to write to @regnum
904 * NOTE: MUST NOT be called from interrupt context,
905 * because the bus read/write functions may wait for an interrupt
906 * to conclude the operation.
908 * Returns negative errno, 0 if there was no change, and 1 in case of change
910 int phy_modify_mmd_changed(struct phy_device
*phydev
, int devad
, u32 regnum
,
915 phy_lock_mdio_bus(phydev
);
916 ret
= __phy_modify_mmd_changed(phydev
, devad
, regnum
, mask
, set
);
917 phy_unlock_mdio_bus(phydev
);
921 EXPORT_SYMBOL_GPL(phy_modify_mmd_changed
);
924 * __phy_modify_mmd - Convenience function for modifying a register on MMD
925 * @phydev: the phy_device struct
926 * @devad: the MMD containing register to modify
927 * @regnum: register number to modify
928 * @mask: bit mask of bits to clear
929 * @set: new value of bits set in mask to write to @regnum
931 * NOTE: MUST NOT be called from interrupt context,
932 * because the bus read/write functions may wait for an interrupt
933 * to conclude the operation.
935 int __phy_modify_mmd(struct phy_device
*phydev
, int devad
, u32 regnum
,
940 ret
= __phy_modify_mmd_changed(phydev
, devad
, regnum
, mask
, set
);
942 return ret
< 0 ? ret
: 0;
944 EXPORT_SYMBOL_GPL(__phy_modify_mmd
);
947 * phy_modify_mmd - Convenience function for modifying a register on MMD
948 * @phydev: the phy_device struct
949 * @devad: the MMD containing register to modify
950 * @regnum: register number to modify
951 * @mask: bit mask of bits to clear
952 * @set: new value of bits set in mask to write to @regnum
954 * NOTE: MUST NOT be called from interrupt context,
955 * because the bus read/write functions may wait for an interrupt
956 * to conclude the operation.
958 int phy_modify_mmd(struct phy_device
*phydev
, int devad
, u32 regnum
,
963 phy_lock_mdio_bus(phydev
);
964 ret
= __phy_modify_mmd(phydev
, devad
, regnum
, mask
, set
);
965 phy_unlock_mdio_bus(phydev
);
969 EXPORT_SYMBOL_GPL(phy_modify_mmd
);
971 static int __phy_read_page(struct phy_device
*phydev
)
973 if (WARN_ONCE(!phydev
->drv
->read_page
, "read_page callback not available, PHY driver not loaded?\n"))
976 return phydev
->drv
->read_page(phydev
);
979 static int __phy_write_page(struct phy_device
*phydev
, int page
)
981 if (WARN_ONCE(!phydev
->drv
->write_page
, "write_page callback not available, PHY driver not loaded?\n"))
984 return phydev
->drv
->write_page(phydev
, page
);
988 * phy_save_page() - take the bus lock and save the current page
989 * @phydev: a pointer to a &struct phy_device
991 * Take the MDIO bus lock, and return the current page number. On error,
992 * returns a negative errno. phy_restore_page() must always be called
993 * after this, irrespective of success or failure of this call.
995 int phy_save_page(struct phy_device
*phydev
)
997 phy_lock_mdio_bus(phydev
);
998 return __phy_read_page(phydev
);
1000 EXPORT_SYMBOL_GPL(phy_save_page
);
1003 * phy_select_page() - take the bus lock, save the current page, and set a page
1004 * @phydev: a pointer to a &struct phy_device
1005 * @page: desired page
1007 * Take the MDIO bus lock to protect against concurrent access, save the
1008 * current PHY page, and set the current page. On error, returns a
1009 * negative errno, otherwise returns the previous page number.
1010 * phy_restore_page() must always be called after this, irrespective
1011 * of success or failure of this call.
1013 int phy_select_page(struct phy_device
*phydev
, int page
)
1017 oldpage
= ret
= phy_save_page(phydev
);
1021 if (oldpage
!= page
) {
1022 ret
= __phy_write_page(phydev
, page
);
1029 EXPORT_SYMBOL_GPL(phy_select_page
);
1032 * phy_restore_page() - restore the page register and release the bus lock
1033 * @phydev: a pointer to a &struct phy_device
1034 * @oldpage: the old page, return value from phy_save_page() or phy_select_page()
1035 * @ret: operation's return code
1037 * Release the MDIO bus lock, restoring @oldpage if it is a valid page.
1038 * This function propagates the earliest error code from the group of
1042 * @oldpage if it was a negative value, otherwise
1043 * @ret if it was a negative errno value, otherwise
1044 * phy_write_page()'s negative value if it were in error, otherwise
1047 int phy_restore_page(struct phy_device
*phydev
, int oldpage
, int ret
)
1052 r
= __phy_write_page(phydev
, oldpage
);
1054 /* Propagate the operation return code if the page write
1057 if (ret
>= 0 && r
< 0)
1060 /* Propagate the phy page selection error code */
1064 phy_unlock_mdio_bus(phydev
);
1068 EXPORT_SYMBOL_GPL(phy_restore_page
);
1071 * phy_read_paged() - Convenience function for reading a paged register
1072 * @phydev: a pointer to a &struct phy_device
1073 * @page: the page for the phy
1074 * @regnum: register number
1076 * Same rules as for phy_read().
1078 int phy_read_paged(struct phy_device
*phydev
, int page
, u32 regnum
)
1080 int ret
= 0, oldpage
;
1082 oldpage
= phy_select_page(phydev
, page
);
1084 ret
= __phy_read(phydev
, regnum
);
1086 return phy_restore_page(phydev
, oldpage
, ret
);
1088 EXPORT_SYMBOL(phy_read_paged
);
1091 * phy_write_paged() - Convenience function for writing a paged register
1092 * @phydev: a pointer to a &struct phy_device
1093 * @page: the page for the phy
1094 * @regnum: register number
1095 * @val: value to write
1097 * Same rules as for phy_write().
1099 int phy_write_paged(struct phy_device
*phydev
, int page
, u32 regnum
, u16 val
)
1101 int ret
= 0, oldpage
;
1103 oldpage
= phy_select_page(phydev
, page
);
1105 ret
= __phy_write(phydev
, regnum
, val
);
1107 return phy_restore_page(phydev
, oldpage
, ret
);
1109 EXPORT_SYMBOL(phy_write_paged
);
1112 * phy_modify_paged_changed() - Function for modifying a paged register
1113 * @phydev: a pointer to a &struct phy_device
1114 * @page: the page for the phy
1115 * @regnum: register number
1116 * @mask: bit mask of bits to clear
1117 * @set: bit mask of bits to set
1119 * Returns negative errno, 0 if there was no change, and 1 in case of change
1121 int phy_modify_paged_changed(struct phy_device
*phydev
, int page
, u32 regnum
,
1124 int ret
= 0, oldpage
;
1126 oldpage
= phy_select_page(phydev
, page
);
1128 ret
= __phy_modify_changed(phydev
, regnum
, mask
, set
);
1130 return phy_restore_page(phydev
, oldpage
, ret
);
1132 EXPORT_SYMBOL(phy_modify_paged_changed
);
1135 * phy_modify_paged() - Convenience function for modifying a paged register
1136 * @phydev: a pointer to a &struct phy_device
1137 * @page: the page for the phy
1138 * @regnum: register number
1139 * @mask: bit mask of bits to clear
1140 * @set: bit mask of bits to set
1142 * Same rules as for phy_read() and phy_write().
1144 int phy_modify_paged(struct phy_device
*phydev
, int page
, u32 regnum
,
1147 int ret
= phy_modify_paged_changed(phydev
, page
, regnum
, mask
, set
);
1149 return ret
< 0 ? ret
: 0;
1151 EXPORT_SYMBOL(phy_modify_paged
);