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net: systemport: Utilize bcm_sysport_set_features() during resume/open
[linux-stable.git] / drivers / net / ethernet / broadcom / bcmsysport.c
blob3b4cb906a275d256f8e865cace00e4cc4fb1a233
1 /*
2 * Broadcom BCM7xxx System Port Ethernet MAC driver
3 *
4 * Copyright (C) 2014 Broadcom Corporation
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
12
13 #include <linux/init.h>
14 #include <linux/interrupt.h>
15 #include <linux/module.h>
16 #include <linux/kernel.h>
17 #include <linux/netdevice.h>
18 #include <linux/etherdevice.h>
19 #include <linux/platform_device.h>
20 #include <linux/of.h>
21 #include <linux/of_net.h>
22 #include <linux/of_mdio.h>
23 #include <linux/phy.h>
24 #include <linux/phy_fixed.h>
25 #include <net/dsa.h>
26 #include <net/ip.h>
27 #include <net/ipv6.h>
28
29 #include "bcmsysport.h"
30
31 /* I/O accessors register helpers */
32 #define BCM_SYSPORT_IO_MACRO(name, offset) \
33 static inline u32 name##_readl(struct bcm_sysport_priv *priv, u32 off) \
34 { \
35 u32 reg = readl_relaxed(priv->base + offset + off); \
36 return reg; \
37 } \
38 static inline void name##_writel(struct bcm_sysport_priv *priv, \
39 u32 val, u32 off) \
40 { \
41 writel_relaxed(val, priv->base + offset + off); \
42 } \
43
44 BCM_SYSPORT_IO_MACRO(intrl2_0, SYS_PORT_INTRL2_0_OFFSET);
45 BCM_SYSPORT_IO_MACRO(intrl2_1, SYS_PORT_INTRL2_1_OFFSET);
46 BCM_SYSPORT_IO_MACRO(umac, SYS_PORT_UMAC_OFFSET);
47 BCM_SYSPORT_IO_MACRO(gib, SYS_PORT_GIB_OFFSET);
48 BCM_SYSPORT_IO_MACRO(tdma, SYS_PORT_TDMA_OFFSET);
49 BCM_SYSPORT_IO_MACRO(rxchk, SYS_PORT_RXCHK_OFFSET);
50 BCM_SYSPORT_IO_MACRO(txchk, SYS_PORT_TXCHK_OFFSET);
51 BCM_SYSPORT_IO_MACRO(rbuf, SYS_PORT_RBUF_OFFSET);
52 BCM_SYSPORT_IO_MACRO(tbuf, SYS_PORT_TBUF_OFFSET);
53 BCM_SYSPORT_IO_MACRO(topctrl, SYS_PORT_TOPCTRL_OFFSET);
54
55 /* On SYSTEMPORT Lite, any register after RDMA_STATUS has the exact
56 * same layout, except it has been moved by 4 bytes up, *sigh*
57 */
58 static inline u32 rdma_readl(struct bcm_sysport_priv *priv, u32 off)
59 {
60 if (priv->is_lite && off >= RDMA_STATUS)
61 off += 4;
62 return readl_relaxed(priv->base + SYS_PORT_RDMA_OFFSET + off);
63 }
64
65 static inline void rdma_writel(struct bcm_sysport_priv *priv, u32 val, u32 off)
66 {
67 if (priv->is_lite && off >= RDMA_STATUS)
68 off += 4;
69 writel_relaxed(val, priv->base + SYS_PORT_RDMA_OFFSET + off);
70 }
71
72 static inline u32 tdma_control_bit(struct bcm_sysport_priv *priv, u32 bit)
73 {
74 if (!priv->is_lite) {
75 return BIT(bit);
76 } else {
77 if (bit >= ACB_ALGO)
78 return BIT(bit + 1);
79 else
80 return BIT(bit);
81 }
82 }
83
84 /* L2-interrupt masking/unmasking helpers, does automatic saving of the applied
85 * mask in a software copy to avoid CPU_MASK_STATUS reads in hot-paths.
86 */
87 #define BCM_SYSPORT_INTR_L2(which) \
88 static inline void intrl2_##which##_mask_clear(struct bcm_sysport_priv *priv, \
89 u32 mask) \
90 { \
91 priv->irq##which##_mask &= ~(mask); \
92 intrl2_##which##_writel(priv, mask, INTRL2_CPU_MASK_CLEAR); \
93 } \
94 static inline void intrl2_##which##_mask_set(struct bcm_sysport_priv *priv, \
95 u32 mask) \
96 { \
97 intrl2_## which##_writel(priv, mask, INTRL2_CPU_MASK_SET); \
98 priv->irq##which##_mask |= (mask); \
99 } \
100
101 BCM_SYSPORT_INTR_L2(0)
102 BCM_SYSPORT_INTR_L2(1)
103
104 /* Register accesses to GISB/RBUS registers are expensive (few hundred
105 * nanoseconds), so keep the check for 64-bits explicit here to save
106 * one register write per-packet on 32-bits platforms.
107 */
108 static inline void dma_desc_set_addr(struct bcm_sysport_priv *priv,
109 void __iomem *d,
110 dma_addr_t addr)
111 {
112 #ifdef CONFIG_PHYS_ADDR_T_64BIT
113 writel_relaxed(upper_32_bits(addr) & DESC_ADDR_HI_MASK,
114 d + DESC_ADDR_HI_STATUS_LEN);
115 #endif
116 writel_relaxed(lower_32_bits(addr), d + DESC_ADDR_LO);
117 }
118
119 static inline void tdma_port_write_desc_addr(struct bcm_sysport_priv *priv,
120 struct dma_desc *desc,
121 unsigned int port)
122 {
123 /* Ports are latched, so write upper address first */
124 tdma_writel(priv, desc->addr_status_len, TDMA_WRITE_PORT_HI(port));
125 tdma_writel(priv, desc->addr_lo, TDMA_WRITE_PORT_LO(port));
126 }
127
128 /* Ethtool operations */
129 static void bcm_sysport_set_rx_csum(struct net_device *dev,
130 netdev_features_t wanted)
131 {
132 struct bcm_sysport_priv *priv = netdev_priv(dev);
133 u32 reg;
134
135 priv->rx_chk_en = !!(wanted & NETIF_F_RXCSUM);
136 reg = rxchk_readl(priv, RXCHK_CONTROL);
137 if (priv->rx_chk_en)
138 reg |= RXCHK_EN;
139 else
140 reg &= ~RXCHK_EN;
141
142 /* If UniMAC forwards CRC, we need to skip over it to get
143 * a valid CHK bit to be set in the per-packet status word
144 */
145 if (priv->rx_chk_en && priv->crc_fwd)
146 reg |= RXCHK_SKIP_FCS;
147 else
148 reg &= ~RXCHK_SKIP_FCS;
149
150 /* If Broadcom tags are enabled (e.g: using a switch), make
151 * sure we tell the RXCHK hardware to expect a 4-bytes Broadcom
152 * tag after the Ethernet MAC Source Address.
153 */
154 if (netdev_uses_dsa(dev))
155 reg |= RXCHK_BRCM_TAG_EN;
156 else
157 reg &= ~RXCHK_BRCM_TAG_EN;
158
159 rxchk_writel(priv, reg, RXCHK_CONTROL);
160 }
161
162 static void bcm_sysport_set_tx_csum(struct net_device *dev,
163 netdev_features_t wanted)
164 {
165 struct bcm_sysport_priv *priv = netdev_priv(dev);
166 u32 reg;
167
168 /* Hardware transmit checksum requires us to enable the Transmit status
169 * block prepended to the packet contents
170 */
171 priv->tsb_en = !!(wanted & (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM));
172 reg = tdma_readl(priv, TDMA_CONTROL);
173 if (priv->tsb_en)
174 reg |= tdma_control_bit(priv, TSB_EN);
175 else
176 reg &= ~tdma_control_bit(priv, TSB_EN);
177 tdma_writel(priv, reg, TDMA_CONTROL);
178 }
179
180 static int bcm_sysport_set_features(struct net_device *dev,
181 netdev_features_t features)
182 {
183 struct bcm_sysport_priv *priv = netdev_priv(dev);
184
185 /* Read CRC forward */
186 if (!priv->is_lite)
187 priv->crc_fwd = !!(umac_readl(priv, UMAC_CMD) & CMD_CRC_FWD);
188 else
189 priv->crc_fwd = !((gib_readl(priv, GIB_CONTROL) &
190 GIB_FCS_STRIP) >> GIB_FCS_STRIP_SHIFT);
191
192 bcm_sysport_set_rx_csum(dev, features);
193 bcm_sysport_set_tx_csum(dev, features);
194
195 return 0;
196 }
197
198 /* Hardware counters must be kept in sync because the order/offset
199 * is important here (order in structure declaration = order in hardware)
200 */
201 static const struct bcm_sysport_stats bcm_sysport_gstrings_stats[] = {
202 /* general stats */
203 STAT_NETDEV64(rx_packets),
204 STAT_NETDEV64(tx_packets),
205 STAT_NETDEV64(rx_bytes),
206 STAT_NETDEV64(tx_bytes),
207 STAT_NETDEV(rx_errors),
208 STAT_NETDEV(tx_errors),
209 STAT_NETDEV(rx_dropped),
210 STAT_NETDEV(tx_dropped),
211 STAT_NETDEV(multicast),
212 /* UniMAC RSV counters */
213 STAT_MIB_RX("rx_64_octets", mib.rx.pkt_cnt.cnt_64),
214 STAT_MIB_RX("rx_65_127_oct", mib.rx.pkt_cnt.cnt_127),
215 STAT_MIB_RX("rx_128_255_oct", mib.rx.pkt_cnt.cnt_255),
216 STAT_MIB_RX("rx_256_511_oct", mib.rx.pkt_cnt.cnt_511),
217 STAT_MIB_RX("rx_512_1023_oct", mib.rx.pkt_cnt.cnt_1023),
218 STAT_MIB_RX("rx_1024_1518_oct", mib.rx.pkt_cnt.cnt_1518),
219 STAT_MIB_RX("rx_vlan_1519_1522_oct", mib.rx.pkt_cnt.cnt_mgv),
220 STAT_MIB_RX("rx_1522_2047_oct", mib.rx.pkt_cnt.cnt_2047),
221 STAT_MIB_RX("rx_2048_4095_oct", mib.rx.pkt_cnt.cnt_4095),
222 STAT_MIB_RX("rx_4096_9216_oct", mib.rx.pkt_cnt.cnt_9216),
223 STAT_MIB_RX("rx_pkts", mib.rx.pkt),
224 STAT_MIB_RX("rx_bytes", mib.rx.bytes),
225 STAT_MIB_RX("rx_multicast", mib.rx.mca),
226 STAT_MIB_RX("rx_broadcast", mib.rx.bca),
227 STAT_MIB_RX("rx_fcs", mib.rx.fcs),
228 STAT_MIB_RX("rx_control", mib.rx.cf),
229 STAT_MIB_RX("rx_pause", mib.rx.pf),
230 STAT_MIB_RX("rx_unknown", mib.rx.uo),
231 STAT_MIB_RX("rx_align", mib.rx.aln),
232 STAT_MIB_RX("rx_outrange", mib.rx.flr),
233 STAT_MIB_RX("rx_code", mib.rx.cde),
234 STAT_MIB_RX("rx_carrier", mib.rx.fcr),
235 STAT_MIB_RX("rx_oversize", mib.rx.ovr),
236 STAT_MIB_RX("rx_jabber", mib.rx.jbr),
237 STAT_MIB_RX("rx_mtu_err", mib.rx.mtue),
238 STAT_MIB_RX("rx_good_pkts", mib.rx.pok),
239 STAT_MIB_RX("rx_unicast", mib.rx.uc),
240 STAT_MIB_RX("rx_ppp", mib.rx.ppp),
241 STAT_MIB_RX("rx_crc", mib.rx.rcrc),
242 /* UniMAC TSV counters */
243 STAT_MIB_TX("tx_64_octets", mib.tx.pkt_cnt.cnt_64),
244 STAT_MIB_TX("tx_65_127_oct", mib.tx.pkt_cnt.cnt_127),
245 STAT_MIB_TX("tx_128_255_oct", mib.tx.pkt_cnt.cnt_255),
246 STAT_MIB_TX("tx_256_511_oct", mib.tx.pkt_cnt.cnt_511),
247 STAT_MIB_TX("tx_512_1023_oct", mib.tx.pkt_cnt.cnt_1023),
248 STAT_MIB_TX("tx_1024_1518_oct", mib.tx.pkt_cnt.cnt_1518),
249 STAT_MIB_TX("tx_vlan_1519_1522_oct", mib.tx.pkt_cnt.cnt_mgv),
250 STAT_MIB_TX("tx_1522_2047_oct", mib.tx.pkt_cnt.cnt_2047),
251 STAT_MIB_TX("tx_2048_4095_oct", mib.tx.pkt_cnt.cnt_4095),
252 STAT_MIB_TX("tx_4096_9216_oct", mib.tx.pkt_cnt.cnt_9216),
253 STAT_MIB_TX("tx_pkts", mib.tx.pkts),
254 STAT_MIB_TX("tx_multicast", mib.tx.mca),
255 STAT_MIB_TX("tx_broadcast", mib.tx.bca),
256 STAT_MIB_TX("tx_pause", mib.tx.pf),
257 STAT_MIB_TX("tx_control", mib.tx.cf),
258 STAT_MIB_TX("tx_fcs_err", mib.tx.fcs),
259 STAT_MIB_TX("tx_oversize", mib.tx.ovr),
260 STAT_MIB_TX("tx_defer", mib.tx.drf),
261 STAT_MIB_TX("tx_excess_defer", mib.tx.edf),
262 STAT_MIB_TX("tx_single_col", mib.tx.scl),
263 STAT_MIB_TX("tx_multi_col", mib.tx.mcl),
264 STAT_MIB_TX("tx_late_col", mib.tx.lcl),
265 STAT_MIB_TX("tx_excess_col", mib.tx.ecl),
266 STAT_MIB_TX("tx_frags", mib.tx.frg),
267 STAT_MIB_TX("tx_total_col", mib.tx.ncl),
268 STAT_MIB_TX("tx_jabber", mib.tx.jbr),
269 STAT_MIB_TX("tx_bytes", mib.tx.bytes),
270 STAT_MIB_TX("tx_good_pkts", mib.tx.pok),
271 STAT_MIB_TX("tx_unicast", mib.tx.uc),
272 /* UniMAC RUNT counters */
273 STAT_RUNT("rx_runt_pkts", mib.rx_runt_cnt),
274 STAT_RUNT("rx_runt_valid_fcs", mib.rx_runt_fcs),
275 STAT_RUNT("rx_runt_inval_fcs_align", mib.rx_runt_fcs_align),
276 STAT_RUNT("rx_runt_bytes", mib.rx_runt_bytes),
277 /* RXCHK misc statistics */
278 STAT_RXCHK("rxchk_bad_csum", mib.rxchk_bad_csum, RXCHK_BAD_CSUM_CNTR),
279 STAT_RXCHK("rxchk_other_pkt_disc", mib.rxchk_other_pkt_disc,
280 RXCHK_OTHER_DISC_CNTR),
281 /* RBUF misc statistics */
282 STAT_RBUF("rbuf_ovflow_cnt", mib.rbuf_ovflow_cnt, RBUF_OVFL_DISC_CNTR),
283 STAT_RBUF("rbuf_err_cnt", mib.rbuf_err_cnt, RBUF_ERR_PKT_CNTR),
284 STAT_MIB_SOFT("alloc_rx_buff_failed", mib.alloc_rx_buff_failed),
285 STAT_MIB_SOFT("rx_dma_failed", mib.rx_dma_failed),
286 STAT_MIB_SOFT("tx_dma_failed", mib.tx_dma_failed),
287 /* Per TX-queue statistics are dynamically appended */
288 };
289
290 #define BCM_SYSPORT_STATS_LEN ARRAY_SIZE(bcm_sysport_gstrings_stats)
291
292 static void bcm_sysport_get_drvinfo(struct net_device *dev,
293 struct ethtool_drvinfo *info)
294 {
295 strlcpy(info->driver, KBUILD_MODNAME, sizeof(info->driver));
296 strlcpy(info->version, "0.1", sizeof(info->version));
297 strlcpy(info->bus_info, "platform", sizeof(info->bus_info));
298 }
299
300 static u32 bcm_sysport_get_msglvl(struct net_device *dev)
301 {
302 struct bcm_sysport_priv *priv = netdev_priv(dev);
303
304 return priv->msg_enable;
305 }
306
307 static void bcm_sysport_set_msglvl(struct net_device *dev, u32 enable)
308 {
309 struct bcm_sysport_priv *priv = netdev_priv(dev);
310
311 priv->msg_enable = enable;
312 }
313
314 static inline bool bcm_sysport_lite_stat_valid(enum bcm_sysport_stat_type type)
315 {
316 switch (type) {
317 case BCM_SYSPORT_STAT_NETDEV:
318 case BCM_SYSPORT_STAT_NETDEV64:
319 case BCM_SYSPORT_STAT_RXCHK:
320 case BCM_SYSPORT_STAT_RBUF:
321 case BCM_SYSPORT_STAT_SOFT:
322 return true;
323 default:
324 return false;
325 }
326 }
327
328 static int bcm_sysport_get_sset_count(struct net_device *dev, int string_set)
329 {
330 struct bcm_sysport_priv *priv = netdev_priv(dev);
331 const struct bcm_sysport_stats *s;
332 unsigned int i, j;
333
334 switch (string_set) {
335 case ETH_SS_STATS:
336 for (i = 0, j = 0; i < BCM_SYSPORT_STATS_LEN; i++) {
337 s = &bcm_sysport_gstrings_stats[i];
338 if (priv->is_lite &&
339 !bcm_sysport_lite_stat_valid(s->type))
340 continue;
341 j++;
342 }
343 /* Include per-queue statistics */
344 return j + dev->num_tx_queues * NUM_SYSPORT_TXQ_STAT;
345 default:
346 return -EOPNOTSUPP;
347 }
348 }
349
350 static void bcm_sysport_get_strings(struct net_device *dev,
351 u32 stringset, u8 *data)
352 {
353 struct bcm_sysport_priv *priv = netdev_priv(dev);
354 const struct bcm_sysport_stats *s;
355 char buf[128];
356 int i, j;
357
358 switch (stringset) {
359 case ETH_SS_STATS:
360 for (i = 0, j = 0; i < BCM_SYSPORT_STATS_LEN; i++) {
361 s = &bcm_sysport_gstrings_stats[i];
362 if (priv->is_lite &&
363 !bcm_sysport_lite_stat_valid(s->type))
364 continue;
365
366 memcpy(data + j * ETH_GSTRING_LEN, s->stat_string,
367 ETH_GSTRING_LEN);
368 j++;
369 }
370
371 for (i = 0; i < dev->num_tx_queues; i++) {
372 snprintf(buf, sizeof(buf), "txq%d_packets", i);
373 memcpy(data + j * ETH_GSTRING_LEN, buf,
374 ETH_GSTRING_LEN);
375 j++;
376
377 snprintf(buf, sizeof(buf), "txq%d_bytes", i);
378 memcpy(data + j * ETH_GSTRING_LEN, buf,
379 ETH_GSTRING_LEN);
380 j++;
381 }
382 break;
383 default:
384 break;
385 }
386 }
387
388 static void bcm_sysport_update_mib_counters(struct bcm_sysport_priv *priv)
389 {
390 int i, j = 0;
391
392 for (i = 0; i < BCM_SYSPORT_STATS_LEN; i++) {
393 const struct bcm_sysport_stats *s;
394 u8 offset = 0;
395 u32 val = 0;
396 char *p;
397
398 s = &bcm_sysport_gstrings_stats[i];
399 switch (s->type) {
400 case BCM_SYSPORT_STAT_NETDEV:
401 case BCM_SYSPORT_STAT_NETDEV64:
402 case BCM_SYSPORT_STAT_SOFT:
403 continue;
404 case BCM_SYSPORT_STAT_MIB_RX:
405 case BCM_SYSPORT_STAT_MIB_TX:
406 case BCM_SYSPORT_STAT_RUNT:
407 if (priv->is_lite)
408 continue;
409
410 if (s->type != BCM_SYSPORT_STAT_MIB_RX)
411 offset = UMAC_MIB_STAT_OFFSET;
412 val = umac_readl(priv, UMAC_MIB_START + j + offset);
413 break;
414 case BCM_SYSPORT_STAT_RXCHK:
415 val = rxchk_readl(priv, s->reg_offset);
416 if (val == ~0)
417 rxchk_writel(priv, 0, s->reg_offset);
418 break;
419 case BCM_SYSPORT_STAT_RBUF:
420 val = rbuf_readl(priv, s->reg_offset);
421 if (val == ~0)
422 rbuf_writel(priv, 0, s->reg_offset);
423 break;
424 }
425
426 j += s->stat_sizeof;
427 p = (char *)priv + s->stat_offset;
428 *(u32 *)p = val;
429 }
430
431 netif_dbg(priv, hw, priv->netdev, "updated MIB counters\n");
432 }
433
434 static void bcm_sysport_update_tx_stats(struct bcm_sysport_priv *priv,
435 u64 *tx_bytes, u64 *tx_packets)
436 {
437 struct bcm_sysport_tx_ring *ring;
438 u64 bytes = 0, packets = 0;
439 unsigned int start;
440 unsigned int q;
441
442 for (q = 0; q < priv->netdev->num_tx_queues; q++) {
443 ring = &priv->tx_rings[q];
444 do {
445 start = u64_stats_fetch_begin_irq(&priv->syncp);
446 bytes = ring->bytes;
447 packets = ring->packets;
448 } while (u64_stats_fetch_retry_irq(&priv->syncp, start));
449
450 *tx_bytes += bytes;
451 *tx_packets += packets;
452 }
453 }
454
455 static void bcm_sysport_get_stats(struct net_device *dev,
456 struct ethtool_stats *stats, u64 *data)
457 {
458 struct bcm_sysport_priv *priv = netdev_priv(dev);
459 struct bcm_sysport_stats64 *stats64 = &priv->stats64;
460 struct u64_stats_sync *syncp = &priv->syncp;
461 struct bcm_sysport_tx_ring *ring;
462 u64 tx_bytes = 0, tx_packets = 0;
463 unsigned int start;
464 int i, j;
465
466 if (netif_running(dev)) {
467 bcm_sysport_update_mib_counters(priv);
468 bcm_sysport_update_tx_stats(priv, &tx_bytes, &tx_packets);
469 stats64->tx_bytes = tx_bytes;
470 stats64->tx_packets = tx_packets;
471 }
472
473 for (i = 0, j = 0; i < BCM_SYSPORT_STATS_LEN; i++) {
474 const struct bcm_sysport_stats *s;
475 char *p;
476
477 s = &bcm_sysport_gstrings_stats[i];
478 if (s->type == BCM_SYSPORT_STAT_NETDEV)
479 p = (char *)&dev->stats;
480 else if (s->type == BCM_SYSPORT_STAT_NETDEV64)
481 p = (char *)stats64;
482 else
483 p = (char *)priv;
484
485 if (priv->is_lite && !bcm_sysport_lite_stat_valid(s->type))
486 continue;
487 p += s->stat_offset;
488
489 if (s->stat_sizeof == sizeof(u64) &&
490 s->type == BCM_SYSPORT_STAT_NETDEV64) {
491 do {
492 start = u64_stats_fetch_begin_irq(syncp);
493 data[i] = *(u64 *)p;
494 } while (u64_stats_fetch_retry_irq(syncp, start));
495 } else
496 data[i] = *(u32 *)p;
497 j++;
498 }
499
500 /* For SYSTEMPORT Lite since we have holes in our statistics, j would
501 * be equal to BCM_SYSPORT_STATS_LEN at the end of the loop, but it
502 * needs to point to how many total statistics we have minus the
503 * number of per TX queue statistics
504 */
505 j = bcm_sysport_get_sset_count(dev, ETH_SS_STATS) -
506 dev->num_tx_queues * NUM_SYSPORT_TXQ_STAT;
507
508 for (i = 0; i < dev->num_tx_queues; i++) {
509 ring = &priv->tx_rings[i];
510 data[j] = ring->packets;
511 j++;
512 data[j] = ring->bytes;
513 j++;
514 }
515 }
516
517 static void bcm_sysport_get_wol(struct net_device *dev,
518 struct ethtool_wolinfo *wol)
519 {
520 struct bcm_sysport_priv *priv = netdev_priv(dev);
521 u32 reg;
522
523 wol->supported = WAKE_MAGIC | WAKE_MAGICSECURE | WAKE_FILTER;
524 wol->wolopts = priv->wolopts;
525
526 if (!(priv->wolopts & WAKE_MAGICSECURE))
527 return;
528
529 /* Return the programmed SecureOn password */
530 reg = umac_readl(priv, UMAC_PSW_MS);
531 put_unaligned_be16(reg, &wol->sopass[0]);
532 reg = umac_readl(priv, UMAC_PSW_LS);
533 put_unaligned_be32(reg, &wol->sopass[2]);
534 }
535
536 static int bcm_sysport_set_wol(struct net_device *dev,
537 struct ethtool_wolinfo *wol)
538 {
539 struct bcm_sysport_priv *priv = netdev_priv(dev);
540 struct device *kdev = &priv->pdev->dev;
541 u32 supported = WAKE_MAGIC | WAKE_MAGICSECURE | WAKE_FILTER;
542
543 if (!device_can_wakeup(kdev))
544 return -ENOTSUPP;
545
546 if (wol->wolopts & ~supported)
547 return -EINVAL;
548
549 /* Program the SecureOn password */
550 if (wol->wolopts & WAKE_MAGICSECURE) {
551 umac_writel(priv, get_unaligned_be16(&wol->sopass[0]),
552 UMAC_PSW_MS);
553 umac_writel(priv, get_unaligned_be32(&wol->sopass[2]),
554 UMAC_PSW_LS);
555 }
556
557 /* Flag the device and relevant IRQ as wakeup capable */
558 if (wol->wolopts) {
559 device_set_wakeup_enable(kdev, 1);
560 if (priv->wol_irq_disabled)
561 enable_irq_wake(priv->wol_irq);
562 priv->wol_irq_disabled = 0;
563 } else {
564 device_set_wakeup_enable(kdev, 0);
565 /* Avoid unbalanced disable_irq_wake calls */
566 if (!priv->wol_irq_disabled)
567 disable_irq_wake(priv->wol_irq);
568 priv->wol_irq_disabled = 1;
569 }
570
571 priv->wolopts = wol->wolopts;
572
573 return 0;
574 }
575
576 static void bcm_sysport_set_rx_coalesce(struct bcm_sysport_priv *priv,
577 u32 usecs, u32 pkts)
578 {
579 u32 reg;
580
581 reg = rdma_readl(priv, RDMA_MBDONE_INTR);
582 reg &= ~(RDMA_INTR_THRESH_MASK |
583 RDMA_TIMEOUT_MASK << RDMA_TIMEOUT_SHIFT);
584 reg |= pkts;
585 reg |= DIV_ROUND_UP(usecs * 1000, 8192) << RDMA_TIMEOUT_SHIFT;
586 rdma_writel(priv, reg, RDMA_MBDONE_INTR);
587 }
588
589 static void bcm_sysport_set_tx_coalesce(struct bcm_sysport_tx_ring *ring,
590 struct ethtool_coalesce *ec)
591 {
592 struct bcm_sysport_priv *priv = ring->priv;
593 u32 reg;
594
595 reg = tdma_readl(priv, TDMA_DESC_RING_INTR_CONTROL(ring->index));
596 reg &= ~(RING_INTR_THRESH_MASK |
597 RING_TIMEOUT_MASK << RING_TIMEOUT_SHIFT);
598 reg |= ec->tx_max_coalesced_frames;
599 reg |= DIV_ROUND_UP(ec->tx_coalesce_usecs * 1000, 8192) <<
600 RING_TIMEOUT_SHIFT;
601 tdma_writel(priv, reg, TDMA_DESC_RING_INTR_CONTROL(ring->index));
602 }
603
604 static int bcm_sysport_get_coalesce(struct net_device *dev,
605 struct ethtool_coalesce *ec)
606 {
607 struct bcm_sysport_priv *priv = netdev_priv(dev);
608 u32 reg;
609
610 reg = tdma_readl(priv, TDMA_DESC_RING_INTR_CONTROL(0));
611
612 ec->tx_coalesce_usecs = (reg >> RING_TIMEOUT_SHIFT) * 8192 / 1000;
613 ec->tx_max_coalesced_frames = reg & RING_INTR_THRESH_MASK;
614
615 reg = rdma_readl(priv, RDMA_MBDONE_INTR);
616
617 ec->rx_coalesce_usecs = (reg >> RDMA_TIMEOUT_SHIFT) * 8192 / 1000;
618 ec->rx_max_coalesced_frames = reg & RDMA_INTR_THRESH_MASK;
619 ec->use_adaptive_rx_coalesce = priv->dim.use_dim;
620
621 return 0;
622 }
623
624 static int bcm_sysport_set_coalesce(struct net_device *dev,
625 struct ethtool_coalesce *ec)
626 {
627 struct bcm_sysport_priv *priv = netdev_priv(dev);
628 struct net_dim_cq_moder moder;
629 u32 usecs, pkts;
630 unsigned int i;
631
632 /* Base system clock is 125Mhz, DMA timeout is this reference clock
633 * divided by 1024, which yield roughly 8.192 us, our maximum value has
634 * to fit in the RING_TIMEOUT_MASK (16 bits).
635 */
636 if (ec->tx_max_coalesced_frames > RING_INTR_THRESH_MASK ||
637 ec->tx_coalesce_usecs > (RING_TIMEOUT_MASK * 8) + 1 ||
638 ec->rx_max_coalesced_frames > RDMA_INTR_THRESH_MASK ||
639 ec->rx_coalesce_usecs > (RDMA_TIMEOUT_MASK * 8) + 1)
640 return -EINVAL;
641
642 if ((ec->tx_coalesce_usecs == 0 && ec->tx_max_coalesced_frames == 0) ||
643 (ec->rx_coalesce_usecs == 0 && ec->rx_max_coalesced_frames == 0) ||
644 ec->use_adaptive_tx_coalesce)
645 return -EINVAL;
646
647 for (i = 0; i < dev->num_tx_queues; i++)
648 bcm_sysport_set_tx_coalesce(&priv->tx_rings[i], ec);
649
650 priv->rx_coalesce_usecs = ec->rx_coalesce_usecs;
651 priv->rx_max_coalesced_frames = ec->rx_max_coalesced_frames;
652 usecs = priv->rx_coalesce_usecs;
653 pkts = priv->rx_max_coalesced_frames;
654
655 if (ec->use_adaptive_rx_coalesce && !priv->dim.use_dim) {
656 moder = net_dim_get_def_rx_moderation(priv->dim.dim.mode);
657 usecs = moder.usec;
658 pkts = moder.pkts;
659 }
660
661 priv->dim.use_dim = ec->use_adaptive_rx_coalesce;
662
663 /* Apply desired coalescing parameters */
664 bcm_sysport_set_rx_coalesce(priv, usecs, pkts);
665
666 return 0;
667 }
668
669 static void bcm_sysport_free_cb(struct bcm_sysport_cb *cb)
670 {
671 dev_consume_skb_any(cb->skb);
672 cb->skb = NULL;
673 dma_unmap_addr_set(cb, dma_addr, 0);
674 }
675
676 static struct sk_buff *bcm_sysport_rx_refill(struct bcm_sysport_priv *priv,
677 struct bcm_sysport_cb *cb)
678 {
679 struct device *kdev = &priv->pdev->dev;
680 struct net_device *ndev = priv->netdev;
681 struct sk_buff *skb, *rx_skb;
682 dma_addr_t mapping;
683
684 /* Allocate a new SKB for a new packet */
685 skb = netdev_alloc_skb(priv->netdev, RX_BUF_LENGTH);
686 if (!skb) {
687 priv->mib.alloc_rx_buff_failed++;
688 netif_err(priv, rx_err, ndev, "SKB alloc failed\n");
689 return NULL;
690 }
691
692 mapping = dma_map_single(kdev, skb->data,
693 RX_BUF_LENGTH, DMA_FROM_DEVICE);
694 if (dma_mapping_error(kdev, mapping)) {
695 priv->mib.rx_dma_failed++;
696 dev_kfree_skb_any(skb);
697 netif_err(priv, rx_err, ndev, "DMA mapping failure\n");
698 return NULL;
699 }
700
701 /* Grab the current SKB on the ring */
702 rx_skb = cb->skb;
703 if (likely(rx_skb))
704 dma_unmap_single(kdev, dma_unmap_addr(cb, dma_addr),
705 RX_BUF_LENGTH, DMA_FROM_DEVICE);
706
707 /* Put the new SKB on the ring */
708 cb->skb = skb;
709 dma_unmap_addr_set(cb, dma_addr, mapping);
710 dma_desc_set_addr(priv, cb->bd_addr, mapping);
711
712 netif_dbg(priv, rx_status, ndev, "RX refill\n");
713
714 /* Return the current SKB to the caller */
715 return rx_skb;
716 }
717
718 static int bcm_sysport_alloc_rx_bufs(struct bcm_sysport_priv *priv)
719 {
720 struct bcm_sysport_cb *cb;
721 struct sk_buff *skb;
722 unsigned int i;
723
724 for (i = 0; i < priv->num_rx_bds; i++) {
725 cb = &priv->rx_cbs[i];
726 skb = bcm_sysport_rx_refill(priv, cb);
727 if (skb)
728 dev_kfree_skb(skb);
729 if (!cb->skb)
730 return -ENOMEM;
731 }
732
733 return 0;
734 }
735
736 /* Poll the hardware for up to budget packets to process */
737 static unsigned int bcm_sysport_desc_rx(struct bcm_sysport_priv *priv,
738 unsigned int budget)
739 {
740 struct bcm_sysport_stats64 *stats64 = &priv->stats64;
741 struct net_device *ndev = priv->netdev;
742 unsigned int processed = 0, to_process;
743 unsigned int processed_bytes = 0;
744 struct bcm_sysport_cb *cb;
745 struct sk_buff *skb;
746 unsigned int p_index;
747 u16 len, status;
748 struct bcm_rsb *rsb;
749
750 /* Clear status before servicing to reduce spurious interrupts */
751 intrl2_0_writel(priv, INTRL2_0_RDMA_MBDONE, INTRL2_CPU_CLEAR);
752
753 /* Determine how much we should process since last call, SYSTEMPORT Lite
754 * groups the producer and consumer indexes into the same 32-bit
755 * which we access using RDMA_CONS_INDEX
756 */
757 if (!priv->is_lite)
758 p_index = rdma_readl(priv, RDMA_PROD_INDEX);
759 else
760 p_index = rdma_readl(priv, RDMA_CONS_INDEX);
761 p_index &= RDMA_PROD_INDEX_MASK;
762
763 to_process = (p_index - priv->rx_c_index) & RDMA_CONS_INDEX_MASK;
764
765 netif_dbg(priv, rx_status, ndev,
766 "p_index=%d rx_c_index=%d to_process=%d\n",
767 p_index, priv->rx_c_index, to_process);
768
769 while ((processed < to_process) && (processed < budget)) {
770 cb = &priv->rx_cbs[priv->rx_read_ptr];
771 skb = bcm_sysport_rx_refill(priv, cb);
772
773
774 /* We do not have a backing SKB, so we do not a corresponding
775 * DMA mapping for this incoming packet since
776 * bcm_sysport_rx_refill always either has both skb and mapping
777 * or none.
778 */
779 if (unlikely(!skb)) {
780 netif_err(priv, rx_err, ndev, "out of memory!\n");
781 ndev->stats.rx_dropped++;
782 ndev->stats.rx_errors++;
783 goto next;
784 }
785
786 /* Extract the Receive Status Block prepended */
787 rsb = (struct bcm_rsb *)skb->data;
788 len = (rsb->rx_status_len >> DESC_LEN_SHIFT) & DESC_LEN_MASK;
789 status = (rsb->rx_status_len >> DESC_STATUS_SHIFT) &
790 DESC_STATUS_MASK;
791
792 netif_dbg(priv, rx_status, ndev,
793 "p=%d, c=%d, rd_ptr=%d, len=%d, flag=0x%04x\n",
794 p_index, priv->rx_c_index, priv->rx_read_ptr,
795 len, status);
796
797 if (unlikely(len > RX_BUF_LENGTH)) {
798 netif_err(priv, rx_status, ndev, "oversized packet\n");
799 ndev->stats.rx_length_errors++;
800 ndev->stats.rx_errors++;
801 dev_kfree_skb_any(skb);
802 goto next;
803 }
804
805 if (unlikely(!(status & DESC_EOP) || !(status & DESC_SOP))) {
806 netif_err(priv, rx_status, ndev, "fragmented packet!\n");
807 ndev->stats.rx_dropped++;
808 ndev->stats.rx_errors++;
809 dev_kfree_skb_any(skb);
810 goto next;
811 }
812
813 if (unlikely(status & (RX_STATUS_ERR | RX_STATUS_OVFLOW))) {
814 netif_err(priv, rx_err, ndev, "error packet\n");
815 if (status & RX_STATUS_OVFLOW)
816 ndev->stats.rx_over_errors++;
817 ndev->stats.rx_dropped++;
818 ndev->stats.rx_errors++;
819 dev_kfree_skb_any(skb);
820 goto next;
821 }
822
823 skb_put(skb, len);
824
825 /* Hardware validated our checksum */
826 if (likely(status & DESC_L4_CSUM))
827 skb->ip_summed = CHECKSUM_UNNECESSARY;
828
829 /* Hardware pre-pends packets with 2bytes before Ethernet
830 * header plus we have the Receive Status Block, strip off all
831 * of this from the SKB.
832 */
833 skb_pull(skb, sizeof(*rsb) + 2);
834 len -= (sizeof(*rsb) + 2);
835 processed_bytes += len;
836
837 /* UniMAC may forward CRC */
838 if (priv->crc_fwd) {
839 skb_trim(skb, len - ETH_FCS_LEN);
840 len -= ETH_FCS_LEN;
841 }
842
843 skb->protocol = eth_type_trans(skb, ndev);
844 ndev->stats.rx_packets++;
845 ndev->stats.rx_bytes += len;
846 u64_stats_update_begin(&priv->syncp);
847 stats64->rx_packets++;
848 stats64->rx_bytes += len;
849 u64_stats_update_end(&priv->syncp);
850
851 napi_gro_receive(&priv->napi, skb);
852 next:
853 processed++;
854 priv->rx_read_ptr++;
855
856 if (priv->rx_read_ptr == priv->num_rx_bds)
857 priv->rx_read_ptr = 0;
858 }
859
860 priv->dim.packets = processed;
861 priv->dim.bytes = processed_bytes;
862
863 return processed;
864 }
865
866 static void bcm_sysport_tx_reclaim_one(struct bcm_sysport_tx_ring *ring,
867 struct bcm_sysport_cb *cb,
868 unsigned int *bytes_compl,
869 unsigned int *pkts_compl)
870 {
871 struct bcm_sysport_priv *priv = ring->priv;
872 struct device *kdev = &priv->pdev->dev;
873
874 if (cb->skb) {
875 *bytes_compl += cb->skb->len;
876 dma_unmap_single(kdev, dma_unmap_addr(cb, dma_addr),
877 dma_unmap_len(cb, dma_len),
878 DMA_TO_DEVICE);
879 (*pkts_compl)++;
880 bcm_sysport_free_cb(cb);
881 /* SKB fragment */
882 } else if (dma_unmap_addr(cb, dma_addr)) {
883 *bytes_compl += dma_unmap_len(cb, dma_len);
884 dma_unmap_page(kdev, dma_unmap_addr(cb, dma_addr),
885 dma_unmap_len(cb, dma_len), DMA_TO_DEVICE);
886 dma_unmap_addr_set(cb, dma_addr, 0);
887 }
888 }
889
890 /* Reclaim queued SKBs for transmission completion, lockless version */
891 static unsigned int __bcm_sysport_tx_reclaim(struct bcm_sysport_priv *priv,
892 struct bcm_sysport_tx_ring *ring)
893 {
894 unsigned int pkts_compl = 0, bytes_compl = 0;
895 struct net_device *ndev = priv->netdev;
896 unsigned int txbds_processed = 0;
897 struct bcm_sysport_cb *cb;
898 unsigned int txbds_ready;
899 unsigned int c_index;
900 u32 hw_ind;
901
902 /* Clear status before servicing to reduce spurious interrupts */
903 if (!ring->priv->is_lite)
904 intrl2_1_writel(ring->priv, BIT(ring->index), INTRL2_CPU_CLEAR);
905 else
906 intrl2_0_writel(ring->priv, BIT(ring->index +
907 INTRL2_0_TDMA_MBDONE_SHIFT), INTRL2_CPU_CLEAR);
908
909 /* Compute how many descriptors have been processed since last call */
910 hw_ind = tdma_readl(priv, TDMA_DESC_RING_PROD_CONS_INDEX(ring->index));
911 c_index = (hw_ind >> RING_CONS_INDEX_SHIFT) & RING_CONS_INDEX_MASK;
912 txbds_ready = (c_index - ring->c_index) & RING_CONS_INDEX_MASK;
913
914 netif_dbg(priv, tx_done, ndev,
915 "ring=%d old_c_index=%u c_index=%u txbds_ready=%u\n",
916 ring->index, ring->c_index, c_index, txbds_ready);
917
918 while (txbds_processed < txbds_ready) {
919 cb = &ring->cbs[ring->clean_index];
920 bcm_sysport_tx_reclaim_one(ring, cb, &bytes_compl, &pkts_compl);
921
922 ring->desc_count++;
923 txbds_processed++;
924
925 if (likely(ring->clean_index < ring->size - 1))
926 ring->clean_index++;
927 else
928 ring->clean_index = 0;
929 }
930
931 u64_stats_update_begin(&priv->syncp);
932 ring->packets += pkts_compl;
933 ring->bytes += bytes_compl;
934 u64_stats_update_end(&priv->syncp);
935
936 ring->c_index = c_index;
937
938 netif_dbg(priv, tx_done, ndev,
939 "ring=%d c_index=%d pkts_compl=%d, bytes_compl=%d\n",
940 ring->index, ring->c_index, pkts_compl, bytes_compl);
941
942 return pkts_compl;
943 }
944
945 /* Locked version of the per-ring TX reclaim routine */
946 static unsigned int bcm_sysport_tx_reclaim(struct bcm_sysport_priv *priv,
947 struct bcm_sysport_tx_ring *ring)
948 {
949 struct netdev_queue *txq;
950 unsigned int released;
951 unsigned long flags;
952
953 txq = netdev_get_tx_queue(priv->netdev, ring->index);
954
955 spin_lock_irqsave(&ring->lock, flags);
956 released = __bcm_sysport_tx_reclaim(priv, ring);
957 if (released)
958 netif_tx_wake_queue(txq);
959
960 spin_unlock_irqrestore(&ring->lock, flags);
961
962 return released;
963 }
964
965 /* Locked version of the per-ring TX reclaim, but does not wake the queue */
966 static void bcm_sysport_tx_clean(struct bcm_sysport_priv *priv,
967 struct bcm_sysport_tx_ring *ring)
968 {
969 unsigned long flags;
970
971 spin_lock_irqsave(&ring->lock, flags);
972 __bcm_sysport_tx_reclaim(priv, ring);
973 spin_unlock_irqrestore(&ring->lock, flags);
974 }
975
976 static int bcm_sysport_tx_poll(struct napi_struct *napi, int budget)
977 {
978 struct bcm_sysport_tx_ring *ring =
979 container_of(napi, struct bcm_sysport_tx_ring, napi);
980 unsigned int work_done = 0;
981
982 work_done = bcm_sysport_tx_reclaim(ring->priv, ring);
983
984 if (work_done == 0) {
985 napi_complete(napi);
986 /* re-enable TX interrupt */
987 if (!ring->priv->is_lite)
988 intrl2_1_mask_clear(ring->priv, BIT(ring->index));
989 else
990 intrl2_0_mask_clear(ring->priv, BIT(ring->index +
991 INTRL2_0_TDMA_MBDONE_SHIFT));
992
993 return 0;
994 }
995
996 return budget;
997 }
998
999 static void bcm_sysport_tx_reclaim_all(struct bcm_sysport_priv *priv)
1000 {
1001 unsigned int q;
1002
1003 for (q = 0; q < priv->netdev->num_tx_queues; q++)
1004 bcm_sysport_tx_reclaim(priv, &priv->tx_rings[q]);
1005 }
1006
1007 static int bcm_sysport_poll(struct napi_struct *napi, int budget)
1008 {
1009 struct bcm_sysport_priv *priv =
1010 container_of(napi, struct bcm_sysport_priv, napi);
1011 struct net_dim_sample dim_sample;
1012 unsigned int work_done = 0;
1013
1014 work_done = bcm_sysport_desc_rx(priv, budget);
1015
1016 priv->rx_c_index += work_done;
1017 priv->rx_c_index &= RDMA_CONS_INDEX_MASK;
1018
1019 /* SYSTEMPORT Lite groups the producer/consumer index, producer is
1020 * maintained by HW, but writes to it will be ignore while RDMA
1021 * is active
1022 */
1023 if (!priv->is_lite)
1024 rdma_writel(priv, priv->rx_c_index, RDMA_CONS_INDEX);
1025 else
1026 rdma_writel(priv, priv->rx_c_index << 16, RDMA_CONS_INDEX);
1027
1028 if (work_done < budget) {
1029 napi_complete_done(napi, work_done);
1030 /* re-enable RX interrupts */
1031 intrl2_0_mask_clear(priv, INTRL2_0_RDMA_MBDONE);
1032 }
1033
1034 if (priv->dim.use_dim) {
1035 net_dim_sample(priv->dim.event_ctr, priv->dim.packets,
1036 priv->dim.bytes, &dim_sample);
1037 net_dim(&priv->dim.dim, dim_sample);
1038 }
1039
1040 return work_done;
1041 }
1042
1043 static void mpd_enable_set(struct bcm_sysport_priv *priv, bool enable)
1044 {
1045 u32 reg, bit;
1046
1047 reg = umac_readl(priv, UMAC_MPD_CTRL);
1048 if (enable)
1049 reg |= MPD_EN;
1050 else
1051 reg &= ~MPD_EN;
1052 umac_writel(priv, reg, UMAC_MPD_CTRL);
1053
1054 if (priv->is_lite)
1055 bit = RBUF_ACPI_EN_LITE;
1056 else
1057 bit = RBUF_ACPI_EN;
1058
1059 reg = rbuf_readl(priv, RBUF_CONTROL);
1060 if (enable)
1061 reg |= bit;
1062 else
1063 reg &= ~bit;
1064 rbuf_writel(priv, reg, RBUF_CONTROL);
1065 }
1066
1067 static void bcm_sysport_resume_from_wol(struct bcm_sysport_priv *priv)
1068 {
1069 u32 reg;
1070
1071 /* Stop monitoring MPD interrupt */
1072 intrl2_0_mask_set(priv, INTRL2_0_MPD | INTRL2_0_BRCM_MATCH_TAG);
1073
1074 /* Disable RXCHK, active filters and Broadcom tag matching */
1075 reg = rxchk_readl(priv, RXCHK_CONTROL);
1076 reg &= ~(RXCHK_BRCM_TAG_MATCH_MASK <<
1077 RXCHK_BRCM_TAG_MATCH_SHIFT | RXCHK_EN | RXCHK_BRCM_TAG_EN);
1078 rxchk_writel(priv, reg, RXCHK_CONTROL);
1079
1080 /* Clear the MagicPacket detection logic */
1081 mpd_enable_set(priv, false);
1082
1083 netif_dbg(priv, wol, priv->netdev, "resumed from WOL\n");
1084 }
1085
1086 static void bcm_sysport_dim_work(struct work_struct *work)
1087 {
1088 struct net_dim *dim = container_of(work, struct net_dim, work);
1089 struct bcm_sysport_net_dim *ndim =
1090 container_of(dim, struct bcm_sysport_net_dim, dim);
1091 struct bcm_sysport_priv *priv =
1092 container_of(ndim, struct bcm_sysport_priv, dim);
1093 struct net_dim_cq_moder cur_profile =
1094 net_dim_get_rx_moderation(dim->mode, dim->profile_ix);
1095
1096 bcm_sysport_set_rx_coalesce(priv, cur_profile.usec, cur_profile.pkts);
1097 dim->state = NET_DIM_START_MEASURE;
1098 }
1099
1100 /* RX and misc interrupt routine */
1101 static irqreturn_t bcm_sysport_rx_isr(int irq, void *dev_id)
1102 {
1103 struct net_device *dev = dev_id;
1104 struct bcm_sysport_priv *priv = netdev_priv(dev);
1105 struct bcm_sysport_tx_ring *txr;
1106 unsigned int ring, ring_bit;
1107 u32 reg;
1108
1109 priv->irq0_stat = intrl2_0_readl(priv, INTRL2_CPU_STATUS) &
1110 ~intrl2_0_readl(priv, INTRL2_CPU_MASK_STATUS);
1111 intrl2_0_writel(priv, priv->irq0_stat, INTRL2_CPU_CLEAR);
1112
1113 if (unlikely(priv->irq0_stat == 0)) {
1114 netdev_warn(priv->netdev, "spurious RX interrupt\n");
1115 return IRQ_NONE;
1116 }
1117
1118 if (priv->irq0_stat & INTRL2_0_RDMA_MBDONE) {
1119 priv->dim.event_ctr++;
1120 if (likely(napi_schedule_prep(&priv->napi))) {
1121 /* disable RX interrupts */
1122 intrl2_0_mask_set(priv, INTRL2_0_RDMA_MBDONE);
1123 __napi_schedule_irqoff(&priv->napi);
1124 }
1125 }
1126
1127 /* TX ring is full, perform a full reclaim since we do not know
1128 * which one would trigger this interrupt
1129 */
1130 if (priv->irq0_stat & INTRL2_0_TX_RING_FULL)
1131 bcm_sysport_tx_reclaim_all(priv);
1132
1133 if (priv->irq0_stat & INTRL2_0_MPD)
1134 netdev_info(priv->netdev, "Wake-on-LAN (MPD) interrupt!\n");
1135
1136 if (priv->irq0_stat & INTRL2_0_BRCM_MATCH_TAG) {
1137 reg = rxchk_readl(priv, RXCHK_BRCM_TAG_MATCH_STATUS) &
1138 RXCHK_BRCM_TAG_MATCH_MASK;
1139 netdev_info(priv->netdev,
1140 "Wake-on-LAN (filters 0x%02x) interrupt!\n", reg);
1141 }
1142
1143 if (!priv->is_lite)
1144 goto out;
1145
1146 for (ring = 0; ring < dev->num_tx_queues; ring++) {
1147 ring_bit = BIT(ring + INTRL2_0_TDMA_MBDONE_SHIFT);
1148 if (!(priv->irq0_stat & ring_bit))
1149 continue;
1150
1151 txr = &priv->tx_rings[ring];
1152
1153 if (likely(napi_schedule_prep(&txr->napi))) {
1154 intrl2_0_mask_set(priv, ring_bit);
1155 __napi_schedule(&txr->napi);
1156 }
1157 }
1158 out:
1159 return IRQ_HANDLED;
1160 }
1161
1162 /* TX interrupt service routine */
1163 static irqreturn_t bcm_sysport_tx_isr(int irq, void *dev_id)
1164 {
1165 struct net_device *dev = dev_id;
1166 struct bcm_sysport_priv *priv = netdev_priv(dev);
1167 struct bcm_sysport_tx_ring *txr;
1168 unsigned int ring;
1169
1170 priv->irq1_stat = intrl2_1_readl(priv, INTRL2_CPU_STATUS) &
1171 ~intrl2_1_readl(priv, INTRL2_CPU_MASK_STATUS);
1172 intrl2_1_writel(priv, 0xffffffff, INTRL2_CPU_CLEAR);
1173
1174 if (unlikely(priv->irq1_stat == 0)) {
1175 netdev_warn(priv->netdev, "spurious TX interrupt\n");
1176 return IRQ_NONE;
1177 }
1178
1179 for (ring = 0; ring < dev->num_tx_queues; ring++) {
1180 if (!(priv->irq1_stat & BIT(ring)))
1181 continue;
1182
1183 txr = &priv->tx_rings[ring];
1184
1185 if (likely(napi_schedule_prep(&txr->napi))) {
1186 intrl2_1_mask_set(priv, BIT(ring));
1187 __napi_schedule_irqoff(&txr->napi);
1188 }
1189 }
1190
1191 return IRQ_HANDLED;
1192 }
1193
1194 static irqreturn_t bcm_sysport_wol_isr(int irq, void *dev_id)
1195 {
1196 struct bcm_sysport_priv *priv = dev_id;
1197
1198 pm_wakeup_event(&priv->pdev->dev, 0);
1199
1200 return IRQ_HANDLED;
1201 }
1202
1203 #ifdef CONFIG_NET_POLL_CONTROLLER
1204 static void bcm_sysport_poll_controller(struct net_device *dev)
1205 {
1206 struct bcm_sysport_priv *priv = netdev_priv(dev);
1207
1208 disable_irq(priv->irq0);
1209 bcm_sysport_rx_isr(priv->irq0, priv);
1210 enable_irq(priv->irq0);
1211
1212 if (!priv->is_lite) {
1213 disable_irq(priv->irq1);
1214 bcm_sysport_tx_isr(priv->irq1, priv);
1215 enable_irq(priv->irq1);
1216 }
1217 }
1218 #endif
1219
1220 static struct sk_buff *bcm_sysport_insert_tsb(struct sk_buff *skb,
1221 struct net_device *dev)
1222 {
1223 struct sk_buff *nskb;
1224 struct bcm_tsb *tsb;
1225 u32 csum_info;
1226 u8 ip_proto;
1227 u16 csum_start;
1228 __be16 ip_ver;
1229
1230 /* Re-allocate SKB if needed */
1231 if (unlikely(skb_headroom(skb) < sizeof(*tsb))) {
1232 nskb = skb_realloc_headroom(skb, sizeof(*tsb));
1233 dev_kfree_skb(skb);
1234 if (!nskb) {
1235 dev->stats.tx_errors++;
1236 dev->stats.tx_dropped++;
1237 return NULL;
1238 }
1239 skb = nskb;
1240 }
1241
1242 tsb = skb_push(skb, sizeof(*tsb));
1243 /* Zero-out TSB by default */
1244 memset(tsb, 0, sizeof(*tsb));
1245
1246 if (skb->ip_summed == CHECKSUM_PARTIAL) {
1247 ip_ver = skb->protocol;
1248 switch (ip_ver) {
1249 case htons(ETH_P_IP):
1250 ip_proto = ip_hdr(skb)->protocol;
1251 break;
1252 case htons(ETH_P_IPV6):
1253 ip_proto = ipv6_hdr(skb)->nexthdr;
1254 break;
1255 default:
1256 return skb;
1257 }
1258
1259 /* Get the checksum offset and the L4 (transport) offset */
1260 csum_start = skb_checksum_start_offset(skb) - sizeof(*tsb);
1261 csum_info = (csum_start + skb->csum_offset) & L4_CSUM_PTR_MASK;
1262 csum_info |= (csum_start << L4_PTR_SHIFT);
1263
1264 if (ip_proto == IPPROTO_TCP || ip_proto == IPPROTO_UDP) {
1265 csum_info |= L4_LENGTH_VALID;
1266 if (ip_proto == IPPROTO_UDP &&
1267 ip_ver == htons(ETH_P_IP))
1268 csum_info |= L4_UDP;
1269 } else {
1270 csum_info = 0;
1271 }
1272
1273 tsb->l4_ptr_dest_map = csum_info;
1274 }
1275
1276 return skb;
1277 }
1278
1279 static netdev_tx_t bcm_sysport_xmit(struct sk_buff *skb,
1280 struct net_device *dev)
1281 {
1282 struct bcm_sysport_priv *priv = netdev_priv(dev);
1283 struct device *kdev = &priv->pdev->dev;
1284 struct bcm_sysport_tx_ring *ring;
1285 struct bcm_sysport_cb *cb;
1286 struct netdev_queue *txq;
1287 struct dma_desc *desc;
1288 unsigned int skb_len;
1289 unsigned long flags;
1290 dma_addr_t mapping;
1291 u32 len_status;
1292 u16 queue;
1293 int ret;
1294
1295 queue = skb_get_queue_mapping(skb);
1296 txq = netdev_get_tx_queue(dev, queue);
1297 ring = &priv->tx_rings[queue];
1298
1299 /* lock against tx reclaim in BH context and TX ring full interrupt */
1300 spin_lock_irqsave(&ring->lock, flags);
1301 if (unlikely(ring->desc_count == 0)) {
1302 netif_tx_stop_queue(txq);
1303 netdev_err(dev, "queue %d awake and ring full!\n", queue);
1304 ret = NETDEV_TX_BUSY;
1305 goto out;
1306 }
1307
1308 /* Insert TSB and checksum infos */
1309 if (priv->tsb_en) {
1310 skb = bcm_sysport_insert_tsb(skb, dev);
1311 if (!skb) {
1312 ret = NETDEV_TX_OK;
1313 goto out;
1314 }
1315 }
1316
1317 skb_len = skb->len;
1318
1319 mapping = dma_map_single(kdev, skb->data, skb_len, DMA_TO_DEVICE);
1320 if (dma_mapping_error(kdev, mapping)) {
1321 priv->mib.tx_dma_failed++;
1322 netif_err(priv, tx_err, dev, "DMA map failed at %p (len=%d)\n",
1323 skb->data, skb_len);
1324 ret = NETDEV_TX_OK;
1325 goto out;
1326 }
1327
1328 /* Remember the SKB for future freeing */
1329 cb = &ring->cbs[ring->curr_desc];
1330 cb->skb = skb;
1331 dma_unmap_addr_set(cb, dma_addr, mapping);
1332 dma_unmap_len_set(cb, dma_len, skb_len);
1333
1334 /* Fetch a descriptor entry from our pool */
1335 desc = ring->desc_cpu;
1336
1337 desc->addr_lo = lower_32_bits(mapping);
1338 len_status = upper_32_bits(mapping) & DESC_ADDR_HI_MASK;
1339 len_status |= (skb_len << DESC_LEN_SHIFT);
1340 len_status |= (DESC_SOP | DESC_EOP | TX_STATUS_APP_CRC) <<
1341 DESC_STATUS_SHIFT;
1342 if (skb->ip_summed == CHECKSUM_PARTIAL)
1343 len_status |= (DESC_L4_CSUM << DESC_STATUS_SHIFT);
1344
1345 ring->curr_desc++;
1346 if (ring->curr_desc == ring->size)
1347 ring->curr_desc = 0;
1348 ring->desc_count--;
1349
1350 /* Ensure write completion of the descriptor status/length
1351 * in DRAM before the System Port WRITE_PORT register latches
1352 * the value
1353 */
1354 wmb();
1355 desc->addr_status_len = len_status;
1356 wmb();
1357
1358 /* Write this descriptor address to the RING write port */
1359 tdma_port_write_desc_addr(priv, desc, ring->index);
1360
1361 /* Check ring space and update SW control flow */
1362 if (ring->desc_count == 0)
1363 netif_tx_stop_queue(txq);
1364
1365 netif_dbg(priv, tx_queued, dev, "ring=%d desc_count=%d, curr_desc=%d\n",
1366 ring->index, ring->desc_count, ring->curr_desc);
1367
1368 ret = NETDEV_TX_OK;
1369 out:
1370 spin_unlock_irqrestore(&ring->lock, flags);
1371 return ret;
1372 }
1373
1374 static void bcm_sysport_tx_timeout(struct net_device *dev)
1375 {
1376 netdev_warn(dev, "transmit timeout!\n");
1377
1378 netif_trans_update(dev);
1379 dev->stats.tx_errors++;
1380
1381 netif_tx_wake_all_queues(dev);
1382 }
1383
1384 /* phylib adjust link callback */
1385 static void bcm_sysport_adj_link(struct net_device *dev)
1386 {
1387 struct bcm_sysport_priv *priv = netdev_priv(dev);
1388 struct phy_device *phydev = dev->phydev;
1389 unsigned int changed = 0;
1390 u32 cmd_bits = 0, reg;
1391
1392 if (priv->old_link != phydev->link) {
1393 changed = 1;
1394 priv->old_link = phydev->link;
1395 }
1396
1397 if (priv->old_duplex != phydev->duplex) {
1398 changed = 1;
1399 priv->old_duplex = phydev->duplex;
1400 }
1401
1402 if (priv->is_lite)
1403 goto out;
1404
1405 switch (phydev->speed) {
1406 case SPEED_2500:
1407 cmd_bits = CMD_SPEED_2500;
1408 break;
1409 case SPEED_1000:
1410 cmd_bits = CMD_SPEED_1000;
1411 break;
1412 case SPEED_100:
1413 cmd_bits = CMD_SPEED_100;
1414 break;
1415 case SPEED_10:
1416 cmd_bits = CMD_SPEED_10;
1417 break;
1418 default:
1419 break;
1420 }
1421 cmd_bits <<= CMD_SPEED_SHIFT;
1422
1423 if (phydev->duplex == DUPLEX_HALF)
1424 cmd_bits |= CMD_HD_EN;
1425
1426 if (priv->old_pause != phydev->pause) {
1427 changed = 1;
1428 priv->old_pause = phydev->pause;
1429 }
1430
1431 if (!phydev->pause)
1432 cmd_bits |= CMD_RX_PAUSE_IGNORE | CMD_TX_PAUSE_IGNORE;
1433
1434 if (!changed)
1435 return;
1436
1437 if (phydev->link) {
1438 reg = umac_readl(priv, UMAC_CMD);
1439 reg &= ~((CMD_SPEED_MASK << CMD_SPEED_SHIFT) |
1440 CMD_HD_EN | CMD_RX_PAUSE_IGNORE |
1441 CMD_TX_PAUSE_IGNORE);
1442 reg |= cmd_bits;
1443 umac_writel(priv, reg, UMAC_CMD);
1444 }
1445 out:
1446 if (changed)
1447 phy_print_status(phydev);
1448 }
1449
1450 static void bcm_sysport_init_dim(struct bcm_sysport_priv *priv,
1451 void (*cb)(struct work_struct *work))
1452 {
1453 struct bcm_sysport_net_dim *dim = &priv->dim;
1454
1455 INIT_WORK(&dim->dim.work, cb);
1456 dim->dim.mode = NET_DIM_CQ_PERIOD_MODE_START_FROM_EQE;
1457 dim->event_ctr = 0;
1458 dim->packets = 0;
1459 dim->bytes = 0;
1460 }
1461
1462 static void bcm_sysport_init_rx_coalesce(struct bcm_sysport_priv *priv)
1463 {
1464 struct bcm_sysport_net_dim *dim = &priv->dim;
1465 struct net_dim_cq_moder moder;
1466 u32 usecs, pkts;
1467
1468 usecs = priv->rx_coalesce_usecs;
1469 pkts = priv->rx_max_coalesced_frames;
1470
1471 /* If DIM was enabled, re-apply default parameters */
1472 if (dim->use_dim) {
1473 moder = net_dim_get_def_rx_moderation(dim->dim.mode);
1474 usecs = moder.usec;
1475 pkts = moder.pkts;
1476 }
1477
1478 bcm_sysport_set_rx_coalesce(priv, usecs, pkts);
1479 }
1480
1481 static int bcm_sysport_init_tx_ring(struct bcm_sysport_priv *priv,
1482 unsigned int index)
1483 {
1484 struct bcm_sysport_tx_ring *ring = &priv->tx_rings[index];
1485 struct device *kdev = &priv->pdev->dev;
1486 size_t size;
1487 void *p;
1488 u32 reg;
1489
1490 /* Simple descriptors partitioning for now */
1491 size = 256;
1492
1493 /* We just need one DMA descriptor which is DMA-able, since writing to
1494 * the port will allocate a new descriptor in its internal linked-list
1495 */
1496 p = dma_zalloc_coherent(kdev, sizeof(struct dma_desc), &ring->desc_dma,
1497 GFP_KERNEL);
1498 if (!p) {
1499 netif_err(priv, hw, priv->netdev, "DMA alloc failed\n");
1500 return -ENOMEM;
1501 }
1502
1503 ring->cbs = kcalloc(size, sizeof(struct bcm_sysport_cb), GFP_KERNEL);
1504 if (!ring->cbs) {
1505 dma_free_coherent(kdev, sizeof(struct dma_desc),
1506 ring->desc_cpu, ring->desc_dma);
1507 netif_err(priv, hw, priv->netdev, "CB allocation failed\n");
1508 return -ENOMEM;
1509 }
1510
1511 /* Initialize SW view of the ring */
1512 spin_lock_init(&ring->lock);
1513 ring->priv = priv;
1514 netif_tx_napi_add(priv->netdev, &ring->napi, bcm_sysport_tx_poll, 64);
1515 ring->index = index;
1516 ring->size = size;
1517 ring->clean_index = 0;
1518 ring->alloc_size = ring->size;
1519 ring->desc_cpu = p;
1520 ring->desc_count = ring->size;
1521 ring->curr_desc = 0;
1522
1523 /* Initialize HW ring */
1524 tdma_writel(priv, RING_EN, TDMA_DESC_RING_HEAD_TAIL_PTR(index));
1525 tdma_writel(priv, 0, TDMA_DESC_RING_COUNT(index));
1526 tdma_writel(priv, 1, TDMA_DESC_RING_INTR_CONTROL(index));
1527 tdma_writel(priv, 0, TDMA_DESC_RING_PROD_CONS_INDEX(index));
1528
1529 /* Configure QID and port mapping */
1530 reg = tdma_readl(priv, TDMA_DESC_RING_MAPPING(index));
1531 reg &= ~(RING_QID_MASK | RING_PORT_ID_MASK << RING_PORT_ID_SHIFT);
1532 if (ring->inspect) {
1533 reg |= ring->switch_queue & RING_QID_MASK;
1534 reg |= ring->switch_port << RING_PORT_ID_SHIFT;
1535 } else {
1536 reg |= RING_IGNORE_STATUS;
1537 }
1538 tdma_writel(priv, reg, TDMA_DESC_RING_MAPPING(index));
1539 tdma_writel(priv, 0, TDMA_DESC_RING_PCP_DEI_VID(index));
1540
1541 /* Enable ACB algorithm 2 */
1542 reg = tdma_readl(priv, TDMA_CONTROL);
1543 reg |= tdma_control_bit(priv, ACB_ALGO);
1544 tdma_writel(priv, reg, TDMA_CONTROL);
1545
1546 /* Do not use tdma_control_bit() here because TSB_SWAP1 collides
1547 * with the original definition of ACB_ALGO
1548 */
1549 reg = tdma_readl(priv, TDMA_CONTROL);
1550 if (priv->is_lite)
1551 reg &= ~BIT(TSB_SWAP1);
1552 /* Set a correct TSB format based on host endian */
1553 if (!IS_ENABLED(CONFIG_CPU_BIG_ENDIAN))
1554 reg |= tdma_control_bit(priv, TSB_SWAP0);
1555 else
1556 reg &= ~tdma_control_bit(priv, TSB_SWAP0);
1557 tdma_writel(priv, reg, TDMA_CONTROL);
1558
1559 /* Program the number of descriptors as MAX_THRESHOLD and half of
1560 * its size for the hysteresis trigger
1561 */
1562 tdma_writel(priv, ring->size |
1563 1 << RING_HYST_THRESH_SHIFT,
1564 TDMA_DESC_RING_MAX_HYST(index));
1565
1566 /* Enable the ring queue in the arbiter */
1567 reg = tdma_readl(priv, TDMA_TIER1_ARB_0_QUEUE_EN);
1568 reg |= (1 << index);
1569 tdma_writel(priv, reg, TDMA_TIER1_ARB_0_QUEUE_EN);
1570
1571 napi_enable(&ring->napi);
1572
1573 netif_dbg(priv, hw, priv->netdev,
1574 "TDMA cfg, size=%d, desc_cpu=%p switch q=%d,port=%d\n",
1575 ring->size, ring->desc_cpu, ring->switch_queue,
1576 ring->switch_port);
1577
1578 return 0;
1579 }
1580
1581 static void bcm_sysport_fini_tx_ring(struct bcm_sysport_priv *priv,
1582 unsigned int index)
1583 {
1584 struct bcm_sysport_tx_ring *ring = &priv->tx_rings[index];
1585 struct device *kdev = &priv->pdev->dev;
1586 u32 reg;
1587
1588 /* Caller should stop the TDMA engine */
1589 reg = tdma_readl(priv, TDMA_STATUS);
1590 if (!(reg & TDMA_DISABLED))
1591 netdev_warn(priv->netdev, "TDMA not stopped!\n");
1592
1593 /* ring->cbs is the last part in bcm_sysport_init_tx_ring which could
1594 * fail, so by checking this pointer we know whether the TX ring was
1595 * fully initialized or not.
1596 */
1597 if (!ring->cbs)
1598 return;
1599
1600 napi_disable(&ring->napi);
1601 netif_napi_del(&ring->napi);
1602
1603 bcm_sysport_tx_clean(priv, ring);
1604
1605 kfree(ring->cbs);
1606 ring->cbs = NULL;
1607
1608 if (ring->desc_dma) {
1609 dma_free_coherent(kdev, sizeof(struct dma_desc),
1610 ring->desc_cpu, ring->desc_dma);
1611 ring->desc_dma = 0;
1612 }
1613 ring->size = 0;
1614 ring->alloc_size = 0;
1615
1616 netif_dbg(priv, hw, priv->netdev, "TDMA fini done\n");
1617 }
1618
1619 /* RDMA helper */
1620 static inline int rdma_enable_set(struct bcm_sysport_priv *priv,
1621 unsigned int enable)
1622 {
1623 unsigned int timeout = 1000;
1624 u32 reg;
1625
1626 reg = rdma_readl(priv, RDMA_CONTROL);
1627 if (enable)
1628 reg |= RDMA_EN;
1629 else
1630 reg &= ~RDMA_EN;
1631 rdma_writel(priv, reg, RDMA_CONTROL);
1632
1633 /* Poll for RMDA disabling completion */
1634 do {
1635 reg = rdma_readl(priv, RDMA_STATUS);
1636 if (!!(reg & RDMA_DISABLED) == !enable)
1637 return 0;
1638 usleep_range(1000, 2000);
1639 } while (timeout-- > 0);
1640
1641 netdev_err(priv->netdev, "timeout waiting for RDMA to finish\n");
1642
1643 return -ETIMEDOUT;
1644 }
1645
1646 /* TDMA helper */
1647 static inline int tdma_enable_set(struct bcm_sysport_priv *priv,
1648 unsigned int enable)
1649 {
1650 unsigned int timeout = 1000;
1651 u32 reg;
1652
1653 reg = tdma_readl(priv, TDMA_CONTROL);
1654 if (enable)
1655 reg |= tdma_control_bit(priv, TDMA_EN);
1656 else
1657 reg &= ~tdma_control_bit(priv, TDMA_EN);
1658 tdma_writel(priv, reg, TDMA_CONTROL);
1659
1660 /* Poll for TMDA disabling completion */
1661 do {
1662 reg = tdma_readl(priv, TDMA_STATUS);
1663 if (!!(reg & TDMA_DISABLED) == !enable)
1664 return 0;
1665
1666 usleep_range(1000, 2000);
1667 } while (timeout-- > 0);
1668
1669 netdev_err(priv->netdev, "timeout waiting for TDMA to finish\n");
1670
1671 return -ETIMEDOUT;
1672 }
1673
1674 static int bcm_sysport_init_rx_ring(struct bcm_sysport_priv *priv)
1675 {
1676 struct bcm_sysport_cb *cb;
1677 u32 reg;
1678 int ret;
1679 int i;
1680
1681 /* Initialize SW view of the RX ring */
1682 priv->num_rx_bds = priv->num_rx_desc_words / WORDS_PER_DESC;
1683 priv->rx_bds = priv->base + SYS_PORT_RDMA_OFFSET;
1684 priv->rx_c_index = 0;
1685 priv->rx_read_ptr = 0;
1686 priv->rx_cbs = kcalloc(priv->num_rx_bds, sizeof(struct bcm_sysport_cb),
1687 GFP_KERNEL);
1688 if (!priv->rx_cbs) {
1689 netif_err(priv, hw, priv->netdev, "CB allocation failed\n");
1690 return -ENOMEM;
1691 }
1692
1693 for (i = 0; i < priv->num_rx_bds; i++) {
1694 cb = priv->rx_cbs + i;
1695 cb->bd_addr = priv->rx_bds + i * DESC_SIZE;
1696 }
1697
1698 ret = bcm_sysport_alloc_rx_bufs(priv);
1699 if (ret) {
1700 netif_err(priv, hw, priv->netdev, "SKB allocation failed\n");
1701 return ret;
1702 }
1703
1704 /* Initialize HW, ensure RDMA is disabled */
1705 reg = rdma_readl(priv, RDMA_STATUS);
1706 if (!(reg & RDMA_DISABLED))
1707 rdma_enable_set(priv, 0);
1708
1709 rdma_writel(priv, 0, RDMA_WRITE_PTR_LO);
1710 rdma_writel(priv, 0, RDMA_WRITE_PTR_HI);
1711 rdma_writel(priv, 0, RDMA_PROD_INDEX);
1712 rdma_writel(priv, 0, RDMA_CONS_INDEX);
1713 rdma_writel(priv, priv->num_rx_bds << RDMA_RING_SIZE_SHIFT |
1714 RX_BUF_LENGTH, RDMA_RING_BUF_SIZE);
1715 /* Operate the queue in ring mode */
1716 rdma_writel(priv, 0, RDMA_START_ADDR_HI);
1717 rdma_writel(priv, 0, RDMA_START_ADDR_LO);
1718 rdma_writel(priv, 0, RDMA_END_ADDR_HI);
1719 rdma_writel(priv, priv->num_rx_desc_words - 1, RDMA_END_ADDR_LO);
1720
1721 netif_dbg(priv, hw, priv->netdev,
1722 "RDMA cfg, num_rx_bds=%d, rx_bds=%p\n",
1723 priv->num_rx_bds, priv->rx_bds);
1724
1725 return 0;
1726 }
1727
1728 static void bcm_sysport_fini_rx_ring(struct bcm_sysport_priv *priv)
1729 {
1730 struct bcm_sysport_cb *cb;
1731 unsigned int i;
1732 u32 reg;
1733
1734 /* Caller should ensure RDMA is disabled */
1735 reg = rdma_readl(priv, RDMA_STATUS);
1736 if (!(reg & RDMA_DISABLED))
1737 netdev_warn(priv->netdev, "RDMA not stopped!\n");
1738
1739 for (i = 0; i < priv->num_rx_bds; i++) {
1740 cb = &priv->rx_cbs[i];
1741 if (dma_unmap_addr(cb, dma_addr))
1742 dma_unmap_single(&priv->pdev->dev,
1743 dma_unmap_addr(cb, dma_addr),
1744 RX_BUF_LENGTH, DMA_FROM_DEVICE);
1745 bcm_sysport_free_cb(cb);
1746 }
1747
1748 kfree(priv->rx_cbs);
1749 priv->rx_cbs = NULL;
1750
1751 netif_dbg(priv, hw, priv->netdev, "RDMA fini done\n");
1752 }
1753
1754 static void bcm_sysport_set_rx_mode(struct net_device *dev)
1755 {
1756 struct bcm_sysport_priv *priv = netdev_priv(dev);
1757 u32 reg;
1758
1759 if (priv->is_lite)
1760 return;
1761
1762 reg = umac_readl(priv, UMAC_CMD);
1763 if (dev->flags & IFF_PROMISC)
1764 reg |= CMD_PROMISC;
1765 else
1766 reg &= ~CMD_PROMISC;
1767 umac_writel(priv, reg, UMAC_CMD);
1768
1769 /* No support for ALLMULTI */
1770 if (dev->flags & IFF_ALLMULTI)
1771 return;
1772 }
1773
1774 static inline void umac_enable_set(struct bcm_sysport_priv *priv,
1775 u32 mask, unsigned int enable)
1776 {
1777 u32 reg;
1778
1779 if (!priv->is_lite) {
1780 reg = umac_readl(priv, UMAC_CMD);
1781 if (enable)
1782 reg |= mask;
1783 else
1784 reg &= ~mask;
1785 umac_writel(priv, reg, UMAC_CMD);
1786 } else {
1787 reg = gib_readl(priv, GIB_CONTROL);
1788 if (enable)
1789 reg |= mask;
1790 else
1791 reg &= ~mask;
1792 gib_writel(priv, reg, GIB_CONTROL);
1793 }
1794
1795 /* UniMAC stops on a packet boundary, wait for a full-sized packet
1796 * to be processed (1 msec).
1797 */
1798 if (enable == 0)
1799 usleep_range(1000, 2000);
1800 }
1801
1802 static inline void umac_reset(struct bcm_sysport_priv *priv)
1803 {
1804 u32 reg;
1805
1806 if (priv->is_lite)
1807 return;
1808
1809 reg = umac_readl(priv, UMAC_CMD);
1810 reg |= CMD_SW_RESET;
1811 umac_writel(priv, reg, UMAC_CMD);
1812 udelay(10);
1813 reg = umac_readl(priv, UMAC_CMD);
1814 reg &= ~CMD_SW_RESET;
1815 umac_writel(priv, reg, UMAC_CMD);
1816 }
1817
1818 static void umac_set_hw_addr(struct bcm_sysport_priv *priv,
1819 unsigned char *addr)
1820 {
1821 u32 mac0 = (addr[0] << 24) | (addr[1] << 16) | (addr[2] << 8) |
1822 addr[3];
1823 u32 mac1 = (addr[4] << 8) | addr[5];
1824
1825 if (!priv->is_lite) {
1826 umac_writel(priv, mac0, UMAC_MAC0);
1827 umac_writel(priv, mac1, UMAC_MAC1);
1828 } else {
1829 gib_writel(priv, mac0, GIB_MAC0);
1830 gib_writel(priv, mac1, GIB_MAC1);
1831 }
1832 }
1833
1834 static void topctrl_flush(struct bcm_sysport_priv *priv)
1835 {
1836 topctrl_writel(priv, RX_FLUSH, RX_FLUSH_CNTL);
1837 topctrl_writel(priv, TX_FLUSH, TX_FLUSH_CNTL);
1838 mdelay(1);
1839 topctrl_writel(priv, 0, RX_FLUSH_CNTL);
1840 topctrl_writel(priv, 0, TX_FLUSH_CNTL);
1841 }
1842
1843 static int bcm_sysport_change_mac(struct net_device *dev, void *p)
1844 {
1845 struct bcm_sysport_priv *priv = netdev_priv(dev);
1846 struct sockaddr *addr = p;
1847
1848 if (!is_valid_ether_addr(addr->sa_data))
1849 return -EINVAL;
1850
1851 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
1852
1853 /* interface is disabled, changes to MAC will be reflected on next
1854 * open call
1855 */
1856 if (!netif_running(dev))
1857 return 0;
1858
1859 umac_set_hw_addr(priv, dev->dev_addr);
1860
1861 return 0;
1862 }
1863
1864 static void bcm_sysport_get_stats64(struct net_device *dev,
1865 struct rtnl_link_stats64 *stats)
1866 {
1867 struct bcm_sysport_priv *priv = netdev_priv(dev);
1868 struct bcm_sysport_stats64 *stats64 = &priv->stats64;
1869 unsigned int start;
1870
1871 netdev_stats_to_stats64(stats, &dev->stats);
1872
1873 bcm_sysport_update_tx_stats(priv, &stats->tx_bytes,
1874 &stats->tx_packets);
1875
1876 do {
1877 start = u64_stats_fetch_begin_irq(&priv->syncp);
1878 stats->rx_packets = stats64->rx_packets;
1879 stats->rx_bytes = stats64->rx_bytes;
1880 } while (u64_stats_fetch_retry_irq(&priv->syncp, start));
1881 }
1882
1883 static void bcm_sysport_netif_start(struct net_device *dev)
1884 {
1885 struct bcm_sysport_priv *priv = netdev_priv(dev);
1886
1887 /* Enable NAPI */
1888 bcm_sysport_init_dim(priv, bcm_sysport_dim_work);
1889 bcm_sysport_init_rx_coalesce(priv);
1890 napi_enable(&priv->napi);
1891
1892 /* Enable RX interrupt and TX ring full interrupt */
1893 intrl2_0_mask_clear(priv, INTRL2_0_RDMA_MBDONE | INTRL2_0_TX_RING_FULL);
1894
1895 phy_start(dev->phydev);
1896
1897 /* Enable TX interrupts for the TXQs */
1898 if (!priv->is_lite)
1899 intrl2_1_mask_clear(priv, 0xffffffff);
1900 else
1901 intrl2_0_mask_clear(priv, INTRL2_0_TDMA_MBDONE_MASK);
1902
1903 /* Last call before we start the real business */
1904 netif_tx_start_all_queues(dev);
1905 }
1906
1907 static void rbuf_init(struct bcm_sysport_priv *priv)
1908 {
1909 u32 reg;
1910
1911 reg = rbuf_readl(priv, RBUF_CONTROL);
1912 reg |= RBUF_4B_ALGN | RBUF_RSB_EN;
1913 /* Set a correct RSB format on SYSTEMPORT Lite */
1914 if (priv->is_lite)
1915 reg &= ~RBUF_RSB_SWAP1;
1916
1917 /* Set a correct RSB format based on host endian */
1918 if (!IS_ENABLED(CONFIG_CPU_BIG_ENDIAN))
1919 reg |= RBUF_RSB_SWAP0;
1920 else
1921 reg &= ~RBUF_RSB_SWAP0;
1922 rbuf_writel(priv, reg, RBUF_CONTROL);
1923 }
1924
1925 static inline void bcm_sysport_mask_all_intrs(struct bcm_sysport_priv *priv)
1926 {
1927 intrl2_0_mask_set(priv, 0xffffffff);
1928 intrl2_0_writel(priv, 0xffffffff, INTRL2_CPU_CLEAR);
1929 if (!priv->is_lite) {
1930 intrl2_1_mask_set(priv, 0xffffffff);
1931 intrl2_1_writel(priv, 0xffffffff, INTRL2_CPU_CLEAR);
1932 }
1933 }
1934
1935 static inline void gib_set_pad_extension(struct bcm_sysport_priv *priv)
1936 {
1937 u32 reg;
1938
1939 reg = gib_readl(priv, GIB_CONTROL);
1940 /* Include Broadcom tag in pad extension and fix up IPG_LENGTH */
1941 if (netdev_uses_dsa(priv->netdev)) {
1942 reg &= ~(GIB_PAD_EXTENSION_MASK << GIB_PAD_EXTENSION_SHIFT);
1943 reg |= ENET_BRCM_TAG_LEN << GIB_PAD_EXTENSION_SHIFT;
1944 }
1945 reg &= ~(GIB_IPG_LEN_MASK << GIB_IPG_LEN_SHIFT);
1946 reg |= 12 << GIB_IPG_LEN_SHIFT;
1947 gib_writel(priv, reg, GIB_CONTROL);
1948 }
1949
1950 static int bcm_sysport_open(struct net_device *dev)
1951 {
1952 struct bcm_sysport_priv *priv = netdev_priv(dev);
1953 struct phy_device *phydev;
1954 unsigned int i;
1955 int ret;
1956
1957 /* Reset UniMAC */
1958 umac_reset(priv);
1959
1960 /* Flush TX and RX FIFOs at TOPCTRL level */
1961 topctrl_flush(priv);
1962
1963 /* Disable the UniMAC RX/TX */
1964 umac_enable_set(priv, CMD_RX_EN | CMD_TX_EN, 0);
1965
1966 /* Enable RBUF 2bytes alignment and Receive Status Block */
1967 rbuf_init(priv);
1968
1969 /* Set maximum frame length */
1970 if (!priv->is_lite)
1971 umac_writel(priv, UMAC_MAX_MTU_SIZE, UMAC_MAX_FRAME_LEN);
1972 else
1973 gib_set_pad_extension(priv);
1974
1975 /* Apply features again in case we changed them while interface was
1976 * down
1977 */
1978 bcm_sysport_set_features(dev, dev->features);
1979
1980 /* Set MAC address */
1981 umac_set_hw_addr(priv, dev->dev_addr);
1982
1983 phydev = of_phy_connect(dev, priv->phy_dn, bcm_sysport_adj_link,
1984 0, priv->phy_interface);
1985 if (!phydev) {
1986 netdev_err(dev, "could not attach to PHY\n");
1987 return -ENODEV;
1988 }
1989
1990 /* Reset house keeping link status */
1991 priv->old_duplex = -1;
1992 priv->old_link = -1;
1993 priv->old_pause = -1;
1994
1995 /* mask all interrupts and request them */
1996 bcm_sysport_mask_all_intrs(priv);
1997
1998 ret = request_irq(priv->irq0, bcm_sysport_rx_isr, 0, dev->name, dev);
1999 if (ret) {
2000 netdev_err(dev, "failed to request RX interrupt\n");
2001 goto out_phy_disconnect;
2002 }
2003
2004 if (!priv->is_lite) {
2005 ret = request_irq(priv->irq1, bcm_sysport_tx_isr, 0,
2006 dev->name, dev);
2007 if (ret) {
2008 netdev_err(dev, "failed to request TX interrupt\n");
2009 goto out_free_irq0;
2010 }
2011 }
2012
2013 /* Initialize both hardware and software ring */
2014 for (i = 0; i < dev->num_tx_queues; i++) {
2015 ret = bcm_sysport_init_tx_ring(priv, i);
2016 if (ret) {
2017 netdev_err(dev, "failed to initialize TX ring %d\n",
2018 i);
2019 goto out_free_tx_ring;
2020 }
2021 }
2022
2023 /* Initialize linked-list */
2024 tdma_writel(priv, TDMA_LL_RAM_INIT_BUSY, TDMA_STATUS);
2025
2026 /* Initialize RX ring */
2027 ret = bcm_sysport_init_rx_ring(priv);
2028 if (ret) {
2029 netdev_err(dev, "failed to initialize RX ring\n");
2030 goto out_free_rx_ring;
2031 }
2032
2033 /* Turn on RDMA */
2034 ret = rdma_enable_set(priv, 1);
2035 if (ret)
2036 goto out_free_rx_ring;
2037
2038 /* Turn on TDMA */
2039 ret = tdma_enable_set(priv, 1);
2040 if (ret)
2041 goto out_clear_rx_int;
2042
2043 /* Turn on UniMAC TX/RX */
2044 umac_enable_set(priv, CMD_RX_EN | CMD_TX_EN, 1);
2045
2046 bcm_sysport_netif_start(dev);
2047
2048 return 0;
2049
2050 out_clear_rx_int:
2051 intrl2_0_mask_set(priv, INTRL2_0_RDMA_MBDONE | INTRL2_0_TX_RING_FULL);
2052 out_free_rx_ring:
2053 bcm_sysport_fini_rx_ring(priv);
2054 out_free_tx_ring:
2055 for (i = 0; i < dev->num_tx_queues; i++)
2056 bcm_sysport_fini_tx_ring(priv, i);
2057 if (!priv->is_lite)
2058 free_irq(priv->irq1, dev);
2059 out_free_irq0:
2060 free_irq(priv->irq0, dev);
2061 out_phy_disconnect:
2062 phy_disconnect(phydev);
2063 return ret;
2064 }
2065
2066 static void bcm_sysport_netif_stop(struct net_device *dev)
2067 {
2068 struct bcm_sysport_priv *priv = netdev_priv(dev);
2069
2070 /* stop all software from updating hardware */
2071 netif_tx_stop_all_queues(dev);
2072 napi_disable(&priv->napi);
2073 cancel_work_sync(&priv->dim.dim.work);
2074 phy_stop(dev->phydev);
2075
2076 /* mask all interrupts */
2077 bcm_sysport_mask_all_intrs(priv);
2078 }
2079
2080 static int bcm_sysport_stop(struct net_device *dev)
2081 {
2082 struct bcm_sysport_priv *priv = netdev_priv(dev);
2083 unsigned int i;
2084 int ret;
2085
2086 bcm_sysport_netif_stop(dev);
2087
2088 /* Disable UniMAC RX */
2089 umac_enable_set(priv, CMD_RX_EN, 0);
2090
2091 ret = tdma_enable_set(priv, 0);
2092 if (ret) {
2093 netdev_err(dev, "timeout disabling RDMA\n");
2094 return ret;
2095 }
2096
2097 /* Wait for a maximum packet size to be drained */
2098 usleep_range(2000, 3000);
2099
2100 ret = rdma_enable_set(priv, 0);
2101 if (ret) {
2102 netdev_err(dev, "timeout disabling TDMA\n");
2103 return ret;
2104 }
2105
2106 /* Disable UniMAC TX */
2107 umac_enable_set(priv, CMD_TX_EN, 0);
2108
2109 /* Free RX/TX rings SW structures */
2110 for (i = 0; i < dev->num_tx_queues; i++)
2111 bcm_sysport_fini_tx_ring(priv, i);
2112 bcm_sysport_fini_rx_ring(priv);
2113
2114 free_irq(priv->irq0, dev);
2115 if (!priv->is_lite)
2116 free_irq(priv->irq1, dev);
2117
2118 /* Disconnect from PHY */
2119 phy_disconnect(dev->phydev);
2120
2121 return 0;
2122 }
2123
2124 static int bcm_sysport_rule_find(struct bcm_sysport_priv *priv,
2125 u64 location)
2126 {
2127 unsigned int index;
2128 u32 reg;
2129
2130 for_each_set_bit(index, priv->filters, RXCHK_BRCM_TAG_MAX) {
2131 reg = rxchk_readl(priv, RXCHK_BRCM_TAG(index));
2132 reg >>= RXCHK_BRCM_TAG_CID_SHIFT;
2133 reg &= RXCHK_BRCM_TAG_CID_MASK;
2134 if (reg == location)
2135 return index;
2136 }
2137
2138 return -EINVAL;
2139 }
2140
2141 static int bcm_sysport_rule_get(struct bcm_sysport_priv *priv,
2142 struct ethtool_rxnfc *nfc)
2143 {
2144 int index;
2145
2146 /* This is not a rule that we know about */
2147 index = bcm_sysport_rule_find(priv, nfc->fs.location);
2148 if (index < 0)
2149 return -EOPNOTSUPP;
2150
2151 nfc->fs.ring_cookie = RX_CLS_FLOW_WAKE;
2152
2153 return 0;
2154 }
2155
2156 static int bcm_sysport_rule_set(struct bcm_sysport_priv *priv,
2157 struct ethtool_rxnfc *nfc)
2158 {
2159 unsigned int index;
2160 u32 reg;
2161
2162 /* We cannot match locations greater than what the classification ID
2163 * permits (256 entries)
2164 */
2165 if (nfc->fs.location > RXCHK_BRCM_TAG_CID_MASK)
2166 return -E2BIG;
2167
2168 /* We cannot support flows that are not destined for a wake-up */
2169 if (nfc->fs.ring_cookie != RX_CLS_FLOW_WAKE)
2170 return -EOPNOTSUPP;
2171
2172 /* All filters are already in use, we cannot match more rules */
2173 if (bitmap_weight(priv->filters, RXCHK_BRCM_TAG_MAX) ==
2174 RXCHK_BRCM_TAG_MAX)
2175 return -ENOSPC;
2176
2177 index = find_first_zero_bit(priv->filters, RXCHK_BRCM_TAG_MAX);
2178 if (index > RXCHK_BRCM_TAG_MAX)
2179 return -ENOSPC;
2180
2181 /* Location is the classification ID, and index is the position
2182 * within one of our 8 possible filters to be programmed
2183 */
2184 reg = rxchk_readl(priv, RXCHK_BRCM_TAG(index));
2185 reg &= ~(RXCHK_BRCM_TAG_CID_MASK << RXCHK_BRCM_TAG_CID_SHIFT);
2186 reg |= nfc->fs.location << RXCHK_BRCM_TAG_CID_SHIFT;
2187 rxchk_writel(priv, reg, RXCHK_BRCM_TAG(index));
2188 rxchk_writel(priv, 0xff00ffff, RXCHK_BRCM_TAG_MASK(index));
2189
2190 set_bit(index, priv->filters);
2191
2192 return 0;
2193 }
2194
2195 static int bcm_sysport_rule_del(struct bcm_sysport_priv *priv,
2196 u64 location)
2197 {
2198 int index;
2199
2200 /* This is not a rule that we know about */
2201 index = bcm_sysport_rule_find(priv, location);
2202 if (index < 0)
2203 return -EOPNOTSUPP;
2204
2205 /* No need to disable this filter if it was enabled, this will
2206 * be taken care of during suspend time by bcm_sysport_suspend_to_wol
2207 */
2208 clear_bit(index, priv->filters);
2209
2210 return 0;
2211 }
2212
2213 static int bcm_sysport_get_rxnfc(struct net_device *dev,
2214 struct ethtool_rxnfc *nfc, u32 *rule_locs)
2215 {
2216 struct bcm_sysport_priv *priv = netdev_priv(dev);
2217 int ret = -EOPNOTSUPP;
2218
2219 switch (nfc->cmd) {
2220 case ETHTOOL_GRXCLSRULE:
2221 ret = bcm_sysport_rule_get(priv, nfc);
2222 break;
2223 default:
2224 break;
2225 }
2226
2227 return ret;
2228 }
2229
2230 static int bcm_sysport_set_rxnfc(struct net_device *dev,
2231 struct ethtool_rxnfc *nfc)
2232 {
2233 struct bcm_sysport_priv *priv = netdev_priv(dev);
2234 int ret = -EOPNOTSUPP;
2235
2236 switch (nfc->cmd) {
2237 case ETHTOOL_SRXCLSRLINS:
2238 ret = bcm_sysport_rule_set(priv, nfc);
2239 break;
2240 case ETHTOOL_SRXCLSRLDEL:
2241 ret = bcm_sysport_rule_del(priv, nfc->fs.location);
2242 break;
2243 default:
2244 break;
2245 }
2246
2247 return ret;
2248 }
2249
2250 static const struct ethtool_ops bcm_sysport_ethtool_ops = {
2251 .get_drvinfo = bcm_sysport_get_drvinfo,
2252 .get_msglevel = bcm_sysport_get_msglvl,
2253 .set_msglevel = bcm_sysport_set_msglvl,
2254 .get_link = ethtool_op_get_link,
2255 .get_strings = bcm_sysport_get_strings,
2256 .get_ethtool_stats = bcm_sysport_get_stats,
2257 .get_sset_count = bcm_sysport_get_sset_count,
2258 .get_wol = bcm_sysport_get_wol,
2259 .set_wol = bcm_sysport_set_wol,
2260 .get_coalesce = bcm_sysport_get_coalesce,
2261 .set_coalesce = bcm_sysport_set_coalesce,
2262 .get_link_ksettings = phy_ethtool_get_link_ksettings,
2263 .set_link_ksettings = phy_ethtool_set_link_ksettings,
2264 .get_rxnfc = bcm_sysport_get_rxnfc,
2265 .set_rxnfc = bcm_sysport_set_rxnfc,
2266 };
2267
2268 static u16 bcm_sysport_select_queue(struct net_device *dev, struct sk_buff *skb,
2269 struct net_device *sb_dev,
2270 select_queue_fallback_t fallback)
2271 {
2272 struct bcm_sysport_priv *priv = netdev_priv(dev);
2273 u16 queue = skb_get_queue_mapping(skb);
2274 struct bcm_sysport_tx_ring *tx_ring;
2275 unsigned int q, port;
2276
2277 if (!netdev_uses_dsa(dev))
2278 return fallback(dev, skb, NULL);
2279
2280 /* DSA tagging layer will have configured the correct queue */
2281 q = BRCM_TAG_GET_QUEUE(queue);
2282 port = BRCM_TAG_GET_PORT(queue);
2283 tx_ring = priv->ring_map[q + port * priv->per_port_num_tx_queues];
2284
2285 if (unlikely(!tx_ring))
2286 return fallback(dev, skb, NULL);
2287
2288 return tx_ring->index;
2289 }
2290
2291 static const struct net_device_ops bcm_sysport_netdev_ops = {
2292 .ndo_start_xmit = bcm_sysport_xmit,
2293 .ndo_tx_timeout = bcm_sysport_tx_timeout,
2294 .ndo_open = bcm_sysport_open,
2295 .ndo_stop = bcm_sysport_stop,
2296 .ndo_set_features = bcm_sysport_set_features,
2297 .ndo_set_rx_mode = bcm_sysport_set_rx_mode,
2298 .ndo_set_mac_address = bcm_sysport_change_mac,
2299 #ifdef CONFIG_NET_POLL_CONTROLLER
2300 .ndo_poll_controller = bcm_sysport_poll_controller,
2301 #endif
2302 .ndo_get_stats64 = bcm_sysport_get_stats64,
2303 .ndo_select_queue = bcm_sysport_select_queue,
2304 };
2305
2306 static int bcm_sysport_map_queues(struct notifier_block *nb,
2307 struct dsa_notifier_register_info *info)
2308 {
2309 struct bcm_sysport_tx_ring *ring;
2310 struct bcm_sysport_priv *priv;
2311 struct net_device *slave_dev;
2312 unsigned int num_tx_queues;
2313 unsigned int q, start, port;
2314 struct net_device *dev;
2315
2316 priv = container_of(nb, struct bcm_sysport_priv, dsa_notifier);
2317 if (priv->netdev != info->master)
2318 return 0;
2319
2320 dev = info->master;
2321
2322 /* We can't be setting up queue inspection for non directly attached
2323 * switches
2324 */
2325 if (info->switch_number)
2326 return 0;
2327
2328 if (dev->netdev_ops != &bcm_sysport_netdev_ops)
2329 return 0;
2330
2331 port = info->port_number;
2332 slave_dev = info->info.dev;
2333
2334 /* On SYSTEMPORT Lite we have twice as less queues, so we cannot do a
2335 * 1:1 mapping, we can only do a 2:1 mapping. By reducing the number of
2336 * per-port (slave_dev) network devices queue, we achieve just that.
2337 * This need to happen now before any slave network device is used such
2338 * it accurately reflects the number of real TX queues.
2339 */
2340 if (priv->is_lite)
2341 netif_set_real_num_tx_queues(slave_dev,
2342 slave_dev->num_tx_queues / 2);
2343
2344 num_tx_queues = slave_dev->real_num_tx_queues;
2345
2346 if (priv->per_port_num_tx_queues &&
2347 priv->per_port_num_tx_queues != num_tx_queues)
2348 netdev_warn(slave_dev, "asymmetric number of per-port queues\n");
2349
2350 priv->per_port_num_tx_queues = num_tx_queues;
2351
2352 start = find_first_zero_bit(&priv->queue_bitmap, dev->num_tx_queues);
2353 for (q = 0; q < num_tx_queues; q++) {
2354 ring = &priv->tx_rings[q + start];
2355
2356 /* Just remember the mapping actual programming done
2357 * during bcm_sysport_init_tx_ring
2358 */
2359 ring->switch_queue = q;
2360 ring->switch_port = port;
2361 ring->inspect = true;
2362 priv->ring_map[q + port * num_tx_queues] = ring;
2363
2364 /* Set all queues as being used now */
2365 set_bit(q + start, &priv->queue_bitmap);
2366 }
2367
2368 return 0;
2369 }
2370
2371 static int bcm_sysport_dsa_notifier(struct notifier_block *nb,
2372 unsigned long event, void *ptr)
2373 {
2374 struct dsa_notifier_register_info *info;
2375
2376 if (event != DSA_PORT_REGISTER)
2377 return NOTIFY_DONE;
2378
2379 info = ptr;
2380
2381 return notifier_from_errno(bcm_sysport_map_queues(nb, info));
2382 }
2383
2384 #define REV_FMT "v%2x.%02x"
2385
2386 static const struct bcm_sysport_hw_params bcm_sysport_params[] = {
2387 [SYSTEMPORT] = {
2388 .is_lite = false,
2389 .num_rx_desc_words = SP_NUM_HW_RX_DESC_WORDS,
2390 },
2391 [SYSTEMPORT_LITE] = {
2392 .is_lite = true,
2393 .num_rx_desc_words = SP_LT_NUM_HW_RX_DESC_WORDS,
2394 },
2395 };
2396
2397 static const struct of_device_id bcm_sysport_of_match[] = {
2398 { .compatible = "brcm,systemportlite-v1.00",
2399 .data = &bcm_sysport_params[SYSTEMPORT_LITE] },
2400 { .compatible = "brcm,systemport-v1.00",
2401 .data = &bcm_sysport_params[SYSTEMPORT] },
2402 { .compatible = "brcm,systemport",
2403 .data = &bcm_sysport_params[SYSTEMPORT] },
2404 { /* sentinel */ }
2405 };
2406 MODULE_DEVICE_TABLE(of, bcm_sysport_of_match);
2407
2408 static int bcm_sysport_probe(struct platform_device *pdev)
2409 {
2410 const struct bcm_sysport_hw_params *params;
2411 const struct of_device_id *of_id = NULL;
2412 struct bcm_sysport_priv *priv;
2413 struct device_node *dn;
2414 struct net_device *dev;
2415 const void *macaddr;
2416 struct resource *r;
2417 u32 txq, rxq;
2418 int ret;
2419
2420 dn = pdev->dev.of_node;
2421 r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2422 of_id = of_match_node(bcm_sysport_of_match, dn);
2423 if (!of_id || !of_id->data)
2424 return -EINVAL;
2425
2426 /* Fairly quickly we need to know the type of adapter we have */
2427 params = of_id->data;
2428
2429 /* Read the Transmit/Receive Queue properties */
2430 if (of_property_read_u32(dn, "systemport,num-txq", &txq))
2431 txq = TDMA_NUM_RINGS;
2432 if (of_property_read_u32(dn, "systemport,num-rxq", &rxq))
2433 rxq = 1;
2434
2435 /* Sanity check the number of transmit queues */
2436 if (!txq || txq > TDMA_NUM_RINGS)
2437 return -EINVAL;
2438
2439 dev = alloc_etherdev_mqs(sizeof(*priv), txq, rxq);
2440 if (!dev)
2441 return -ENOMEM;
2442
2443 /* Initialize private members */
2444 priv = netdev_priv(dev);
2445
2446 /* Allocate number of TX rings */
2447 priv->tx_rings = devm_kcalloc(&pdev->dev, txq,
2448 sizeof(struct bcm_sysport_tx_ring),
2449 GFP_KERNEL);
2450 if (!priv->tx_rings)
2451 return -ENOMEM;
2452
2453 priv->is_lite = params->is_lite;
2454 priv->num_rx_desc_words = params->num_rx_desc_words;
2455
2456 priv->irq0 = platform_get_irq(pdev, 0);
2457 if (!priv->is_lite) {
2458 priv->irq1 = platform_get_irq(pdev, 1);
2459 priv->wol_irq = platform_get_irq(pdev, 2);
2460 } else {
2461 priv->wol_irq = platform_get_irq(pdev, 1);
2462 }
2463 if (priv->irq0 <= 0 || (priv->irq1 <= 0 && !priv->is_lite)) {
2464 dev_err(&pdev->dev, "invalid interrupts\n");
2465 ret = -EINVAL;
2466 goto err_free_netdev;
2467 }
2468
2469 priv->base = devm_ioremap_resource(&pdev->dev, r);
2470 if (IS_ERR(priv->base)) {
2471 ret = PTR_ERR(priv->base);
2472 goto err_free_netdev;
2473 }
2474
2475 priv->netdev = dev;
2476 priv->pdev = pdev;
2477
2478 priv->phy_interface = of_get_phy_mode(dn);
2479 /* Default to GMII interface mode */
2480 if (priv->phy_interface < 0)
2481 priv->phy_interface = PHY_INTERFACE_MODE_GMII;
2482
2483 /* In the case of a fixed PHY, the DT node associated
2484 * to the PHY is the Ethernet MAC DT node.
2485 */
2486 if (of_phy_is_fixed_link(dn)) {
2487 ret = of_phy_register_fixed_link(dn);
2488 if (ret) {
2489 dev_err(&pdev->dev, "failed to register fixed PHY\n");
2490 goto err_free_netdev;
2491 }
2492
2493 priv->phy_dn = dn;
2494 }
2495
2496 /* Initialize netdevice members */
2497 macaddr = of_get_mac_address(dn);
2498 if (!macaddr || !is_valid_ether_addr(macaddr)) {
2499 dev_warn(&pdev->dev, "using random Ethernet MAC\n");
2500 eth_hw_addr_random(dev);
2501 } else {
2502 ether_addr_copy(dev->dev_addr, macaddr);
2503 }
2504
2505 SET_NETDEV_DEV(dev, &pdev->dev);
2506 dev_set_drvdata(&pdev->dev, dev);
2507 dev->ethtool_ops = &bcm_sysport_ethtool_ops;
2508 dev->netdev_ops = &bcm_sysport_netdev_ops;
2509 netif_napi_add(dev, &priv->napi, bcm_sysport_poll, 64);
2510
2511 /* HW supported features, none enabled by default */
2512 dev->hw_features |= NETIF_F_RXCSUM | NETIF_F_HIGHDMA |
2513 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM;
2514
2515 /* Request the WOL interrupt and advertise suspend if available */
2516 priv->wol_irq_disabled = 1;
2517 ret = devm_request_irq(&pdev->dev, priv->wol_irq,
2518 bcm_sysport_wol_isr, 0, dev->name, priv);
2519 if (!ret)
2520 device_set_wakeup_capable(&pdev->dev, 1);
2521
2522 /* Set the needed headroom once and for all */
2523 BUILD_BUG_ON(sizeof(struct bcm_tsb) != 8);
2524 dev->needed_headroom += sizeof(struct bcm_tsb);
2525
2526 /* libphy will adjust the link state accordingly */
2527 netif_carrier_off(dev);
2528
2529 priv->rx_max_coalesced_frames = 1;
2530 u64_stats_init(&priv->syncp);
2531
2532 priv->dsa_notifier.notifier_call = bcm_sysport_dsa_notifier;
2533
2534 ret = register_dsa_notifier(&priv->dsa_notifier);
2535 if (ret) {
2536 dev_err(&pdev->dev, "failed to register DSA notifier\n");
2537 goto err_deregister_fixed_link;
2538 }
2539
2540 ret = register_netdev(dev);
2541 if (ret) {
2542 dev_err(&pdev->dev, "failed to register net_device\n");
2543 goto err_deregister_notifier;
2544 }
2545
2546 priv->rev = topctrl_readl(priv, REV_CNTL) & REV_MASK;
2547 dev_info(&pdev->dev,
2548 "Broadcom SYSTEMPORT%s" REV_FMT
2549 " at 0x%p (irqs: %d, %d, TXQs: %d, RXQs: %d)\n",
2550 priv->is_lite ? " Lite" : "",
2551 (priv->rev >> 8) & 0xff, priv->rev & 0xff,
2552 priv->base, priv->irq0, priv->irq1, txq, rxq);
2553
2554 return 0;
2555
2556 err_deregister_notifier:
2557 unregister_dsa_notifier(&priv->dsa_notifier);
2558 err_deregister_fixed_link:
2559 if (of_phy_is_fixed_link(dn))
2560 of_phy_deregister_fixed_link(dn);
2561 err_free_netdev:
2562 free_netdev(dev);
2563 return ret;
2564 }
2565
2566 static int bcm_sysport_remove(struct platform_device *pdev)
2567 {
2568 struct net_device *dev = dev_get_drvdata(&pdev->dev);
2569 struct bcm_sysport_priv *priv = netdev_priv(dev);
2570 struct device_node *dn = pdev->dev.of_node;
2571
2572 /* Not much to do, ndo_close has been called
2573 * and we use managed allocations
2574 */
2575 unregister_dsa_notifier(&priv->dsa_notifier);
2576 unregister_netdev(dev);
2577 if (of_phy_is_fixed_link(dn))
2578 of_phy_deregister_fixed_link(dn);
2579 free_netdev(dev);
2580 dev_set_drvdata(&pdev->dev, NULL);
2581
2582 return 0;
2583 }
2584
2585 static int bcm_sysport_suspend_to_wol(struct bcm_sysport_priv *priv)
2586 {
2587 struct net_device *ndev = priv->netdev;
2588 unsigned int timeout = 1000;
2589 unsigned int index, i = 0;
2590 u32 reg;
2591
2592 /* Password has already been programmed */
2593 reg = umac_readl(priv, UMAC_MPD_CTRL);
2594 if (priv->wolopts & (WAKE_MAGIC | WAKE_MAGICSECURE))
2595 reg |= MPD_EN;
2596 reg &= ~PSW_EN;
2597 if (priv->wolopts & WAKE_MAGICSECURE)
2598 reg |= PSW_EN;
2599 umac_writel(priv, reg, UMAC_MPD_CTRL);
2600
2601 if (priv->wolopts & WAKE_FILTER) {
2602 /* Turn on ACPI matching to steal packets from RBUF */
2603 reg = rbuf_readl(priv, RBUF_CONTROL);
2604 if (priv->is_lite)
2605 reg |= RBUF_ACPI_EN_LITE;
2606 else
2607 reg |= RBUF_ACPI_EN;
2608 rbuf_writel(priv, reg, RBUF_CONTROL);
2609
2610 /* Enable RXCHK, active filters and Broadcom tag matching */
2611 reg = rxchk_readl(priv, RXCHK_CONTROL);
2612 reg &= ~(RXCHK_BRCM_TAG_MATCH_MASK <<
2613 RXCHK_BRCM_TAG_MATCH_SHIFT);
2614 for_each_set_bit(index, priv->filters, RXCHK_BRCM_TAG_MAX) {
2615 reg |= BIT(RXCHK_BRCM_TAG_MATCH_SHIFT + i);
2616 i++;
2617 }
2618 reg |= RXCHK_EN | RXCHK_BRCM_TAG_EN;
2619 rxchk_writel(priv, reg, RXCHK_CONTROL);
2620 }
2621
2622 /* Make sure RBUF entered WoL mode as result */
2623 do {
2624 reg = rbuf_readl(priv, RBUF_STATUS);
2625 if (reg & RBUF_WOL_MODE)
2626 break;
2627
2628 udelay(10);
2629 } while (timeout-- > 0);
2630
2631 /* Do not leave the UniMAC RBUF matching only MPD packets */
2632 if (!timeout) {
2633 mpd_enable_set(priv, false);
2634 netif_err(priv, wol, ndev, "failed to enter WOL mode\n");
2635 return -ETIMEDOUT;
2636 }
2637
2638 /* UniMAC receive needs to be turned on */
2639 umac_enable_set(priv, CMD_RX_EN, 1);
2640
2641 /* Enable the interrupt wake-up source */
2642 intrl2_0_mask_clear(priv, INTRL2_0_MPD | INTRL2_0_BRCM_MATCH_TAG);
2643
2644 netif_dbg(priv, wol, ndev, "entered WOL mode\n");
2645
2646 return 0;
2647 }
2648
2649 static int __maybe_unused bcm_sysport_suspend(struct device *d)
2650 {
2651 struct net_device *dev = dev_get_drvdata(d);
2652 struct bcm_sysport_priv *priv = netdev_priv(dev);
2653 unsigned int i;
2654 int ret = 0;
2655 u32 reg;
2656
2657 if (!netif_running(dev))
2658 return 0;
2659
2660 bcm_sysport_netif_stop(dev);
2661
2662 phy_suspend(dev->phydev);
2663
2664 netif_device_detach(dev);
2665
2666 /* Disable UniMAC RX */
2667 umac_enable_set(priv, CMD_RX_EN, 0);
2668
2669 ret = rdma_enable_set(priv, 0);
2670 if (ret) {
2671 netdev_err(dev, "RDMA timeout!\n");
2672 return ret;
2673 }
2674
2675 /* Disable RXCHK if enabled */
2676 if (priv->rx_chk_en) {
2677 reg = rxchk_readl(priv, RXCHK_CONTROL);
2678 reg &= ~RXCHK_EN;
2679 rxchk_writel(priv, reg, RXCHK_CONTROL);
2680 }
2681
2682 /* Flush RX pipe */
2683 if (!priv->wolopts)
2684 topctrl_writel(priv, RX_FLUSH, RX_FLUSH_CNTL);
2685
2686 ret = tdma_enable_set(priv, 0);
2687 if (ret) {
2688 netdev_err(dev, "TDMA timeout!\n");
2689 return ret;
2690 }
2691
2692 /* Wait for a packet boundary */
2693 usleep_range(2000, 3000);
2694
2695 umac_enable_set(priv, CMD_TX_EN, 0);
2696
2697 topctrl_writel(priv, TX_FLUSH, TX_FLUSH_CNTL);
2698
2699 /* Free RX/TX rings SW structures */
2700 for (i = 0; i < dev->num_tx_queues; i++)
2701 bcm_sysport_fini_tx_ring(priv, i);
2702 bcm_sysport_fini_rx_ring(priv);
2703
2704 /* Get prepared for Wake-on-LAN */
2705 if (device_may_wakeup(d) && priv->wolopts)
2706 ret = bcm_sysport_suspend_to_wol(priv);
2707
2708 return ret;
2709 }
2710
2711 static int __maybe_unused bcm_sysport_resume(struct device *d)
2712 {
2713 struct net_device *dev = dev_get_drvdata(d);
2714 struct bcm_sysport_priv *priv = netdev_priv(dev);
2715 unsigned int i;
2716 int ret;
2717
2718 if (!netif_running(dev))
2719 return 0;
2720
2721 umac_reset(priv);
2722
2723 /* We may have been suspended and never received a WOL event that
2724 * would turn off MPD detection, take care of that now
2725 */
2726 bcm_sysport_resume_from_wol(priv);
2727
2728 /* Initialize both hardware and software ring */
2729 for (i = 0; i < dev->num_tx_queues; i++) {
2730 ret = bcm_sysport_init_tx_ring(priv, i);
2731 if (ret) {
2732 netdev_err(dev, "failed to initialize TX ring %d\n",
2733 i);
2734 goto out_free_tx_rings;
2735 }
2736 }
2737
2738 /* Initialize linked-list */
2739 tdma_writel(priv, TDMA_LL_RAM_INIT_BUSY, TDMA_STATUS);
2740
2741 /* Initialize RX ring */
2742 ret = bcm_sysport_init_rx_ring(priv);
2743 if (ret) {
2744 netdev_err(dev, "failed to initialize RX ring\n");
2745 goto out_free_rx_ring;
2746 }
2747
2748 netif_device_attach(dev);
2749
2750 /* RX pipe enable */
2751 topctrl_writel(priv, 0, RX_FLUSH_CNTL);
2752
2753 ret = rdma_enable_set(priv, 1);
2754 if (ret) {
2755 netdev_err(dev, "failed to enable RDMA\n");
2756 goto out_free_rx_ring;
2757 }
2758
2759 /* Restore enabled features */
2760 bcm_sysport_set_features(dev, dev->features);
2761
2762 rbuf_init(priv);
2763
2764 /* Set maximum frame length */
2765 if (!priv->is_lite)
2766 umac_writel(priv, UMAC_MAX_MTU_SIZE, UMAC_MAX_FRAME_LEN);
2767 else
2768 gib_set_pad_extension(priv);
2769
2770 /* Set MAC address */
2771 umac_set_hw_addr(priv, dev->dev_addr);
2772
2773 umac_enable_set(priv, CMD_RX_EN, 1);
2774
2775 /* TX pipe enable */
2776 topctrl_writel(priv, 0, TX_FLUSH_CNTL);
2777
2778 umac_enable_set(priv, CMD_TX_EN, 1);
2779
2780 ret = tdma_enable_set(priv, 1);
2781 if (ret) {
2782 netdev_err(dev, "TDMA timeout!\n");
2783 goto out_free_rx_ring;
2784 }
2785
2786 phy_resume(dev->phydev);
2787
2788 bcm_sysport_netif_start(dev);
2789
2790 return 0;
2791
2792 out_free_rx_ring:
2793 bcm_sysport_fini_rx_ring(priv);
2794 out_free_tx_rings:
2795 for (i = 0; i < dev->num_tx_queues; i++)
2796 bcm_sysport_fini_tx_ring(priv, i);
2797 return ret;
2798 }
2799
2800 static SIMPLE_DEV_PM_OPS(bcm_sysport_pm_ops,
2801 bcm_sysport_suspend, bcm_sysport_resume);
2802
2803 static struct platform_driver bcm_sysport_driver = {
2804 .probe = bcm_sysport_probe,
2805 .remove = bcm_sysport_remove,
2806 .driver = {
2807 .name = "brcm-systemport",
2808 .of_match_table = bcm_sysport_of_match,
2809 .pm = &bcm_sysport_pm_ops,
2810 },
2811 };
2812 module_platform_driver(bcm_sysport_driver);
2813
2814 MODULE_AUTHOR("Broadcom Corporation");
2815 MODULE_DESCRIPTION("Broadcom System Port Ethernet MAC driver");
2816 MODULE_ALIAS("platform:brcm-systemport");
2817 MODULE_LICENSE("GPL");
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