| blob | 6f3cd0fb4b54a2411365323cb06f561e09fcf6af |
1 /*
2 * Low Level Interrupts/Traps/Exceptions(non-TLB) Handling for ARC
3 *
4 * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * vineetg: May 2011
11 * -Userspace unaligned access emulation
12 *
13 * vineetg: Feb 2011 (ptrace low level code fixes)
14 * -traced syscall return code (r0) was not saved into pt_regs for restoring
15 * into user reg-file when traded task rets to user space.
16 * -syscalls needing arch-wrappers (mainly for passing sp as pt_regs)
17 * were not invoking post-syscall trace hook (jumping directly into
18 * ret_from_system_call)
19 *
20 * vineetg: Nov 2010:
21 * -Vector table jumps (@8 bytes) converted into branches (@4 bytes)
22 * -To maintain the slot size of 8 bytes/vector, added nop, which is
23 * not executed at runtime.
24 *
25 * vineetg: Nov 2009 (Everything needed for TIF_RESTORE_SIGMASK)
26 * -do_signal()invoked upon TIF_RESTORE_SIGMASK as well
27 * -Wrappers for sys_{,rt_}sigsuspend() nolonger needed as they don't
28 * need ptregs anymore
29 *
30 * Vineetg: Oct 2009
31 * -In a rare scenario, Process gets a Priv-V exception and gets scheduled
32 * out. Since we don't do FAKE RTIE for Priv-V, CPU excpetion state remains
33 * active (AE bit enabled). This causes a double fault for a subseq valid
34 * exception. Thus FAKE RTIE needed in low level Priv-Violation handler.
35 * Instr Error could also cause similar scenario, so same there as well.
36 *
37 * Vineetg: March 2009 (Supporting 2 levels of Interrupts)
38 *
39 * Vineetg: Aug 28th 2008: Bug #94984
40 * -Zero Overhead Loop Context shd be cleared when entering IRQ/EXcp/Trap
41 * Normally CPU does this automatically, however when doing FAKE rtie,
42 * we need to explicitly do this. The problem in macros
43 * FAKE_RET_FROM_EXCPN and FAKE_RET_FROM_EXCPN_LOCK_IRQ was that this bit
44 * was being "CLEARED" rather then "SET". Since it is Loop INHIBIT Bit,
45 * setting it and not clearing it clears ZOL context
46 *
47 * Vineetg: May 16th, 2008
48 * - r25 now contains the Current Task when in kernel
49 *
50 * Vineetg: Dec 22, 2007
51 * Minor Surgery of Low Level ISR to make it SMP safe
52 * - MMU_SCRATCH0 Reg used for freeing up r9 in Level 1 ISR
53 * - _current_task is made an array of NR_CPUS
54 * - Access of _current_task wrapped inside a macro so that if hardware
55 * team agrees for a dedicated reg, no other code is touched
56 *
57 * Amit Bhor, Rahul Trivedi, Kanika Nema, Sameer Dhavale : Codito Tech 2004
58 */
60 /*------------------------------------------------------------------
61 * Function ABI
62 *------------------------------------------------------------------
63 *
64 * Arguments r0 - r7
65 * Caller Saved Registers r0 - r12
66 * Callee Saved Registers r13- r25
67 * Global Pointer (gp) r26
68 * Frame Pointer (fp) r27
69 * Stack Pointer (sp) r28
70 * Interrupt link register (ilink1) r29
71 * Interrupt link register (ilink2) r30
72 * Branch link register (blink) r31
73 *------------------------------------------------------------------
74 */
76 .cpu A7
78 ;############################ Vector Table #################################
80 .macro VECTOR lbl
81 #if 1 /* Just in case, build breaks */
82 j \lbl
83 #else
84 b \lbl
85 nop
86 #endif
87 .endm
89 .section .vector, "ax",@progbits
90 .align 4
92 /* Each entry in the vector table must occupy 2 words. Since it is a jump
93 * across sections (.vector to .text) we are gauranteed that 'j somewhere'
94 * will use the 'j limm' form of the intrsuction as long as somewhere is in
95 * a section other than .vector.
96 */
98 ; ********* Critical System Events **********************
99 VECTOR res_service ; 0x0, Restart Vector (0x0)
100 VECTOR mem_service ; 0x8, Mem exception (0x1)
101 VECTOR instr_service ; 0x10, Instrn Error (0x2)
103 ; ******************** Device ISRs **********************
104 #ifdef CONFIG_ARC_IRQ3_LV2
105 VECTOR handle_interrupt_level2
106 #else
107 VECTOR handle_interrupt_level1
108 #endif
110 VECTOR handle_interrupt_level1
112 #ifdef CONFIG_ARC_IRQ5_LV2
113 VECTOR handle_interrupt_level2
114 #else
115 VECTOR handle_interrupt_level1
116 #endif
118 #ifdef CONFIG_ARC_IRQ6_LV2
119 VECTOR handle_interrupt_level2
120 #else
121 VECTOR handle_interrupt_level1
122 #endif
124 .rept 25
125 VECTOR handle_interrupt_level1 ; Other devices
126 .endr
128 /* FOR ARC600: timer = 0x3, uart = 0x8, emac = 0x10 */
130 ; ******************** Exceptions **********************
131 VECTOR EV_MachineCheck ; 0x100, Fatal Machine check (0x20)
132 VECTOR EV_TLBMissI ; 0x108, Intruction TLB miss (0x21)
133 VECTOR EV_TLBMissD ; 0x110, Data TLB miss (0x22)
134 VECTOR EV_TLBProtV ; 0x118, Protection Violation (0x23)
135 ; or Misaligned Access
136 VECTOR EV_PrivilegeV ; 0x120, Privilege Violation (0x24)
137 VECTOR EV_Trap ; 0x128, Trap exception (0x25)
138 VECTOR EV_Extension ; 0x130, Extn Intruction Excp (0x26)
140 .rept 24
141 VECTOR reserved ; Reserved Exceptions
142 .endr
144 #include <linux/linkage.h> /* ARC_{EXTRY,EXIT} */
145 #include <asm/entry.h> /* SAVE_ALL_{INT1,INT2,TRAP...} */
146 #include <asm/errno.h>
147 #include <asm/arcregs.h>
148 #include <asm/irqflags.h>
150 ;##################### Scratch Mem for IRQ stack switching #############
152 ARCFP_DATA int1_saved_reg
153 .align 32
154 .type int1_saved_reg, @object
155 .size int1_saved_reg, 4
156 int1_saved_reg:
157 .zero 4
159 /* Each Interrupt level needs it's own scratch */
160 #ifdef CONFIG_ARC_COMPACT_IRQ_LEVELS
162 ARCFP_DATA int2_saved_reg
163 .type int2_saved_reg, @object
164 .size int2_saved_reg, 4
165 int2_saved_reg:
166 .zero 4
168 #endif
170 ; ---------------------------------------------
171 .section .text, "ax",@progbits
173 res_service: ; processor restart
174 flag 0x1 ; not implemented
175 nop
176 nop
178 reserved: ; processor restart
179 rtie ; jump to processor initializations
181 ;##################### Interrupt Handling ##############################
183 #ifdef CONFIG_ARC_COMPACT_IRQ_LEVELS
184 ; ---------------------------------------------
185 ; Level 2 ISR: Can interrupt a Level 1 ISR
186 ; ---------------------------------------------
187 ARC_ENTRY handle_interrupt_level2
189 ; TODO-vineetg for SMP this wont work
190 ; free up r9 as scratchpad
191 st r9, [@int2_saved_reg]
193 ;Which mode (user/kernel) was the system in when intr occured
194 lr r9, [status32_l2]
196 SWITCH_TO_KERNEL_STK
197 SAVE_ALL_INT2
199 ;------------------------------------------------------
200 ; if L2 IRQ interrupted a L1 ISR, disable preemption
201 ;------------------------------------------------------
203 ld r9, [sp, PT_status32] ; get statu32_l2 (saved in pt_regs)
204 bbit0 r9, STATUS_A1_BIT, 1f ; L1 not active when L2 IRQ, so normal
206 ; A1 is set in status32_l2
207 ; bump thread_info->preempt_count (Disable preemption)
208 GET_CURR_THR_INFO_FROM_SP r10
209 ld r9, [r10, THREAD_INFO_PREEMPT_COUNT]
210 add r9, r9, 1
211 st r9, [r10, THREAD_INFO_PREEMPT_COUNT]
213 1:
214 ;------------------------------------------------------
215 ; setup params for Linux common ISR and invoke it
216 ;------------------------------------------------------
217 lr r0, [icause2]
218 and r0, r0, 0x1f
220 bl.d @arch_do_IRQ
221 mov r1, sp
223 mov r8,0x2
224 sr r8, [AUX_IRQ_LV12] ; clear bit in Sticky Status Reg
226 b ret_from_exception
228 ARC_EXIT handle_interrupt_level2
230 #endif
232 ; ---------------------------------------------
233 ; Level 1 ISR
234 ; ---------------------------------------------
235 ARC_ENTRY handle_interrupt_level1
237 /* free up r9 as scratchpad */
238 #ifdef CONFIG_SMP
239 sr r9, [ARC_REG_SCRATCH_DATA0]
240 #else
241 st r9, [@int1_saved_reg]
242 #endif
244 ;Which mode (user/kernel) was the system in when intr occured
245 lr r9, [status32_l1]
247 SWITCH_TO_KERNEL_STK
248 SAVE_ALL_INT1
250 lr r0, [icause1]
251 and r0, r0, 0x1f
253 bl.d @arch_do_IRQ
254 mov r1, sp
256 mov r8,0x1
257 sr r8, [AUX_IRQ_LV12] ; clear bit in Sticky Status Reg
259 b ret_from_exception
260 ARC_EXIT handle_interrupt_level1
262 ;################### Non TLB Exception Handling #############################
264 ; ---------------------------------------------
265 ; Instruction Error Exception Handler
266 ; ---------------------------------------------
268 ARC_ENTRY instr_service
270 EXCPN_PROLOG_FREEUP_REG r9
272 lr r9, [erstatus]
274 SWITCH_TO_KERNEL_STK
275 SAVE_ALL_SYS
277 lr r0, [ecr]
278 lr r1, [efa]
280 mov r2, sp
282 FAKE_RET_FROM_EXCPN r9
284 bl do_insterror_or_kprobe
285 b ret_from_exception
286 ARC_EXIT instr_service
288 ; ---------------------------------------------
289 ; Memory Error Exception Handler
290 ; ---------------------------------------------
292 ARC_ENTRY mem_service
294 EXCPN_PROLOG_FREEUP_REG r9
296 lr r9, [erstatus]
298 SWITCH_TO_KERNEL_STK
299 SAVE_ALL_SYS
301 lr r0, [ecr]
302 lr r1, [efa]
303 mov r2, sp
304 bl do_memory_error
305 b ret_from_exception
306 ARC_EXIT mem_service
308 ; ---------------------------------------------
309 ; Machine Check Exception Handler
310 ; ---------------------------------------------
312 ARC_ENTRY EV_MachineCheck
314 EXCPN_PROLOG_FREEUP_REG r9
315 lr r9, [erstatus]
317 SWITCH_TO_KERNEL_STK
318 SAVE_ALL_SYS
320 lr r0, [ecr]
321 lr r1, [efa]
322 mov r2, sp
324 brne r0, 0x200100, 1f
325 bl do_tlb_overlap_fault
326 b ret_from_exception
328 1:
329 ; DEAD END: can't do much, display Regs and HALT
330 SAVE_CALLEE_SAVED_USER
332 GET_CURR_TASK_FIELD_PTR TASK_THREAD, r10
333 st sp, [r10, THREAD_CALLEE_REG]
335 j do_machine_check_fault
337 ARC_EXIT EV_MachineCheck
339 ; ---------------------------------------------
340 ; Protection Violation Exception Handler
341 ; ---------------------------------------------
343 ARC_ENTRY EV_TLBProtV
345 EXCPN_PROLOG_FREEUP_REG r9
347 ;Which mode (user/kernel) was the system in when Exception occured
348 lr r9, [erstatus]
350 SWITCH_TO_KERNEL_STK
351 SAVE_ALL_SYS
353 ;---------(3) Save some more regs-----------------
354 ; vineetg: Mar 6th: Random Seg Fault issue #1
355 ; ecr and efa were not saved in case an Intr sneaks in
356 ; after fake rtie
357 ;
358 lr r3, [ecr]
359 lr r4, [efa]
361 ; --------(4) Return from CPU Exception Mode ---------
362 ; Fake a rtie, but rtie to next label
363 ; That way, subsequently, do_page_fault ( ) executes in pure kernel
364 ; mode with further Exceptions enabled
366 FAKE_RET_FROM_EXCPN r9
368 ;------ (5) Type of Protection Violation? ----------
369 ;
370 ; ProtV Hardware Exception is triggered for Access Faults of 2 types
371 ; -Access Violaton (WRITE to READ ONLY Page) - for linux COW
372 ; -Unaligned Access (READ/WRITE on odd boundary)
373 ;
374 cmp r3, 0x230400 ; Misaligned data access ?
375 beq 4f
377 ;========= (6a) Access Violation Processing ========
378 cmp r3, 0x230100
379 mov r1, 0x0 ; if LD exception ? write = 0
380 mov.ne r1, 0x1 ; else write = 1
382 mov r2, r4 ; faulting address
383 mov r0, sp ; pt_regs
384 bl do_page_fault
385 b ret_from_exception
387 ;========== (6b) Non aligned access ============
388 4:
389 mov r0, r3 ; cause code
390 mov r1, r4 ; faulting address
391 mov r2, sp ; pt_regs
393 #ifdef CONFIG_ARC_MISALIGN_ACCESS
394 SAVE_CALLEE_SAVED_USER
395 mov r3, sp ; callee_regs
397 bl do_misaligned_access
399 ; TBD: optimize - do this only if a callee reg was involved
400 ; either a dst of emulated LD/ST or src with address-writeback
401 RESTORE_CALLEE_SAVED_USER
402 #else
403 bl do_misaligned_error
404 #endif
406 b ret_from_exception
408 ARC_EXIT EV_TLBProtV
410 ; ---------------------------------------------
411 ; Privilege Violation Exception Handler
412 ; ---------------------------------------------
413 ARC_ENTRY EV_PrivilegeV
415 EXCPN_PROLOG_FREEUP_REG r9
417 lr r9, [erstatus]
419 SWITCH_TO_KERNEL_STK
420 SAVE_ALL_SYS
422 lr r0, [ecr]
423 lr r1, [efa]
424 mov r2, sp
426 FAKE_RET_FROM_EXCPN r9
428 bl do_privilege_fault
429 b ret_from_exception
430 ARC_EXIT EV_PrivilegeV
432 ; ---------------------------------------------
433 ; Extension Instruction Exception Handler
434 ; ---------------------------------------------
435 ARC_ENTRY EV_Extension
437 EXCPN_PROLOG_FREEUP_REG r9
438 lr r9, [erstatus]
440 SWITCH_TO_KERNEL_STK
441 SAVE_ALL_SYS
443 lr r0, [ecr]
444 lr r1, [efa]
445 mov r2, sp
446 bl do_extension_fault
447 b ret_from_exception
448 ARC_EXIT EV_Extension
450 ;######################### System Call Tracing #########################
452 tracesys:
453 ; save EFA in case tracer wants the PC of traced task
454 ; using ERET won't work since next-PC has already committed
455 lr r12, [efa]
456 GET_CURR_TASK_FIELD_PTR TASK_THREAD, r11
457 st r12, [r11, THREAD_FAULT_ADDR] ; thread.fault_address
459 ; PRE Sys Call Ptrace hook
460 mov r0, sp ; pt_regs needed
461 bl @syscall_trace_entry
463 ; Tracing code now returns the syscall num (orig or modif)
464 mov r8, r0
466 ; Do the Sys Call as we normally would.
467 ; Validate the Sys Call number
468 cmp r8, NR_syscalls
469 mov.hi r0, -ENOSYS
470 bhi tracesys_exit
472 ; Restore the sys-call args. Mere invocation of the hook abv could have
473 ; clobbered them (since they are in scratch regs). The tracer could also
474 ; have deliberately changed the syscall args: r0-r7
475 ld r0, [sp, PT_r0]
476 ld r1, [sp, PT_r1]
477 ld r2, [sp, PT_r2]
478 ld r3, [sp, PT_r3]
479 ld r4, [sp, PT_r4]
480 ld r5, [sp, PT_r5]
481 ld r6, [sp, PT_r6]
482 ld r7, [sp, PT_r7]
483 ld.as r9, [sys_call_table, r8]
484 jl [r9] ; Entry into Sys Call Handler
486 tracesys_exit:
487 st r0, [sp, PT_r0] ; sys call return value in pt_regs
489 ;POST Sys Call Ptrace Hook
490 bl @syscall_trace_exit
491 b ret_from_exception ; NOT ret_from_system_call at is saves r0 which
492 ; we'd done before calling post hook above
494 ;################### Break Point TRAP ##########################
496 ; ======= (5b) Trap is due to Break-Point =========
498 trap_with_param:
500 ; stop_pc info by gdb needs this info
501 st orig_r8_IS_BRKPT, [sp, PT_orig_r8]
503 mov r0, r12
504 lr r1, [efa]
505 mov r2, sp
507 ; Now that we have read EFA, its safe to do "fake" rtie
508 ; and get out of CPU exception mode
509 FAKE_RET_FROM_EXCPN r11
511 ; Save callee regs in case gdb wants to have a look
512 ; SP will grow up by size of CALLEE Reg-File
513 ; NOTE: clobbers r12
514 SAVE_CALLEE_SAVED_USER
516 ; save location of saved Callee Regs @ thread_struct->pc
517 GET_CURR_TASK_FIELD_PTR TASK_THREAD, r10
518 st sp, [r10, THREAD_CALLEE_REG]
520 ; Call the trap handler
521 bl do_non_swi_trap
523 ; unwind stack to discard Callee saved Regs
524 DISCARD_CALLEE_SAVED_USER
526 b ret_from_exception
528 ;##################### Trap Handling ##############################
529 ;
530 ; EV_Trap caused by TRAP_S and TRAP0 instructions.
531 ;------------------------------------------------------------------
532 ; (1) System Calls
533 ; :parameters in r0-r7.
534 ; :r8 has the system call number
535 ; (2) Break Points
536 ;------------------------------------------------------------------
538 ARC_ENTRY EV_Trap
540 ; Need at least 1 reg to code the early exception prolog
541 EXCPN_PROLOG_FREEUP_REG r9
543 ;Which mode (user/kernel) was the system in when intr occured
544 lr r9, [erstatus]
546 SWITCH_TO_KERNEL_STK
547 SAVE_ALL_TRAP
549 ;------- (4) What caused the Trap --------------
550 lr r12, [ecr]
551 and.f 0, r12, ECR_PARAM_MASK
552 bnz trap_with_param
554 ; ======= (5a) Trap is due to System Call ========
556 ; Before doing anything, return from CPU Exception Mode
557 FAKE_RET_FROM_EXCPN r11
559 ; If syscall tracing ongoing, invoke pre-pos-hooks
560 GET_CURR_THR_INFO_FLAGS r10
561 btst r10, TIF_SYSCALL_TRACE
562 bnz tracesys ; this never comes back
564 ;============ This is normal System Call case ==========
565 ; Sys-call num shd not exceed the total system calls avail
566 cmp r8, NR_syscalls
567 mov.hi r0, -ENOSYS
568 bhi ret_from_system_call
570 ; Offset into the syscall_table and call handler
571 ld.as r9,[sys_call_table, r8]
572 jl [r9] ; Entry into Sys Call Handler
574 ; fall through to ret_from_system_call
575 ARC_EXIT EV_Trap
577 ARC_ENTRY ret_from_system_call
579 st r0, [sp, PT_r0] ; sys call return value in pt_regs
581 ; fall through yet again to ret_from_exception
583 ;############# Return from Intr/Excp/Trap (Linux Specifics) ##############
584 ;
585 ; If ret to user mode do we need to handle signals, schedule() et al.
587 ARC_ENTRY ret_from_exception
589 ; Pre-{IRQ,Trap,Exception} K/U mode from pt_regs->status32
590 ld r8, [sp, PT_status32] ; returning to User/Kernel Mode
592 bbit0 r8, STATUS_U_BIT, resume_kernel_mode
594 ; Before returning to User mode check-for-and-complete any pending work
595 ; such as rescheduling/signal-delivery etc.
596 resume_user_mode_begin:
598 ; Disable IRQs to ensures that chk for pending work itself is atomic
599 ; (and we don't end up missing a NEED_RESCHED/SIGPENDING due to an
600 ; interim IRQ).
601 IRQ_DISABLE r10
603 ; Fast Path return to user mode if no pending work
604 GET_CURR_THR_INFO_FLAGS r9
605 and.f 0, r9, _TIF_WORK_MASK
606 bz restore_regs
608 ; --- (Slow Path #1) task preemption ---
609 bbit0 r9, TIF_NEED_RESCHED, .Lchk_pend_signals
610 mov blink, resume_user_mode_begin ; tail-call to U mode ret chks
611 b @schedule ; BTST+Bnz causes relo error in link
613 .Lchk_pend_signals:
614 IRQ_ENABLE r10
616 ; --- (Slow Path #2) pending signal ---
617 mov r0, sp ; pt_regs for arg to do_signal()/do_notify_resume()
619 bbit0 r9, TIF_SIGPENDING, .Lchk_notify_resume
621 ; Normal Trap/IRQ entry only saves Scratch (caller-saved) regs
622 ; in pt_reg since the "C" ABI (kernel code) will automatically
623 ; save/restore callee-saved regs.
624 ;
625 ; However, here we need to explicitly save callee regs because
626 ; (i) If this signal causes coredump - full regfile needed
627 ; (ii) If signal is SIGTRAP/SIGSTOP, task is being traced thus
628 ; tracer might call PEEKUSR(CALLEE reg)
629 ;
630 ; NOTE: SP will grow up by size of CALLEE Reg-File
631 SAVE_CALLEE_SAVED_USER ; clobbers r12
633 ; save location of saved Callee Regs @ thread_struct->callee
634 GET_CURR_TASK_FIELD_PTR TASK_THREAD, r10
635 st sp, [r10, THREAD_CALLEE_REG]
637 bl @do_signal
639 ; Ideally we want to discard the Callee reg above, however if this was
640 ; a tracing signal, tracer could have done a POKEUSR(CALLEE reg)
641 RESTORE_CALLEE_SAVED_USER
643 b resume_user_mode_begin ; loop back to start of U mode ret
645 ; --- (Slow Path #3) notify_resume ---
646 .Lchk_notify_resume:
647 btst r9, TIF_NOTIFY_RESUME
648 blnz @do_notify_resume
649 b resume_user_mode_begin ; unconditionally back to U mode ret chks
650 ; for single exit point from this block
652 resume_kernel_mode:
654 ; Disable Interrupts from this point on
655 ; CONFIG_PREEMPT: This is a must for preempt_schedule_irq()
656 ; !CONFIG_PREEMPT: To ensure restore_regs is intr safe
657 IRQ_DISABLE r9
659 #ifdef CONFIG_PREEMPT
661 ; Can't preempt if preemption disabled
662 GET_CURR_THR_INFO_FROM_SP r10
663 ld r8, [r10, THREAD_INFO_PREEMPT_COUNT]
664 brne r8, 0, restore_regs
666 ; check if this task's NEED_RESCHED flag set
667 ld r9, [r10, THREAD_INFO_FLAGS]
668 bbit0 r9, TIF_NEED_RESCHED, restore_regs
670 ; Invoke PREEMPTION
671 bl preempt_schedule_irq
673 ; preempt_schedule_irq() always returns with IRQ disabled
674 #endif
676 ; fall through
678 ;############# Return from Intr/Excp/Trap (ARC Specifics) ##############
679 ;
680 ; Restore the saved sys context (common exit-path for EXCPN/IRQ/Trap)
681 ; IRQ shd definitely not happen between now and rtie
682 ; All 2 entry points to here already disable interrupts
684 restore_regs :
686 lr r10, [status32]
688 #ifdef CONFIG_ARC_CURR_IN_REG
689 ; Restore User R25
690 ; Earlier this used to be only for returning to user mode
691 ; However with 2 levels of IRQ this can also happen even if
692 ; in kernel mode
693 ld r9, [sp, PT_sp]
694 brhs r9, VMALLOC_START, 8f
695 RESTORE_USER_R25
696 8:
697 #endif
699 ; Restore REG File. In case multiple Events outstanding,
700 ; use the same priorty as rtie: EXCPN, L2 IRQ, L1 IRQ, None
701 ; Note that we use realtime STATUS32 (not pt_regs->status32) to
702 ; decide that.
704 ; if Returning from Exception
705 bbit0 r10, STATUS_AE_BIT, not_exception
706 RESTORE_ALL_SYS
707 rtie
709 ; Not Exception so maybe Interrupts (Level 1 or 2)
711 not_exception:
713 #ifdef CONFIG_ARC_COMPACT_IRQ_LEVELS
715 bbit0 r10, STATUS_A2_BIT, not_level2_interrupt
717 ;------------------------------------------------------------------
718 ; if L2 IRQ interrupted a L1 ISR, we'd disbaled preemption earlier
719 ; so that sched doesnt move to new task, causing L1 to be delayed
720 ; undeterministically. Now that we've achieved that, lets reset
721 ; things to what they were, before returning from L2 context
722 ;----------------------------------------------------------------
724 ld r9, [sp, PT_orig_r8] ; get orig_r8 to make sure it is
725 brne r9, orig_r8_IS_IRQ2, 149f ; infact a L2 ISR ret path
727 ld r9, [sp, PT_status32] ; get statu32_l2 (saved in pt_regs)
728 bbit0 r9, STATUS_A1_BIT, 149f ; L1 not active when L2 IRQ, so normal
730 ; A1 is set in status32_l2
731 ; decrement thread_info->preempt_count (re-enable preemption)
732 GET_CURR_THR_INFO_FROM_SP r10
733 ld r9, [r10, THREAD_INFO_PREEMPT_COUNT]
735 ; paranoid check, given A1 was active when A2 happened, preempt count
736 ; must not be 0 beccause we would have incremented it.
737 ; If this does happen we simply HALT as it means a BUG !!!
738 cmp r9, 0
739 bnz 2f
740 flag 1
742 2:
743 sub r9, r9, 1
744 st r9, [r10, THREAD_INFO_PREEMPT_COUNT]
746 149:
747 ;return from level 2
748 RESTORE_ALL_INT2
749 debug_marker_l2:
750 rtie
752 not_level2_interrupt:
754 #endif
756 bbit0 r10, STATUS_A1_BIT, not_level1_interrupt
758 ;return from level 1
760 RESTORE_ALL_INT1
761 debug_marker_l1:
762 rtie
764 not_level1_interrupt:
766 ;this case is for syscalls or Exceptions (with fake rtie)
768 RESTORE_ALL_SYS
769 debug_marker_syscall:
770 rtie
772 ARC_EXIT ret_from_exception
774 ARC_ENTRY ret_from_fork
775 ; when the forked child comes here from the __switch_to function
776 ; r0 has the last task pointer.
777 ; put last task in scheduler queue
778 bl @schedule_tail
780 ; If kernel thread, jump to it's entry-point
781 ld r9, [sp, PT_status32]
782 brne r9, 0, 1f
784 jl.d [r14]
785 mov r0, r13 ; arg to payload
787 1:
788 ; special case of kernel_thread entry point returning back due to
789 ; kernel_execve() - pretend return from syscall to ret to userland
790 b ret_from_exception
791 ARC_EXIT ret_from_fork
793 ;################### Special Sys Call Wrappers ##########################
795 ARC_ENTRY sys_clone_wrapper
796 SAVE_CALLEE_SAVED_USER
797 bl @sys_clone
798 DISCARD_CALLEE_SAVED_USER
800 GET_CURR_THR_INFO_FLAGS r10
801 btst r10, TIF_SYSCALL_TRACE
802 bnz tracesys_exit
804 b ret_from_system_call
805 ARC_EXIT sys_clone_wrapper
807 #ifdef CONFIG_ARC_DW2_UNWIND
808 ; Workaround for bug 94179 (STAR ):
809 ; Despite -fasynchronous-unwind-tables, linker is not making dwarf2 unwinder
810 ; section (.debug_frame) as loadable. So we force it here.
811 ; This also fixes STAR 9000487933 where the prev-workaround (objcopy --setflag)
812 ; would not work after a clean build due to kernel build system dependencies.
813 .section .debug_frame, "wa",@progbits
814 #endif