| blob | 2731b94717706230fd5122f3bcf1cee7d2bf2d04 |
1 /*
2 * linux/arch/x86_64/entry.S
3 *
4 * Copyright (C) 1991, 1992 Linus Torvalds
5 * Copyright (C) 2000, 2001, 2002 Andi Kleen SuSE Labs
6 * Copyright (C) 2000 Pavel Machek <pavel@suse.cz>
7 *
8 * entry.S contains the system-call and fault low-level handling routines.
9 *
10 * Some of this is documented in Documentation/x86/entry_64.txt
11 *
12 * A note on terminology:
13 * - iret frame: Architecture defined interrupt frame from SS to RIP
14 * at the top of the kernel process stack.
15 *
16 * Some macro usage:
17 * - ENTRY/END: Define functions in the symbol table.
18 * - TRACE_IRQ_*: Trace hardirq state for lock debugging.
19 * - idtentry: Define exception entry points.
20 */
21 #include <linux/linkage.h>
22 #include <asm/segment.h>
23 #include <asm/cache.h>
24 #include <asm/errno.h>
25 #include "calling.h"
26 #include <asm/asm-offsets.h>
27 #include <asm/msr.h>
28 #include <asm/unistd.h>
29 #include <asm/thread_info.h>
30 #include <asm/hw_irq.h>
31 #include <asm/page_types.h>
32 #include <asm/irqflags.h>
33 #include <asm/paravirt.h>
34 #include <asm/percpu.h>
35 #include <asm/asm.h>
36 #include <asm/smap.h>
37 #include <asm/pgtable_types.h>
38 #include <asm/export.h>
39 #include <asm/frame.h>
40 #include <linux/err.h>
42 .code64
43 .section .entry.text, "ax"
45 #ifdef CONFIG_PARAVIRT
46 ENTRY(native_usergs_sysret64)
47 UNWIND_HINT_EMPTY
48 swapgs
49 sysretq
50 END(native_usergs_sysret64)
51 #endif /* CONFIG_PARAVIRT */
53 .macro TRACE_IRQS_IRETQ
54 #ifdef CONFIG_TRACE_IRQFLAGS
55 bt $9, EFLAGS(%rsp) /* interrupts off? */
56 jnc 1f
57 TRACE_IRQS_ON
58 1:
59 #endif
60 .endm
62 /*
63 * When dynamic function tracer is enabled it will add a breakpoint
64 * to all locations that it is about to modify, sync CPUs, update
65 * all the code, sync CPUs, then remove the breakpoints. In this time
66 * if lockdep is enabled, it might jump back into the debug handler
67 * outside the updating of the IST protection. (TRACE_IRQS_ON/OFF).
68 *
69 * We need to change the IDT table before calling TRACE_IRQS_ON/OFF to
70 * make sure the stack pointer does not get reset back to the top
71 * of the debug stack, and instead just reuses the current stack.
72 */
73 #if defined(CONFIG_DYNAMIC_FTRACE) && defined(CONFIG_TRACE_IRQFLAGS)
75 .macro TRACE_IRQS_OFF_DEBUG
76 call debug_stack_set_zero
77 TRACE_IRQS_OFF
78 call debug_stack_reset
79 .endm
81 .macro TRACE_IRQS_ON_DEBUG
82 call debug_stack_set_zero
83 TRACE_IRQS_ON
84 call debug_stack_reset
85 .endm
87 .macro TRACE_IRQS_IRETQ_DEBUG
88 bt $9, EFLAGS(%rsp) /* interrupts off? */
89 jnc 1f
90 TRACE_IRQS_ON_DEBUG
91 1:
92 .endm
94 #else
95 # define TRACE_IRQS_OFF_DEBUG TRACE_IRQS_OFF
96 # define TRACE_IRQS_ON_DEBUG TRACE_IRQS_ON
97 # define TRACE_IRQS_IRETQ_DEBUG TRACE_IRQS_IRETQ
98 #endif
100 /*
101 * 64-bit SYSCALL instruction entry. Up to 6 arguments in registers.
102 *
103 * This is the only entry point used for 64-bit system calls. The
104 * hardware interface is reasonably well designed and the register to
105 * argument mapping Linux uses fits well with the registers that are
106 * available when SYSCALL is used.
107 *
108 * SYSCALL instructions can be found inlined in libc implementations as
109 * well as some other programs and libraries. There are also a handful
110 * of SYSCALL instructions in the vDSO used, for example, as a
111 * clock_gettimeofday fallback.
112 *
113 * 64-bit SYSCALL saves rip to rcx, clears rflags.RF, then saves rflags to r11,
114 * then loads new ss, cs, and rip from previously programmed MSRs.
115 * rflags gets masked by a value from another MSR (so CLD and CLAC
116 * are not needed). SYSCALL does not save anything on the stack
117 * and does not change rsp.
118 *
119 * Registers on entry:
120 * rax system call number
121 * rcx return address
122 * r11 saved rflags (note: r11 is callee-clobbered register in C ABI)
123 * rdi arg0
124 * rsi arg1
125 * rdx arg2
126 * r10 arg3 (needs to be moved to rcx to conform to C ABI)
127 * r8 arg4
128 * r9 arg5
129 * (note: r12-r15, rbp, rbx are callee-preserved in C ABI)
130 *
131 * Only called from user space.
132 *
133 * When user can change pt_regs->foo always force IRET. That is because
134 * it deals with uncanonical addresses better. SYSRET has trouble
135 * with them due to bugs in both AMD and Intel CPUs.
136 */
138 ENTRY(entry_SYSCALL_64)
139 UNWIND_HINT_EMPTY
140 /*
141 * Interrupts are off on entry.
142 * We do not frame this tiny irq-off block with TRACE_IRQS_OFF/ON,
143 * it is too small to ever cause noticeable irq latency.
144 */
146 swapgs
147 movq %rsp, PER_CPU_VAR(rsp_scratch)
148 movq PER_CPU_VAR(cpu_current_top_of_stack), %rsp
150 TRACE_IRQS_OFF
152 /* Construct struct pt_regs on stack */
153 pushq $__USER_DS /* pt_regs->ss */
154 pushq PER_CPU_VAR(rsp_scratch) /* pt_regs->sp */
155 pushq %r11 /* pt_regs->flags */
156 pushq $__USER_CS /* pt_regs->cs */
157 pushq %rcx /* pt_regs->ip */
158 GLOBAL(entry_SYSCALL_64_after_hwframe)
159 pushq %rax /* pt_regs->orig_ax */
160 pushq %rdi /* pt_regs->di */
161 pushq %rsi /* pt_regs->si */
162 pushq %rdx /* pt_regs->dx */
163 pushq %rcx /* pt_regs->cx */
164 pushq $-ENOSYS /* pt_regs->ax */
165 pushq %r8 /* pt_regs->r8 */
166 pushq %r9 /* pt_regs->r9 */
167 pushq %r10 /* pt_regs->r10 */
168 pushq %r11 /* pt_regs->r11 */
169 sub $(6*8), %rsp /* pt_regs->bp, bx, r12-15 not saved */
170 UNWIND_HINT_REGS extra=0
172 /*
173 * If we need to do entry work or if we guess we'll need to do
174 * exit work, go straight to the slow path.
175 */
176 movq PER_CPU_VAR(current_task), %r11
177 testl $_TIF_WORK_SYSCALL_ENTRY|_TIF_ALLWORK_MASK, TASK_TI_flags(%r11)
178 jnz entry_SYSCALL64_slow_path
180 entry_SYSCALL_64_fastpath:
181 /*
182 * Easy case: enable interrupts and issue the syscall. If the syscall
183 * needs pt_regs, we'll call a stub that disables interrupts again
184 * and jumps to the slow path.
185 */
186 TRACE_IRQS_ON
187 ENABLE_INTERRUPTS(CLBR_NONE)
188 #if __SYSCALL_MASK == ~0
189 cmpq $__NR_syscall_max, %rax
190 #else
191 andl $__SYSCALL_MASK, %eax
192 cmpl $__NR_syscall_max, %eax
193 #endif
194 ja 1f /* return -ENOSYS (already in pt_regs->ax) */
195 movq %r10, %rcx
197 /*
198 * This call instruction is handled specially in stub_ptregs_64.
199 * It might end up jumping to the slow path. If it jumps, RAX
200 * and all argument registers are clobbered.
201 */
202 call *sys_call_table(, %rax, 8)
203 .Lentry_SYSCALL_64_after_fastpath_call:
205 movq %rax, RAX(%rsp)
206 1:
208 /*
209 * If we get here, then we know that pt_regs is clean for SYSRET64.
210 * If we see that no exit work is required (which we are required
211 * to check with IRQs off), then we can go straight to SYSRET64.
212 */
213 DISABLE_INTERRUPTS(CLBR_ANY)
214 TRACE_IRQS_OFF
215 movq PER_CPU_VAR(current_task), %r11
216 testl $_TIF_ALLWORK_MASK, TASK_TI_flags(%r11)
217 jnz 1f
219 LOCKDEP_SYS_EXIT
220 TRACE_IRQS_ON /* user mode is traced as IRQs on */
221 movq RIP(%rsp), %rcx
222 movq EFLAGS(%rsp), %r11
223 RESTORE_C_REGS_EXCEPT_RCX_R11
224 movq RSP(%rsp), %rsp
225 UNWIND_HINT_EMPTY
226 USERGS_SYSRET64
228 1:
229 /*
230 * The fast path looked good when we started, but something changed
231 * along the way and we need to switch to the slow path. Calling
232 * raise(3) will trigger this, for example. IRQs are off.
233 */
234 TRACE_IRQS_ON
235 ENABLE_INTERRUPTS(CLBR_ANY)
236 SAVE_EXTRA_REGS
237 movq %rsp, %rdi
238 call syscall_return_slowpath /* returns with IRQs disabled */
239 jmp return_from_SYSCALL_64
241 entry_SYSCALL64_slow_path:
242 /* IRQs are off. */
243 SAVE_EXTRA_REGS
244 movq %rsp, %rdi
245 call do_syscall_64 /* returns with IRQs disabled */
247 return_from_SYSCALL_64:
248 RESTORE_EXTRA_REGS
249 TRACE_IRQS_IRETQ /* we're about to change IF */
251 /*
252 * Try to use SYSRET instead of IRET if we're returning to
253 * a completely clean 64-bit userspace context.
254 */
255 movq RCX(%rsp), %rcx
256 movq RIP(%rsp), %r11
257 cmpq %rcx, %r11 /* RCX == RIP */
258 jne opportunistic_sysret_failed
260 /*
261 * On Intel CPUs, SYSRET with non-canonical RCX/RIP will #GP
262 * in kernel space. This essentially lets the user take over
263 * the kernel, since userspace controls RSP.
264 *
265 * If width of "canonical tail" ever becomes variable, this will need
266 * to be updated to remain correct on both old and new CPUs.
267 *
268 * Change top bits to match most significant bit (47th or 56th bit
269 * depending on paging mode) in the address.
270 */
271 shl $(64 - (__VIRTUAL_MASK_SHIFT+1)), %rcx
272 sar $(64 - (__VIRTUAL_MASK_SHIFT+1)), %rcx
274 /* If this changed %rcx, it was not canonical */
275 cmpq %rcx, %r11
276 jne opportunistic_sysret_failed
278 cmpq $__USER_CS, CS(%rsp) /* CS must match SYSRET */
279 jne opportunistic_sysret_failed
281 movq R11(%rsp), %r11
282 cmpq %r11, EFLAGS(%rsp) /* R11 == RFLAGS */
283 jne opportunistic_sysret_failed
285 /*
286 * SYSCALL clears RF when it saves RFLAGS in R11 and SYSRET cannot
287 * restore RF properly. If the slowpath sets it for whatever reason, we
288 * need to restore it correctly.
289 *
290 * SYSRET can restore TF, but unlike IRET, restoring TF results in a
291 * trap from userspace immediately after SYSRET. This would cause an
292 * infinite loop whenever #DB happens with register state that satisfies
293 * the opportunistic SYSRET conditions. For example, single-stepping
294 * this user code:
295 *
296 * movq $stuck_here, %rcx
297 * pushfq
298 * popq %r11
299 * stuck_here:
300 *
301 * would never get past 'stuck_here'.
302 */
303 testq $(X86_EFLAGS_RF|X86_EFLAGS_TF), %r11
304 jnz opportunistic_sysret_failed
306 /* nothing to check for RSP */
308 cmpq $__USER_DS, SS(%rsp) /* SS must match SYSRET */
309 jne opportunistic_sysret_failed
311 /*
312 * We win! This label is here just for ease of understanding
313 * perf profiles. Nothing jumps here.
314 */
315 syscall_return_via_sysret:
316 /* rcx and r11 are already restored (see code above) */
317 RESTORE_C_REGS_EXCEPT_RCX_R11
318 movq RSP(%rsp), %rsp
319 UNWIND_HINT_EMPTY
320 USERGS_SYSRET64
322 opportunistic_sysret_failed:
323 SWAPGS
324 jmp restore_c_regs_and_iret
325 END(entry_SYSCALL_64)
327 ENTRY(stub_ptregs_64)
328 /*
329 * Syscalls marked as needing ptregs land here.
330 * If we are on the fast path, we need to save the extra regs,
331 * which we achieve by trying again on the slow path. If we are on
332 * the slow path, the extra regs are already saved.
333 *
334 * RAX stores a pointer to the C function implementing the syscall.
335 * IRQs are on.
336 */
337 cmpq $.Lentry_SYSCALL_64_after_fastpath_call, (%rsp)
338 jne 1f
340 /*
341 * Called from fast path -- disable IRQs again, pop return address
342 * and jump to slow path
343 */
344 DISABLE_INTERRUPTS(CLBR_ANY)
345 TRACE_IRQS_OFF
346 popq %rax
347 UNWIND_HINT_REGS extra=0
348 jmp entry_SYSCALL64_slow_path
350 1:
351 jmp *%rax /* Called from C */
352 END(stub_ptregs_64)
354 .macro ptregs_stub func
355 ENTRY(ptregs_\func)
356 UNWIND_HINT_FUNC
357 leaq \func(%rip), %rax
358 jmp stub_ptregs_64
359 END(ptregs_\func)
360 .endm
362 /* Instantiate ptregs_stub for each ptregs-using syscall */
363 #define __SYSCALL_64_QUAL_(sym)
364 #define __SYSCALL_64_QUAL_ptregs(sym) ptregs_stub sym
365 #define __SYSCALL_64(nr, sym, qual) __SYSCALL_64_QUAL_##qual(sym)
366 #include <asm/syscalls_64.h>
368 /*
369 * %rdi: prev task
370 * %rsi: next task
371 */
372 ENTRY(__switch_to_asm)
373 UNWIND_HINT_FUNC
374 /*
375 * Save callee-saved registers
376 * This must match the order in inactive_task_frame
377 */
378 pushq %rbp
379 pushq %rbx
380 pushq %r12
381 pushq %r13
382 pushq %r14
383 pushq %r15
385 /* switch stack */
386 movq %rsp, TASK_threadsp(%rdi)
387 movq TASK_threadsp(%rsi), %rsp
389 #ifdef CONFIG_CC_STACKPROTECTOR
390 movq TASK_stack_canary(%rsi), %rbx
391 movq %rbx, PER_CPU_VAR(irq_stack_union)+stack_canary_offset
392 #endif
394 /* restore callee-saved registers */
395 popq %r15
396 popq %r14
397 popq %r13
398 popq %r12
399 popq %rbx
400 popq %rbp
402 jmp __switch_to
403 END(__switch_to_asm)
405 /*
406 * A newly forked process directly context switches into this address.
407 *
408 * rax: prev task we switched from
409 * rbx: kernel thread func (NULL for user thread)
410 * r12: kernel thread arg
411 */
412 ENTRY(ret_from_fork)
413 UNWIND_HINT_EMPTY
414 movq %rax, %rdi
415 call schedule_tail /* rdi: 'prev' task parameter */
417 testq %rbx, %rbx /* from kernel_thread? */
418 jnz 1f /* kernel threads are uncommon */
420 2:
421 UNWIND_HINT_REGS
422 movq %rsp, %rdi
423 call syscall_return_slowpath /* returns with IRQs disabled */
424 TRACE_IRQS_ON /* user mode is traced as IRQS on */
425 SWAPGS
426 jmp restore_regs_and_iret
428 1:
429 /* kernel thread */
430 movq %r12, %rdi
431 call *%rbx
432 /*
433 * A kernel thread is allowed to return here after successfully
434 * calling do_execve(). Exit to userspace to complete the execve()
435 * syscall.
436 */
437 movq $0, RAX(%rsp)
438 jmp 2b
439 END(ret_from_fork)
441 /*
442 * Build the entry stubs with some assembler magic.
443 * We pack 1 stub into every 8-byte block.
444 */
445 .align 8
446 ENTRY(irq_entries_start)
447 vector=FIRST_EXTERNAL_VECTOR
448 .rept (FIRST_SYSTEM_VECTOR - FIRST_EXTERNAL_VECTOR)
449 UNWIND_HINT_IRET_REGS
450 pushq $(~vector+0x80) /* Note: always in signed byte range */
451 jmp common_interrupt
452 .align 8
453 vector=vector+1
454 .endr
455 END(irq_entries_start)
457 .macro DEBUG_ENTRY_ASSERT_IRQS_OFF
458 #ifdef CONFIG_DEBUG_ENTRY
459 pushfq
460 testl $X86_EFLAGS_IF, (%rsp)
461 jz .Lokay_\@
462 ud2
463 .Lokay_\@:
464 addq $8, %rsp
465 #endif
466 .endm
468 /*
469 * Enters the IRQ stack if we're not already using it. NMI-safe. Clobbers
470 * flags and puts old RSP into old_rsp, and leaves all other GPRs alone.
471 * Requires kernel GSBASE.
472 *
473 * The invariant is that, if irq_count != -1, then the IRQ stack is in use.
474 */
475 .macro ENTER_IRQ_STACK regs=1 old_rsp
476 DEBUG_ENTRY_ASSERT_IRQS_OFF
477 movq %rsp, \old_rsp
479 .if \regs
480 UNWIND_HINT_REGS base=\old_rsp
481 .endif
483 incl PER_CPU_VAR(irq_count)
484 jnz .Lirq_stack_push_old_rsp_\@
486 /*
487 * Right now, if we just incremented irq_count to zero, we've
488 * claimed the IRQ stack but we haven't switched to it yet.
489 *
490 * If anything is added that can interrupt us here without using IST,
491 * it must be *extremely* careful to limit its stack usage. This
492 * could include kprobes and a hypothetical future IST-less #DB
493 * handler.
494 *
495 * The OOPS unwinder relies on the word at the top of the IRQ
496 * stack linking back to the previous RSP for the entire time we're
497 * on the IRQ stack. For this to work reliably, we need to write
498 * it before we actually move ourselves to the IRQ stack.
499 */
501 movq \old_rsp, PER_CPU_VAR(irq_stack_union + IRQ_STACK_SIZE - 8)
502 movq PER_CPU_VAR(irq_stack_ptr), %rsp
504 #ifdef CONFIG_DEBUG_ENTRY
505 /*
506 * If the first movq above becomes wrong due to IRQ stack layout
507 * changes, the only way we'll notice is if we try to unwind right
508 * here. Assert that we set up the stack right to catch this type
509 * of bug quickly.
510 */
511 cmpq -8(%rsp), \old_rsp
512 je .Lirq_stack_okay\@
513 ud2
514 .Lirq_stack_okay\@:
515 #endif
517 .Lirq_stack_push_old_rsp_\@:
518 pushq \old_rsp
520 .if \regs
521 UNWIND_HINT_REGS indirect=1
522 .endif
523 .endm
525 /*
526 * Undoes ENTER_IRQ_STACK.
527 */
528 .macro LEAVE_IRQ_STACK regs=1
529 DEBUG_ENTRY_ASSERT_IRQS_OFF
530 /* We need to be off the IRQ stack before decrementing irq_count. */
531 popq %rsp
533 .if \regs
534 UNWIND_HINT_REGS
535 .endif
537 /*
538 * As in ENTER_IRQ_STACK, irq_count == 0, we are still claiming
539 * the irq stack but we're not on it.
540 */
542 decl PER_CPU_VAR(irq_count)
543 .endm
545 /*
546 * Interrupt entry/exit.
547 *
548 * Interrupt entry points save only callee clobbered registers in fast path.
549 *
550 * Entry runs with interrupts off.
551 */
553 /* 0(%rsp): ~(interrupt number) */
554 .macro interrupt func
555 cld
556 ALLOC_PT_GPREGS_ON_STACK
557 SAVE_C_REGS
558 SAVE_EXTRA_REGS
559 ENCODE_FRAME_POINTER
561 testb $3, CS(%rsp)
562 jz 1f
564 /*
565 * IRQ from user mode. Switch to kernel gsbase and inform context
566 * tracking that we're in kernel mode.
567 */
568 SWAPGS
570 /*
571 * We need to tell lockdep that IRQs are off. We can't do this until
572 * we fix gsbase, and we should do it before enter_from_user_mode
573 * (which can take locks). Since TRACE_IRQS_OFF idempotent,
574 * the simplest way to handle it is to just call it twice if
575 * we enter from user mode. There's no reason to optimize this since
576 * TRACE_IRQS_OFF is a no-op if lockdep is off.
577 */
578 TRACE_IRQS_OFF
580 CALL_enter_from_user_mode
582 1:
583 ENTER_IRQ_STACK old_rsp=%rdi
584 /* We entered an interrupt context - irqs are off: */
585 TRACE_IRQS_OFF
587 call \func /* rdi points to pt_regs */
588 .endm
590 /*
591 * The interrupt stubs push (~vector+0x80) onto the stack and
592 * then jump to common_interrupt.
593 */
594 .p2align CONFIG_X86_L1_CACHE_SHIFT
595 common_interrupt:
596 ASM_CLAC
597 addq $-0x80, (%rsp) /* Adjust vector to [-256, -1] range */
598 interrupt do_IRQ
599 /* 0(%rsp): old RSP */
600 ret_from_intr:
601 DISABLE_INTERRUPTS(CLBR_ANY)
602 TRACE_IRQS_OFF
604 LEAVE_IRQ_STACK
606 testb $3, CS(%rsp)
607 jz retint_kernel
609 /* Interrupt came from user space */
610 GLOBAL(retint_user)
611 mov %rsp,%rdi
612 call prepare_exit_to_usermode
613 TRACE_IRQS_IRETQ
614 SWAPGS
615 jmp restore_regs_and_iret
617 /* Returning to kernel space */
618 retint_kernel:
619 #ifdef CONFIG_PREEMPT
620 /* Interrupts are off */
621 /* Check if we need preemption */
622 bt $9, EFLAGS(%rsp) /* were interrupts off? */
623 jnc 1f
624 0: cmpl $0, PER_CPU_VAR(__preempt_count)
625 jnz 1f
626 call preempt_schedule_irq
627 jmp 0b
628 1:
629 #endif
630 /*
631 * The iretq could re-enable interrupts:
632 */
633 TRACE_IRQS_IRETQ
635 /*
636 * At this label, code paths which return to kernel and to user,
637 * which come from interrupts/exception and from syscalls, merge.
638 */
639 GLOBAL(restore_regs_and_iret)
640 RESTORE_EXTRA_REGS
641 restore_c_regs_and_iret:
642 RESTORE_C_REGS
643 REMOVE_PT_GPREGS_FROM_STACK 8
644 INTERRUPT_RETURN
646 ENTRY(native_iret)
647 UNWIND_HINT_IRET_REGS
648 /*
649 * Are we returning to a stack segment from the LDT? Note: in
650 * 64-bit mode SS:RSP on the exception stack is always valid.
651 */
652 #ifdef CONFIG_X86_ESPFIX64
653 testb $4, (SS-RIP)(%rsp)
654 jnz native_irq_return_ldt
655 #endif
657 .global native_irq_return_iret
658 native_irq_return_iret:
659 /*
660 * This may fault. Non-paranoid faults on return to userspace are
661 * handled by fixup_bad_iret. These include #SS, #GP, and #NP.
662 * Double-faults due to espfix64 are handled in do_double_fault.
663 * Other faults here are fatal.
664 */
665 iretq
667 #ifdef CONFIG_X86_ESPFIX64
668 native_irq_return_ldt:
669 /*
670 * We are running with user GSBASE. All GPRs contain their user
671 * values. We have a percpu ESPFIX stack that is eight slots
672 * long (see ESPFIX_STACK_SIZE). espfix_waddr points to the bottom
673 * of the ESPFIX stack.
674 *
675 * We clobber RAX and RDI in this code. We stash RDI on the
676 * normal stack and RAX on the ESPFIX stack.
677 *
678 * The ESPFIX stack layout we set up looks like this:
679 *
680 * --- top of ESPFIX stack ---
681 * SS
682 * RSP
683 * RFLAGS
684 * CS
685 * RIP <-- RSP points here when we're done
686 * RAX <-- espfix_waddr points here
687 * --- bottom of ESPFIX stack ---
688 */
690 pushq %rdi /* Stash user RDI */
691 SWAPGS
692 movq PER_CPU_VAR(espfix_waddr), %rdi
693 movq %rax, (0*8)(%rdi) /* user RAX */
694 movq (1*8)(%rsp), %rax /* user RIP */
695 movq %rax, (1*8)(%rdi)
696 movq (2*8)(%rsp), %rax /* user CS */
697 movq %rax, (2*8)(%rdi)
698 movq (3*8)(%rsp), %rax /* user RFLAGS */
699 movq %rax, (3*8)(%rdi)
700 movq (5*8)(%rsp), %rax /* user SS */
701 movq %rax, (5*8)(%rdi)
702 movq (4*8)(%rsp), %rax /* user RSP */
703 movq %rax, (4*8)(%rdi)
704 /* Now RAX == RSP. */
706 andl $0xffff0000, %eax /* RAX = (RSP & 0xffff0000) */
707 popq %rdi /* Restore user RDI */
709 /*
710 * espfix_stack[31:16] == 0. The page tables are set up such that
711 * (espfix_stack | (X & 0xffff0000)) points to a read-only alias of
712 * espfix_waddr for any X. That is, there are 65536 RO aliases of
713 * the same page. Set up RSP so that RSP[31:16] contains the
714 * respective 16 bits of the /userspace/ RSP and RSP nonetheless
715 * still points to an RO alias of the ESPFIX stack.
716 */
717 orq PER_CPU_VAR(espfix_stack), %rax
718 SWAPGS
719 movq %rax, %rsp
720 UNWIND_HINT_IRET_REGS offset=8
722 /*
723 * At this point, we cannot write to the stack any more, but we can
724 * still read.
725 */
726 popq %rax /* Restore user RAX */
728 /*
729 * RSP now points to an ordinary IRET frame, except that the page
730 * is read-only and RSP[31:16] are preloaded with the userspace
731 * values. We can now IRET back to userspace.
732 */
733 jmp native_irq_return_iret
734 #endif
735 END(common_interrupt)
737 /*
738 * APIC interrupts.
739 */
740 .macro apicinterrupt3 num sym do_sym
741 ENTRY(\sym)
742 UNWIND_HINT_IRET_REGS
743 ASM_CLAC
744 pushq $~(\num)
745 .Lcommon_\sym:
746 interrupt \do_sym
747 jmp ret_from_intr
748 END(\sym)
749 .endm
751 #ifdef CONFIG_TRACING
752 #define trace(sym) trace_##sym
753 #define smp_trace(sym) smp_trace_##sym
755 .macro trace_apicinterrupt num sym
756 apicinterrupt3 \num trace(\sym) smp_trace(\sym)
757 .endm
758 #else
759 .macro trace_apicinterrupt num sym do_sym
760 .endm
761 #endif
763 /* Make sure APIC interrupt handlers end up in the irqentry section: */
764 #if defined(CONFIG_FUNCTION_GRAPH_TRACER) || defined(CONFIG_KASAN)
765 # define PUSH_SECTION_IRQENTRY .pushsection .irqentry.text, "ax"
766 # define POP_SECTION_IRQENTRY .popsection
767 #else
768 # define PUSH_SECTION_IRQENTRY
769 # define POP_SECTION_IRQENTRY
770 #endif
772 .macro apicinterrupt num sym do_sym
773 PUSH_SECTION_IRQENTRY
774 apicinterrupt3 \num \sym \do_sym
775 trace_apicinterrupt \num \sym
776 POP_SECTION_IRQENTRY
777 .endm
779 #ifdef CONFIG_SMP
780 apicinterrupt3 IRQ_MOVE_CLEANUP_VECTOR irq_move_cleanup_interrupt smp_irq_move_cleanup_interrupt
781 apicinterrupt3 REBOOT_VECTOR reboot_interrupt smp_reboot_interrupt
782 #endif
784 #ifdef CONFIG_X86_UV
785 apicinterrupt3 UV_BAU_MESSAGE uv_bau_message_intr1 uv_bau_message_interrupt
786 #endif
788 apicinterrupt LOCAL_TIMER_VECTOR apic_timer_interrupt smp_apic_timer_interrupt
789 apicinterrupt X86_PLATFORM_IPI_VECTOR x86_platform_ipi smp_x86_platform_ipi
791 #ifdef CONFIG_HAVE_KVM
792 apicinterrupt3 POSTED_INTR_VECTOR kvm_posted_intr_ipi smp_kvm_posted_intr_ipi
793 apicinterrupt3 POSTED_INTR_WAKEUP_VECTOR kvm_posted_intr_wakeup_ipi smp_kvm_posted_intr_wakeup_ipi
794 apicinterrupt3 POSTED_INTR_NESTED_VECTOR kvm_posted_intr_nested_ipi smp_kvm_posted_intr_nested_ipi
795 #endif
797 #ifdef CONFIG_X86_MCE_THRESHOLD
798 apicinterrupt THRESHOLD_APIC_VECTOR threshold_interrupt smp_threshold_interrupt
799 #endif
801 #ifdef CONFIG_X86_MCE_AMD
802 apicinterrupt DEFERRED_ERROR_VECTOR deferred_error_interrupt smp_deferred_error_interrupt
803 #endif
805 #ifdef CONFIG_X86_THERMAL_VECTOR
806 apicinterrupt THERMAL_APIC_VECTOR thermal_interrupt smp_thermal_interrupt
807 #endif
809 #ifdef CONFIG_SMP
810 apicinterrupt CALL_FUNCTION_SINGLE_VECTOR call_function_single_interrupt smp_call_function_single_interrupt
811 apicinterrupt CALL_FUNCTION_VECTOR call_function_interrupt smp_call_function_interrupt
812 apicinterrupt RESCHEDULE_VECTOR reschedule_interrupt smp_reschedule_interrupt
813 #endif
815 apicinterrupt ERROR_APIC_VECTOR error_interrupt smp_error_interrupt
816 apicinterrupt SPURIOUS_APIC_VECTOR spurious_interrupt smp_spurious_interrupt
818 #ifdef CONFIG_IRQ_WORK
819 apicinterrupt IRQ_WORK_VECTOR irq_work_interrupt smp_irq_work_interrupt
820 #endif
822 /*
823 * Exception entry points.
824 */
825 #define CPU_TSS_IST(x) PER_CPU_VAR(cpu_tss) + (TSS_ist + ((x) - 1) * 8)
827 .macro idtentry sym do_sym has_error_code:req paranoid=0 shift_ist=-1
828 ENTRY(\sym)
829 UNWIND_HINT_IRET_REGS offset=8
831 /* Sanity check */
832 .if \shift_ist != -1 && \paranoid == 0
833 .error "using shift_ist requires paranoid=1"
834 .endif
836 ASM_CLAC
837 PARAVIRT_ADJUST_EXCEPTION_FRAME
839 .ifeq \has_error_code
840 pushq $-1 /* ORIG_RAX: no syscall to restart */
841 .endif
843 ALLOC_PT_GPREGS_ON_STACK
845 .if \paranoid
846 .if \paranoid == 1
847 testb $3, CS(%rsp) /* If coming from userspace, switch stacks */
848 jnz 1f
849 .endif
850 call paranoid_entry
851 .else
852 call error_entry
853 .endif
854 UNWIND_HINT_REGS
855 /* returned flag: ebx=0: need swapgs on exit, ebx=1: don't need it */
857 .if \paranoid
858 .if \shift_ist != -1
859 TRACE_IRQS_OFF_DEBUG /* reload IDT in case of recursion */
860 .else
861 TRACE_IRQS_OFF
862 .endif
863 .endif
865 movq %rsp, %rdi /* pt_regs pointer */
867 .if \has_error_code
868 movq ORIG_RAX(%rsp), %rsi /* get error code */
869 movq $-1, ORIG_RAX(%rsp) /* no syscall to restart */
870 .else
871 xorl %esi, %esi /* no error code */
872 .endif
874 .if \shift_ist != -1
875 subq $EXCEPTION_STKSZ, CPU_TSS_IST(\shift_ist)
876 .endif
878 call \do_sym
880 .if \shift_ist != -1
881 addq $EXCEPTION_STKSZ, CPU_TSS_IST(\shift_ist)
882 .endif
884 /* these procedures expect "no swapgs" flag in ebx */
885 .if \paranoid
886 jmp paranoid_exit
887 .else
888 jmp error_exit
889 .endif
891 .if \paranoid == 1
892 /*
893 * Paranoid entry from userspace. Switch stacks and treat it
894 * as a normal entry. This means that paranoid handlers
895 * run in real process context if user_mode(regs).
896 */
897 1:
898 call error_entry
901 movq %rsp, %rdi /* pt_regs pointer */
902 call sync_regs
903 movq %rax, %rsp /* switch stack */
905 movq %rsp, %rdi /* pt_regs pointer */
907 .if \has_error_code
908 movq ORIG_RAX(%rsp), %rsi /* get error code */
909 movq $-1, ORIG_RAX(%rsp) /* no syscall to restart */
910 .else
911 xorl %esi, %esi /* no error code */
912 .endif
914 call \do_sym
916 jmp error_exit /* %ebx: no swapgs flag */
917 .endif
918 END(\sym)
919 .endm
921 idtentry divide_error do_divide_error has_error_code=0
922 idtentry overflow do_overflow has_error_code=0
923 idtentry bounds do_bounds has_error_code=0
924 idtentry invalid_op do_invalid_op has_error_code=0
925 idtentry device_not_available do_device_not_available has_error_code=0
926 idtentry double_fault do_double_fault has_error_code=1 paranoid=2
927 idtentry coprocessor_segment_overrun do_coprocessor_segment_overrun has_error_code=0
928 idtentry invalid_TSS do_invalid_TSS has_error_code=1
929 idtentry segment_not_present do_segment_not_present has_error_code=1
930 idtentry spurious_interrupt_bug do_spurious_interrupt_bug has_error_code=0
931 idtentry coprocessor_error do_coprocessor_error has_error_code=0
932 idtentry alignment_check do_alignment_check has_error_code=1
933 idtentry simd_coprocessor_error do_simd_coprocessor_error has_error_code=0
936 /*
937 * Reload gs selector with exception handling
938 * edi: new selector
939 */
940 ENTRY(native_load_gs_index)
941 FRAME_BEGIN
942 pushfq
943 DISABLE_INTERRUPTS(CLBR_ANY & ~CLBR_RDI)
944 SWAPGS
945 .Lgs_change:
946 movl %edi, %gs
947 2: ALTERNATIVE "", "mfence", X86_BUG_SWAPGS_FENCE
948 SWAPGS
949 popfq
950 FRAME_END
951 ret
952 ENDPROC(native_load_gs_index)
953 EXPORT_SYMBOL(native_load_gs_index)
955 _ASM_EXTABLE(.Lgs_change, bad_gs)
956 .section .fixup, "ax"
957 /* running with kernelgs */
958 bad_gs:
959 SWAPGS /* switch back to user gs */
960 .macro ZAP_GS
961 /* This can't be a string because the preprocessor needs to see it. */
962 movl $__USER_DS, %eax
963 movl %eax, %gs
964 .endm
965 ALTERNATIVE "", "ZAP_GS", X86_BUG_NULL_SEG
966 xorl %eax, %eax
967 movl %eax, %gs
968 jmp 2b
969 .previous
971 /* Call softirq on interrupt stack. Interrupts are off. */
972 ENTRY(do_softirq_own_stack)
973 pushq %rbp
974 mov %rsp, %rbp
975 ENTER_IRQ_STACK regs=0 old_rsp=%r11
976 call __do_softirq
977 LEAVE_IRQ_STACK regs=0
978 leaveq
979 ret
980 ENDPROC(do_softirq_own_stack)
982 #ifdef CONFIG_XEN
983 idtentry xen_hypervisor_callback xen_do_hypervisor_callback has_error_code=0
985 /*
986 * A note on the "critical region" in our callback handler.
987 * We want to avoid stacking callback handlers due to events occurring
988 * during handling of the last event. To do this, we keep events disabled
989 * until we've done all processing. HOWEVER, we must enable events before
990 * popping the stack frame (can't be done atomically) and so it would still
991 * be possible to get enough handler activations to overflow the stack.
992 * Although unlikely, bugs of that kind are hard to track down, so we'd
993 * like to avoid the possibility.
994 * So, on entry to the handler we detect whether we interrupted an
995 * existing activation in its critical region -- if so, we pop the current
996 * activation and restart the handler using the previous one.
997 */
998 ENTRY(xen_do_hypervisor_callback) /* do_hypervisor_callback(struct *pt_regs) */
1000 /*
1001 * Since we don't modify %rdi, evtchn_do_upall(struct *pt_regs) will
1002 * see the correct pointer to the pt_regs
1003 */
1004 UNWIND_HINT_FUNC
1005 movq %rdi, %rsp /* we don't return, adjust the stack frame */
1006 UNWIND_HINT_REGS
1008 ENTER_IRQ_STACK old_rsp=%r10
1009 call xen_evtchn_do_upcall
1010 LEAVE_IRQ_STACK
1012 #ifndef CONFIG_PREEMPT
1013 call xen_maybe_preempt_hcall
1014 #endif
1015 jmp error_exit
1016 END(xen_do_hypervisor_callback)
1018 /*
1019 * Hypervisor uses this for application faults while it executes.
1020 * We get here for two reasons:
1021 * 1. Fault while reloading DS, ES, FS or GS
1022 * 2. Fault while executing IRET
1023 * Category 1 we do not need to fix up as Xen has already reloaded all segment
1024 * registers that could be reloaded and zeroed the others.
1025 * Category 2 we fix up by killing the current process. We cannot use the
1026 * normal Linux return path in this case because if we use the IRET hypercall
1027 * to pop the stack frame we end up in an infinite loop of failsafe callbacks.
1028 * We distinguish between categories by comparing each saved segment register
1029 * with its current contents: any discrepancy means we in category 1.
1030 */
1031 ENTRY(xen_failsafe_callback)
1032 UNWIND_HINT_EMPTY
1033 movl %ds, %ecx
1034 cmpw %cx, 0x10(%rsp)
1035 jne 1f
1036 movl %es, %ecx
1037 cmpw %cx, 0x18(%rsp)
1038 jne 1f
1039 movl %fs, %ecx
1040 cmpw %cx, 0x20(%rsp)
1041 jne 1f
1042 movl %gs, %ecx
1043 cmpw %cx, 0x28(%rsp)
1044 jne 1f
1045 /* All segments match their saved values => Category 2 (Bad IRET). */
1046 movq (%rsp), %rcx
1047 movq 8(%rsp), %r11
1048 addq $0x30, %rsp
1049 pushq $0 /* RIP */
1050 pushq %r11
1051 pushq %rcx
1052 UNWIND_HINT_IRET_REGS offset=8
1053 jmp general_protection
1054 1: /* Segment mismatch => Category 1 (Bad segment). Retry the IRET. */
1055 movq (%rsp), %rcx
1056 movq 8(%rsp), %r11
1057 addq $0x30, %rsp
1058 UNWIND_HINT_IRET_REGS
1059 pushq $-1 /* orig_ax = -1 => not a system call */
1060 ALLOC_PT_GPREGS_ON_STACK
1061 SAVE_C_REGS
1062 SAVE_EXTRA_REGS
1063 ENCODE_FRAME_POINTER
1064 jmp error_exit
1065 END(xen_failsafe_callback)
1067 apicinterrupt3 HYPERVISOR_CALLBACK_VECTOR \
1068 xen_hvm_callback_vector xen_evtchn_do_upcall
1070 #endif /* CONFIG_XEN */
1072 #if IS_ENABLED(CONFIG_HYPERV)
1073 apicinterrupt3 HYPERVISOR_CALLBACK_VECTOR \
1074 hyperv_callback_vector hyperv_vector_handler
1075 #endif /* CONFIG_HYPERV */
1077 idtentry debug do_debug has_error_code=0 paranoid=1 shift_ist=DEBUG_STACK
1078 idtentry int3 do_int3 has_error_code=0 paranoid=1 shift_ist=DEBUG_STACK
1079 idtentry stack_segment do_stack_segment has_error_code=1
1081 #ifdef CONFIG_XEN
1082 idtentry xen_debug do_debug has_error_code=0
1083 idtentry xen_int3 do_int3 has_error_code=0
1084 idtentry xen_stack_segment do_stack_segment has_error_code=1
1085 #endif
1087 idtentry general_protection do_general_protection has_error_code=1
1088 idtentry page_fault do_page_fault has_error_code=1
1090 #ifdef CONFIG_KVM_GUEST
1091 idtentry async_page_fault do_async_page_fault has_error_code=1
1092 #endif
1094 #ifdef CONFIG_X86_MCE
1095 idtentry machine_check has_error_code=0 paranoid=1 do_sym=*machine_check_vector(%rip)
1096 #endif
1098 /*
1099 * Save all registers in pt_regs, and switch gs if needed.
1100 * Use slow, but surefire "are we in kernel?" check.
1101 * Return: ebx=0: need swapgs on exit, ebx=1: otherwise
1102 */
1103 ENTRY(paranoid_entry)
1104 UNWIND_HINT_FUNC
1105 cld
1106 SAVE_C_REGS 8
1107 SAVE_EXTRA_REGS 8
1108 ENCODE_FRAME_POINTER 8
1109 movl $1, %ebx
1110 movl $MSR_GS_BASE, %ecx
1111 rdmsr
1112 testl %edx, %edx
1113 js 1f /* negative -> in kernel */
1114 SWAPGS
1115 xorl %ebx, %ebx
1116 1: ret
1117 END(paranoid_entry)
1119 /*
1120 * "Paranoid" exit path from exception stack. This is invoked
1121 * only on return from non-NMI IST interrupts that came
1122 * from kernel space.
1123 *
1124 * We may be returning to very strange contexts (e.g. very early
1125 * in syscall entry), so checking for preemption here would
1126 * be complicated. Fortunately, we there's no good reason
1127 * to try to handle preemption here.
1128 *
1129 * On entry, ebx is "no swapgs" flag (1: don't need swapgs, 0: need it)
1130 */
1131 ENTRY(paranoid_exit)
1132 UNWIND_HINT_REGS
1133 DISABLE_INTERRUPTS(CLBR_ANY)
1134 TRACE_IRQS_OFF_DEBUG
1135 testl %ebx, %ebx /* swapgs needed? */
1136 jnz paranoid_exit_no_swapgs
1137 TRACE_IRQS_IRETQ
1138 SWAPGS_UNSAFE_STACK
1139 jmp paranoid_exit_restore
1140 paranoid_exit_no_swapgs:
1141 TRACE_IRQS_IRETQ_DEBUG
1142 paranoid_exit_restore:
1143 RESTORE_EXTRA_REGS
1144 RESTORE_C_REGS
1145 REMOVE_PT_GPREGS_FROM_STACK 8
1146 INTERRUPT_RETURN
1147 END(paranoid_exit)
1149 /*
1150 * Save all registers in pt_regs, and switch gs if needed.
1151 * Return: EBX=0: came from user mode; EBX=1: otherwise
1152 */
1153 ENTRY(error_entry)
1154 UNWIND_HINT_FUNC
1155 cld
1156 SAVE_C_REGS 8
1157 SAVE_EXTRA_REGS 8
1158 ENCODE_FRAME_POINTER 8
1159 xorl %ebx, %ebx
1160 testb $3, CS+8(%rsp)
1161 jz .Lerror_kernelspace
1163 /*
1164 * We entered from user mode or we're pretending to have entered
1165 * from user mode due to an IRET fault.
1166 */
1167 SWAPGS
1169 .Lerror_entry_from_usermode_after_swapgs:
1170 /*
1171 * We need to tell lockdep that IRQs are off. We can't do this until
1172 * we fix gsbase, and we should do it before enter_from_user_mode
1173 * (which can take locks).
1174 */
1175 TRACE_IRQS_OFF
1176 CALL_enter_from_user_mode
1177 ret
1179 .Lerror_entry_done:
1180 TRACE_IRQS_OFF
1181 ret
1183 /*
1184 * There are two places in the kernel that can potentially fault with
1185 * usergs. Handle them here. B stepping K8s sometimes report a
1186 * truncated RIP for IRET exceptions returning to compat mode. Check
1187 * for these here too.
1188 */
1189 .Lerror_kernelspace:
1190 incl %ebx
1191 leaq native_irq_return_iret(%rip), %rcx
1192 cmpq %rcx, RIP+8(%rsp)
1193 je .Lerror_bad_iret
1194 movl %ecx, %eax /* zero extend */
1195 cmpq %rax, RIP+8(%rsp)
1196 je .Lbstep_iret
1197 cmpq $.Lgs_change, RIP+8(%rsp)
1198 jne .Lerror_entry_done
1200 /*
1201 * hack: .Lgs_change can fail with user gsbase. If this happens, fix up
1202 * gsbase and proceed. We'll fix up the exception and land in
1203 * .Lgs_change's error handler with kernel gsbase.
1204 */
1205 SWAPGS
1206 jmp .Lerror_entry_done
1208 .Lbstep_iret:
1209 /* Fix truncated RIP */
1210 movq %rcx, RIP+8(%rsp)
1211 /* fall through */
1213 .Lerror_bad_iret:
1214 /*
1215 * We came from an IRET to user mode, so we have user gsbase.
1216 * Switch to kernel gsbase:
1217 */
1218 SWAPGS
1220 /*
1221 * Pretend that the exception came from user mode: set up pt_regs
1222 * as if we faulted immediately after IRET and clear EBX so that
1223 * error_exit knows that we will be returning to user mode.
1224 */
1225 mov %rsp, %rdi
1226 call fixup_bad_iret
1227 mov %rax, %rsp
1228 decl %ebx
1229 jmp .Lerror_entry_from_usermode_after_swapgs
1230 END(error_entry)
1233 /*
1234 * On entry, EBX is a "return to kernel mode" flag:
1235 * 1: already in kernel mode, don't need SWAPGS
1236 * 0: user gsbase is loaded, we need SWAPGS and standard preparation for return to usermode
1237 */
1238 ENTRY(error_exit)
1239 UNWIND_HINT_REGS
1240 DISABLE_INTERRUPTS(CLBR_ANY)
1241 TRACE_IRQS_OFF
1242 testl %ebx, %ebx
1243 jnz retint_kernel
1244 jmp retint_user
1245 END(error_exit)
1247 /* Runs on exception stack */
1248 ENTRY(nmi)
1249 UNWIND_HINT_IRET_REGS
1250 /*
1251 * Fix up the exception frame if we're on Xen.
1252 * PARAVIRT_ADJUST_EXCEPTION_FRAME is guaranteed to push at most
1253 * one value to the stack on native, so it may clobber the rdx
1254 * scratch slot, but it won't clobber any of the important
1255 * slots past it.
1256 *
1257 * Xen is a different story, because the Xen frame itself overlaps
1258 * the "NMI executing" variable.
1259 */
1260 PARAVIRT_ADJUST_EXCEPTION_FRAME
1262 /*
1263 * We allow breakpoints in NMIs. If a breakpoint occurs, then
1264 * the iretq it performs will take us out of NMI context.
1265 * This means that we can have nested NMIs where the next
1266 * NMI is using the top of the stack of the previous NMI. We
1267 * can't let it execute because the nested NMI will corrupt the
1268 * stack of the previous NMI. NMI handlers are not re-entrant
1269 * anyway.
1270 *
1271 * To handle this case we do the following:
1272 * Check the a special location on the stack that contains
1273 * a variable that is set when NMIs are executing.
1274 * The interrupted task's stack is also checked to see if it
1275 * is an NMI stack.
1276 * If the variable is not set and the stack is not the NMI
1277 * stack then:
1278 * o Set the special variable on the stack
1279 * o Copy the interrupt frame into an "outermost" location on the
1280 * stack
1281 * o Copy the interrupt frame into an "iret" location on the stack
1282 * o Continue processing the NMI
1283 * If the variable is set or the previous stack is the NMI stack:
1284 * o Modify the "iret" location to jump to the repeat_nmi
1285 * o return back to the first NMI
1286 *
1287 * Now on exit of the first NMI, we first clear the stack variable
1288 * The NMI stack will tell any nested NMIs at that point that it is
1289 * nested. Then we pop the stack normally with iret, and if there was
1290 * a nested NMI that updated the copy interrupt stack frame, a
1291 * jump will be made to the repeat_nmi code that will handle the second
1292 * NMI.
1293 *
1294 * However, espfix prevents us from directly returning to userspace
1295 * with a single IRET instruction. Similarly, IRET to user mode
1296 * can fault. We therefore handle NMIs from user space like
1297 * other IST entries.
1298 */
1300 ASM_CLAC
1302 /* Use %rdx as our temp variable throughout */
1303 pushq %rdx
1305 testb $3, CS-RIP+8(%rsp)
1306 jz .Lnmi_from_kernel
1308 /*
1309 * NMI from user mode. We need to run on the thread stack, but we
1310 * can't go through the normal entry paths: NMIs are masked, and
1311 * we don't want to enable interrupts, because then we'll end
1312 * up in an awkward situation in which IRQs are on but NMIs
1313 * are off.
1314 *
1315 * We also must not push anything to the stack before switching
1316 * stacks lest we corrupt the "NMI executing" variable.
1317 */
1319 SWAPGS_UNSAFE_STACK
1320 cld
1321 movq %rsp, %rdx
1322 movq PER_CPU_VAR(cpu_current_top_of_stack), %rsp
1323 UNWIND_HINT_IRET_REGS base=%rdx offset=8
1324 pushq 5*8(%rdx) /* pt_regs->ss */
1325 pushq 4*8(%rdx) /* pt_regs->rsp */
1326 pushq 3*8(%rdx) /* pt_regs->flags */
1327 pushq 2*8(%rdx) /* pt_regs->cs */
1328 pushq 1*8(%rdx) /* pt_regs->rip */
1329 UNWIND_HINT_IRET_REGS
1330 pushq $-1 /* pt_regs->orig_ax */
1331 pushq %rdi /* pt_regs->di */
1332 pushq %rsi /* pt_regs->si */
1333 pushq (%rdx) /* pt_regs->dx */
1334 pushq %rcx /* pt_regs->cx */
1335 pushq %rax /* pt_regs->ax */
1336 pushq %r8 /* pt_regs->r8 */
1337 pushq %r9 /* pt_regs->r9 */
1338 pushq %r10 /* pt_regs->r10 */
1339 pushq %r11 /* pt_regs->r11 */
1340 pushq %rbx /* pt_regs->rbx */
1341 pushq %rbp /* pt_regs->rbp */
1342 pushq %r12 /* pt_regs->r12 */
1343 pushq %r13 /* pt_regs->r13 */
1344 pushq %r14 /* pt_regs->r14 */
1345 pushq %r15 /* pt_regs->r15 */
1346 UNWIND_HINT_REGS
1347 ENCODE_FRAME_POINTER
1349 /*
1350 * At this point we no longer need to worry about stack damage
1351 * due to nesting -- we're on the normal thread stack and we're
1352 * done with the NMI stack.
1353 */
1355 movq %rsp, %rdi
1356 movq $-1, %rsi
1357 call do_nmi
1359 /*
1360 * Return back to user mode. We must *not* do the normal exit
1361 * work, because we don't want to enable interrupts.
1362 */
1363 SWAPGS
1364 jmp restore_regs_and_iret
1366 .Lnmi_from_kernel:
1367 /*
1368 * Here's what our stack frame will look like:
1369 * +---------------------------------------------------------+
1370 * | original SS |
1371 * | original Return RSP |
1372 * | original RFLAGS |
1373 * | original CS |
1374 * | original RIP |
1375 * +---------------------------------------------------------+
1376 * | temp storage for rdx |
1377 * +---------------------------------------------------------+
1378 * | "NMI executing" variable |
1379 * +---------------------------------------------------------+
1380 * | iret SS } Copied from "outermost" frame |
1381 * | iret Return RSP } on each loop iteration; overwritten |
1382 * | iret RFLAGS } by a nested NMI to force another |
1383 * | iret CS } iteration if needed. |
1384 * | iret RIP } |
1385 * +---------------------------------------------------------+
1386 * | outermost SS } initialized in first_nmi; |
1387 * | outermost Return RSP } will not be changed before |
1388 * | outermost RFLAGS } NMI processing is done. |
1389 * | outermost CS } Copied to "iret" frame on each |
1390 * | outermost RIP } iteration. |
1391 * +---------------------------------------------------------+
1392 * | pt_regs |
1393 * +---------------------------------------------------------+
1394 *
1395 * The "original" frame is used by hardware. Before re-enabling
1396 * NMIs, we need to be done with it, and we need to leave enough
1397 * space for the asm code here.
1398 *
1399 * We return by executing IRET while RSP points to the "iret" frame.
1400 * That will either return for real or it will loop back into NMI
1401 * processing.
1402 *
1403 * The "outermost" frame is copied to the "iret" frame on each
1404 * iteration of the loop, so each iteration starts with the "iret"
1405 * frame pointing to the final return target.
1406 */
1408 /*
1409 * Determine whether we're a nested NMI.
1410 *
1411 * If we interrupted kernel code between repeat_nmi and
1412 * end_repeat_nmi, then we are a nested NMI. We must not
1413 * modify the "iret" frame because it's being written by
1414 * the outer NMI. That's okay; the outer NMI handler is
1415 * about to about to call do_nmi anyway, so we can just
1416 * resume the outer NMI.
1417 */
1419 movq $repeat_nmi, %rdx
1420 cmpq 8(%rsp), %rdx
1421 ja 1f
1422 movq $end_repeat_nmi, %rdx
1423 cmpq 8(%rsp), %rdx
1424 ja nested_nmi_out
1425 1:
1427 /*
1428 * Now check "NMI executing". If it's set, then we're nested.
1429 * This will not detect if we interrupted an outer NMI just
1430 * before IRET.
1431 */
1432 cmpl $1, -8(%rsp)
1433 je nested_nmi
1435 /*
1436 * Now test if the previous stack was an NMI stack. This covers
1437 * the case where we interrupt an outer NMI after it clears
1438 * "NMI executing" but before IRET. We need to be careful, though:
1439 * there is one case in which RSP could point to the NMI stack
1440 * despite there being no NMI active: naughty userspace controls
1441 * RSP at the very beginning of the SYSCALL targets. We can
1442 * pull a fast one on naughty userspace, though: we program
1443 * SYSCALL to mask DF, so userspace cannot cause DF to be set
1444 * if it controls the kernel's RSP. We set DF before we clear
1445 * "NMI executing".
1446 */
1447 lea 6*8(%rsp), %rdx
1448 /* Compare the NMI stack (rdx) with the stack we came from (4*8(%rsp)) */
1449 cmpq %rdx, 4*8(%rsp)
1450 /* If the stack pointer is above the NMI stack, this is a normal NMI */
1451 ja first_nmi
1453 subq $EXCEPTION_STKSZ, %rdx
1454 cmpq %rdx, 4*8(%rsp)
1455 /* If it is below the NMI stack, it is a normal NMI */
1456 jb first_nmi
1458 /* Ah, it is within the NMI stack. */
1460 testb $(X86_EFLAGS_DF >> 8), (3*8 + 1)(%rsp)
1461 jz first_nmi /* RSP was user controlled. */
1463 /* This is a nested NMI. */
1465 nested_nmi:
1466 /*
1467 * Modify the "iret" frame to point to repeat_nmi, forcing another
1468 * iteration of NMI handling.
1469 */
1470 subq $8, %rsp
1471 leaq -10*8(%rsp), %rdx
1472 pushq $__KERNEL_DS
1473 pushq %rdx
1474 pushfq
1475 pushq $__KERNEL_CS
1476 pushq $repeat_nmi
1478 /* Put stack back */
1479 addq $(6*8), %rsp
1481 nested_nmi_out:
1482 popq %rdx
1484 /* We are returning to kernel mode, so this cannot result in a fault. */
1485 INTERRUPT_RETURN
1487 first_nmi:
1488 /* Restore rdx. */
1489 movq (%rsp), %rdx
1491 /* Make room for "NMI executing". */
1492 pushq $0
1494 /* Leave room for the "iret" frame */
1495 subq $(5*8), %rsp
1497 /* Copy the "original" frame to the "outermost" frame */
1498 .rept 5
1499 pushq 11*8(%rsp)
1500 .endr
1501 UNWIND_HINT_IRET_REGS
1503 /* Everything up to here is safe from nested NMIs */
1505 #ifdef CONFIG_DEBUG_ENTRY
1506 /*
1507 * For ease of testing, unmask NMIs right away. Disabled by
1508 * default because IRET is very expensive.
1509 */
1510 pushq $0 /* SS */
1511 pushq %rsp /* RSP (minus 8 because of the previous push) */
1512 addq $8, (%rsp) /* Fix up RSP */
1513 pushfq /* RFLAGS */
1514 pushq $__KERNEL_CS /* CS */
1515 pushq $1f /* RIP */
1516 INTERRUPT_RETURN /* continues at repeat_nmi below */
1517 UNWIND_HINT_IRET_REGS
1518 1:
1519 #endif
1521 repeat_nmi:
1522 /*
1523 * If there was a nested NMI, the first NMI's iret will return
1524 * here. But NMIs are still enabled and we can take another
1525 * nested NMI. The nested NMI checks the interrupted RIP to see
1526 * if it is between repeat_nmi and end_repeat_nmi, and if so
1527 * it will just return, as we are about to repeat an NMI anyway.
1528 * This makes it safe to copy to the stack frame that a nested
1529 * NMI will update.
1530 *
1531 * RSP is pointing to "outermost RIP". gsbase is unknown, but, if
1532 * we're repeating an NMI, gsbase has the same value that it had on
1533 * the first iteration. paranoid_entry will load the kernel
1534 * gsbase if needed before we call do_nmi. "NMI executing"
1535 * is zero.
1536 */
1537 movq $1, 10*8(%rsp) /* Set "NMI executing". */
1539 /*
1540 * Copy the "outermost" frame to the "iret" frame. NMIs that nest
1541 * here must not modify the "iret" frame while we're writing to
1542 * it or it will end up containing garbage.
1543 */
1544 addq $(10*8), %rsp
1545 .rept 5
1546 pushq -6*8(%rsp)
1547 .endr
1548 subq $(5*8), %rsp
1549 end_repeat_nmi:
1551 /*
1552 * Everything below this point can be preempted by a nested NMI.
1553 * If this happens, then the inner NMI will change the "iret"
1554 * frame to point back to repeat_nmi.
1555 */
1556 pushq $-1 /* ORIG_RAX: no syscall to restart */
1557 ALLOC_PT_GPREGS_ON_STACK
1559 /*
1560 * Use paranoid_entry to handle SWAPGS, but no need to use paranoid_exit
1561 * as we should not be calling schedule in NMI context.
1562 * Even with normal interrupts enabled. An NMI should not be
1563 * setting NEED_RESCHED or anything that normal interrupts and
1564 * exceptions might do.
1565 */
1566 call paranoid_entry
1567 UNWIND_HINT_REGS
1569 /* paranoidentry do_nmi, 0; without TRACE_IRQS_OFF */
1570 movq %rsp, %rdi
1571 movq $-1, %rsi
1572 call do_nmi
1574 testl %ebx, %ebx /* swapgs needed? */
1575 jnz nmi_restore
1576 nmi_swapgs:
1577 SWAPGS_UNSAFE_STACK
1578 nmi_restore:
1579 RESTORE_EXTRA_REGS
1580 RESTORE_C_REGS
1582 /* Point RSP at the "iret" frame. */
1583 REMOVE_PT_GPREGS_FROM_STACK 6*8
1585 /*
1586 * Clear "NMI executing". Set DF first so that we can easily
1587 * distinguish the remaining code between here and IRET from
1588 * the SYSCALL entry and exit paths. On a native kernel, we
1589 * could just inspect RIP, but, on paravirt kernels,
1590 * INTERRUPT_RETURN can translate into a jump into a
1591 * hypercall page.
1592 */
1593 std
1594 movq $0, 5*8(%rsp) /* clear "NMI executing" */
1596 /*
1597 * INTERRUPT_RETURN reads the "iret" frame and exits the NMI
1598 * stack in a single instruction. We are returning to kernel
1599 * mode, so this cannot result in a fault.
1600 */
1601 INTERRUPT_RETURN
1602 END(nmi)
1604 ENTRY(ignore_sysret)
1605 UNWIND_HINT_EMPTY
1606 mov $-ENOSYS, %eax
1607 sysret
1608 END(ignore_sysret)
1610 ENTRY(rewind_stack_do_exit)
1611 UNWIND_HINT_FUNC
1612 /* Prevent any naive code from trying to unwind to our caller. */
1613 xorl %ebp, %ebp
1615 movq PER_CPU_VAR(cpu_current_top_of_stack), %rax
1616 leaq -PTREGS_SIZE(%rax), %rsp
1617 UNWIND_HINT_FUNC sp_offset=PTREGS_SIZE
1619 call do_exit
1620 END(rewind_stack_do_exit)