arch/arm/mach-omap2/hsmmc.c

   1 /*
   2  * linux/arch/arm/mach-omap2/hsmmc.c
   3  *
   4  * Copyright (C) 2007-2008 Texas Instruments
   5  * Copyright (C) 2008 Nokia Corporation
   6  * Author: Texas Instruments
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License version 2 as
  10  * published by the Free Software Foundation.
  11  */
  12 #include <linux/kernel.h>
  13 #include <linux/slab.h>
  14 #include <linux/string.h>
  15 #include <linux/delay.h>
  16 #include <mach/hardware.h>
  17 #include <plat/control.h>
  18 #include <plat/mmc.h>
  19 #include <plat/omap-pm.h>
  20
  21 #include "hsmmc.h"
  22
  23 #if defined(CONFIG_MMC_OMAP_HS) || defined(CONFIG_MMC_OMAP_HS_MODULE)
  24
  25 static u16 control_pbias_offset;
  26 static u16 control_devconf1_offset;
  27 static u16 control_mmc1;
  28
  29 #define HSMMC_NAME_LEN  9
  30
  31 static struct hsmmc_controller {
  32         char                            name[HSMMC_NAME_LEN + 1];
  33 } hsmmc[OMAP34XX_NR_MMC];
  34
  35 #if defined(CONFIG_ARCH_OMAP3) && defined(CONFIG_PM)
  36
  37 static int hsmmc_get_context_loss(struct device *dev)
  38 {
  39         return omap_pm_get_dev_context_loss_count(dev);
  40 }
  41
  42 #else
  43 #define hsmmc_get_context_loss NULL
  44 #endif
  45
  46 static void omap_hsmmc1_before_set_reg(struct device *dev, int slot,
  47                                   int power_on, int vdd)
  48 {
  49         u32 reg, prog_io;
  50         struct omap_mmc_platform_data *mmc = dev->platform_data;
  51
  52         if (mmc->slots[0].remux)
  53                 mmc->slots[0].remux(dev, slot, power_on);
  54
  55         /*
  56          * Assume we power both OMAP VMMC1 (for CMD, CLK, DAT0..3) and the
  57          * card with Vcc regulator (from twl4030 or whatever).  OMAP has both
  58          * 1.8V and 3.0V modes, controlled by the PBIAS register.
  59          *
  60          * In 8-bit modes, OMAP VMMC1A (for DAT4..7) needs a supply, which
  61          * is most naturally TWL VSIM; those pins also use PBIAS.
  62          *
  63          * FIXME handle VMMC1A as needed ...
  64          */
  65         if (power_on) {
  66                 if (cpu_is_omap2430()) {
  67                         reg = omap_ctrl_readl(OMAP243X_CONTROL_DEVCONF1);
  68                         if ((1 << vdd) >= MMC_VDD_30_31)
  69                                 reg |= OMAP243X_MMC1_ACTIVE_OVERWRITE;
  70                         else
  71                                 reg &= ~OMAP243X_MMC1_ACTIVE_OVERWRITE;
  72                         omap_ctrl_writel(reg, OMAP243X_CONTROL_DEVCONF1);
  73                 }
  74
  75                 if (mmc->slots[0].internal_clock) {
  76                         reg = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
  77                         reg |= OMAP2_MMCSDIO1ADPCLKISEL;
  78                         omap_ctrl_writel(reg, OMAP2_CONTROL_DEVCONF0);
  79                 }
  80
  81                 reg = omap_ctrl_readl(control_pbias_offset);
  82                 if (cpu_is_omap3630()) {
  83                         /* Set MMC I/O to 52Mhz */
  84                         prog_io = omap_ctrl_readl(OMAP343X_CONTROL_PROG_IO1);
  85                         prog_io |= OMAP3630_PRG_SDMMC1_SPEEDCTRL;
  86                         omap_ctrl_writel(prog_io, OMAP343X_CONTROL_PROG_IO1);
  87                 } else {
  88                         reg |= OMAP2_PBIASSPEEDCTRL0;
  89                 }
  90                 reg &= ~OMAP2_PBIASLITEPWRDNZ0;
  91                 omap_ctrl_writel(reg, control_pbias_offset);
  92         } else {
  93                 reg = omap_ctrl_readl(control_pbias_offset);
  94                 reg &= ~OMAP2_PBIASLITEPWRDNZ0;
  95                 omap_ctrl_writel(reg, control_pbias_offset);
  96         }
  97 }
  98
  99 static void omap_hsmmc1_after_set_reg(struct device *dev, int slot,
 100                                  int power_on, int vdd)
 101 {
 102         u32 reg;
 103
 104         /* 100ms delay required for PBIAS configuration */
 105         msleep(100);
 106
 107         if (power_on) {
 108                 reg = omap_ctrl_readl(control_pbias_offset);
 109                 reg |= (OMAP2_PBIASLITEPWRDNZ0 | OMAP2_PBIASSPEEDCTRL0);
 110                 if ((1 << vdd) <= MMC_VDD_165_195)
 111                         reg &= ~OMAP2_PBIASLITEVMODE0;
 112                 else
 113                         reg |= OMAP2_PBIASLITEVMODE0;
 114                 omap_ctrl_writel(reg, control_pbias_offset);
 115         } else {
 116                 reg = omap_ctrl_readl(control_pbias_offset);
 117                 reg |= (OMAP2_PBIASSPEEDCTRL0 | OMAP2_PBIASLITEPWRDNZ0 |
 118                         OMAP2_PBIASLITEVMODE0);
 119                 omap_ctrl_writel(reg, control_pbias_offset);
 120         }
 121 }
 122
 123 static void omap4_hsmmc1_before_set_reg(struct device *dev, int slot,
 124                                   int power_on, int vdd)
 125 {
 126         u32 reg;
 127
 128         /*
 129          * Assume we power both OMAP VMMC1 (for CMD, CLK, DAT0..3) and the
 130          * card with Vcc regulator (from twl4030 or whatever).  OMAP has both
 131          * 1.8V and 3.0V modes, controlled by the PBIAS register.
 132          *
 133          * In 8-bit modes, OMAP VMMC1A (for DAT4..7) needs a supply, which
 134          * is most naturally TWL VSIM; those pins also use PBIAS.
 135          *
 136          * FIXME handle VMMC1A as needed ...
 137          */
 138         reg = omap_ctrl_readl(control_pbias_offset);
 139         reg &= ~(OMAP4_MMC1_PBIASLITE_PWRDNZ | OMAP4_MMC1_PWRDNZ |
 140                                         OMAP4_USBC1_ICUSB_PWRDNZ);
 141         omap_ctrl_writel(reg, control_pbias_offset);
 142 }
 143
 144 static void omap4_hsmmc1_after_set_reg(struct device *dev, int slot,
 145                                  int power_on, int vdd)
 146 {
 147         u32 reg;
 148
 149         if (power_on) {
 150                 reg = omap_ctrl_readl(control_pbias_offset);
 151                 reg |= OMAP4_MMC1_PBIASLITE_PWRDNZ;
 152                 if ((1 << vdd) <= MMC_VDD_165_195)
 153                         reg &= ~OMAP4_MMC1_PBIASLITE_VMODE;
 154                 else
 155                         reg |= OMAP4_MMC1_PBIASLITE_VMODE;
 156                 reg |= (OMAP4_MMC1_PBIASLITE_PWRDNZ | OMAP4_MMC1_PWRDNZ |
 157                                                 OMAP4_USBC1_ICUSB_PWRDNZ);
 158                 omap_ctrl_writel(reg, control_pbias_offset);
 159                 /* 4 microsec delay for comparator to generate an error*/
 160                 udelay(4);
 161                 reg = omap_ctrl_readl(control_pbias_offset);
 162                 if (reg & OMAP4_MMC1_PBIASLITE_VMODE_ERROR) {
 163                         pr_err("Pbias Voltage is not same as LDO\n");
 164                         /* Caution : On VMODE_ERROR Power Down MMC IO */
 165                         reg &= ~(OMAP4_MMC1_PWRDNZ | OMAP4_USBC1_ICUSB_PWRDNZ);
 166                         omap_ctrl_writel(reg, control_pbias_offset);
 167                 }
 168         } else {
 169                 reg = omap_ctrl_readl(control_pbias_offset);
 170                  reg |= (OMAP4_MMC1_PBIASLITE_PWRDNZ |
 171                         OMAP4_MMC1_PBIASLITE_VMODE | OMAP4_MMC1_PWRDNZ |
 172                         OMAP4_USBC1_ICUSB_PWRDNZ);
 173                 omap_ctrl_writel(reg, control_pbias_offset);
 174         }
 175 }
 176
 177 static void hsmmc23_before_set_reg(struct device *dev, int slot,
 178                                    int power_on, int vdd)
 179 {
 180         struct omap_mmc_platform_data *mmc = dev->platform_data;
 181
 182         if (mmc->slots[0].remux)
 183                 mmc->slots[0].remux(dev, slot, power_on);
 184
 185         if (power_on) {
 186                 /* Only MMC2 supports a CLKIN */
 187                 if (mmc->slots[0].internal_clock) {
 188                         u32 reg;
 189
 190                         reg = omap_ctrl_readl(control_devconf1_offset);
 191                         reg |= OMAP2_MMCSDIO2ADPCLKISEL;
 192                         omap_ctrl_writel(reg, control_devconf1_offset);
 193                 }
 194         }
 195 }
 196
 197 static int nop_mmc_set_power(struct device *dev, int slot, int power_on,
 198                                                         int vdd)
 199 {
 200         return 0;
 201 }
 202
 203 static struct omap_mmc_platform_data *hsmmc_data[OMAP34XX_NR_MMC] __initdata;
 204
 205 void __init omap2_hsmmc_init(struct omap2_hsmmc_info *controllers)
 206 {
 207         struct omap2_hsmmc_info *c;
 208         int nr_hsmmc = ARRAY_SIZE(hsmmc_data);
 209         int i;
 210         u32 reg;
 211
 212         if (!cpu_is_omap44xx()) {
 213                 if (cpu_is_omap2430()) {
 214                         control_pbias_offset = OMAP243X_CONTROL_PBIAS_LITE;
 215                         control_devconf1_offset = OMAP243X_CONTROL_DEVCONF1;
 216                 } else {
 217                         control_pbias_offset = OMAP343X_CONTROL_PBIAS_LITE;
 218                         control_devconf1_offset = OMAP343X_CONTROL_DEVCONF1;
 219                 }
 220         } else {
 221                 control_pbias_offset = OMAP44XX_CONTROL_PBIAS_LITE;
 222                 control_mmc1 = OMAP44XX_CONTROL_MMC1;
 223                 reg = omap_ctrl_readl(control_mmc1);
 224                 reg |= (OMAP4_CONTROL_SDMMC1_PUSTRENGTHGRP0 |
 225                         OMAP4_CONTROL_SDMMC1_PUSTRENGTHGRP1);
 226                 reg &= ~(OMAP4_CONTROL_SDMMC1_PUSTRENGTHGRP2 |
 227                         OMAP4_CONTROL_SDMMC1_PUSTRENGTHGRP3);
 228                 reg |= (OMAP4_CONTROL_SDMMC1_DR0_SPEEDCTRL |
 229                         OMAP4_CONTROL_SDMMC1_DR1_SPEEDCTRL |
 230                         OMAP4_CONTROL_SDMMC1_DR2_SPEEDCTRL);
 231                 omap_ctrl_writel(reg, control_mmc1);
 232         }
 233
 234         for (c = controllers; c->mmc; c++) {
 235                 struct hsmmc_controller *hc = hsmmc + c->mmc - 1;
 236                 struct omap_mmc_platform_data *mmc = hsmmc_data[c->mmc - 1];
 237
 238                 if (!c->mmc || c->mmc > nr_hsmmc) {
 239                         pr_debug("MMC%d: no such controller\n", c->mmc);
 240                         continue;
 241                 }
 242                 if (mmc) {
 243                         pr_debug("MMC%d: already configured\n", c->mmc);
 244                         continue;
 245                 }
 246
 247                 mmc = kzalloc(sizeof(struct omap_mmc_platform_data),
 248                               GFP_KERNEL);
 249                 if (!mmc) {
 250                         pr_err("Cannot allocate memory for mmc device!\n");
 251                         goto done;
 252                 }
 253
 254                 if (c->name)
 255                         strncpy(hc->name, c->name, HSMMC_NAME_LEN);
 256                 else
 257                         snprintf(hc->name, ARRAY_SIZE(hc->name),
 258                                 "mmc%islot%i", c->mmc, 1);
 259                 mmc->slots[0].name = hc->name;
 260                 mmc->nr_slots = 1;
 261                 mmc->slots[0].wires = c->wires;
 262                 mmc->slots[0].internal_clock = !c->ext_clock;
 263                 mmc->dma_mask = 0xffffffff;
 264
 265                 mmc->get_context_loss_count = hsmmc_get_context_loss;
 266
 267                 mmc->slots[0].switch_pin = c->gpio_cd;
 268                 mmc->slots[0].gpio_wp = c->gpio_wp;
 269
 270                 mmc->slots[0].remux = c->remux;
 271                 mmc->slots[0].init_card = c->init_card;
 272
 273                 if (c->cover_only)
 274                         mmc->slots[0].cover = 1;
 275
 276                 if (c->nonremovable)
 277                         mmc->slots[0].nonremovable = 1;
 278
 279                 if (c->power_saving)
 280                         mmc->slots[0].power_saving = 1;
 281
 282                 if (c->no_off)
 283                         mmc->slots[0].no_off = 1;
 284
 285                 if (c->vcc_aux_disable_is_sleep)
 286                         mmc->slots[0].vcc_aux_disable_is_sleep = 1;
 287
 288                 /* NOTE:  MMC slots should have a Vcc regulator set up.
 289                  * This may be from a TWL4030-family chip, another
 290                  * controllable regulator, or a fixed supply.
 291                  *
 292                  * temporary HACK: ocr_mask instead of fixed supply
 293                  */
 294                 mmc->slots[0].ocr_mask = c->ocr_mask;
 295
 296                 if (cpu_is_omap3517() || cpu_is_omap3505())
 297                         mmc->slots[0].set_power = nop_mmc_set_power;
 298                 else
 299                         mmc->slots[0].features |= HSMMC_HAS_PBIAS;
 300
 301                 switch (c->mmc) {
 302                 case 1:
 303                         if (mmc->slots[0].features & HSMMC_HAS_PBIAS) {
 304                                 /* on-chip level shifting via PBIAS0/PBIAS1 */
 305                                 if (cpu_is_omap44xx()) {
 306                                         mmc->slots[0].before_set_reg =
 307                                                 omap4_hsmmc1_before_set_reg;
 308                                         mmc->slots[0].after_set_reg =
 309                                                 omap4_hsmmc1_after_set_reg;
 310                                 } else {
 311                                         mmc->slots[0].before_set_reg =
 312                                                 omap_hsmmc1_before_set_reg;
 313                                         mmc->slots[0].after_set_reg =
 314                                                 omap_hsmmc1_after_set_reg;
 315                                 }
 316                         }
 317
 318                         /* Omap3630 HSMMC1 supports only 4-bit */
 319                         if (cpu_is_omap3630() && c->wires > 4) {
 320                                 c->wires = 4;
 321                                 mmc->slots[0].wires = c->wires;
 322                         }
 323                         break;
 324                 case 2:
 325                         if (c->ext_clock)
 326                                 c->transceiver = 1;
 327                         if (c->transceiver && c->wires > 4)
 328                                 c->wires = 4;
 329                         /* FALLTHROUGH */
 330                 case 3:
 331                         if (mmc->slots[0].features & HSMMC_HAS_PBIAS) {
 332                                 /* off-chip level shifting, or none */
 333                                 mmc->slots[0].before_set_reg = hsmmc23_before_set_reg;
 334                                 mmc->slots[0].after_set_reg = NULL;
 335                         }
 336                         break;
 337                 default:
 338                         pr_err("MMC%d configuration not supported!\n", c->mmc);
 339                         kfree(mmc);
 340                         continue;
 341                 }
 342                 hsmmc_data[c->mmc - 1] = mmc;
 343         }
 344
 345         omap2_init_mmc(hsmmc_data, OMAP34XX_NR_MMC);
 346
 347         /* pass the device nodes back to board setup code */
 348         for (c = controllers; c->mmc; c++) {
 349                 struct omap_mmc_platform_data *mmc = hsmmc_data[c->mmc - 1];
 350
 351                 if (!c->mmc || c->mmc > nr_hsmmc)
 352                         continue;
 353                 c->dev = mmc->dev;
 354         }
 355
 356 done:
 357         for (i = 0; i < nr_hsmmc; i++)
 358                 kfree(hsmmc_data[i]);
 359 }
 360
 361 #endif