arch/arm/mach-omap2/board-flash.c

   1 /*
   2  * board-sdp-flash.c
   3  * Modified from mach-omap2/board-3430sdp-flash.c
   4  *
   5  * Copyright (C) 2009 Nokia Corporation
   6  * Copyright (C) 2009 Texas Instruments
   7  *
   8  * Vimal Singh <vimalsingh@ti.com>
   9  *
  10  * This program is free software; you can redistribute it and/or modify
  11  * it under the terms of the GNU General Public License version 2 as
  12  * published by the Free Software Foundation.
  13  */
  14
  15 #include <linux/kernel.h>
  16 #include <linux/platform_device.h>
  17 #include <linux/mtd/physmap.h>
  18 #include <linux/io.h>
  19
  20 #include <plat/gpmc.h>
  21 #include <plat/nand.h>
  22 #include <plat/onenand.h>
  23 #include <plat/tc.h>
  24 #include <mach/board-flash.h>
  25
  26 #define REG_FPGA_REV                    0x10
  27 #define REG_FPGA_DIP_SWITCH_INPUT2      0x60
  28 #define MAX_SUPPORTED_GPMC_CONFIG       3
  29
  30 #define DEBUG_BASE              0x08000000 /* debug board */
  31
  32 /* various memory sizes */
  33 #define FLASH_SIZE_SDPV1        SZ_64M  /* NOR flash (64 Meg aligned) */
  34 #define FLASH_SIZE_SDPV2        SZ_128M /* NOR flash (256 Meg aligned) */
  35
  36 static struct physmap_flash_data board_nor_data = {
  37         .width          = 2,
  38 };
  39
  40 static struct resource board_nor_resource = {
  41         .flags          = IORESOURCE_MEM,
  42 };
  43
  44 static struct platform_device board_nor_device = {
  45         .name           = "physmap-flash",
  46         .id             = 0,
  47         .dev            = {
  48                         .platform_data = &board_nor_data,
  49         },
  50         .num_resources  = 1,
  51         .resource       = &board_nor_resource,
  52 };
  53
  54 static void
  55 __init board_nor_init(struct mtd_partition *nor_parts, u8 nr_parts, u8 cs)
  56 {
  57         int err;
  58
  59         board_nor_data.parts    = nor_parts;
  60         board_nor_data.nr_parts = nr_parts;
  61
  62         /* Configure start address and size of NOR device */
  63         if (omap_rev() >= OMAP3430_REV_ES1_0) {
  64                 err = gpmc_cs_request(cs, FLASH_SIZE_SDPV2 - 1,
  65                                 (unsigned long *)&board_nor_resource.start);
  66                 board_nor_resource.end = board_nor_resource.start
  67                                         + FLASH_SIZE_SDPV2 - 1;
  68         } else {
  69                 err = gpmc_cs_request(cs, FLASH_SIZE_SDPV1 - 1,
  70                                 (unsigned long *)&board_nor_resource.start);
  71                 board_nor_resource.end = board_nor_resource.start
  72                                         + FLASH_SIZE_SDPV1 - 1;
  73         }
  74         if (err < 0) {
  75                 printk(KERN_ERR "NOR: Can't request GPMC CS\n");
  76                 return;
  77         }
  78         if (platform_device_register(&board_nor_device) < 0)
  79                 printk(KERN_ERR "Unable to register NOR device\n");
  80 }
  81
  82 #if defined(CONFIG_MTD_ONENAND_OMAP2) || \
  83                 defined(CONFIG_MTD_ONENAND_OMAP2_MODULE)
  84 static struct omap_onenand_platform_data board_onenand_data = {
  85         .dma_channel    = -1,   /* disable DMA in OMAP OneNAND driver */
  86 };
  87
  88 static void
  89 __init board_onenand_init(struct mtd_partition *onenand_parts,
  90                                 u8 nr_parts, u8 cs)
  91 {
  92         board_onenand_data.cs           = cs;
  93         board_onenand_data.parts        = onenand_parts;
  94         board_onenand_data.nr_parts     = nr_parts;
  95
  96         gpmc_onenand_init(&board_onenand_data);
  97 }
  98 #else
  99 static void
 100 __init board_onenand_init(struct mtd_partition *nor_parts, u8 nr_parts, u8 cs)
 101 {
 102 }
 103 #endif /* CONFIG_MTD_ONENAND_OMAP2 || CONFIG_MTD_ONENAND_OMAP2_MODULE */
 104
 105 #if defined(CONFIG_MTD_NAND_OMAP2) || \
 106                 defined(CONFIG_MTD_NAND_OMAP2_MODULE)
 107
 108 /* Note that all values in this struct are in nanoseconds */
 109 static struct gpmc_timings nand_timings = {
 110
 111         .sync_clk = 0,
 112
 113         .cs_on = 0,
 114         .cs_rd_off = 36,
 115         .cs_wr_off = 36,
 116
 117         .adv_on = 6,
 118         .adv_rd_off = 24,
 119         .adv_wr_off = 36,
 120
 121         .we_off = 30,
 122         .oe_off = 48,
 123
 124         .access = 54,
 125         .rd_cycle = 72,
 126         .wr_cycle = 72,
 127
 128         .wr_access = 30,
 129         .wr_data_mux_bus = 0,
 130 };
 131
 132 static struct omap_nand_platform_data board_nand_data = {
 133         .nand_setup     = NULL,
 134         .gpmc_t         = &nand_timings,
 135         .dma_channel    = -1,           /* disable DMA in OMAP NAND driver */
 136         .dev_ready      = NULL,
 137         .devsize        = 0,    /* '0' for 8-bit, '1' for 16-bit device */
 138 };
 139
 140 void
 141 __init board_nand_init(struct mtd_partition *nand_parts, u8 nr_parts, u8 cs)
 142 {
 143         board_nand_data.cs              = cs;
 144         board_nand_data.parts           = nand_parts;
 145         board_nand_data.nr_parts                = nr_parts;
 146
 147         gpmc_nand_init(&board_nand_data);
 148 }
 149 #else
 150 void
 151 __init board_nand_init(struct mtd_partition *nand_parts, u8 nr_parts, u8 cs)
 152 {
 153 }
 154 #endif /* CONFIG_MTD_NAND_OMAP2 || CONFIG_MTD_NAND_OMAP2_MODULE */
 155
 156 /**
 157  * get_gpmc0_type - Reads the FPGA DIP_SWITCH_INPUT_REGISTER2 to get
 158  * the various cs values.
 159  */
 160 static u8 get_gpmc0_type(void)
 161 {
 162         u8 cs = 0;
 163         void __iomem *fpga_map_addr;
 164
 165         fpga_map_addr = ioremap(DEBUG_BASE, 4096);
 166         if (!fpga_map_addr)
 167                 return -ENOMEM;
 168
 169         if (!(__raw_readw(fpga_map_addr + REG_FPGA_REV)))
 170                 /* we dont have an DEBUG FPGA??? */
 171                 /* Depend on #defines!! default to strata boot return param */
 172                 goto unmap;
 173
 174         /* S8-DIP-OFF = 1, S8-DIP-ON = 0 */
 175         cs = __raw_readw(fpga_map_addr + REG_FPGA_DIP_SWITCH_INPUT2) & 0xf;
 176
 177         /* ES2.0 SDP's onwards 4 dip switches are provided for CS */
 178         if (omap_rev() >= OMAP3430_REV_ES1_0)
 179                 /* change (S8-1:4=DS-2:0) to (S8-4:1=DS-2:0) */
 180                 cs = ((cs & 8) >> 3) | ((cs & 4) >> 1) |
 181                         ((cs & 2) << 1) | ((cs & 1) << 3);
 182         else
 183                 /* change (S8-1:3=DS-2:0) to (S8-3:1=DS-2:0) */
 184                 cs = ((cs & 4) >> 2) | (cs & 2) | ((cs & 1) << 2);
 185 unmap:
 186         iounmap(fpga_map_addr);
 187         return cs;
 188 }
 189
 190 /**
 191  * sdp3430_flash_init - Identify devices connected to GPMC and register.
 192  *
 193  * @return - void.
 194  */
 195 void board_flash_init(struct flash_partitions partition_info[],
 196                                         char chip_sel_board[][GPMC_CS_NUM])
 197 {
 198         u8              cs = 0;
 199         u8              norcs = GPMC_CS_NUM + 1;
 200         u8              nandcs = GPMC_CS_NUM + 1;
 201         u8              onenandcs = GPMC_CS_NUM + 1;
 202         u8              idx;
 203         unsigned char   *config_sel = NULL;
 204
 205         /* REVISIT: Is this return correct idx for 2430 SDP?
 206          * for which cs configuration matches for 2430 SDP?
 207          */
 208         idx = get_gpmc0_type();
 209         if (idx >= MAX_SUPPORTED_GPMC_CONFIG) {
 210                 printk(KERN_ERR "%s: Invalid chip select: %d\n", __func__, cs);
 211                 return;
 212         }
 213         config_sel = (unsigned char *)(chip_sel_board[idx]);
 214
 215         while (cs < GPMC_CS_NUM) {
 216                 switch (config_sel[cs]) {
 217                 case PDC_NOR:
 218                         if (norcs > GPMC_CS_NUM)
 219                                 norcs = cs;
 220                         break;
 221                 case PDC_NAND:
 222                         if (nandcs > GPMC_CS_NUM)
 223                                 nandcs = cs;
 224                         break;
 225                 case PDC_ONENAND:
 226                         if (onenandcs > GPMC_CS_NUM)
 227                                 onenandcs = cs;
 228                         break;
 229                 };
 230                 cs++;
 231         }
 232
 233         if (norcs > GPMC_CS_NUM)
 234                 printk(KERN_INFO "NOR: Unable to find configuration "
 235                                 "in GPMC\n");
 236         else
 237                 board_nor_init(partition_info[0].parts,
 238                                 partition_info[0].nr_parts, norcs);
 239
 240         if (onenandcs > GPMC_CS_NUM)
 241                 printk(KERN_INFO "OneNAND: Unable to find configuration "
 242                                 "in GPMC\n");
 243         else
 244                 board_onenand_init(partition_info[1].parts,
 245                                         partition_info[1].nr_parts, onenandcs);
 246
 247         if (nandcs > GPMC_CS_NUM)
 248                 printk(KERN_INFO "NAND: Unable to find configuration "
 249                                 "in GPMC\n");
 250         else
 251                 board_nand_init(partition_info[2].parts,
 252                                 partition_info[2].nr_parts, nandcs);
 253 }