Revert "[PATCH] x86-64: fix x86_64-mm-sched-clock-share"
[linux-2.6/zen-sources.git] / include / linux / com20020.h
blobac6d9a43e0853b672aed7b34ea46a6a2eeea9e19
1 /*
2 * Linux ARCnet driver - COM20020 chipset support - function declarations
3 *
4 * Written 1997 by David Woodhouse.
5 * Written 1994-1999 by Avery Pennarun.
6 * Derived from skeleton.c by Donald Becker.
8 * Special thanks to Contemporary Controls, Inc. (www.ccontrols.com)
9 * for sponsoring the further development of this driver.
11 * **********************
13 * The original copyright of skeleton.c was as follows:
15 * skeleton.c Written 1993 by Donald Becker.
16 * Copyright 1993 United States Government as represented by the
17 * Director, National Security Agency. This software may only be used
18 * and distributed according to the terms of the GNU General Public License as
19 * modified by SRC, incorporated herein by reference.
21 * **********************
23 * For more details, see drivers/net/arcnet.c
25 * **********************
27 #ifndef __COM20020_H
28 #define __COM20020_H
30 int com20020_check(struct net_device *dev);
31 int com20020_found(struct net_device *dev, int shared);
33 /* The number of low I/O ports used by the card. */
34 #define ARCNET_TOTAL_SIZE 8
36 /* various register addresses */
37 #ifdef CONFIG_SA1100_CT6001
38 #define BUS_ALIGN 2 /* 8 bit device on a 16 bit bus - needs padding */
39 #else
40 #define BUS_ALIGN 1
41 #endif
44 #define _INTMASK (ioaddr+BUS_ALIGN*0) /* writable */
45 #define _STATUS (ioaddr+BUS_ALIGN*0) /* readable */
46 #define _COMMAND (ioaddr+BUS_ALIGN*1) /* standard arcnet commands */
47 #define _DIAGSTAT (ioaddr+BUS_ALIGN*1) /* diagnostic status register */
48 #define _ADDR_HI (ioaddr+BUS_ALIGN*2) /* control registers for IO-mapped memory */
49 #define _ADDR_LO (ioaddr+BUS_ALIGN*3)
50 #define _MEMDATA (ioaddr+BUS_ALIGN*4) /* data port for IO-mapped memory */
51 #define _SUBADR (ioaddr+BUS_ALIGN*5) /* the extended port _XREG refers to */
52 #define _CONFIG (ioaddr+BUS_ALIGN*6) /* configuration register */
53 #define _XREG (ioaddr+BUS_ALIGN*7) /* extra registers (indexed by _CONFIG
54 or _SUBADR) */
56 /* in the ADDR_HI register */
57 #define RDDATAflag 0x80 /* next access is a read (not a write) */
59 /* in the DIAGSTAT register */
60 #define NEWNXTIDflag 0x02 /* ID to which token is passed has changed */
62 /* in the CONFIG register */
63 #define RESETcfg 0x80 /* put card in reset state */
64 #define TXENcfg 0x20 /* enable TX */
66 /* in SETUP register */
67 #define PROMISCset 0x10 /* enable RCV_ALL */
68 #define P1MODE 0x80 /* enable P1-MODE for Backplane */
69 #define SLOWARB 0x01 /* enable Slow Arbitration for >=5Mbps */
71 /* COM2002x */
72 #define SUB_TENTATIVE 0 /* tentative node ID */
73 #define SUB_NODE 1 /* node ID */
74 #define SUB_SETUP1 2 /* various options */
75 #define SUB_TEST 3 /* test/diag register */
77 /* COM20022 only */
78 #define SUB_SETUP2 4 /* sundry options */
79 #define SUB_BUSCTL 5 /* bus control options */
80 #define SUB_DMACOUNT 6 /* DMA count options */
82 #define SET_SUBADR(x) do { \
83 if ((x) < 4) \
84 { \
85 lp->config = (lp->config & ~0x03) | (x); \
86 SETCONF; \
87 } \
88 else \
89 { \
90 outb(x, _SUBADR); \
91 } \
92 } while (0)
94 #undef ARCRESET
95 #undef ASTATUS
96 #undef ACOMMAND
97 #undef AINTMASK
99 #define ARCRESET { outb(lp->config | 0x80, _CONFIG); \
100 udelay(5); \
101 outb(lp->config , _CONFIG); \
103 #define ARCRESET0 { outb(0x18 | 0x80, _CONFIG); \
104 udelay(5); \
105 outb(0x18 , _CONFIG); \
108 #define ASTATUS() inb(_STATUS)
109 #define ADIAGSTATUS() inb(_DIAGSTAT)
110 #define ACOMMAND(cmd) outb((cmd),_COMMAND)
111 #define AINTMASK(msk) outb((msk),_INTMASK)
113 #define SETCONF outb(lp->config, _CONFIG)
115 #endif /* __COM20020_H */