1 /*****************************************************************************/
2 /* ips.c -- driver for the Adaptec / IBM ServeRAID controller */
4 /* Written By: Keith Mitchell, IBM Corporation */
5 /* Jack Hammer, Adaptec, Inc. */
6 /* David Jeffery, Adaptec, Inc. */
8 /* Copyright (C) 2000 IBM Corporation */
9 /* Copyright (C) 2002,2003 Adaptec, Inc. */
11 /* This program is free software; you can redistribute it and/or modify */
12 /* it under the terms of the GNU General Public License as published by */
13 /* the Free Software Foundation; either version 2 of the License, or */
14 /* (at your option) any later version. */
16 /* This program is distributed in the hope that it will be useful, */
17 /* but WITHOUT ANY WARRANTY; without even the implied warranty of */
18 /* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the */
19 /* GNU General Public License for more details. */
22 /* THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR */
23 /* CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT */
24 /* LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT, */
25 /* MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is */
26 /* solely responsible for determining the appropriateness of using and */
27 /* distributing the Program and assumes all risks associated with its */
28 /* exercise of rights under this Agreement, including but not limited to */
29 /* the risks and costs of program errors, damage to or loss of data, */
30 /* programs or equipment, and unavailability or interruption of operations. */
32 /* DISCLAIMER OF LIABILITY */
33 /* NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY */
34 /* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL */
35 /* DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND */
36 /* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR */
37 /* TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE */
38 /* USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED */
39 /* HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES */
41 /* You should have received a copy of the GNU General Public License */
42 /* along with this program; if not, write to the Free Software */
43 /* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */
45 /* Bugs/Comments/Suggestions about this driver should be mailed to: */
46 /* ipslinux@adaptec.com */
48 /* For system support issues, contact your local IBM Customer support. */
49 /* Directions to find IBM Customer Support for each country can be found at: */
50 /* http://www.ibm.com/planetwide/ */
52 /*****************************************************************************/
54 /*****************************************************************************/
57 /* 0.99.02 - Breakup commands that are bigger than 8 * the stripe size */
58 /* 0.99.03 - Make interrupt routine handle all completed request on the */
59 /* adapter not just the first one */
60 /* - Make sure passthru commands get woken up if we run out of */
62 /* - Send all of the commands on the queue at once rather than */
63 /* one at a time since the card will support it. */
64 /* 0.99.04 - Fix race condition in the passthru mechanism -- this required */
65 /* the interface to the utilities to change */
66 /* - Fix error recovery code */
67 /* 0.99.05 - Fix an oops when we get certain passthru commands */
68 /* 1.00.00 - Initial Public Release */
69 /* Functionally equivalent to 0.99.05 */
70 /* 3.60.00 - Bump max commands to 128 for use with firmware 3.60 */
71 /* - Change version to 3.60 to coincide with release numbering. */
72 /* 3.60.01 - Remove bogus error check in passthru routine */
73 /* 3.60.02 - Make DCDB direction based on lookup table */
74 /* - Only allow one DCDB command to a SCSI ID at a time */
75 /* 4.00.00 - Add support for ServeRAID 4 */
76 /* 4.00.01 - Add support for First Failure Data Capture */
77 /* 4.00.02 - Fix problem with PT DCDB with no buffer */
78 /* 4.00.03 - Add alternative passthru interface */
79 /* - Add ability to flash BIOS */
80 /* 4.00.04 - Rename structures/constants to be prefixed with IPS_ */
81 /* 4.00.05 - Remove wish_block from init routine */
82 /* - Use linux/spinlock.h instead of asm/spinlock.h for kernels */
83 /* 2.3.18 and later */
84 /* - Sync with other changes from the 2.3 kernels */
85 /* 4.00.06 - Fix timeout with initial FFDC command */
86 /* 4.00.06a - Port to 2.4 (trivial) -- Christoph Hellwig <hch@infradead.org> */
87 /* 4.10.00 - Add support for ServeRAID 4M/4L */
88 /* 4.10.13 - Fix for dynamic unload and proc file system */
89 /* 4.20.03 - Rename version to coincide with new release schedules */
90 /* Performance fixes */
91 /* Fix truncation of /proc files with cat */
92 /* Merge in changes through kernel 2.4.0test1ac21 */
93 /* 4.20.13 - Fix some failure cases / reset code */
94 /* - Hook into the reboot_notifier to flush the controller cache */
95 /* 4.50.01 - Fix problem when there is a hole in logical drive numbering */
96 /* 4.70.09 - Use a Common ( Large Buffer ) for Flashing from the JCRM CD */
97 /* - Add IPSSEND Flash Support */
98 /* - Set Sense Data for Unknown SCSI Command */
99 /* - Use Slot Number from NVRAM Page 5 */
100 /* - Restore caller's DCDB Structure */
101 /* 4.70.12 - Corrective actions for bad controller ( during initialization )*/
102 /* 4.70.13 - Don't Send CDB's if we already know the device is not present */
103 /* - Don't release HA Lock in ips_next() until SC taken off queue */
104 /* - Unregister SCSI device in ips_release() */
105 /* 4.70.15 - Fix Breakup for very large ( non-SG ) requests in ips_done() */
106 /* 4.71.00 - Change all memory allocations to not use GFP_DMA flag */
107 /* Code Clean-Up for 2.4.x kernel */
108 /* 4.72.00 - Allow for a Scatter-Gather Element to exceed MAX_XFER Size */
109 /* 4.72.01 - I/O Mapped Memory release ( so "insmod ips" does not Fail ) */
110 /* - Don't Issue Internal FFDC Command if there are Active Commands */
111 /* - Close Window for getting too many IOCTL's active */
112 /* 4.80.00 - Make ia64 Safe */
113 /* 4.80.04 - Eliminate calls to strtok() if 2.4.x or greater */
114 /* - Adjustments to Device Queue Depth */
115 /* 4.80.14 - Take all semaphores off stack */
116 /* - Clean Up New_IOCTL path */
117 /* 4.80.20 - Set max_sectors in Scsi_Host structure ( if >= 2.4.7 kernel ) */
118 /* - 5 second delay needed after resetting an i960 adapter */
119 /* 4.80.26 - Clean up potential code problems ( Arjan's recommendations ) */
120 /* 4.90.01 - Version Matching for FirmWare, BIOS, and Driver */
121 /* 4.90.05 - Use New PCI Architecture to facilitate Hot Plug Development */
122 /* 4.90.08 - Increase Delays in Flashing ( Trombone Only - 4H ) */
123 /* 4.90.08 - Data Corruption if First Scatter Gather Element is > 64K */
124 /* 4.90.11 - Don't actually RESET unless it's physically required */
125 /* - Remove unused compile options */
126 /* 5.00.01 - Sarasota ( 5i ) adapters must always be scanned first */
127 /* - Get rid on IOCTL_NEW_COMMAND code */
128 /* - Add Extended DCDB Commands for Tape Support in 5I */
129 /* 5.10.12 - use pci_dma interfaces, update for 2.5 kernel changes */
130 /* 5.10.15 - remove unused code (sem, macros, etc.) */
131 /* 5.30.00 - use __devexit_p() */
132 /* 6.00.00 - Add 6x Adapters and Battery Flash */
133 /* 6.10.00 - Remove 1G Addressing Limitations */
134 /* 6.11.xx - Get VersionInfo buffer off the stack ! DDTS 60401 */
135 /* 6.11.xx - Make Logical Drive Info structure safe for DMA DDTS 60639 */
136 /* 7.10.18 - Add highmem_io flag in SCSI Templete for 2.4 kernels */
137 /* - Fix path/name for scsi_hosts.h include for 2.6 kernels */
138 /* - Fix sort order of 7k */
139 /* - Remove 3 unused "inline" functions */
140 /* 7.12.xx - Use STATIC functions whereever possible */
141 /* - Clean up deprecated MODULE_PARM calls */
142 /* 7.12.05 - Remove Version Matching per IBM request */
143 /*****************************************************************************/
146 * Conditional Compilation directives for this driver:
148 * IPS_DEBUG - Turn on debugging info
152 * debug:<number> - Set debug level to <number>
153 * NOTE: only works when IPS_DEBUG compile directive is used.
154 * 1 - Normal debug messages
155 * 2 - Verbose debug messages
156 * 11 - Method trace (non interrupt)
157 * 12 - Method trace (includes interrupt)
159 * noi2o - Don't use I2O Queues (ServeRAID 4 only)
160 * nommap - Don't use memory mapped I/O
161 * ioctlsize - Initial size of the IOCTL buffer
165 #include <asm/byteorder.h>
166 #include <asm/page.h>
167 #include <linux/stddef.h>
168 #include <linux/version.h>
169 #include <linux/string.h>
170 #include <linux/errno.h>
171 #include <linux/kernel.h>
172 #include <linux/ioport.h>
173 #include <linux/slab.h>
174 #include <linux/delay.h>
175 #include <linux/pci.h>
176 #include <linux/proc_fs.h>
177 #include <linux/reboot.h>
178 #include <linux/interrupt.h>
180 #include <linux/blkdev.h>
181 #include <linux/types.h>
182 #include <linux/dma-mapping.h>
186 #include <scsi/scsi_host.h>
190 #include <linux/module.h>
192 #include <linux/stat.h>
194 #include <linux/spinlock.h>
195 #include <linux/init.h>
197 #include <linux/smp.h>
200 static char *ips
= NULL
;
201 module_param(ips
, charp
, 0);
207 #define IPS_VERSION_HIGH IPS_VER_MAJOR_STRING "." IPS_VER_MINOR_STRING
208 #define IPS_VERSION_LOW "." IPS_VER_BUILD_STRING " "
210 #if !defined(__i386__) && !defined(__ia64__) && !defined(__x86_64__)
211 #warning "This driver has only been tested on the x86/ia64/x86_64 platforms"
214 #define IPS_DMA_DIR(scb) ((!scb->scsi_cmd || ips_is_passthru(scb->scsi_cmd) || \
215 DMA_NONE == scb->scsi_cmd->sc_data_direction) ? \
216 PCI_DMA_BIDIRECTIONAL : \
217 scb->scsi_cmd->sc_data_direction)
220 #define METHOD_TRACE(s, i) if (ips_debug >= (i+10)) printk(KERN_NOTICE s "\n");
221 #define DEBUG(i, s) if (ips_debug >= i) printk(KERN_NOTICE s "\n");
222 #define DEBUG_VAR(i, s, v...) if (ips_debug >= i) printk(KERN_NOTICE s "\n", v);
224 #define METHOD_TRACE(s, i)
226 #define DEBUG_VAR(i, s, v...)
230 * Function prototypes
232 static int ips_detect(struct scsi_host_template
*);
233 static int ips_release(struct Scsi_Host
*);
234 static int ips_eh_abort(struct scsi_cmnd
*);
235 static int ips_eh_reset(struct scsi_cmnd
*);
236 static int ips_queue(struct scsi_cmnd
*, void (*)(struct scsi_cmnd
*));
237 static const char *ips_info(struct Scsi_Host
*);
238 static irqreturn_t
do_ipsintr(int, void *);
239 static int ips_hainit(ips_ha_t
*);
240 static int ips_map_status(ips_ha_t
*, ips_scb_t
*, ips_stat_t
*);
241 static int ips_send_wait(ips_ha_t
*, ips_scb_t
*, int, int);
242 static int ips_send_cmd(ips_ha_t
*, ips_scb_t
*);
243 static int ips_online(ips_ha_t
*, ips_scb_t
*);
244 static int ips_inquiry(ips_ha_t
*, ips_scb_t
*);
245 static int ips_rdcap(ips_ha_t
*, ips_scb_t
*);
246 static int ips_msense(ips_ha_t
*, ips_scb_t
*);
247 static int ips_reqsen(ips_ha_t
*, ips_scb_t
*);
248 static int ips_deallocatescbs(ips_ha_t
*, int);
249 static int ips_allocatescbs(ips_ha_t
*);
250 static int ips_reset_copperhead(ips_ha_t
*);
251 static int ips_reset_copperhead_memio(ips_ha_t
*);
252 static int ips_reset_morpheus(ips_ha_t
*);
253 static int ips_issue_copperhead(ips_ha_t
*, ips_scb_t
*);
254 static int ips_issue_copperhead_memio(ips_ha_t
*, ips_scb_t
*);
255 static int ips_issue_i2o(ips_ha_t
*, ips_scb_t
*);
256 static int ips_issue_i2o_memio(ips_ha_t
*, ips_scb_t
*);
257 static int ips_isintr_copperhead(ips_ha_t
*);
258 static int ips_isintr_copperhead_memio(ips_ha_t
*);
259 static int ips_isintr_morpheus(ips_ha_t
*);
260 static int ips_wait(ips_ha_t
*, int, int);
261 static int ips_write_driver_status(ips_ha_t
*, int);
262 static int ips_read_adapter_status(ips_ha_t
*, int);
263 static int ips_read_subsystem_parameters(ips_ha_t
*, int);
264 static int ips_read_config(ips_ha_t
*, int);
265 static int ips_clear_adapter(ips_ha_t
*, int);
266 static int ips_readwrite_page5(ips_ha_t
*, int, int);
267 static int ips_init_copperhead(ips_ha_t
*);
268 static int ips_init_copperhead_memio(ips_ha_t
*);
269 static int ips_init_morpheus(ips_ha_t
*);
270 static int ips_isinit_copperhead(ips_ha_t
*);
271 static int ips_isinit_copperhead_memio(ips_ha_t
*);
272 static int ips_isinit_morpheus(ips_ha_t
*);
273 static int ips_erase_bios(ips_ha_t
*);
274 static int ips_program_bios(ips_ha_t
*, char *, uint32_t, uint32_t);
275 static int ips_verify_bios(ips_ha_t
*, char *, uint32_t, uint32_t);
276 static int ips_erase_bios_memio(ips_ha_t
*);
277 static int ips_program_bios_memio(ips_ha_t
*, char *, uint32_t, uint32_t);
278 static int ips_verify_bios_memio(ips_ha_t
*, char *, uint32_t, uint32_t);
279 static int ips_flash_copperhead(ips_ha_t
*, ips_passthru_t
*, ips_scb_t
*);
280 static int ips_flash_bios(ips_ha_t
*, ips_passthru_t
*, ips_scb_t
*);
281 static int ips_flash_firmware(ips_ha_t
*, ips_passthru_t
*, ips_scb_t
*);
282 static void ips_free_flash_copperhead(ips_ha_t
* ha
);
283 static void ips_get_bios_version(ips_ha_t
*, int);
284 static void ips_identify_controller(ips_ha_t
*);
285 static void ips_chkstatus(ips_ha_t
*, IPS_STATUS
*);
286 static void ips_enable_int_copperhead(ips_ha_t
*);
287 static void ips_enable_int_copperhead_memio(ips_ha_t
*);
288 static void ips_enable_int_morpheus(ips_ha_t
*);
289 static int ips_intr_copperhead(ips_ha_t
*);
290 static int ips_intr_morpheus(ips_ha_t
*);
291 static void ips_next(ips_ha_t
*, int);
292 static void ipsintr_blocking(ips_ha_t
*, struct ips_scb
*);
293 static void ipsintr_done(ips_ha_t
*, struct ips_scb
*);
294 static void ips_done(ips_ha_t
*, ips_scb_t
*);
295 static void ips_free(ips_ha_t
*);
296 static void ips_init_scb(ips_ha_t
*, ips_scb_t
*);
297 static void ips_freescb(ips_ha_t
*, ips_scb_t
*);
298 static void ips_setup_funclist(ips_ha_t
*);
299 static void ips_statinit(ips_ha_t
*);
300 static void ips_statinit_memio(ips_ha_t
*);
301 static void ips_fix_ffdc_time(ips_ha_t
*, ips_scb_t
*, time_t);
302 static void ips_ffdc_reset(ips_ha_t
*, int);
303 static void ips_ffdc_time(ips_ha_t
*);
304 static uint32_t ips_statupd_copperhead(ips_ha_t
*);
305 static uint32_t ips_statupd_copperhead_memio(ips_ha_t
*);
306 static uint32_t ips_statupd_morpheus(ips_ha_t
*);
307 static ips_scb_t
*ips_getscb(ips_ha_t
*);
308 static void ips_putq_scb_head(ips_scb_queue_t
*, ips_scb_t
*);
309 static void ips_putq_wait_tail(ips_wait_queue_t
*, struct scsi_cmnd
*);
310 static void ips_putq_copp_tail(ips_copp_queue_t
*,
311 ips_copp_wait_item_t
*);
312 static ips_scb_t
*ips_removeq_scb_head(ips_scb_queue_t
*);
313 static ips_scb_t
*ips_removeq_scb(ips_scb_queue_t
*, ips_scb_t
*);
314 static struct scsi_cmnd
*ips_removeq_wait_head(ips_wait_queue_t
*);
315 static struct scsi_cmnd
*ips_removeq_wait(ips_wait_queue_t
*,
317 static ips_copp_wait_item_t
*ips_removeq_copp(ips_copp_queue_t
*,
318 ips_copp_wait_item_t
*);
319 static ips_copp_wait_item_t
*ips_removeq_copp_head(ips_copp_queue_t
*);
321 static int ips_is_passthru(struct scsi_cmnd
*);
322 static int ips_make_passthru(ips_ha_t
*, struct scsi_cmnd
*, ips_scb_t
*, int);
323 static int ips_usrcmd(ips_ha_t
*, ips_passthru_t
*, ips_scb_t
*);
324 static void ips_cleanup_passthru(ips_ha_t
*, ips_scb_t
*);
325 static void ips_scmd_buf_write(struct scsi_cmnd
* scmd
, void *data
,
327 static void ips_scmd_buf_read(struct scsi_cmnd
* scmd
, void *data
,
330 static int ips_proc_info(struct Scsi_Host
*, char *, char **, off_t
, int, int);
331 static int ips_host_info(ips_ha_t
*, char *, off_t
, int);
332 static void copy_mem_info(IPS_INFOSTR
*, char *, int);
333 static int copy_info(IPS_INFOSTR
*, char *, ...);
334 static int ips_abort_init(ips_ha_t
* ha
, int index
);
335 static int ips_init_phase2(int index
);
337 static int ips_init_phase1(struct pci_dev
*pci_dev
, int *indexPtr
);
338 static int ips_register_scsi(int index
);
340 static int ips_poll_for_flush_complete(ips_ha_t
* ha
);
341 static void ips_flush_and_reset(ips_ha_t
*ha
);
346 static const char ips_name
[] = "ips";
347 static struct Scsi_Host
*ips_sh
[IPS_MAX_ADAPTERS
]; /* Array of host controller structures */
348 static ips_ha_t
*ips_ha
[IPS_MAX_ADAPTERS
]; /* Array of HA structures */
349 static unsigned int ips_next_controller
;
350 static unsigned int ips_num_controllers
;
351 static unsigned int ips_released_controllers
;
352 static int ips_hotplug
;
353 static int ips_cmd_timeout
= 60;
354 static int ips_reset_timeout
= 60 * 5;
355 static int ips_force_memio
= 1; /* Always use Memory Mapped I/O */
356 static int ips_force_i2o
= 1; /* Always use I2O command delivery */
357 static int ips_ioctlsize
= IPS_IOCTL_SIZE
; /* Size of the ioctl buffer */
358 static int ips_cd_boot
; /* Booting from Manager CD */
359 static char *ips_FlashData
= NULL
; /* CD Boot - Flash Data Buffer */
360 static dma_addr_t ips_flashbusaddr
;
361 static long ips_FlashDataInUse
; /* CD Boot - Flash Data In Use Flag */
362 static uint32_t MaxLiteCmds
= 32; /* Max Active Cmds for a Lite Adapter */
363 static struct scsi_host_template ips_driver_template
= {
364 .detect
= ips_detect
,
365 .release
= ips_release
,
367 .queuecommand
= ips_queue
,
368 .eh_abort_handler
= ips_eh_abort
,
369 .eh_host_reset_handler
= ips_eh_reset
,
371 .proc_info
= ips_proc_info
,
372 .slave_configure
= ips_slave_configure
,
373 .bios_param
= ips_biosparam
,
375 .sg_tablesize
= IPS_MAX_SG
,
377 .use_clustering
= ENABLE_CLUSTERING
,
381 /* This table describes all ServeRAID Adapters */
382 static struct pci_device_id ips_pci_table
[] = {
383 { 0x1014, 0x002E, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0 },
384 { 0x1014, 0x01BD, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0 },
385 { 0x9005, 0x0250, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0 },
389 MODULE_DEVICE_TABLE( pci
, ips_pci_table
);
391 static char ips_hot_plug_name
[] = "ips";
393 static int __devinit
ips_insert_device(struct pci_dev
*pci_dev
, const struct pci_device_id
*ent
);
394 static void __devexit
ips_remove_device(struct pci_dev
*pci_dev
);
396 static struct pci_driver ips_pci_driver
= {
397 .name
= ips_hot_plug_name
,
398 .id_table
= ips_pci_table
,
399 .probe
= ips_insert_device
,
400 .remove
= __devexit_p(ips_remove_device
),
405 * Necessary forward function protoypes
407 static int ips_halt(struct notifier_block
*nb
, ulong event
, void *buf
);
409 #define MAX_ADAPTER_NAME 15
411 static char ips_adapter_name
[][30] = {
414 "ServeRAID on motherboard",
415 "ServeRAID on motherboard",
432 static struct notifier_block ips_notifier
= {
439 static char ips_command_direction
[] = {
440 IPS_DATA_NONE
, IPS_DATA_NONE
, IPS_DATA_IN
, IPS_DATA_IN
, IPS_DATA_OUT
,
441 IPS_DATA_IN
, IPS_DATA_IN
, IPS_DATA_OUT
, IPS_DATA_IN
, IPS_DATA_UNK
,
442 IPS_DATA_OUT
, IPS_DATA_OUT
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
,
443 IPS_DATA_IN
, IPS_DATA_NONE
, IPS_DATA_NONE
, IPS_DATA_IN
, IPS_DATA_OUT
,
444 IPS_DATA_IN
, IPS_DATA_OUT
, IPS_DATA_NONE
, IPS_DATA_NONE
, IPS_DATA_OUT
,
445 IPS_DATA_NONE
, IPS_DATA_IN
, IPS_DATA_NONE
, IPS_DATA_IN
, IPS_DATA_OUT
,
446 IPS_DATA_NONE
, IPS_DATA_UNK
, IPS_DATA_IN
, IPS_DATA_UNK
, IPS_DATA_IN
,
447 IPS_DATA_UNK
, IPS_DATA_OUT
, IPS_DATA_IN
, IPS_DATA_UNK
, IPS_DATA_UNK
,
448 IPS_DATA_IN
, IPS_DATA_IN
, IPS_DATA_OUT
, IPS_DATA_NONE
, IPS_DATA_UNK
,
449 IPS_DATA_IN
, IPS_DATA_OUT
, IPS_DATA_OUT
, IPS_DATA_OUT
, IPS_DATA_OUT
,
450 IPS_DATA_OUT
, IPS_DATA_NONE
, IPS_DATA_IN
, IPS_DATA_NONE
, IPS_DATA_NONE
,
451 IPS_DATA_IN
, IPS_DATA_OUT
, IPS_DATA_OUT
, IPS_DATA_OUT
, IPS_DATA_OUT
,
452 IPS_DATA_IN
, IPS_DATA_OUT
, IPS_DATA_IN
, IPS_DATA_OUT
, IPS_DATA_OUT
,
453 IPS_DATA_OUT
, IPS_DATA_IN
, IPS_DATA_IN
, IPS_DATA_IN
, IPS_DATA_NONE
,
454 IPS_DATA_UNK
, IPS_DATA_NONE
, IPS_DATA_NONE
, IPS_DATA_NONE
, IPS_DATA_UNK
,
455 IPS_DATA_NONE
, IPS_DATA_OUT
, IPS_DATA_IN
, IPS_DATA_UNK
, IPS_DATA_UNK
,
456 IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
,
457 IPS_DATA_OUT
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
,
458 IPS_DATA_IN
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
,
459 IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
,
460 IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
,
461 IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
,
462 IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
,
463 IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
,
464 IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
,
465 IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
,
466 IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
,
467 IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
,
468 IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
,
469 IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
,
470 IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
,
471 IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
,
472 IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
,
473 IPS_DATA_NONE
, IPS_DATA_NONE
, IPS_DATA_UNK
, IPS_DATA_IN
, IPS_DATA_NONE
,
474 IPS_DATA_OUT
, IPS_DATA_UNK
, IPS_DATA_NONE
, IPS_DATA_UNK
, IPS_DATA_OUT
,
475 IPS_DATA_OUT
, IPS_DATA_OUT
, IPS_DATA_OUT
, IPS_DATA_OUT
, IPS_DATA_NONE
,
476 IPS_DATA_UNK
, IPS_DATA_IN
, IPS_DATA_OUT
, IPS_DATA_IN
, IPS_DATA_IN
,
477 IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
,
478 IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
,
479 IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
,
480 IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
,
481 IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
,
482 IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
,
483 IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
,
484 IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
,
485 IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
,
486 IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_OUT
,
487 IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
,
488 IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
,
489 IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
,
490 IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
494 /****************************************************************************/
496 /* Routine Name: ips_setup */
498 /* Routine Description: */
500 /* setup parameters to the driver */
502 /****************************************************************************/
504 ips_setup(char *ips_str
)
510 IPS_OPTION options
[] = {
511 {"noi2o", &ips_force_i2o
, 0},
512 {"nommap", &ips_force_memio
, 0},
513 {"ioctlsize", &ips_ioctlsize
, IPS_IOCTL_SIZE
},
514 {"cdboot", &ips_cd_boot
, 0},
515 {"maxcmds", &MaxLiteCmds
, 32},
518 /* Don't use strtok() anymore ( if 2.4 Kernel or beyond ) */
519 /* Search for value */
520 while ((key
= strsep(&ips_str
, ",."))) {
523 value
= strchr(key
, ':');
527 * We now have key/value pairs.
528 * Update the variables
530 for (i
= 0; i
< ARRAY_SIZE(options
); i
++) {
532 (key
, options
[i
].option_name
,
533 strlen(options
[i
].option_name
)) == 0) {
535 *options
[i
].option_flag
=
536 simple_strtoul(value
, NULL
, 0);
538 *options
[i
].option_flag
=
539 options
[i
].option_value
;
548 __setup("ips=", ips_setup
);
550 /****************************************************************************/
552 /* Routine Name: ips_detect */
554 /* Routine Description: */
556 /* Detect and initialize the driver */
558 /* NOTE: this routine is called under the io_request_lock spinlock */
560 /****************************************************************************/
562 ips_detect(struct scsi_host_template
* SHT
)
566 METHOD_TRACE("ips_detect", 1);
573 for (i
= 0; i
< ips_num_controllers
; i
++) {
574 if (ips_register_scsi(i
))
576 ips_released_controllers
++;
579 return (ips_num_controllers
);
582 /****************************************************************************/
583 /* configure the function pointers to use the functions that will work */
584 /* with the found version of the adapter */
585 /****************************************************************************/
587 ips_setup_funclist(ips_ha_t
* ha
)
593 if (IPS_IS_MORPHEUS(ha
) || IPS_IS_MARCO(ha
)) {
594 /* morpheus / marco / sebring */
595 ha
->func
.isintr
= ips_isintr_morpheus
;
596 ha
->func
.isinit
= ips_isinit_morpheus
;
597 ha
->func
.issue
= ips_issue_i2o_memio
;
598 ha
->func
.init
= ips_init_morpheus
;
599 ha
->func
.statupd
= ips_statupd_morpheus
;
600 ha
->func
.reset
= ips_reset_morpheus
;
601 ha
->func
.intr
= ips_intr_morpheus
;
602 ha
->func
.enableint
= ips_enable_int_morpheus
;
603 } else if (IPS_USE_MEMIO(ha
)) {
604 /* copperhead w/MEMIO */
605 ha
->func
.isintr
= ips_isintr_copperhead_memio
;
606 ha
->func
.isinit
= ips_isinit_copperhead_memio
;
607 ha
->func
.init
= ips_init_copperhead_memio
;
608 ha
->func
.statupd
= ips_statupd_copperhead_memio
;
609 ha
->func
.statinit
= ips_statinit_memio
;
610 ha
->func
.reset
= ips_reset_copperhead_memio
;
611 ha
->func
.intr
= ips_intr_copperhead
;
612 ha
->func
.erasebios
= ips_erase_bios_memio
;
613 ha
->func
.programbios
= ips_program_bios_memio
;
614 ha
->func
.verifybios
= ips_verify_bios_memio
;
615 ha
->func
.enableint
= ips_enable_int_copperhead_memio
;
616 if (IPS_USE_I2O_DELIVER(ha
))
617 ha
->func
.issue
= ips_issue_i2o_memio
;
619 ha
->func
.issue
= ips_issue_copperhead_memio
;
622 ha
->func
.isintr
= ips_isintr_copperhead
;
623 ha
->func
.isinit
= ips_isinit_copperhead
;
624 ha
->func
.init
= ips_init_copperhead
;
625 ha
->func
.statupd
= ips_statupd_copperhead
;
626 ha
->func
.statinit
= ips_statinit
;
627 ha
->func
.reset
= ips_reset_copperhead
;
628 ha
->func
.intr
= ips_intr_copperhead
;
629 ha
->func
.erasebios
= ips_erase_bios
;
630 ha
->func
.programbios
= ips_program_bios
;
631 ha
->func
.verifybios
= ips_verify_bios
;
632 ha
->func
.enableint
= ips_enable_int_copperhead
;
634 if (IPS_USE_I2O_DELIVER(ha
))
635 ha
->func
.issue
= ips_issue_i2o
;
637 ha
->func
.issue
= ips_issue_copperhead
;
641 /****************************************************************************/
643 /* Routine Name: ips_release */
645 /* Routine Description: */
647 /* Remove a driver */
649 /****************************************************************************/
651 ips_release(struct Scsi_Host
*sh
)
657 METHOD_TRACE("ips_release", 1);
659 scsi_remove_host(sh
);
661 for (i
= 0; i
< IPS_MAX_ADAPTERS
&& ips_sh
[i
] != sh
; i
++) ;
663 if (i
== IPS_MAX_ADAPTERS
) {
665 "(%s) release, invalid Scsi_Host pointer.\n", ips_name
);
675 /* flush the cache on the controller */
676 scb
= &ha
->scbs
[ha
->max_cmds
- 1];
678 ips_init_scb(ha
, scb
);
680 scb
->timeout
= ips_cmd_timeout
;
681 scb
->cdb
[0] = IPS_CMD_FLUSH
;
683 scb
->cmd
.flush_cache
.op_code
= IPS_CMD_FLUSH
;
684 scb
->cmd
.flush_cache
.command_id
= IPS_COMMAND_ID(ha
, scb
);
685 scb
->cmd
.flush_cache
.state
= IPS_NORM_STATE
;
686 scb
->cmd
.flush_cache
.reserved
= 0;
687 scb
->cmd
.flush_cache
.reserved2
= 0;
688 scb
->cmd
.flush_cache
.reserved3
= 0;
689 scb
->cmd
.flush_cache
.reserved4
= 0;
691 IPS_PRINTK(KERN_WARNING
, ha
->pcidev
, "Flushing Cache.\n");
694 if (ips_send_wait(ha
, scb
, ips_cmd_timeout
, IPS_INTR_ON
) == IPS_FAILURE
)
695 IPS_PRINTK(KERN_WARNING
, ha
->pcidev
, "Incomplete Flush.\n");
697 IPS_PRINTK(KERN_WARNING
, ha
->pcidev
, "Flushing Complete.\n");
702 /* free extra memory */
705 /* Free I/O Region */
707 release_region(ha
->io_addr
, ha
->io_len
);
710 free_irq(ha
->irq
, ha
);
714 ips_released_controllers
++;
719 /****************************************************************************/
721 /* Routine Name: ips_halt */
723 /* Routine Description: */
725 /* Perform cleanup when the system reboots */
727 /****************************************************************************/
729 ips_halt(struct notifier_block
*nb
, ulong event
, void *buf
)
735 if ((event
!= SYS_RESTART
) && (event
!= SYS_HALT
) &&
736 (event
!= SYS_POWER_OFF
))
737 return (NOTIFY_DONE
);
739 for (i
= 0; i
< ips_next_controller
; i
++) {
740 ha
= (ips_ha_t
*) ips_ha
[i
];
748 /* flush the cache on the controller */
749 scb
= &ha
->scbs
[ha
->max_cmds
- 1];
751 ips_init_scb(ha
, scb
);
753 scb
->timeout
= ips_cmd_timeout
;
754 scb
->cdb
[0] = IPS_CMD_FLUSH
;
756 scb
->cmd
.flush_cache
.op_code
= IPS_CMD_FLUSH
;
757 scb
->cmd
.flush_cache
.command_id
= IPS_COMMAND_ID(ha
, scb
);
758 scb
->cmd
.flush_cache
.state
= IPS_NORM_STATE
;
759 scb
->cmd
.flush_cache
.reserved
= 0;
760 scb
->cmd
.flush_cache
.reserved2
= 0;
761 scb
->cmd
.flush_cache
.reserved3
= 0;
762 scb
->cmd
.flush_cache
.reserved4
= 0;
764 IPS_PRINTK(KERN_WARNING
, ha
->pcidev
, "Flushing Cache.\n");
767 if (ips_send_wait(ha
, scb
, ips_cmd_timeout
, IPS_INTR_ON
) ==
769 IPS_PRINTK(KERN_WARNING
, ha
->pcidev
,
770 "Incomplete Flush.\n");
772 IPS_PRINTK(KERN_WARNING
, ha
->pcidev
,
773 "Flushing Complete.\n");
779 /****************************************************************************/
781 /* Routine Name: ips_eh_abort */
783 /* Routine Description: */
785 /* Abort a command (using the new error code stuff) */
786 /* Note: this routine is called under the io_request_lock */
787 /****************************************************************************/
788 int ips_eh_abort(struct scsi_cmnd
*SC
)
791 ips_copp_wait_item_t
*item
;
793 struct Scsi_Host
*host
;
795 METHOD_TRACE("ips_eh_abort", 1);
800 host
= SC
->device
->host
;
801 ha
= (ips_ha_t
*) SC
->device
->host
->hostdata
;
809 spin_lock(host
->host_lock
);
811 /* See if the command is on the copp queue */
812 item
= ha
->copp_waitlist
.head
;
813 while ((item
) && (item
->scsi_cmd
!= SC
))
818 ips_removeq_copp(&ha
->copp_waitlist
, item
);
821 /* See if the command is on the wait queue */
822 } else if (ips_removeq_wait(&ha
->scb_waitlist
, SC
)) {
823 /* command not sent yet */
826 /* command must have already been sent */
830 spin_unlock(host
->host_lock
);
834 /****************************************************************************/
836 /* Routine Name: ips_eh_reset */
838 /* Routine Description: */
840 /* Reset the controller (with new eh error code) */
842 /* NOTE: this routine is called under the io_request_lock spinlock */
844 /****************************************************************************/
845 static int __ips_eh_reset(struct scsi_cmnd
*SC
)
851 ips_copp_wait_item_t
*item
;
853 METHOD_TRACE("ips_eh_reset", 1);
860 DEBUG(1, "Reset called with NULL scsi command");
865 ha
= (ips_ha_t
*) SC
->device
->host
->hostdata
;
868 DEBUG(1, "Reset called with NULL ha struct");
876 /* See if the command is on the copp queue */
877 item
= ha
->copp_waitlist
.head
;
878 while ((item
) && (item
->scsi_cmd
!= SC
))
883 ips_removeq_copp(&ha
->copp_waitlist
, item
);
887 /* See if the command is on the wait queue */
888 if (ips_removeq_wait(&ha
->scb_waitlist
, SC
)) {
889 /* command not sent yet */
893 /* An explanation for the casual observer: */
894 /* Part of the function of a RAID controller is automatic error */
895 /* detection and recovery. As such, the only problem that physically */
896 /* resetting an adapter will ever fix is when, for some reason, */
897 /* the driver is not successfully communicating with the adapter. */
898 /* Therefore, we will attempt to flush this adapter. If that succeeds, */
899 /* then there's no real purpose in a physical reset. This will complete */
900 /* much faster and avoids any problems that might be caused by a */
901 /* physical reset ( such as having to fail all the outstanding I/O's ). */
903 if (ha
->ioctl_reset
== 0) { /* IF Not an IOCTL Requested Reset */
904 scb
= &ha
->scbs
[ha
->max_cmds
- 1];
906 ips_init_scb(ha
, scb
);
908 scb
->timeout
= ips_cmd_timeout
;
909 scb
->cdb
[0] = IPS_CMD_FLUSH
;
911 scb
->cmd
.flush_cache
.op_code
= IPS_CMD_FLUSH
;
912 scb
->cmd
.flush_cache
.command_id
= IPS_COMMAND_ID(ha
, scb
);
913 scb
->cmd
.flush_cache
.state
= IPS_NORM_STATE
;
914 scb
->cmd
.flush_cache
.reserved
= 0;
915 scb
->cmd
.flush_cache
.reserved2
= 0;
916 scb
->cmd
.flush_cache
.reserved3
= 0;
917 scb
->cmd
.flush_cache
.reserved4
= 0;
919 /* Attempt the flush command */
920 ret
= ips_send_wait(ha
, scb
, ips_cmd_timeout
, IPS_INTR_IORL
);
921 if (ret
== IPS_SUCCESS
) {
922 IPS_PRINTK(KERN_NOTICE
, ha
->pcidev
,
923 "Reset Request - Flushed Cache\n");
928 /* Either we can't communicate with the adapter or it's an IOCTL request */
929 /* from a utility. A physical reset is needed at this point. */
931 ha
->ioctl_reset
= 0; /* Reset the IOCTL Requested Reset Flag */
934 * command must have already been sent
935 * reset the controller
937 IPS_PRINTK(KERN_NOTICE
, ha
->pcidev
, "Resetting controller.\n");
938 ret
= (*ha
->func
.reset
) (ha
);
941 struct scsi_cmnd
*scsi_cmd
;
943 IPS_PRINTK(KERN_NOTICE
, ha
->pcidev
,
944 "Controller reset failed - controller now offline.\n");
946 /* Now fail all of the active commands */
947 DEBUG_VAR(1, "(%s%d) Failing active commands",
948 ips_name
, ha
->host_num
);
950 while ((scb
= ips_removeq_scb_head(&ha
->scb_activelist
))) {
951 scb
->scsi_cmd
->result
= DID_ERROR
<< 16;
952 scb
->scsi_cmd
->scsi_done(scb
->scsi_cmd
);
953 ips_freescb(ha
, scb
);
956 /* Now fail all of the pending commands */
957 DEBUG_VAR(1, "(%s%d) Failing pending commands",
958 ips_name
, ha
->host_num
);
960 while ((scsi_cmd
= ips_removeq_wait_head(&ha
->scb_waitlist
))) {
961 scsi_cmd
->result
= DID_ERROR
;
962 scsi_cmd
->scsi_done(scsi_cmd
);
969 if (!ips_clear_adapter(ha
, IPS_INTR_IORL
)) {
970 struct scsi_cmnd
*scsi_cmd
;
972 IPS_PRINTK(KERN_NOTICE
, ha
->pcidev
,
973 "Controller reset failed - controller now offline.\n");
975 /* Now fail all of the active commands */
976 DEBUG_VAR(1, "(%s%d) Failing active commands",
977 ips_name
, ha
->host_num
);
979 while ((scb
= ips_removeq_scb_head(&ha
->scb_activelist
))) {
980 scb
->scsi_cmd
->result
= DID_ERROR
<< 16;
981 scb
->scsi_cmd
->scsi_done(scb
->scsi_cmd
);
982 ips_freescb(ha
, scb
);
985 /* Now fail all of the pending commands */
986 DEBUG_VAR(1, "(%s%d) Failing pending commands",
987 ips_name
, ha
->host_num
);
989 while ((scsi_cmd
= ips_removeq_wait_head(&ha
->scb_waitlist
))) {
990 scsi_cmd
->result
= DID_ERROR
<< 16;
991 scsi_cmd
->scsi_done(scsi_cmd
);
999 if (le32_to_cpu(ha
->subsys
->param
[3]) & 0x300000) {
1002 do_gettimeofday(&tv
);
1003 ha
->last_ffdc
= tv
.tv_sec
;
1005 ips_ffdc_reset(ha
, IPS_INTR_IORL
);
1008 /* Now fail all of the active commands */
1009 DEBUG_VAR(1, "(%s%d) Failing active commands", ips_name
, ha
->host_num
);
1011 while ((scb
= ips_removeq_scb_head(&ha
->scb_activelist
))) {
1012 scb
->scsi_cmd
->result
=
1013 (DID_RESET
<< 16) | (SUGGEST_RETRY
<< 24);
1014 scb
->scsi_cmd
->scsi_done(scb
->scsi_cmd
);
1015 ips_freescb(ha
, scb
);
1018 /* Reset DCDB active command bits */
1019 for (i
= 1; i
< ha
->nbus
; i
++)
1020 ha
->dcdb_active
[i
- 1] = 0;
1022 /* Reset the number of active IOCTLs */
1025 ips_next(ha
, IPS_INTR_IORL
);
1028 #endif /* NO_IPS_RESET */
1032 static int ips_eh_reset(struct scsi_cmnd
*SC
)
1036 spin_lock_irq(SC
->device
->host
->host_lock
);
1037 rc
= __ips_eh_reset(SC
);
1038 spin_unlock_irq(SC
->device
->host
->host_lock
);
1043 /****************************************************************************/
1045 /* Routine Name: ips_queue */
1047 /* Routine Description: */
1049 /* Send a command to the controller */
1052 /* Linux obtains io_request_lock before calling this function */
1054 /****************************************************************************/
1055 static int ips_queue(struct scsi_cmnd
*SC
, void (*done
) (struct scsi_cmnd
*))
1060 METHOD_TRACE("ips_queue", 1);
1062 ha
= (ips_ha_t
*) SC
->device
->host
->hostdata
;
1070 if (ips_is_passthru(SC
)) {
1071 if (ha
->copp_waitlist
.count
== IPS_MAX_IOCTL_QUEUE
) {
1072 SC
->result
= DID_BUS_BUSY
<< 16;
1077 } else if (ha
->scb_waitlist
.count
== IPS_MAX_QUEUE
) {
1078 SC
->result
= DID_BUS_BUSY
<< 16;
1084 SC
->scsi_done
= done
;
1086 DEBUG_VAR(2, "(%s%d): ips_queue: cmd 0x%X (%d %d %d)",
1090 SC
->device
->channel
, SC
->device
->id
, SC
->device
->lun
);
1092 /* Check for command to initiator IDs */
1093 if ((scmd_channel(SC
) > 0)
1094 && (scmd_id(SC
) == ha
->ha_id
[scmd_channel(SC
)])) {
1095 SC
->result
= DID_NO_CONNECT
<< 16;
1101 if (ips_is_passthru(SC
)) {
1103 ips_copp_wait_item_t
*scratch
;
1105 /* A Reset IOCTL is only sent by the boot CD in extreme cases. */
1106 /* There can never be any system activity ( network or disk ), but check */
1107 /* anyway just as a good practice. */
1108 pt
= (ips_passthru_t
*) scsi_sglist(SC
);
1109 if ((pt
->CoppCP
.cmd
.reset
.op_code
== IPS_CMD_RESET_CHANNEL
) &&
1110 (pt
->CoppCP
.cmd
.reset
.adapter_flag
== 1)) {
1111 if (ha
->scb_activelist
.count
!= 0) {
1112 SC
->result
= DID_BUS_BUSY
<< 16;
1116 ha
->ioctl_reset
= 1; /* This reset request is from an IOCTL */
1118 SC
->result
= DID_OK
<< 16;
1123 /* allocate space for the scribble */
1124 scratch
= kmalloc(sizeof (ips_copp_wait_item_t
), GFP_ATOMIC
);
1127 SC
->result
= DID_ERROR
<< 16;
1133 scratch
->scsi_cmd
= SC
;
1134 scratch
->next
= NULL
;
1136 ips_putq_copp_tail(&ha
->copp_waitlist
, scratch
);
1138 ips_putq_wait_tail(&ha
->scb_waitlist
, SC
);
1141 ips_next(ha
, IPS_INTR_IORL
);
1146 /****************************************************************************/
1148 /* Routine Name: ips_biosparam */
1150 /* Routine Description: */
1152 /* Set bios geometry for the controller */
1154 /****************************************************************************/
1155 static int ips_biosparam(struct scsi_device
*sdev
, struct block_device
*bdev
,
1156 sector_t capacity
, int geom
[])
1158 ips_ha_t
*ha
= (ips_ha_t
*) sdev
->host
->hostdata
;
1163 METHOD_TRACE("ips_biosparam", 1);
1166 /* ?!?! host adater info invalid */
1172 if (!ips_read_adapter_status(ha
, IPS_INTR_ON
))
1173 /* ?!?! Enquiry command failed */
1176 if ((capacity
> 0x400000) && ((ha
->enq
->ucMiscFlag
& 0x8) == 0)) {
1177 heads
= IPS_NORM_HEADS
;
1178 sectors
= IPS_NORM_SECTORS
;
1180 heads
= IPS_COMP_HEADS
;
1181 sectors
= IPS_COMP_SECTORS
;
1184 cylinders
= (unsigned long) capacity
/ (heads
* sectors
);
1186 DEBUG_VAR(2, "Geometry: heads: %d, sectors: %d, cylinders: %d",
1187 heads
, sectors
, cylinders
);
1191 geom
[2] = cylinders
;
1196 /****************************************************************************/
1198 /* Routine Name: ips_slave_configure */
1200 /* Routine Description: */
1202 /* Set queue depths on devices once scan is complete */
1204 /****************************************************************************/
1206 ips_slave_configure(struct scsi_device
* SDptr
)
1211 ha
= IPS_HA(SDptr
->host
);
1212 if (SDptr
->tagged_supported
&& SDptr
->type
== TYPE_DISK
) {
1213 min
= ha
->max_cmds
/ 2;
1214 if (ha
->enq
->ucLogDriveCount
<= 2)
1215 min
= ha
->max_cmds
- 1;
1216 scsi_adjust_queue_depth(SDptr
, MSG_ORDERED_TAG
, min
);
1219 SDptr
->skip_ms_page_8
= 1;
1220 SDptr
->skip_ms_page_3f
= 1;
1224 /****************************************************************************/
1226 /* Routine Name: do_ipsintr */
1228 /* Routine Description: */
1230 /* Wrapper for the interrupt handler */
1232 /****************************************************************************/
1234 do_ipsintr(int irq
, void *dev_id
)
1237 struct Scsi_Host
*host
;
1240 METHOD_TRACE("do_ipsintr", 2);
1242 ha
= (ips_ha_t
*) dev_id
;
1245 host
= ips_sh
[ha
->host_num
];
1246 /* interrupt during initialization */
1248 (*ha
->func
.intr
) (ha
);
1252 spin_lock(host
->host_lock
);
1255 spin_unlock(host
->host_lock
);
1259 irqstatus
= (*ha
->func
.intr
) (ha
);
1261 spin_unlock(host
->host_lock
);
1263 /* start the next command */
1264 ips_next(ha
, IPS_INTR_ON
);
1265 return IRQ_RETVAL(irqstatus
);
1268 /****************************************************************************/
1270 /* Routine Name: ips_intr_copperhead */
1272 /* Routine Description: */
1274 /* Polling interrupt handler */
1276 /* ASSUMES interrupts are disabled */
1278 /****************************************************************************/
1280 ips_intr_copperhead(ips_ha_t
* ha
)
1287 METHOD_TRACE("ips_intr", 2);
1295 intrstatus
= (*ha
->func
.isintr
) (ha
);
1299 * Unexpected/Shared interrupt
1308 intrstatus
= (*ha
->func
.isintr
) (ha
);
1313 cstatus
.value
= (*ha
->func
.statupd
) (ha
);
1315 if (cstatus
.fields
.command_id
> (IPS_MAX_CMDS
- 1)) {
1316 /* Spurious Interupt ? */
1320 ips_chkstatus(ha
, &cstatus
);
1321 scb
= (ips_scb_t
*) sp
->scb_addr
;
1324 * use the callback function to finish things up
1325 * NOTE: interrupts are OFF for this
1327 (*scb
->callback
) (ha
, scb
);
1332 /****************************************************************************/
1334 /* Routine Name: ips_intr_morpheus */
1336 /* Routine Description: */
1338 /* Polling interrupt handler */
1340 /* ASSUMES interrupts are disabled */
1342 /****************************************************************************/
1344 ips_intr_morpheus(ips_ha_t
* ha
)
1351 METHOD_TRACE("ips_intr_morpheus", 2);
1359 intrstatus
= (*ha
->func
.isintr
) (ha
);
1363 * Unexpected/Shared interrupt
1372 intrstatus
= (*ha
->func
.isintr
) (ha
);
1377 cstatus
.value
= (*ha
->func
.statupd
) (ha
);
1379 if (cstatus
.value
== 0xffffffff)
1380 /* No more to process */
1383 if (cstatus
.fields
.command_id
> (IPS_MAX_CMDS
- 1)) {
1384 IPS_PRINTK(KERN_WARNING
, ha
->pcidev
,
1385 "Spurious interrupt; no ccb.\n");
1390 ips_chkstatus(ha
, &cstatus
);
1391 scb
= (ips_scb_t
*) sp
->scb_addr
;
1394 * use the callback function to finish things up
1395 * NOTE: interrupts are OFF for this
1397 (*scb
->callback
) (ha
, scb
);
1402 /****************************************************************************/
1404 /* Routine Name: ips_info */
1406 /* Routine Description: */
1408 /* Return info about the driver */
1410 /****************************************************************************/
1412 ips_info(struct Scsi_Host
*SH
)
1414 static char buffer
[256];
1418 METHOD_TRACE("ips_info", 1);
1426 memset(bp
, 0, sizeof (buffer
));
1428 sprintf(bp
, "%s%s%s Build %d", "IBM PCI ServeRAID ",
1429 IPS_VERSION_HIGH
, IPS_VERSION_LOW
, IPS_BUILD_IDENT
);
1431 if (ha
->ad_type
> 0 && ha
->ad_type
<= MAX_ADAPTER_NAME
) {
1433 strcat(bp
, ips_adapter_name
[ha
->ad_type
- 1]);
1440 /****************************************************************************/
1442 /* Routine Name: ips_proc_info */
1444 /* Routine Description: */
1446 /* The passthru interface for the driver */
1448 /****************************************************************************/
1450 ips_proc_info(struct Scsi_Host
*host
, char *buffer
, char **start
, off_t offset
,
1451 int length
, int func
)
1455 ips_ha_t
*ha
= NULL
;
1457 METHOD_TRACE("ips_proc_info", 1);
1459 /* Find our host structure */
1460 for (i
= 0; i
< ips_next_controller
; i
++) {
1462 if (ips_sh
[i
] == host
) {
1463 ha
= (ips_ha_t
*) ips_sh
[i
]->hostdata
;
1480 ret
= ips_host_info(ha
, buffer
, offset
, length
);
1486 /*--------------------------------------------------------------------------*/
1487 /* Helper Functions */
1488 /*--------------------------------------------------------------------------*/
1490 /****************************************************************************/
1492 /* Routine Name: ips_is_passthru */
1494 /* Routine Description: */
1496 /* Determine if the specified SCSI command is really a passthru command */
1498 /****************************************************************************/
1499 static int ips_is_passthru(struct scsi_cmnd
*SC
)
1501 unsigned long flags
;
1503 METHOD_TRACE("ips_is_passthru", 1);
1508 if ((SC
->cmnd
[0] == IPS_IOCTL_COMMAND
) &&
1509 (SC
->device
->channel
== 0) &&
1510 (SC
->device
->id
== IPS_ADAPTER_ID
) &&
1511 (SC
->device
->lun
== 0) && scsi_sglist(SC
)) {
1512 struct scatterlist
*sg
= scsi_sglist(SC
);
1515 /* kmap_atomic() ensures addressability of the user buffer.*/
1516 /* local_irq_save() protects the KM_IRQ0 address slot. */
1517 local_irq_save(flags
);
1518 buffer
= kmap_atomic(sg
->page
, KM_IRQ0
) + sg
->offset
;
1519 if (buffer
&& buffer
[0] == 'C' && buffer
[1] == 'O' &&
1520 buffer
[2] == 'P' && buffer
[3] == 'P') {
1521 kunmap_atomic(buffer
- sg
->offset
, KM_IRQ0
);
1522 local_irq_restore(flags
);
1525 kunmap_atomic(buffer
- sg
->offset
, KM_IRQ0
);
1526 local_irq_restore(flags
);
1531 /****************************************************************************/
1533 /* Routine Name: ips_alloc_passthru_buffer */
1535 /* Routine Description: */
1536 /* allocate a buffer large enough for the ioctl data if the ioctl buffer */
1537 /* is too small or doesn't exist */
1538 /****************************************************************************/
1540 ips_alloc_passthru_buffer(ips_ha_t
* ha
, int length
)
1543 dma_addr_t dma_busaddr
;
1545 if (ha
->ioctl_data
&& length
<= ha
->ioctl_len
)
1547 /* there is no buffer or it's not big enough, allocate a new one */
1548 bigger_buf
= pci_alloc_consistent(ha
->pcidev
, length
, &dma_busaddr
);
1550 /* free the old memory */
1551 pci_free_consistent(ha
->pcidev
, ha
->ioctl_len
, ha
->ioctl_data
,
1553 /* use the new memory */
1554 ha
->ioctl_data
= (char *) bigger_buf
;
1555 ha
->ioctl_len
= length
;
1556 ha
->ioctl_busaddr
= dma_busaddr
;
1563 /****************************************************************************/
1565 /* Routine Name: ips_make_passthru */
1567 /* Routine Description: */
1569 /* Make a passthru command out of the info in the Scsi block */
1571 /****************************************************************************/
1573 ips_make_passthru(ips_ha_t
*ha
, struct scsi_cmnd
*SC
, ips_scb_t
*scb
, int intr
)
1578 struct scatterlist
*sg
= scsi_sglist(SC
);
1580 METHOD_TRACE("ips_make_passthru", 1);
1582 scsi_for_each_sg(SC
, sg
, scsi_sg_count(SC
), i
)
1583 length
+= sg
[i
].length
;
1585 if (length
< sizeof (ips_passthru_t
)) {
1587 DEBUG_VAR(1, "(%s%d) Passthru structure wrong size",
1588 ips_name
, ha
->host_num
);
1589 return (IPS_FAILURE
);
1591 if (ips_alloc_passthru_buffer(ha
, length
)) {
1592 /* allocation failure! If ha->ioctl_data exists, use it to return
1593 some error codes. Return a failed command to the scsi layer. */
1594 if (ha
->ioctl_data
) {
1595 pt
= (ips_passthru_t
*) ha
->ioctl_data
;
1596 ips_scmd_buf_read(SC
, pt
, sizeof (ips_passthru_t
));
1597 pt
->BasicStatus
= 0x0B;
1598 pt
->ExtendedStatus
= 0x00;
1599 ips_scmd_buf_write(SC
, pt
, sizeof (ips_passthru_t
));
1603 ha
->ioctl_datasize
= length
;
1605 ips_scmd_buf_read(SC
, ha
->ioctl_data
, ha
->ioctl_datasize
);
1606 pt
= (ips_passthru_t
*) ha
->ioctl_data
;
1609 * Some notes about the passthru interface used
1611 * IF the scsi op_code == 0x0d then we assume
1612 * that the data came along with/goes with the
1613 * packet we received from the sg driver. In this
1614 * case the CmdBSize field of the pt structure is
1615 * used for the size of the buffer.
1618 switch (pt
->CoppCmd
) {
1620 memcpy(ha
->ioctl_data
+ sizeof (ips_passthru_t
),
1621 &ips_num_controllers
, sizeof (int));
1622 ips_scmd_buf_write(SC
, ha
->ioctl_data
,
1623 sizeof (ips_passthru_t
) + sizeof (int));
1624 SC
->result
= DID_OK
<< 16;
1626 return (IPS_SUCCESS_IMM
);
1628 case IPS_COPPUSRCMD
:
1629 case IPS_COPPIOCCMD
:
1630 if (SC
->cmnd
[0] == IPS_IOCTL_COMMAND
) {
1631 if (length
< (sizeof (ips_passthru_t
) + pt
->CmdBSize
)) {
1634 "(%s%d) Passthru structure wrong size",
1635 ips_name
, ha
->host_num
);
1637 return (IPS_FAILURE
);
1640 if (ha
->device_id
== IPS_DEVICEID_COPPERHEAD
&&
1641 pt
->CoppCP
.cmd
.flashfw
.op_code
==
1642 IPS_CMD_RW_BIOSFW
) {
1643 ret
= ips_flash_copperhead(ha
, pt
, scb
);
1644 ips_scmd_buf_write(SC
, ha
->ioctl_data
,
1645 sizeof (ips_passthru_t
));
1648 if (ips_usrcmd(ha
, pt
, scb
))
1649 return (IPS_SUCCESS
);
1651 return (IPS_FAILURE
);
1658 return (IPS_FAILURE
);
1661 /****************************************************************************/
1662 /* Routine Name: ips_flash_copperhead */
1663 /* Routine Description: */
1664 /* Flash the BIOS/FW on a Copperhead style controller */
1665 /****************************************************************************/
1667 ips_flash_copperhead(ips_ha_t
* ha
, ips_passthru_t
* pt
, ips_scb_t
* scb
)
1671 /* Trombone is the only copperhead that can do packet flash, but only
1672 * for firmware. No one said it had to make sence. */
1673 if (IPS_IS_TROMBONE(ha
) && pt
->CoppCP
.cmd
.flashfw
.type
== IPS_FW_IMAGE
) {
1674 if (ips_usrcmd(ha
, pt
, scb
))
1679 pt
->BasicStatus
= 0x0B;
1680 pt
->ExtendedStatus
= 0;
1681 scb
->scsi_cmd
->result
= DID_OK
<< 16;
1682 /* IF it's OK to Use the "CD BOOT" Flash Buffer, then you can */
1683 /* avoid allocating a huge buffer per adapter ( which can fail ). */
1684 if (pt
->CoppCP
.cmd
.flashfw
.type
== IPS_BIOS_IMAGE
&&
1685 pt
->CoppCP
.cmd
.flashfw
.direction
== IPS_ERASE_BIOS
) {
1686 pt
->BasicStatus
= 0;
1687 return ips_flash_bios(ha
, pt
, scb
);
1688 } else if (pt
->CoppCP
.cmd
.flashfw
.packet_num
== 0) {
1689 if (ips_FlashData
&& !test_and_set_bit(0, &ips_FlashDataInUse
)){
1690 ha
->flash_data
= ips_FlashData
;
1691 ha
->flash_busaddr
= ips_flashbusaddr
;
1692 ha
->flash_len
= PAGE_SIZE
<< 7;
1693 ha
->flash_datasize
= 0;
1694 } else if (!ha
->flash_data
) {
1695 datasize
= pt
->CoppCP
.cmd
.flashfw
.total_packets
*
1696 pt
->CoppCP
.cmd
.flashfw
.count
;
1697 ha
->flash_data
= pci_alloc_consistent(ha
->pcidev
,
1699 &ha
->flash_busaddr
);
1700 if (!ha
->flash_data
){
1701 printk(KERN_WARNING
"Unable to allocate a flash buffer\n");
1704 ha
->flash_datasize
= 0;
1705 ha
->flash_len
= datasize
;
1709 if (pt
->CoppCP
.cmd
.flashfw
.count
+ ha
->flash_datasize
>
1711 ips_free_flash_copperhead(ha
);
1712 IPS_PRINTK(KERN_WARNING
, ha
->pcidev
,
1713 "failed size sanity check\n");
1717 if (!ha
->flash_data
)
1719 pt
->BasicStatus
= 0;
1720 memcpy(&ha
->flash_data
[ha
->flash_datasize
], pt
+ 1,
1721 pt
->CoppCP
.cmd
.flashfw
.count
);
1722 ha
->flash_datasize
+= pt
->CoppCP
.cmd
.flashfw
.count
;
1723 if (pt
->CoppCP
.cmd
.flashfw
.packet_num
==
1724 pt
->CoppCP
.cmd
.flashfw
.total_packets
- 1) {
1725 if (pt
->CoppCP
.cmd
.flashfw
.type
== IPS_BIOS_IMAGE
)
1726 return ips_flash_bios(ha
, pt
, scb
);
1727 else if (pt
->CoppCP
.cmd
.flashfw
.type
== IPS_FW_IMAGE
)
1728 return ips_flash_firmware(ha
, pt
, scb
);
1730 return IPS_SUCCESS_IMM
;
1733 /****************************************************************************/
1734 /* Routine Name: ips_flash_bios */
1735 /* Routine Description: */
1736 /* flashes the bios of a copperhead adapter */
1737 /****************************************************************************/
1739 ips_flash_bios(ips_ha_t
* ha
, ips_passthru_t
* pt
, ips_scb_t
* scb
)
1742 if (pt
->CoppCP
.cmd
.flashfw
.type
== IPS_BIOS_IMAGE
&&
1743 pt
->CoppCP
.cmd
.flashfw
.direction
== IPS_WRITE_BIOS
) {
1744 if ((!ha
->func
.programbios
) || (!ha
->func
.erasebios
) ||
1745 (!ha
->func
.verifybios
))
1747 if ((*ha
->func
.erasebios
) (ha
)) {
1749 "(%s%d) flash bios failed - unable to erase flash",
1750 ips_name
, ha
->host_num
);
1753 if ((*ha
->func
.programbios
) (ha
,
1756 ha
->flash_datasize
-
1757 IPS_BIOS_HEADER
, 0)) {
1759 "(%s%d) flash bios failed - unable to flash",
1760 ips_name
, ha
->host_num
);
1763 if ((*ha
->func
.verifybios
) (ha
,
1766 ha
->flash_datasize
-
1767 IPS_BIOS_HEADER
, 0)) {
1769 "(%s%d) flash bios failed - unable to verify flash",
1770 ips_name
, ha
->host_num
);
1773 ips_free_flash_copperhead(ha
);
1774 return IPS_SUCCESS_IMM
;
1775 } else if (pt
->CoppCP
.cmd
.flashfw
.type
== IPS_BIOS_IMAGE
&&
1776 pt
->CoppCP
.cmd
.flashfw
.direction
== IPS_ERASE_BIOS
) {
1777 if (!ha
->func
.erasebios
)
1779 if ((*ha
->func
.erasebios
) (ha
)) {
1781 "(%s%d) flash bios failed - unable to erase flash",
1782 ips_name
, ha
->host_num
);
1785 return IPS_SUCCESS_IMM
;
1788 pt
->BasicStatus
= 0x0B;
1789 pt
->ExtendedStatus
= 0x00;
1790 ips_free_flash_copperhead(ha
);
1794 /****************************************************************************/
1796 /* Routine Name: ips_fill_scb_sg_single */
1798 /* Routine Description: */
1799 /* Fill in a single scb sg_list element from an address */
1800 /* return a -1 if a breakup occurred */
1801 /****************************************************************************/
1803 ips_fill_scb_sg_single(ips_ha_t
* ha
, dma_addr_t busaddr
,
1804 ips_scb_t
* scb
, int indx
, unsigned int e_len
)
1809 if ((scb
->data_len
+ e_len
) > ha
->max_xfer
) {
1810 e_len
= ha
->max_xfer
- scb
->data_len
;
1811 scb
->breakup
= indx
;
1818 if (IPS_USE_ENH_SGLIST(ha
)) {
1819 scb
->sg_list
.enh_list
[indx
].address_lo
=
1820 cpu_to_le32(pci_dma_lo32(busaddr
));
1821 scb
->sg_list
.enh_list
[indx
].address_hi
=
1822 cpu_to_le32(pci_dma_hi32(busaddr
));
1823 scb
->sg_list
.enh_list
[indx
].length
= cpu_to_le32(e_len
);
1825 scb
->sg_list
.std_list
[indx
].address
=
1826 cpu_to_le32(pci_dma_lo32(busaddr
));
1827 scb
->sg_list
.std_list
[indx
].length
= cpu_to_le32(e_len
);
1831 scb
->data_len
+= e_len
;
1835 /****************************************************************************/
1836 /* Routine Name: ips_flash_firmware */
1837 /* Routine Description: */
1838 /* flashes the firmware of a copperhead adapter */
1839 /****************************************************************************/
1841 ips_flash_firmware(ips_ha_t
* ha
, ips_passthru_t
* pt
, ips_scb_t
* scb
)
1843 IPS_SG_LIST sg_list
;
1844 uint32_t cmd_busaddr
;
1846 if (pt
->CoppCP
.cmd
.flashfw
.type
== IPS_FW_IMAGE
&&
1847 pt
->CoppCP
.cmd
.flashfw
.direction
== IPS_WRITE_FW
) {
1848 memset(&pt
->CoppCP
.cmd
, 0, sizeof (IPS_HOST_COMMAND
));
1849 pt
->CoppCP
.cmd
.flashfw
.op_code
= IPS_CMD_DOWNLOAD
;
1850 pt
->CoppCP
.cmd
.flashfw
.count
= cpu_to_le32(ha
->flash_datasize
);
1852 pt
->BasicStatus
= 0x0B;
1853 pt
->ExtendedStatus
= 0x00;
1854 ips_free_flash_copperhead(ha
);
1857 /* Save the S/G list pointer so it doesn't get clobbered */
1858 sg_list
.list
= scb
->sg_list
.list
;
1859 cmd_busaddr
= scb
->scb_busaddr
;
1860 /* copy in the CP */
1861 memcpy(&scb
->cmd
, &pt
->CoppCP
.cmd
, sizeof (IPS_IOCTL_CMD
));
1862 /* FIX stuff that might be wrong */
1863 scb
->sg_list
.list
= sg_list
.list
;
1864 scb
->scb_busaddr
= cmd_busaddr
;
1865 scb
->bus
= scb
->scsi_cmd
->device
->channel
;
1866 scb
->target_id
= scb
->scsi_cmd
->device
->id
;
1867 scb
->lun
= scb
->scsi_cmd
->device
->lun
;
1872 scb
->callback
= ipsintr_done
;
1873 scb
->timeout
= ips_cmd_timeout
;
1875 scb
->data_len
= ha
->flash_datasize
;
1877 pci_map_single(ha
->pcidev
, ha
->flash_data
, scb
->data_len
,
1879 scb
->flags
|= IPS_SCB_MAP_SINGLE
;
1880 scb
->cmd
.flashfw
.command_id
= IPS_COMMAND_ID(ha
, scb
);
1881 scb
->cmd
.flashfw
.buffer_addr
= cpu_to_le32(scb
->data_busaddr
);
1883 scb
->timeout
= pt
->TimeOut
;
1884 scb
->scsi_cmd
->result
= DID_OK
<< 16;
1888 /****************************************************************************/
1889 /* Routine Name: ips_free_flash_copperhead */
1890 /* Routine Description: */
1891 /* release the memory resources used to hold the flash image */
1892 /****************************************************************************/
1894 ips_free_flash_copperhead(ips_ha_t
* ha
)
1896 if (ha
->flash_data
== ips_FlashData
)
1897 test_and_clear_bit(0, &ips_FlashDataInUse
);
1898 else if (ha
->flash_data
)
1899 pci_free_consistent(ha
->pcidev
, ha
->flash_len
, ha
->flash_data
,
1901 ha
->flash_data
= NULL
;
1904 /****************************************************************************/
1906 /* Routine Name: ips_usrcmd */
1908 /* Routine Description: */
1910 /* Process a user command and make it ready to send */
1912 /****************************************************************************/
1914 ips_usrcmd(ips_ha_t
* ha
, ips_passthru_t
* pt
, ips_scb_t
* scb
)
1916 IPS_SG_LIST sg_list
;
1917 uint32_t cmd_busaddr
;
1919 METHOD_TRACE("ips_usrcmd", 1);
1921 if ((!scb
) || (!pt
) || (!ha
))
1924 /* Save the S/G list pointer so it doesn't get clobbered */
1925 sg_list
.list
= scb
->sg_list
.list
;
1926 cmd_busaddr
= scb
->scb_busaddr
;
1927 /* copy in the CP */
1928 memcpy(&scb
->cmd
, &pt
->CoppCP
.cmd
, sizeof (IPS_IOCTL_CMD
));
1929 memcpy(&scb
->dcdb
, &pt
->CoppCP
.dcdb
, sizeof (IPS_DCDB_TABLE
));
1931 /* FIX stuff that might be wrong */
1932 scb
->sg_list
.list
= sg_list
.list
;
1933 scb
->scb_busaddr
= cmd_busaddr
;
1934 scb
->bus
= scb
->scsi_cmd
->device
->channel
;
1935 scb
->target_id
= scb
->scsi_cmd
->device
->id
;
1936 scb
->lun
= scb
->scsi_cmd
->device
->lun
;
1941 scb
->callback
= ipsintr_done
;
1942 scb
->timeout
= ips_cmd_timeout
;
1943 scb
->cmd
.basic_io
.command_id
= IPS_COMMAND_ID(ha
, scb
);
1945 /* we don't support DCDB/READ/WRITE Scatter Gather */
1946 if ((scb
->cmd
.basic_io
.op_code
== IPS_CMD_READ_SG
) ||
1947 (scb
->cmd
.basic_io
.op_code
== IPS_CMD_WRITE_SG
) ||
1948 (scb
->cmd
.basic_io
.op_code
== IPS_CMD_DCDB_SG
))
1952 scb
->data_len
= pt
->CmdBSize
;
1953 scb
->data_busaddr
= ha
->ioctl_busaddr
+ sizeof (ips_passthru_t
);
1955 scb
->data_busaddr
= 0L;
1958 if (scb
->cmd
.dcdb
.op_code
== IPS_CMD_DCDB
)
1959 scb
->cmd
.dcdb
.dcdb_address
= cpu_to_le32(scb
->scb_busaddr
+
1960 (unsigned long) &scb
->
1962 (unsigned long) scb
);
1965 if (scb
->cmd
.dcdb
.op_code
== IPS_CMD_DCDB
)
1966 scb
->dcdb
.buffer_pointer
=
1967 cpu_to_le32(scb
->data_busaddr
);
1969 scb
->cmd
.basic_io
.sg_addr
=
1970 cpu_to_le32(scb
->data_busaddr
);
1975 scb
->timeout
= pt
->TimeOut
;
1977 if (pt
->TimeOut
<= 10)
1978 scb
->dcdb
.cmd_attribute
|= IPS_TIMEOUT10
;
1979 else if (pt
->TimeOut
<= 60)
1980 scb
->dcdb
.cmd_attribute
|= IPS_TIMEOUT60
;
1982 scb
->dcdb
.cmd_attribute
|= IPS_TIMEOUT20M
;
1985 /* assume success */
1986 scb
->scsi_cmd
->result
= DID_OK
<< 16;
1992 /****************************************************************************/
1994 /* Routine Name: ips_cleanup_passthru */
1996 /* Routine Description: */
1998 /* Cleanup after a passthru command */
2000 /****************************************************************************/
2002 ips_cleanup_passthru(ips_ha_t
* ha
, ips_scb_t
* scb
)
2006 METHOD_TRACE("ips_cleanup_passthru", 1);
2008 if ((!scb
) || (!scb
->scsi_cmd
) || (!scsi_sglist(scb
->scsi_cmd
))) {
2009 DEBUG_VAR(1, "(%s%d) couldn't cleanup after passthru",
2010 ips_name
, ha
->host_num
);
2014 pt
= (ips_passthru_t
*) ha
->ioctl_data
;
2016 /* Copy data back to the user */
2017 if (scb
->cmd
.dcdb
.op_code
== IPS_CMD_DCDB
) /* Copy DCDB Back to Caller's Area */
2018 memcpy(&pt
->CoppCP
.dcdb
, &scb
->dcdb
, sizeof (IPS_DCDB_TABLE
));
2020 pt
->BasicStatus
= scb
->basic_status
;
2021 pt
->ExtendedStatus
= scb
->extended_status
;
2022 pt
->AdapterType
= ha
->ad_type
;
2024 if (ha
->device_id
== IPS_DEVICEID_COPPERHEAD
&&
2025 (scb
->cmd
.flashfw
.op_code
== IPS_CMD_DOWNLOAD
||
2026 scb
->cmd
.flashfw
.op_code
== IPS_CMD_RW_BIOSFW
))
2027 ips_free_flash_copperhead(ha
);
2029 ips_scmd_buf_write(scb
->scsi_cmd
, ha
->ioctl_data
, ha
->ioctl_datasize
);
2032 /****************************************************************************/
2034 /* Routine Name: ips_host_info */
2036 /* Routine Description: */
2038 /* The passthru interface for the driver */
2040 /****************************************************************************/
2042 ips_host_info(ips_ha_t
* ha
, char *ptr
, off_t offset
, int len
)
2046 METHOD_TRACE("ips_host_info", 1);
2050 info
.offset
= offset
;
2054 copy_info(&info
, "\nIBM ServeRAID General Information:\n\n");
2056 if ((le32_to_cpu(ha
->nvram
->signature
) == IPS_NVRAM_P5_SIG
) &&
2057 (le16_to_cpu(ha
->nvram
->adapter_type
) != 0))
2058 copy_info(&info
, "\tController Type : %s\n",
2059 ips_adapter_name
[ha
->ad_type
- 1]);
2062 "\tController Type : Unknown\n");
2066 "\tIO region : 0x%lx (%d bytes)\n",
2067 ha
->io_addr
, ha
->io_len
);
2071 "\tMemory region : 0x%lx (%d bytes)\n",
2072 ha
->mem_addr
, ha
->mem_len
);
2074 "\tShared memory address : 0x%lx\n",
2078 copy_info(&info
, "\tIRQ number : %d\n", ha
->irq
);
2080 /* For the Next 3 lines Check for Binary 0 at the end and don't include it if it's there. */
2081 /* That keeps everything happy for "text" operations on the proc file. */
2083 if (le32_to_cpu(ha
->nvram
->signature
) == IPS_NVRAM_P5_SIG
) {
2084 if (ha
->nvram
->bios_low
[3] == 0) {
2086 "\tBIOS Version : %c%c%c%c%c%c%c\n",
2087 ha
->nvram
->bios_high
[0], ha
->nvram
->bios_high
[1],
2088 ha
->nvram
->bios_high
[2], ha
->nvram
->bios_high
[3],
2089 ha
->nvram
->bios_low
[0], ha
->nvram
->bios_low
[1],
2090 ha
->nvram
->bios_low
[2]);
2094 "\tBIOS Version : %c%c%c%c%c%c%c%c\n",
2095 ha
->nvram
->bios_high
[0], ha
->nvram
->bios_high
[1],
2096 ha
->nvram
->bios_high
[2], ha
->nvram
->bios_high
[3],
2097 ha
->nvram
->bios_low
[0], ha
->nvram
->bios_low
[1],
2098 ha
->nvram
->bios_low
[2], ha
->nvram
->bios_low
[3]);
2103 if (ha
->enq
->CodeBlkVersion
[7] == 0) {
2105 "\tFirmware Version : %c%c%c%c%c%c%c\n",
2106 ha
->enq
->CodeBlkVersion
[0], ha
->enq
->CodeBlkVersion
[1],
2107 ha
->enq
->CodeBlkVersion
[2], ha
->enq
->CodeBlkVersion
[3],
2108 ha
->enq
->CodeBlkVersion
[4], ha
->enq
->CodeBlkVersion
[5],
2109 ha
->enq
->CodeBlkVersion
[6]);
2112 "\tFirmware Version : %c%c%c%c%c%c%c%c\n",
2113 ha
->enq
->CodeBlkVersion
[0], ha
->enq
->CodeBlkVersion
[1],
2114 ha
->enq
->CodeBlkVersion
[2], ha
->enq
->CodeBlkVersion
[3],
2115 ha
->enq
->CodeBlkVersion
[4], ha
->enq
->CodeBlkVersion
[5],
2116 ha
->enq
->CodeBlkVersion
[6], ha
->enq
->CodeBlkVersion
[7]);
2119 if (ha
->enq
->BootBlkVersion
[7] == 0) {
2121 "\tBoot Block Version : %c%c%c%c%c%c%c\n",
2122 ha
->enq
->BootBlkVersion
[0], ha
->enq
->BootBlkVersion
[1],
2123 ha
->enq
->BootBlkVersion
[2], ha
->enq
->BootBlkVersion
[3],
2124 ha
->enq
->BootBlkVersion
[4], ha
->enq
->BootBlkVersion
[5],
2125 ha
->enq
->BootBlkVersion
[6]);
2128 "\tBoot Block Version : %c%c%c%c%c%c%c%c\n",
2129 ha
->enq
->BootBlkVersion
[0], ha
->enq
->BootBlkVersion
[1],
2130 ha
->enq
->BootBlkVersion
[2], ha
->enq
->BootBlkVersion
[3],
2131 ha
->enq
->BootBlkVersion
[4], ha
->enq
->BootBlkVersion
[5],
2132 ha
->enq
->BootBlkVersion
[6], ha
->enq
->BootBlkVersion
[7]);
2135 copy_info(&info
, "\tDriver Version : %s%s\n",
2136 IPS_VERSION_HIGH
, IPS_VERSION_LOW
);
2138 copy_info(&info
, "\tDriver Build : %d\n",
2141 copy_info(&info
, "\tMax Physical Devices : %d\n",
2142 ha
->enq
->ucMaxPhysicalDevices
);
2143 copy_info(&info
, "\tMax Active Commands : %d\n",
2145 copy_info(&info
, "\tCurrent Queued Commands : %d\n",
2146 ha
->scb_waitlist
.count
);
2147 copy_info(&info
, "\tCurrent Active Commands : %d\n",
2148 ha
->scb_activelist
.count
- ha
->num_ioctl
);
2149 copy_info(&info
, "\tCurrent Queued PT Commands : %d\n",
2150 ha
->copp_waitlist
.count
);
2151 copy_info(&info
, "\tCurrent Active PT Commands : %d\n",
2154 copy_info(&info
, "\n");
2156 return (info
.localpos
);
2159 /****************************************************************************/
2161 /* Routine Name: copy_mem_info */
2163 /* Routine Description: */
2165 /* Copy data into an IPS_INFOSTR structure */
2167 /****************************************************************************/
2169 copy_mem_info(IPS_INFOSTR
* info
, char *data
, int len
)
2171 METHOD_TRACE("copy_mem_info", 1);
2173 if (info
->pos
+ len
< info
->offset
) {
2178 if (info
->pos
< info
->offset
) {
2179 data
+= (info
->offset
- info
->pos
);
2180 len
-= (info
->offset
- info
->pos
);
2181 info
->pos
+= (info
->offset
- info
->pos
);
2184 if (info
->localpos
+ len
> info
->length
)
2185 len
= info
->length
- info
->localpos
;
2188 memcpy(info
->buffer
+ info
->localpos
, data
, len
);
2190 info
->localpos
+= len
;
2194 /****************************************************************************/
2196 /* Routine Name: copy_info */
2198 /* Routine Description: */
2200 /* printf style wrapper for an info structure */
2202 /****************************************************************************/
2204 copy_info(IPS_INFOSTR
* info
, char *fmt
, ...)
2210 METHOD_TRACE("copy_info", 1);
2212 va_start(args
, fmt
);
2213 len
= vsprintf(buf
, fmt
, args
);
2216 copy_mem_info(info
, buf
, len
);
2221 /****************************************************************************/
2223 /* Routine Name: ips_identify_controller */
2225 /* Routine Description: */
2227 /* Identify this controller */
2229 /****************************************************************************/
2231 ips_identify_controller(ips_ha_t
* ha
)
2233 METHOD_TRACE("ips_identify_controller", 1);
2235 switch (ha
->device_id
) {
2236 case IPS_DEVICEID_COPPERHEAD
:
2237 if (ha
->revision_id
<= IPS_REVID_SERVERAID
) {
2238 ha
->ad_type
= IPS_ADTYPE_SERVERAID
;
2239 } else if (ha
->revision_id
== IPS_REVID_SERVERAID2
) {
2240 ha
->ad_type
= IPS_ADTYPE_SERVERAID2
;
2241 } else if (ha
->revision_id
== IPS_REVID_NAVAJO
) {
2242 ha
->ad_type
= IPS_ADTYPE_NAVAJO
;
2243 } else if ((ha
->revision_id
== IPS_REVID_SERVERAID2
)
2244 && (ha
->slot_num
== 0)) {
2245 ha
->ad_type
= IPS_ADTYPE_KIOWA
;
2246 } else if ((ha
->revision_id
>= IPS_REVID_CLARINETP1
) &&
2247 (ha
->revision_id
<= IPS_REVID_CLARINETP3
)) {
2248 if (ha
->enq
->ucMaxPhysicalDevices
== 15)
2249 ha
->ad_type
= IPS_ADTYPE_SERVERAID3L
;
2251 ha
->ad_type
= IPS_ADTYPE_SERVERAID3
;
2252 } else if ((ha
->revision_id
>= IPS_REVID_TROMBONE32
) &&
2253 (ha
->revision_id
<= IPS_REVID_TROMBONE64
)) {
2254 ha
->ad_type
= IPS_ADTYPE_SERVERAID4H
;
2258 case IPS_DEVICEID_MORPHEUS
:
2259 switch (ha
->subdevice_id
) {
2260 case IPS_SUBDEVICEID_4L
:
2261 ha
->ad_type
= IPS_ADTYPE_SERVERAID4L
;
2264 case IPS_SUBDEVICEID_4M
:
2265 ha
->ad_type
= IPS_ADTYPE_SERVERAID4M
;
2268 case IPS_SUBDEVICEID_4MX
:
2269 ha
->ad_type
= IPS_ADTYPE_SERVERAID4MX
;
2272 case IPS_SUBDEVICEID_4LX
:
2273 ha
->ad_type
= IPS_ADTYPE_SERVERAID4LX
;
2276 case IPS_SUBDEVICEID_5I2
:
2277 ha
->ad_type
= IPS_ADTYPE_SERVERAID5I2
;
2280 case IPS_SUBDEVICEID_5I1
:
2281 ha
->ad_type
= IPS_ADTYPE_SERVERAID5I1
;
2287 case IPS_DEVICEID_MARCO
:
2288 switch (ha
->subdevice_id
) {
2289 case IPS_SUBDEVICEID_6M
:
2290 ha
->ad_type
= IPS_ADTYPE_SERVERAID6M
;
2292 case IPS_SUBDEVICEID_6I
:
2293 ha
->ad_type
= IPS_ADTYPE_SERVERAID6I
;
2295 case IPS_SUBDEVICEID_7k
:
2296 ha
->ad_type
= IPS_ADTYPE_SERVERAID7k
;
2298 case IPS_SUBDEVICEID_7M
:
2299 ha
->ad_type
= IPS_ADTYPE_SERVERAID7M
;
2306 /****************************************************************************/
2308 /* Routine Name: ips_get_bios_version */
2310 /* Routine Description: */
2312 /* Get the BIOS revision number */
2314 /****************************************************************************/
2316 ips_get_bios_version(ips_ha_t
* ha
, int intr
)
2325 { '0', '1', '2', '3', '4', '5', '6', '7', '8', '9', 'A', 'B', 'C',
2328 METHOD_TRACE("ips_get_bios_version", 1);
2333 strncpy(ha
->bios_version
, " ?", 8);
2335 if (ha
->device_id
== IPS_DEVICEID_COPPERHEAD
) {
2336 if (IPS_USE_MEMIO(ha
)) {
2337 /* Memory Mapped I/O */
2340 writel(0, ha
->mem_ptr
+ IPS_REG_FLAP
);
2341 if (ha
->revision_id
== IPS_REVID_TROMBONE64
)
2342 udelay(25); /* 25 us */
2344 if (readb(ha
->mem_ptr
+ IPS_REG_FLDP
) != 0x55)
2347 writel(1, ha
->mem_ptr
+ IPS_REG_FLAP
);
2348 if (ha
->revision_id
== IPS_REVID_TROMBONE64
)
2349 udelay(25); /* 25 us */
2351 if (readb(ha
->mem_ptr
+ IPS_REG_FLDP
) != 0xAA)
2354 /* Get Major version */
2355 writel(0x1FF, ha
->mem_ptr
+ IPS_REG_FLAP
);
2356 if (ha
->revision_id
== IPS_REVID_TROMBONE64
)
2357 udelay(25); /* 25 us */
2359 major
= readb(ha
->mem_ptr
+ IPS_REG_FLDP
);
2361 /* Get Minor version */
2362 writel(0x1FE, ha
->mem_ptr
+ IPS_REG_FLAP
);
2363 if (ha
->revision_id
== IPS_REVID_TROMBONE64
)
2364 udelay(25); /* 25 us */
2365 minor
= readb(ha
->mem_ptr
+ IPS_REG_FLDP
);
2367 /* Get SubMinor version */
2368 writel(0x1FD, ha
->mem_ptr
+ IPS_REG_FLAP
);
2369 if (ha
->revision_id
== IPS_REVID_TROMBONE64
)
2370 udelay(25); /* 25 us */
2371 subminor
= readb(ha
->mem_ptr
+ IPS_REG_FLDP
);
2374 /* Programmed I/O */
2377 outl(0, ha
->io_addr
+ IPS_REG_FLAP
);
2378 if (ha
->revision_id
== IPS_REVID_TROMBONE64
)
2379 udelay(25); /* 25 us */
2381 if (inb(ha
->io_addr
+ IPS_REG_FLDP
) != 0x55)
2384 outl(cpu_to_le32(1), ha
->io_addr
+ IPS_REG_FLAP
);
2385 if (ha
->revision_id
== IPS_REVID_TROMBONE64
)
2386 udelay(25); /* 25 us */
2388 if (inb(ha
->io_addr
+ IPS_REG_FLDP
) != 0xAA)
2391 /* Get Major version */
2392 outl(cpu_to_le32(0x1FF), ha
->io_addr
+ IPS_REG_FLAP
);
2393 if (ha
->revision_id
== IPS_REVID_TROMBONE64
)
2394 udelay(25); /* 25 us */
2396 major
= inb(ha
->io_addr
+ IPS_REG_FLDP
);
2398 /* Get Minor version */
2399 outl(cpu_to_le32(0x1FE), ha
->io_addr
+ IPS_REG_FLAP
);
2400 if (ha
->revision_id
== IPS_REVID_TROMBONE64
)
2401 udelay(25); /* 25 us */
2403 minor
= inb(ha
->io_addr
+ IPS_REG_FLDP
);
2405 /* Get SubMinor version */
2406 outl(cpu_to_le32(0x1FD), ha
->io_addr
+ IPS_REG_FLAP
);
2407 if (ha
->revision_id
== IPS_REVID_TROMBONE64
)
2408 udelay(25); /* 25 us */
2410 subminor
= inb(ha
->io_addr
+ IPS_REG_FLDP
);
2414 /* Morpheus Family - Send Command to the card */
2416 buffer
= ha
->ioctl_data
;
2418 memset(buffer
, 0, 0x1000);
2420 scb
= &ha
->scbs
[ha
->max_cmds
- 1];
2422 ips_init_scb(ha
, scb
);
2424 scb
->timeout
= ips_cmd_timeout
;
2425 scb
->cdb
[0] = IPS_CMD_RW_BIOSFW
;
2427 scb
->cmd
.flashfw
.op_code
= IPS_CMD_RW_BIOSFW
;
2428 scb
->cmd
.flashfw
.command_id
= IPS_COMMAND_ID(ha
, scb
);
2429 scb
->cmd
.flashfw
.type
= 1;
2430 scb
->cmd
.flashfw
.direction
= 0;
2431 scb
->cmd
.flashfw
.count
= cpu_to_le32(0x800);
2432 scb
->cmd
.flashfw
.total_packets
= 1;
2433 scb
->cmd
.flashfw
.packet_num
= 0;
2434 scb
->data_len
= 0x1000;
2435 scb
->cmd
.flashfw
.buffer_addr
= ha
->ioctl_busaddr
;
2437 /* issue the command */
2439 ips_send_wait(ha
, scb
, ips_cmd_timeout
,
2440 intr
)) == IPS_FAILURE
)
2441 || (ret
== IPS_SUCCESS_IMM
)
2442 || ((scb
->basic_status
& IPS_GSC_STATUS_MASK
) > 1)) {
2443 /* Error occurred */
2448 if ((buffer
[0xC0] == 0x55) && (buffer
[0xC1] == 0xAA)) {
2449 major
= buffer
[0x1ff + 0xC0]; /* Offset 0x1ff after the header (0xc0) */
2450 minor
= buffer
[0x1fe + 0xC0]; /* Offset 0x1fe after the header (0xc0) */
2451 subminor
= buffer
[0x1fd + 0xC0]; /* Offset 0x1fd after the header (0xc0) */
2457 ha
->bios_version
[0] = hexDigits
[(major
& 0xF0) >> 4];
2458 ha
->bios_version
[1] = '.';
2459 ha
->bios_version
[2] = hexDigits
[major
& 0x0F];
2460 ha
->bios_version
[3] = hexDigits
[subminor
];
2461 ha
->bios_version
[4] = '.';
2462 ha
->bios_version
[5] = hexDigits
[(minor
& 0xF0) >> 4];
2463 ha
->bios_version
[6] = hexDigits
[minor
& 0x0F];
2464 ha
->bios_version
[7] = 0;
2467 /****************************************************************************/
2469 /* Routine Name: ips_hainit */
2471 /* Routine Description: */
2473 /* Initialize the controller */
2475 /* NOTE: Assumes to be called from with a lock */
2477 /****************************************************************************/
2479 ips_hainit(ips_ha_t
* ha
)
2484 METHOD_TRACE("ips_hainit", 1);
2489 if (ha
->func
.statinit
)
2490 (*ha
->func
.statinit
) (ha
);
2492 if (ha
->func
.enableint
)
2493 (*ha
->func
.enableint
) (ha
);
2496 ha
->reset_count
= 1;
2497 do_gettimeofday(&tv
);
2498 ha
->last_ffdc
= tv
.tv_sec
;
2499 ips_ffdc_reset(ha
, IPS_INTR_IORL
);
2501 if (!ips_read_config(ha
, IPS_INTR_IORL
)) {
2502 IPS_PRINTK(KERN_WARNING
, ha
->pcidev
,
2503 "unable to read config from controller.\n");
2508 if (!ips_read_adapter_status(ha
, IPS_INTR_IORL
)) {
2509 IPS_PRINTK(KERN_WARNING
, ha
->pcidev
,
2510 "unable to read controller status.\n");
2515 /* Identify this controller */
2516 ips_identify_controller(ha
);
2518 if (!ips_read_subsystem_parameters(ha
, IPS_INTR_IORL
)) {
2519 IPS_PRINTK(KERN_WARNING
, ha
->pcidev
,
2520 "unable to read subsystem parameters.\n");
2525 /* write nvram user page 5 */
2526 if (!ips_write_driver_status(ha
, IPS_INTR_IORL
)) {
2527 IPS_PRINTK(KERN_WARNING
, ha
->pcidev
,
2528 "unable to write driver info to controller.\n");
2533 /* If there are Logical Drives and a Reset Occurred, then an EraseStripeLock is Needed */
2534 if ((ha
->conf
->ucLogDriveCount
> 0) && (ha
->requires_esl
== 1))
2535 ips_clear_adapter(ha
, IPS_INTR_IORL
);
2537 /* set limits on SID, LUN, BUS */
2538 ha
->ntargets
= IPS_MAX_TARGETS
+ 1;
2540 ha
->nbus
= (ha
->enq
->ucMaxPhysicalDevices
/ IPS_MAX_TARGETS
) + 1;
2542 switch (ha
->conf
->logical_drive
[0].ucStripeSize
) {
2544 ha
->max_xfer
= 0x10000;
2548 ha
->max_xfer
= 0x20000;
2552 ha
->max_xfer
= 0x40000;
2557 ha
->max_xfer
= 0x80000;
2561 /* setup max concurrent commands */
2562 if (le32_to_cpu(ha
->subsys
->param
[4]) & 0x1) {
2563 /* Use the new method */
2564 ha
->max_cmds
= ha
->enq
->ucConcurrentCmdCount
;
2566 /* use the old method */
2567 switch (ha
->conf
->logical_drive
[0].ucStripeSize
) {
2587 /* Limit the Active Commands on a Lite Adapter */
2588 if ((ha
->ad_type
== IPS_ADTYPE_SERVERAID3L
) ||
2589 (ha
->ad_type
== IPS_ADTYPE_SERVERAID4L
) ||
2590 (ha
->ad_type
== IPS_ADTYPE_SERVERAID4LX
)) {
2591 if ((ha
->max_cmds
> MaxLiteCmds
) && (MaxLiteCmds
))
2592 ha
->max_cmds
= MaxLiteCmds
;
2595 /* set controller IDs */
2596 ha
->ha_id
[0] = IPS_ADAPTER_ID
;
2597 for (i
= 1; i
< ha
->nbus
; i
++) {
2598 ha
->ha_id
[i
] = ha
->conf
->init_id
[i
- 1] & 0x1f;
2599 ha
->dcdb_active
[i
- 1] = 0;
2605 /****************************************************************************/
2607 /* Routine Name: ips_next */
2609 /* Routine Description: */
2611 /* Take the next command off the queue and send it to the controller */
2613 /****************************************************************************/
2615 ips_next(ips_ha_t
* ha
, int intr
)
2618 struct scsi_cmnd
*SC
;
2619 struct scsi_cmnd
*p
;
2620 struct scsi_cmnd
*q
;
2621 ips_copp_wait_item_t
*item
;
2623 struct Scsi_Host
*host
;
2624 METHOD_TRACE("ips_next", 1);
2628 host
= ips_sh
[ha
->host_num
];
2630 * Block access to the queue function so
2631 * this command won't time out
2633 if (intr
== IPS_INTR_ON
)
2634 spin_lock(host
->host_lock
);
2636 if ((ha
->subsys
->param
[3] & 0x300000)
2637 && (ha
->scb_activelist
.count
== 0)) {
2640 do_gettimeofday(&tv
);
2642 if (tv
.tv_sec
- ha
->last_ffdc
> IPS_SECS_8HOURS
) {
2643 ha
->last_ffdc
= tv
.tv_sec
;
2649 * Send passthru commands
2650 * These have priority over normal I/O
2651 * but shouldn't affect performance too much
2652 * since we limit the number that can be active
2653 * on the card at any one time
2655 while ((ha
->num_ioctl
< IPS_MAX_IOCTL
) &&
2656 (ha
->copp_waitlist
.head
) && (scb
= ips_getscb(ha
))) {
2658 item
= ips_removeq_copp_head(&ha
->copp_waitlist
);
2660 if (intr
== IPS_INTR_ON
)
2661 spin_unlock(host
->host_lock
);
2662 scb
->scsi_cmd
= item
->scsi_cmd
;
2665 ret
= ips_make_passthru(ha
, scb
->scsi_cmd
, scb
, intr
);
2667 if (intr
== IPS_INTR_ON
)
2668 spin_lock(host
->host_lock
);
2671 if (scb
->scsi_cmd
) {
2672 scb
->scsi_cmd
->result
= DID_ERROR
<< 16;
2673 scb
->scsi_cmd
->scsi_done(scb
->scsi_cmd
);
2676 ips_freescb(ha
, scb
);
2678 case IPS_SUCCESS_IMM
:
2679 if (scb
->scsi_cmd
) {
2680 scb
->scsi_cmd
->result
= DID_OK
<< 16;
2681 scb
->scsi_cmd
->scsi_done(scb
->scsi_cmd
);
2684 ips_freescb(ha
, scb
);
2690 if (ret
!= IPS_SUCCESS
) {
2695 ret
= ips_send_cmd(ha
, scb
);
2697 if (ret
== IPS_SUCCESS
)
2698 ips_putq_scb_head(&ha
->scb_activelist
, scb
);
2704 if (scb
->scsi_cmd
) {
2705 scb
->scsi_cmd
->result
= DID_ERROR
<< 16;
2708 ips_freescb(ha
, scb
);
2710 case IPS_SUCCESS_IMM
:
2711 ips_freescb(ha
, scb
);
2720 * Send "Normal" I/O commands
2723 p
= ha
->scb_waitlist
.head
;
2724 while ((p
) && (scb
= ips_getscb(ha
))) {
2725 if ((scmd_channel(p
) > 0)
2727 dcdb_active
[scmd_channel(p
) -
2728 1] & (1 << scmd_id(p
)))) {
2729 ips_freescb(ha
, scb
);
2730 p
= (struct scsi_cmnd
*) p
->host_scribble
;
2735 SC
= ips_removeq_wait(&ha
->scb_waitlist
, q
);
2737 if (intr
== IPS_INTR_ON
)
2738 spin_unlock(host
->host_lock
); /* Unlock HA after command is taken off queue */
2740 SC
->result
= DID_OK
;
2741 SC
->host_scribble
= NULL
;
2743 memset(SC
->sense_buffer
, 0, sizeof (SC
->sense_buffer
));
2745 scb
->target_id
= SC
->device
->id
;
2746 scb
->lun
= SC
->device
->lun
;
2747 scb
->bus
= SC
->device
->channel
;
2751 scb
->callback
= ipsintr_done
;
2752 scb
->timeout
= ips_cmd_timeout
;
2753 memset(&scb
->cmd
, 0, 16);
2755 /* copy in the CDB */
2756 memcpy(scb
->cdb
, SC
->cmnd
, SC
->cmd_len
);
2758 scb
->sg_count
= scsi_dma_map(SC
);
2759 BUG_ON(scb
->sg_count
< 0);
2760 if (scb
->sg_count
) {
2761 struct scatterlist
*sg
;
2764 scb
->flags
|= IPS_SCB_MAP_SG
;
2766 scsi_for_each_sg(SC
, sg
, scb
->sg_count
, i
) {
2767 if (ips_fill_scb_sg_single
2768 (ha
, sg_dma_address(sg
), scb
, i
,
2769 sg_dma_len(sg
)) < 0)
2772 scb
->dcdb
.transfer_length
= scb
->data_len
;
2774 scb
->data_busaddr
= 0L;
2777 scb
->dcdb
.transfer_length
= 0;
2780 scb
->dcdb
.cmd_attribute
=
2781 ips_command_direction
[scb
->scsi_cmd
->cmnd
[0]];
2783 /* Allow a WRITE BUFFER Command to Have no Data */
2784 /* This is Used by Tape Flash Utilites */
2785 if ((scb
->scsi_cmd
->cmnd
[0] == WRITE_BUFFER
) && (scb
->data_len
== 0))
2786 scb
->dcdb
.cmd_attribute
= 0;
2788 if (!(scb
->dcdb
.cmd_attribute
& 0x3))
2789 scb
->dcdb
.transfer_length
= 0;
2791 if (scb
->data_len
>= IPS_MAX_XFER
) {
2792 scb
->dcdb
.cmd_attribute
|= IPS_TRANSFER64K
;
2793 scb
->dcdb
.transfer_length
= 0;
2795 if (intr
== IPS_INTR_ON
)
2796 spin_lock(host
->host_lock
);
2798 ret
= ips_send_cmd(ha
, scb
);
2802 ips_putq_scb_head(&ha
->scb_activelist
, scb
);
2805 if (scb
->scsi_cmd
) {
2806 scb
->scsi_cmd
->result
= DID_ERROR
<< 16;
2807 scb
->scsi_cmd
->scsi_done(scb
->scsi_cmd
);
2811 ha
->dcdb_active
[scb
->bus
- 1] &=
2812 ~(1 << scb
->target_id
);
2814 ips_freescb(ha
, scb
);
2816 case IPS_SUCCESS_IMM
:
2818 scb
->scsi_cmd
->scsi_done(scb
->scsi_cmd
);
2821 ha
->dcdb_active
[scb
->bus
- 1] &=
2822 ~(1 << scb
->target_id
);
2824 ips_freescb(ha
, scb
);
2830 p
= (struct scsi_cmnd
*) p
->host_scribble
;
2834 if (intr
== IPS_INTR_ON
)
2835 spin_unlock(host
->host_lock
);
2838 /****************************************************************************/
2840 /* Routine Name: ips_putq_scb_head */
2842 /* Routine Description: */
2844 /* Add an item to the head of the queue */
2846 /* ASSUMED to be called from within the HA lock */
2848 /****************************************************************************/
2850 ips_putq_scb_head(ips_scb_queue_t
* queue
, ips_scb_t
* item
)
2852 METHOD_TRACE("ips_putq_scb_head", 1);
2857 item
->q_next
= queue
->head
;
2866 /****************************************************************************/
2868 /* Routine Name: ips_removeq_scb_head */
2870 /* Routine Description: */
2872 /* Remove the head of the queue */
2874 /* ASSUMED to be called from within the HA lock */
2876 /****************************************************************************/
2878 ips_removeq_scb_head(ips_scb_queue_t
* queue
)
2882 METHOD_TRACE("ips_removeq_scb_head", 1);
2890 queue
->head
= item
->q_next
;
2891 item
->q_next
= NULL
;
2893 if (queue
->tail
== item
)
2901 /****************************************************************************/
2903 /* Routine Name: ips_removeq_scb */
2905 /* Routine Description: */
2907 /* Remove an item from a queue */
2909 /* ASSUMED to be called from within the HA lock */
2911 /****************************************************************************/
2913 ips_removeq_scb(ips_scb_queue_t
* queue
, ips_scb_t
* item
)
2917 METHOD_TRACE("ips_removeq_scb", 1);
2922 if (item
== queue
->head
) {
2923 return (ips_removeq_scb_head(queue
));
2928 while ((p
) && (item
!= p
->q_next
))
2933 p
->q_next
= item
->q_next
;
2938 item
->q_next
= NULL
;
2947 /****************************************************************************/
2949 /* Routine Name: ips_putq_wait_tail */
2951 /* Routine Description: */
2953 /* Add an item to the tail of the queue */
2955 /* ASSUMED to be called from within the HA lock */
2957 /****************************************************************************/
2958 static void ips_putq_wait_tail(ips_wait_queue_t
*queue
, struct scsi_cmnd
*item
)
2960 METHOD_TRACE("ips_putq_wait_tail", 1);
2965 item
->host_scribble
= NULL
;
2968 queue
->tail
->host_scribble
= (char *) item
;
2978 /****************************************************************************/
2980 /* Routine Name: ips_removeq_wait_head */
2982 /* Routine Description: */
2984 /* Remove the head of the queue */
2986 /* ASSUMED to be called from within the HA lock */
2988 /****************************************************************************/
2989 static struct scsi_cmnd
*ips_removeq_wait_head(ips_wait_queue_t
*queue
)
2991 struct scsi_cmnd
*item
;
2993 METHOD_TRACE("ips_removeq_wait_head", 1);
3001 queue
->head
= (struct scsi_cmnd
*) item
->host_scribble
;
3002 item
->host_scribble
= NULL
;
3004 if (queue
->tail
== item
)
3012 /****************************************************************************/
3014 /* Routine Name: ips_removeq_wait */
3016 /* Routine Description: */
3018 /* Remove an item from a queue */
3020 /* ASSUMED to be called from within the HA lock */
3022 /****************************************************************************/
3023 static struct scsi_cmnd
*ips_removeq_wait(ips_wait_queue_t
*queue
,
3024 struct scsi_cmnd
*item
)
3026 struct scsi_cmnd
*p
;
3028 METHOD_TRACE("ips_removeq_wait", 1);
3033 if (item
== queue
->head
) {
3034 return (ips_removeq_wait_head(queue
));
3039 while ((p
) && (item
!= (struct scsi_cmnd
*) p
->host_scribble
))
3040 p
= (struct scsi_cmnd
*) p
->host_scribble
;
3044 p
->host_scribble
= item
->host_scribble
;
3046 if (!item
->host_scribble
)
3049 item
->host_scribble
= NULL
;
3058 /****************************************************************************/
3060 /* Routine Name: ips_putq_copp_tail */
3062 /* Routine Description: */
3064 /* Add an item to the tail of the queue */
3066 /* ASSUMED to be called from within the HA lock */
3068 /****************************************************************************/
3070 ips_putq_copp_tail(ips_copp_queue_t
* queue
, ips_copp_wait_item_t
* item
)
3072 METHOD_TRACE("ips_putq_copp_tail", 1);
3080 queue
->tail
->next
= item
;
3090 /****************************************************************************/
3092 /* Routine Name: ips_removeq_copp_head */
3094 /* Routine Description: */
3096 /* Remove the head of the queue */
3098 /* ASSUMED to be called from within the HA lock */
3100 /****************************************************************************/
3101 static ips_copp_wait_item_t
*
3102 ips_removeq_copp_head(ips_copp_queue_t
* queue
)
3104 ips_copp_wait_item_t
*item
;
3106 METHOD_TRACE("ips_removeq_copp_head", 1);
3114 queue
->head
= item
->next
;
3117 if (queue
->tail
== item
)
3125 /****************************************************************************/
3127 /* Routine Name: ips_removeq_copp */
3129 /* Routine Description: */
3131 /* Remove an item from a queue */
3133 /* ASSUMED to be called from within the HA lock */
3135 /****************************************************************************/
3136 static ips_copp_wait_item_t
*
3137 ips_removeq_copp(ips_copp_queue_t
* queue
, ips_copp_wait_item_t
* item
)
3139 ips_copp_wait_item_t
*p
;
3141 METHOD_TRACE("ips_removeq_copp", 1);
3146 if (item
== queue
->head
) {
3147 return (ips_removeq_copp_head(queue
));
3152 while ((p
) && (item
!= p
->next
))
3157 p
->next
= item
->next
;
3171 /****************************************************************************/
3173 /* Routine Name: ipsintr_blocking */
3175 /* Routine Description: */
3177 /* Finalize an interrupt for internal commands */
3179 /****************************************************************************/
3181 ipsintr_blocking(ips_ha_t
* ha
, ips_scb_t
* scb
)
3183 METHOD_TRACE("ipsintr_blocking", 2);
3185 ips_freescb(ha
, scb
);
3186 if ((ha
->waitflag
== TRUE
) && (ha
->cmd_in_progress
== scb
->cdb
[0])) {
3187 ha
->waitflag
= FALSE
;
3193 /****************************************************************************/
3195 /* Routine Name: ipsintr_done */
3197 /* Routine Description: */
3199 /* Finalize an interrupt for non-internal commands */
3201 /****************************************************************************/
3203 ipsintr_done(ips_ha_t
* ha
, ips_scb_t
* scb
)
3205 METHOD_TRACE("ipsintr_done", 2);
3208 IPS_PRINTK(KERN_WARNING
, ha
->pcidev
,
3209 "Spurious interrupt; scb NULL.\n");
3214 if (scb
->scsi_cmd
== NULL
) {
3215 /* unexpected interrupt */
3216 IPS_PRINTK(KERN_WARNING
, ha
->pcidev
,
3217 "Spurious interrupt; scsi_cmd not set.\n");
3225 /****************************************************************************/
3227 /* Routine Name: ips_done */
3229 /* Routine Description: */
3231 /* Do housekeeping on completed commands */
3232 /* ASSUMED to be called form within the request lock */
3233 /****************************************************************************/
3235 ips_done(ips_ha_t
* ha
, ips_scb_t
* scb
)
3239 METHOD_TRACE("ips_done", 1);
3244 if ((scb
->scsi_cmd
) && (ips_is_passthru(scb
->scsi_cmd
))) {
3245 ips_cleanup_passthru(ha
, scb
);
3249 * Check to see if this command had too much
3250 * data and had to be broke up. If so, queue
3251 * the rest of the data and continue.
3253 if ((scb
->breakup
) || (scb
->sg_break
)) {
3254 struct scatterlist
*sg
;
3255 int sg_dma_index
, ips_sg_index
= 0;
3257 /* we had a data breakup */
3260 sg
= scsi_sglist(scb
->scsi_cmd
);
3262 /* Spin forward to last dma chunk */
3263 sg_dma_index
= scb
->breakup
;
3265 /* Take care of possible partial on last chunk */
3266 ips_fill_scb_sg_single(ha
,
3267 sg_dma_address(&sg
[sg_dma_index
]),
3268 scb
, ips_sg_index
++,
3269 sg_dma_len(&sg
[sg_dma_index
]));
3271 for (; sg_dma_index
< scsi_sg_count(scb
->scsi_cmd
);
3273 if (ips_fill_scb_sg_single
3275 sg_dma_address(&sg
[sg_dma_index
]),
3276 scb
, ips_sg_index
++,
3277 sg_dma_len(&sg
[sg_dma_index
])) < 0)
3281 scb
->dcdb
.transfer_length
= scb
->data_len
;
3282 scb
->dcdb
.cmd_attribute
|=
3283 ips_command_direction
[scb
->scsi_cmd
->cmnd
[0]];
3285 if (!(scb
->dcdb
.cmd_attribute
& 0x3))
3286 scb
->dcdb
.transfer_length
= 0;
3288 if (scb
->data_len
>= IPS_MAX_XFER
) {
3289 scb
->dcdb
.cmd_attribute
|= IPS_TRANSFER64K
;
3290 scb
->dcdb
.transfer_length
= 0;
3293 ret
= ips_send_cmd(ha
, scb
);
3297 if (scb
->scsi_cmd
) {
3298 scb
->scsi_cmd
->result
= DID_ERROR
<< 16;
3299 scb
->scsi_cmd
->scsi_done(scb
->scsi_cmd
);
3302 ips_freescb(ha
, scb
);
3304 case IPS_SUCCESS_IMM
:
3305 if (scb
->scsi_cmd
) {
3306 scb
->scsi_cmd
->result
= DID_ERROR
<< 16;
3307 scb
->scsi_cmd
->scsi_done(scb
->scsi_cmd
);
3310 ips_freescb(ha
, scb
);
3318 } /* end if passthru */
3321 ha
->dcdb_active
[scb
->bus
- 1] &= ~(1 << scb
->target_id
);
3324 scb
->scsi_cmd
->scsi_done(scb
->scsi_cmd
);
3326 ips_freescb(ha
, scb
);
3329 /****************************************************************************/
3331 /* Routine Name: ips_map_status */
3333 /* Routine Description: */
3335 /* Map Controller Error codes to Linux Error Codes */
3337 /****************************************************************************/
3339 ips_map_status(ips_ha_t
* ha
, ips_scb_t
* scb
, ips_stat_t
* sp
)
3343 uint32_t transfer_len
;
3344 IPS_DCDB_TABLE_TAPE
*tapeDCDB
;
3345 IPS_SCSI_INQ_DATA inquiryData
;
3347 METHOD_TRACE("ips_map_status", 1);
3351 "(%s%d) Physical device error (%d %d %d): %x %x, Sense Key: %x, ASC: %x, ASCQ: %x",
3352 ips_name
, ha
->host_num
,
3353 scb
->scsi_cmd
->device
->channel
,
3354 scb
->scsi_cmd
->device
->id
, scb
->scsi_cmd
->device
->lun
,
3355 scb
->basic_status
, scb
->extended_status
,
3356 scb
->extended_status
==
3357 IPS_ERR_CKCOND
? scb
->dcdb
.sense_info
[2] & 0xf : 0,
3358 scb
->extended_status
==
3359 IPS_ERR_CKCOND
? scb
->dcdb
.sense_info
[12] : 0,
3360 scb
->extended_status
==
3361 IPS_ERR_CKCOND
? scb
->dcdb
.sense_info
[13] : 0);
3364 /* default driver error */
3365 errcode
= DID_ERROR
;
3368 switch (scb
->basic_status
& IPS_GSC_STATUS_MASK
) {
3369 case IPS_CMD_TIMEOUT
:
3370 errcode
= DID_TIME_OUT
;
3373 case IPS_INVAL_OPCO
:
3374 case IPS_INVAL_CMD_BLK
:
3375 case IPS_INVAL_PARM_BLK
:
3377 case IPS_CMD_CMPLT_WERROR
:
3380 case IPS_PHYS_DRV_ERROR
:
3381 switch (scb
->extended_status
) {
3382 case IPS_ERR_SEL_TO
:
3384 errcode
= DID_NO_CONNECT
;
3388 case IPS_ERR_OU_RUN
:
3389 if ((scb
->cmd
.dcdb
.op_code
== IPS_CMD_EXTENDED_DCDB
) ||
3390 (scb
->cmd
.dcdb
.op_code
==
3391 IPS_CMD_EXTENDED_DCDB_SG
)) {
3392 tapeDCDB
= (IPS_DCDB_TABLE_TAPE
*) & scb
->dcdb
;
3393 transfer_len
= tapeDCDB
->transfer_length
;
3396 (uint32_t) scb
->dcdb
.transfer_length
;
3399 if ((scb
->bus
) && (transfer_len
< scb
->data_len
)) {
3400 /* Underrun - set default to no error */
3403 /* Restrict access to physical DASD */
3404 if (scb
->scsi_cmd
->cmnd
[0] == INQUIRY
) {
3405 ips_scmd_buf_read(scb
->scsi_cmd
,
3406 &inquiryData
, sizeof (inquiryData
));
3407 if ((inquiryData
.DeviceType
& 0x1f) == TYPE_DISK
) {
3408 errcode
= DID_TIME_OUT
;
3413 errcode
= DID_ERROR
;
3417 case IPS_ERR_RECOVERY
:
3418 /* don't fail recovered errors */
3424 case IPS_ERR_HOST_RESET
:
3425 case IPS_ERR_DEV_RESET
:
3426 errcode
= DID_RESET
;
3429 case IPS_ERR_CKCOND
:
3431 if ((scb
->cmd
.dcdb
.op_code
==
3432 IPS_CMD_EXTENDED_DCDB
)
3433 || (scb
->cmd
.dcdb
.op_code
==
3434 IPS_CMD_EXTENDED_DCDB_SG
)) {
3436 (IPS_DCDB_TABLE_TAPE
*) & scb
->dcdb
;
3437 memcpy(scb
->scsi_cmd
->sense_buffer
,
3438 tapeDCDB
->sense_info
,
3439 sizeof (scb
->scsi_cmd
->
3442 memcpy(scb
->scsi_cmd
->sense_buffer
,
3443 scb
->dcdb
.sense_info
,
3444 sizeof (scb
->scsi_cmd
->
3447 device_error
= 2; /* check condition */
3455 errcode
= DID_ERROR
;
3461 scb
->scsi_cmd
->result
= device_error
| (errcode
<< 16);
3466 /****************************************************************************/
3468 /* Routine Name: ips_send_wait */
3470 /* Routine Description: */
3472 /* Send a command to the controller and wait for it to return */
3474 /* The FFDC Time Stamp use this function for the callback, but doesn't */
3475 /* actually need to wait. */
3476 /****************************************************************************/
3478 ips_send_wait(ips_ha_t
* ha
, ips_scb_t
* scb
, int timeout
, int intr
)
3482 METHOD_TRACE("ips_send_wait", 1);
3484 if (intr
!= IPS_FFDC
) { /* Won't be Waiting if this is a Time Stamp */
3485 ha
->waitflag
= TRUE
;
3486 ha
->cmd_in_progress
= scb
->cdb
[0];
3488 scb
->callback
= ipsintr_blocking
;
3489 ret
= ips_send_cmd(ha
, scb
);
3491 if ((ret
== IPS_FAILURE
) || (ret
== IPS_SUCCESS_IMM
))
3494 if (intr
!= IPS_FFDC
) /* Don't Wait around if this is a Time Stamp */
3495 ret
= ips_wait(ha
, timeout
, intr
);
3500 /****************************************************************************/
3502 /* Routine Name: ips_scmd_buf_write */
3504 /* Routine Description: */
3505 /* Write data to struct scsi_cmnd request_buffer at proper offsets */
3506 /****************************************************************************/
3508 ips_scmd_buf_write(struct scsi_cmnd
*scmd
, void *data
, unsigned int count
)
3511 unsigned int min_cnt
, xfer_cnt
;
3512 char *cdata
= (char *) data
;
3513 unsigned char *buffer
;
3514 unsigned long flags
;
3515 struct scatterlist
*sg
= scsi_sglist(scmd
);
3517 for (i
= 0, xfer_cnt
= 0;
3518 (i
< scsi_sg_count(scmd
)) && (xfer_cnt
< count
); i
++) {
3519 min_cnt
= min(count
- xfer_cnt
, sg
[i
].length
);
3521 /* kmap_atomic() ensures addressability of the data buffer.*/
3522 /* local_irq_save() protects the KM_IRQ0 address slot. */
3523 local_irq_save(flags
);
3524 buffer
= kmap_atomic(sg
[i
].page
, KM_IRQ0
) + sg
[i
].offset
;
3525 memcpy(buffer
, &cdata
[xfer_cnt
], min_cnt
);
3526 kunmap_atomic(buffer
- sg
[i
].offset
, KM_IRQ0
);
3527 local_irq_restore(flags
);
3529 xfer_cnt
+= min_cnt
;
3533 /****************************************************************************/
3535 /* Routine Name: ips_scmd_buf_read */
3537 /* Routine Description: */
3538 /* Copy data from a struct scsi_cmnd to a new, linear buffer */
3539 /****************************************************************************/
3541 ips_scmd_buf_read(struct scsi_cmnd
*scmd
, void *data
, unsigned int count
)
3544 unsigned int min_cnt
, xfer_cnt
;
3545 char *cdata
= (char *) data
;
3546 unsigned char *buffer
;
3547 unsigned long flags
;
3548 struct scatterlist
*sg
= scsi_sglist(scmd
);
3550 for (i
= 0, xfer_cnt
= 0;
3551 (i
< scsi_sg_count(scmd
)) && (xfer_cnt
< count
); i
++) {
3552 min_cnt
= min(count
- xfer_cnt
, sg
[i
].length
);
3554 /* kmap_atomic() ensures addressability of the data buffer.*/
3555 /* local_irq_save() protects the KM_IRQ0 address slot. */
3556 local_irq_save(flags
);
3557 buffer
= kmap_atomic(sg
[i
].page
, KM_IRQ0
) + sg
[i
].offset
;
3558 memcpy(&cdata
[xfer_cnt
], buffer
, min_cnt
);
3559 kunmap_atomic(buffer
- sg
[i
].offset
, KM_IRQ0
);
3560 local_irq_restore(flags
);
3562 xfer_cnt
+= min_cnt
;
3566 /****************************************************************************/
3568 /* Routine Name: ips_send_cmd */
3570 /* Routine Description: */
3572 /* Map SCSI commands to ServeRAID commands for logical drives */
3574 /****************************************************************************/
3576 ips_send_cmd(ips_ha_t
* ha
, ips_scb_t
* scb
)
3581 IPS_DCDB_TABLE_TAPE
*tapeDCDB
;
3584 METHOD_TRACE("ips_send_cmd", 1);
3588 if (!scb
->scsi_cmd
) {
3589 /* internal command */
3592 /* Controller commands can't be issued */
3593 /* to real devices -- fail them */
3594 if ((ha
->waitflag
== TRUE
) &&
3595 (ha
->cmd_in_progress
== scb
->cdb
[0])) {
3596 ha
->waitflag
= FALSE
;
3601 } else if ((scb
->bus
== 0) && (!ips_is_passthru(scb
->scsi_cmd
))) {
3602 /* command to logical bus -- interpret */
3603 ret
= IPS_SUCCESS_IMM
;
3605 switch (scb
->scsi_cmd
->cmnd
[0]) {
3606 case ALLOW_MEDIUM_REMOVAL
:
3609 case WRITE_FILEMARKS
:
3611 scb
->scsi_cmd
->result
= DID_ERROR
<< 16;
3615 scb
->scsi_cmd
->result
= DID_OK
<< 16;
3617 case TEST_UNIT_READY
:
3619 if (scb
->target_id
== IPS_ADAPTER_ID
) {
3621 * Either we have a TUR
3622 * or we have a SCSI inquiry
3624 if (scb
->scsi_cmd
->cmnd
[0] == TEST_UNIT_READY
)
3625 scb
->scsi_cmd
->result
= DID_OK
<< 16;
3627 if (scb
->scsi_cmd
->cmnd
[0] == INQUIRY
) {
3628 IPS_SCSI_INQ_DATA inquiry
;
3631 sizeof (IPS_SCSI_INQ_DATA
));
3633 inquiry
.DeviceType
=
3634 IPS_SCSI_INQ_TYPE_PROCESSOR
;
3635 inquiry
.DeviceTypeQualifier
=
3636 IPS_SCSI_INQ_LU_CONNECTED
;
3637 inquiry
.Version
= IPS_SCSI_INQ_REV2
;
3638 inquiry
.ResponseDataFormat
=
3639 IPS_SCSI_INQ_RD_REV2
;
3640 inquiry
.AdditionalLength
= 31;
3642 IPS_SCSI_INQ_Address16
;
3644 IPS_SCSI_INQ_WBus16
|
3646 strncpy(inquiry
.VendorId
, "IBM ",
3648 strncpy(inquiry
.ProductId
,
3650 strncpy(inquiry
.ProductRevisionLevel
,
3653 ips_scmd_buf_write(scb
->scsi_cmd
,
3657 scb
->scsi_cmd
->result
= DID_OK
<< 16;
3660 scb
->cmd
.logical_info
.op_code
= IPS_CMD_GET_LD_INFO
;
3661 scb
->cmd
.logical_info
.command_id
= IPS_COMMAND_ID(ha
, scb
);
3662 scb
->cmd
.logical_info
.reserved
= 0;
3663 scb
->cmd
.logical_info
.reserved2
= 0;
3664 scb
->data_len
= sizeof (IPS_LD_INFO
);
3665 scb
->data_busaddr
= ha
->logical_drive_info_dma_addr
;
3667 scb
->cmd
.logical_info
.buffer_addr
= scb
->data_busaddr
;
3674 ips_reqsen(ha
, scb
);
3675 scb
->scsi_cmd
->result
= DID_OK
<< 16;
3681 scb
->cmd
.basic_io
.op_code
=
3682 (scb
->scsi_cmd
->cmnd
[0] ==
3683 READ_6
) ? IPS_CMD_READ
: IPS_CMD_WRITE
;
3684 scb
->cmd
.basic_io
.enhanced_sg
= 0;
3685 scb
->cmd
.basic_io
.sg_addr
=
3686 cpu_to_le32(scb
->data_busaddr
);
3688 scb
->cmd
.basic_io
.op_code
=
3689 (scb
->scsi_cmd
->cmnd
[0] ==
3690 READ_6
) ? IPS_CMD_READ_SG
:
3692 scb
->cmd
.basic_io
.enhanced_sg
=
3693 IPS_USE_ENH_SGLIST(ha
) ? 0xFF : 0;
3694 scb
->cmd
.basic_io
.sg_addr
=
3695 cpu_to_le32(scb
->sg_busaddr
);
3698 scb
->cmd
.basic_io
.segment_4G
= 0;
3699 scb
->cmd
.basic_io
.command_id
= IPS_COMMAND_ID(ha
, scb
);
3700 scb
->cmd
.basic_io
.log_drv
= scb
->target_id
;
3701 scb
->cmd
.basic_io
.sg_count
= scb
->sg_len
;
3703 if (scb
->cmd
.basic_io
.lba
)
3704 scb
->cmd
.basic_io
.lba
=
3705 cpu_to_le32(le32_to_cpu
3706 (scb
->cmd
.basic_io
.lba
) +
3707 le16_to_cpu(scb
->cmd
.basic_io
.
3710 scb
->cmd
.basic_io
.lba
=
3712 cmnd
[1] & 0x1f) << 16) | (scb
->scsi_cmd
->
3714 (scb
->scsi_cmd
->cmnd
[3]));
3716 scb
->cmd
.basic_io
.sector_count
=
3717 cpu_to_le16(scb
->data_len
/ IPS_BLKSIZE
);
3719 if (le16_to_cpu(scb
->cmd
.basic_io
.sector_count
) == 0)
3720 scb
->cmd
.basic_io
.sector_count
=
3729 scb
->cmd
.basic_io
.op_code
=
3730 (scb
->scsi_cmd
->cmnd
[0] ==
3731 READ_10
) ? IPS_CMD_READ
: IPS_CMD_WRITE
;
3732 scb
->cmd
.basic_io
.enhanced_sg
= 0;
3733 scb
->cmd
.basic_io
.sg_addr
=
3734 cpu_to_le32(scb
->data_busaddr
);
3736 scb
->cmd
.basic_io
.op_code
=
3737 (scb
->scsi_cmd
->cmnd
[0] ==
3738 READ_10
) ? IPS_CMD_READ_SG
:
3740 scb
->cmd
.basic_io
.enhanced_sg
=
3741 IPS_USE_ENH_SGLIST(ha
) ? 0xFF : 0;
3742 scb
->cmd
.basic_io
.sg_addr
=
3743 cpu_to_le32(scb
->sg_busaddr
);
3746 scb
->cmd
.basic_io
.segment_4G
= 0;
3747 scb
->cmd
.basic_io
.command_id
= IPS_COMMAND_ID(ha
, scb
);
3748 scb
->cmd
.basic_io
.log_drv
= scb
->target_id
;
3749 scb
->cmd
.basic_io
.sg_count
= scb
->sg_len
;
3751 if (scb
->cmd
.basic_io
.lba
)
3752 scb
->cmd
.basic_io
.lba
=
3753 cpu_to_le32(le32_to_cpu
3754 (scb
->cmd
.basic_io
.lba
) +
3755 le16_to_cpu(scb
->cmd
.basic_io
.
3758 scb
->cmd
.basic_io
.lba
=
3759 ((scb
->scsi_cmd
->cmnd
[2] << 24) | (scb
->
3763 (scb
->scsi_cmd
->cmnd
[4] << 8) | scb
->
3766 scb
->cmd
.basic_io
.sector_count
=
3767 cpu_to_le16(scb
->data_len
/ IPS_BLKSIZE
);
3769 if (cpu_to_le16(scb
->cmd
.basic_io
.sector_count
) == 0) {
3771 * This is a null condition
3772 * we don't have to do anything
3775 scb
->scsi_cmd
->result
= DID_OK
<< 16;
3783 scb
->scsi_cmd
->result
= DID_OK
<< 16;
3787 scb
->cmd
.basic_io
.op_code
= IPS_CMD_ENQUIRY
;
3788 scb
->cmd
.basic_io
.command_id
= IPS_COMMAND_ID(ha
, scb
);
3789 scb
->cmd
.basic_io
.segment_4G
= 0;
3790 scb
->cmd
.basic_io
.enhanced_sg
= 0;
3791 scb
->data_len
= sizeof (*ha
->enq
);
3792 scb
->cmd
.basic_io
.sg_addr
= ha
->enq_busaddr
;
3797 scb
->cmd
.logical_info
.op_code
= IPS_CMD_GET_LD_INFO
;
3798 scb
->cmd
.logical_info
.command_id
= IPS_COMMAND_ID(ha
, scb
);
3799 scb
->cmd
.logical_info
.reserved
= 0;
3800 scb
->cmd
.logical_info
.reserved2
= 0;
3801 scb
->cmd
.logical_info
.reserved3
= 0;
3802 scb
->data_len
= sizeof (IPS_LD_INFO
);
3803 scb
->data_busaddr
= ha
->logical_drive_info_dma_addr
;
3805 scb
->cmd
.logical_info
.buffer_addr
= scb
->data_busaddr
;
3809 case SEND_DIAGNOSTIC
:
3810 case REASSIGN_BLOCKS
:
3814 case READ_DEFECT_DATA
:
3817 scb
->scsi_cmd
->result
= DID_OK
<< 16;
3821 /* Set the Return Info to appear like the Command was */
3822 /* attempted, a Check Condition occurred, and Sense */
3823 /* Data indicating an Invalid CDB OpCode is returned. */
3824 sp
= (char *) scb
->scsi_cmd
->sense_buffer
;
3825 memset(sp
, 0, sizeof (scb
->scsi_cmd
->sense_buffer
));
3827 sp
[0] = 0x70; /* Error Code */
3828 sp
[2] = ILLEGAL_REQUEST
; /* Sense Key 5 Illegal Req. */
3829 sp
[7] = 0x0A; /* Additional Sense Length */
3830 sp
[12] = 0x20; /* ASC = Invalid OpCode */
3831 sp
[13] = 0x00; /* ASCQ */
3833 device_error
= 2; /* Indicate Check Condition */
3834 scb
->scsi_cmd
->result
= device_error
| (DID_OK
<< 16);
3839 if (ret
== IPS_SUCCESS_IMM
)
3845 /* If we already know the Device is Not there, no need to attempt a Command */
3846 /* This also protects an NT FailOver Controller from getting CDB's sent to it */
3847 if (ha
->conf
->dev
[scb
->bus
- 1][scb
->target_id
].ucState
== 0) {
3848 scb
->scsi_cmd
->result
= DID_NO_CONNECT
<< 16;
3849 return (IPS_SUCCESS_IMM
);
3852 ha
->dcdb_active
[scb
->bus
- 1] |= (1 << scb
->target_id
);
3853 scb
->cmd
.dcdb
.command_id
= IPS_COMMAND_ID(ha
, scb
);
3854 scb
->cmd
.dcdb
.dcdb_address
= cpu_to_le32(scb
->scb_busaddr
+
3855 (unsigned long) &scb
->
3857 (unsigned long) scb
);
3858 scb
->cmd
.dcdb
.reserved
= 0;
3859 scb
->cmd
.dcdb
.reserved2
= 0;
3860 scb
->cmd
.dcdb
.reserved3
= 0;
3861 scb
->cmd
.dcdb
.segment_4G
= 0;
3862 scb
->cmd
.dcdb
.enhanced_sg
= 0;
3864 TimeOut
= scb
->scsi_cmd
->timeout_per_command
;
3866 if (ha
->subsys
->param
[4] & 0x00100000) { /* If NEW Tape DCDB is Supported */
3868 scb
->cmd
.dcdb
.op_code
= IPS_CMD_EXTENDED_DCDB
;
3870 scb
->cmd
.dcdb
.op_code
=
3871 IPS_CMD_EXTENDED_DCDB_SG
;
3872 scb
->cmd
.dcdb
.enhanced_sg
=
3873 IPS_USE_ENH_SGLIST(ha
) ? 0xFF : 0;
3876 tapeDCDB
= (IPS_DCDB_TABLE_TAPE
*) & scb
->dcdb
; /* Use Same Data Area as Old DCDB Struct */
3877 tapeDCDB
->device_address
=
3878 ((scb
->bus
- 1) << 4) | scb
->target_id
;
3879 tapeDCDB
->cmd_attribute
|= IPS_DISCONNECT_ALLOWED
;
3880 tapeDCDB
->cmd_attribute
&= ~IPS_TRANSFER64K
; /* Always Turn OFF 64K Size Flag */
3883 if (TimeOut
< (10 * HZ
))
3884 tapeDCDB
->cmd_attribute
|= IPS_TIMEOUT10
; /* TimeOut is 10 Seconds */
3885 else if (TimeOut
< (60 * HZ
))
3886 tapeDCDB
->cmd_attribute
|= IPS_TIMEOUT60
; /* TimeOut is 60 Seconds */
3887 else if (TimeOut
< (1200 * HZ
))
3888 tapeDCDB
->cmd_attribute
|= IPS_TIMEOUT20M
; /* TimeOut is 20 Minutes */
3891 tapeDCDB
->cdb_length
= scb
->scsi_cmd
->cmd_len
;
3892 tapeDCDB
->reserved_for_LUN
= 0;
3893 tapeDCDB
->transfer_length
= scb
->data_len
;
3894 if (scb
->cmd
.dcdb
.op_code
== IPS_CMD_EXTENDED_DCDB_SG
)
3895 tapeDCDB
->buffer_pointer
=
3896 cpu_to_le32(scb
->sg_busaddr
);
3898 tapeDCDB
->buffer_pointer
=
3899 cpu_to_le32(scb
->data_busaddr
);
3900 tapeDCDB
->sg_count
= scb
->sg_len
;
3901 tapeDCDB
->sense_length
= sizeof (tapeDCDB
->sense_info
);
3902 tapeDCDB
->scsi_status
= 0;
3903 tapeDCDB
->reserved
= 0;
3904 memcpy(tapeDCDB
->scsi_cdb
, scb
->scsi_cmd
->cmnd
,
3905 scb
->scsi_cmd
->cmd_len
);
3908 scb
->cmd
.dcdb
.op_code
= IPS_CMD_DCDB
;
3910 scb
->cmd
.dcdb
.op_code
= IPS_CMD_DCDB_SG
;
3911 scb
->cmd
.dcdb
.enhanced_sg
=
3912 IPS_USE_ENH_SGLIST(ha
) ? 0xFF : 0;
3915 scb
->dcdb
.device_address
=
3916 ((scb
->bus
- 1) << 4) | scb
->target_id
;
3917 scb
->dcdb
.cmd_attribute
|= IPS_DISCONNECT_ALLOWED
;
3920 if (TimeOut
< (10 * HZ
))
3921 scb
->dcdb
.cmd_attribute
|= IPS_TIMEOUT10
; /* TimeOut is 10 Seconds */
3922 else if (TimeOut
< (60 * HZ
))
3923 scb
->dcdb
.cmd_attribute
|= IPS_TIMEOUT60
; /* TimeOut is 60 Seconds */
3924 else if (TimeOut
< (1200 * HZ
))
3925 scb
->dcdb
.cmd_attribute
|= IPS_TIMEOUT20M
; /* TimeOut is 20 Minutes */
3928 scb
->dcdb
.transfer_length
= scb
->data_len
;
3929 if (scb
->dcdb
.cmd_attribute
& IPS_TRANSFER64K
)
3930 scb
->dcdb
.transfer_length
= 0;
3931 if (scb
->cmd
.dcdb
.op_code
== IPS_CMD_DCDB_SG
)
3932 scb
->dcdb
.buffer_pointer
=
3933 cpu_to_le32(scb
->sg_busaddr
);
3935 scb
->dcdb
.buffer_pointer
=
3936 cpu_to_le32(scb
->data_busaddr
);
3937 scb
->dcdb
.cdb_length
= scb
->scsi_cmd
->cmd_len
;
3938 scb
->dcdb
.sense_length
= sizeof (scb
->dcdb
.sense_info
);
3939 scb
->dcdb
.sg_count
= scb
->sg_len
;
3940 scb
->dcdb
.reserved
= 0;
3941 memcpy(scb
->dcdb
.scsi_cdb
, scb
->scsi_cmd
->cmnd
,
3942 scb
->scsi_cmd
->cmd_len
);
3943 scb
->dcdb
.scsi_status
= 0;
3944 scb
->dcdb
.reserved2
[0] = 0;
3945 scb
->dcdb
.reserved2
[1] = 0;
3946 scb
->dcdb
.reserved2
[2] = 0;
3950 return ((*ha
->func
.issue
) (ha
, scb
));
3953 /****************************************************************************/
3955 /* Routine Name: ips_chk_status */
3957 /* Routine Description: */
3959 /* Check the status of commands to logical drives */
3960 /* Assumed to be called with the HA lock */
3961 /****************************************************************************/
3963 ips_chkstatus(ips_ha_t
* ha
, IPS_STATUS
* pstatus
)
3967 uint8_t basic_status
;
3970 IPS_SCSI_INQ_DATA inquiryData
;
3972 METHOD_TRACE("ips_chkstatus", 1);
3974 scb
= &ha
->scbs
[pstatus
->fields
.command_id
];
3975 scb
->basic_status
= basic_status
=
3976 pstatus
->fields
.basic_status
& IPS_BASIC_STATUS_MASK
;
3977 scb
->extended_status
= ext_status
= pstatus
->fields
.extended_status
;
3980 sp
->residue_len
= 0;
3981 sp
->scb_addr
= (void *) scb
;
3983 /* Remove the item from the active queue */
3984 ips_removeq_scb(&ha
->scb_activelist
, scb
);
3987 /* internal commands are handled in do_ipsintr */
3990 DEBUG_VAR(2, "(%s%d) ips_chkstatus: cmd 0x%X id %d (%d %d %d)",
3994 scb
->cmd
.basic_io
.command_id
,
3995 scb
->bus
, scb
->target_id
, scb
->lun
);
3997 if ((scb
->scsi_cmd
) && (ips_is_passthru(scb
->scsi_cmd
)))
3998 /* passthru - just returns the raw result */
4003 if (((basic_status
& IPS_GSC_STATUS_MASK
) == IPS_CMD_SUCCESS
) ||
4004 ((basic_status
& IPS_GSC_STATUS_MASK
) == IPS_CMD_RECOVERED_ERROR
)) {
4006 if (scb
->bus
== 0) {
4007 if ((basic_status
& IPS_GSC_STATUS_MASK
) ==
4008 IPS_CMD_RECOVERED_ERROR
) {
4010 "(%s%d) Recovered Logical Drive Error OpCode: %x, BSB: %x, ESB: %x",
4011 ips_name
, ha
->host_num
,
4012 scb
->cmd
.basic_io
.op_code
,
4013 basic_status
, ext_status
);
4016 switch (scb
->scsi_cmd
->cmnd
[0]) {
4017 case ALLOW_MEDIUM_REMOVAL
:
4020 case WRITE_FILEMARKS
:
4022 errcode
= DID_ERROR
;
4028 case TEST_UNIT_READY
:
4029 if (!ips_online(ha
, scb
)) {
4030 errcode
= DID_TIME_OUT
;
4035 if (ips_online(ha
, scb
)) {
4036 ips_inquiry(ha
, scb
);
4038 errcode
= DID_TIME_OUT
;
4043 ips_reqsen(ha
, scb
);
4055 if (!ips_online(ha
, scb
)
4056 || !ips_msense(ha
, scb
)) {
4057 errcode
= DID_ERROR
;
4062 if (ips_online(ha
, scb
))
4065 errcode
= DID_TIME_OUT
;
4069 case SEND_DIAGNOSTIC
:
4070 case REASSIGN_BLOCKS
:
4074 errcode
= DID_ERROR
;
4079 case READ_DEFECT_DATA
:
4085 errcode
= DID_ERROR
;
4088 scb
->scsi_cmd
->result
= errcode
<< 16;
4089 } else { /* bus == 0 */
4090 /* restrict access to physical drives */
4091 if (scb
->scsi_cmd
->cmnd
[0] == INQUIRY
) {
4092 ips_scmd_buf_read(scb
->scsi_cmd
,
4093 &inquiryData
, sizeof (inquiryData
));
4094 if ((inquiryData
.DeviceType
& 0x1f) == TYPE_DISK
)
4095 scb
->scsi_cmd
->result
= DID_TIME_OUT
<< 16;
4098 } else { /* recovered error / success */
4099 if (scb
->bus
== 0) {
4101 "(%s%d) Unrecovered Logical Drive Error OpCode: %x, BSB: %x, ESB: %x",
4102 ips_name
, ha
->host_num
,
4103 scb
->cmd
.basic_io
.op_code
, basic_status
,
4107 ips_map_status(ha
, scb
, sp
);
4111 /****************************************************************************/
4113 /* Routine Name: ips_online */
4115 /* Routine Description: */
4117 /* Determine if a logical drive is online */
4119 /****************************************************************************/
4121 ips_online(ips_ha_t
* ha
, ips_scb_t
* scb
)
4123 METHOD_TRACE("ips_online", 1);
4125 if (scb
->target_id
>= IPS_MAX_LD
)
4128 if ((scb
->basic_status
& IPS_GSC_STATUS_MASK
) > 1) {
4129 memset(ha
->logical_drive_info
, 0, sizeof (IPS_LD_INFO
));
4133 if (ha
->logical_drive_info
->drive_info
[scb
->target_id
].state
!=
4135 && ha
->logical_drive_info
->drive_info
[scb
->target_id
].state
!=
4137 && ha
->logical_drive_info
->drive_info
[scb
->target_id
].state
!=
4139 && ha
->logical_drive_info
->drive_info
[scb
->target_id
].state
!=
4146 /****************************************************************************/
4148 /* Routine Name: ips_inquiry */
4150 /* Routine Description: */
4152 /* Simulate an inquiry command to a logical drive */
4154 /****************************************************************************/
4156 ips_inquiry(ips_ha_t
* ha
, ips_scb_t
* scb
)
4158 IPS_SCSI_INQ_DATA inquiry
;
4160 METHOD_TRACE("ips_inquiry", 1);
4162 memset(&inquiry
, 0, sizeof (IPS_SCSI_INQ_DATA
));
4164 inquiry
.DeviceType
= IPS_SCSI_INQ_TYPE_DASD
;
4165 inquiry
.DeviceTypeQualifier
= IPS_SCSI_INQ_LU_CONNECTED
;
4166 inquiry
.Version
= IPS_SCSI_INQ_REV2
;
4167 inquiry
.ResponseDataFormat
= IPS_SCSI_INQ_RD_REV2
;
4168 inquiry
.AdditionalLength
= 31;
4169 inquiry
.Flags
[0] = IPS_SCSI_INQ_Address16
;
4171 IPS_SCSI_INQ_WBus16
| IPS_SCSI_INQ_Sync
| IPS_SCSI_INQ_CmdQue
;
4172 strncpy(inquiry
.VendorId
, "IBM ", 8);
4173 strncpy(inquiry
.ProductId
, "SERVERAID ", 16);
4174 strncpy(inquiry
.ProductRevisionLevel
, "1.00", 4);
4176 ips_scmd_buf_write(scb
->scsi_cmd
, &inquiry
, sizeof (inquiry
));
4181 /****************************************************************************/
4183 /* Routine Name: ips_rdcap */
4185 /* Routine Description: */
4187 /* Simulate a read capacity command to a logical drive */
4189 /****************************************************************************/
4191 ips_rdcap(ips_ha_t
* ha
, ips_scb_t
* scb
)
4193 IPS_SCSI_CAPACITY cap
;
4195 METHOD_TRACE("ips_rdcap", 1);
4197 if (scsi_bufflen(scb
->scsi_cmd
) < 8)
4201 cpu_to_be32(le32_to_cpu
4202 (ha
->logical_drive_info
->
4203 drive_info
[scb
->target_id
].sector_count
) - 1);
4204 cap
.len
= cpu_to_be32((uint32_t) IPS_BLKSIZE
);
4206 ips_scmd_buf_write(scb
->scsi_cmd
, &cap
, sizeof (cap
));
4211 /****************************************************************************/
4213 /* Routine Name: ips_msense */
4215 /* Routine Description: */
4217 /* Simulate a mode sense command to a logical drive */
4219 /****************************************************************************/
4221 ips_msense(ips_ha_t
* ha
, ips_scb_t
* scb
)
4226 IPS_SCSI_MODE_PAGE_DATA mdata
;
4228 METHOD_TRACE("ips_msense", 1);
4230 if (le32_to_cpu(ha
->enq
->ulDriveSize
[scb
->target_id
]) > 0x400000 &&
4231 (ha
->enq
->ucMiscFlag
& 0x8) == 0) {
4232 heads
= IPS_NORM_HEADS
;
4233 sectors
= IPS_NORM_SECTORS
;
4235 heads
= IPS_COMP_HEADS
;
4236 sectors
= IPS_COMP_SECTORS
;
4240 (le32_to_cpu(ha
->enq
->ulDriveSize
[scb
->target_id
]) -
4241 1) / (heads
* sectors
);
4243 memset(&mdata
, 0, sizeof (IPS_SCSI_MODE_PAGE_DATA
));
4245 mdata
.hdr
.BlockDescLength
= 8;
4247 switch (scb
->scsi_cmd
->cmnd
[2] & 0x3f) {
4248 case 0x03: /* page 3 */
4249 mdata
.pdata
.pg3
.PageCode
= 3;
4250 mdata
.pdata
.pg3
.PageLength
= sizeof (IPS_SCSI_MODE_PAGE3
);
4251 mdata
.hdr
.DataLength
=
4252 3 + mdata
.hdr
.BlockDescLength
+ mdata
.pdata
.pg3
.PageLength
;
4253 mdata
.pdata
.pg3
.TracksPerZone
= 0;
4254 mdata
.pdata
.pg3
.AltSectorsPerZone
= 0;
4255 mdata
.pdata
.pg3
.AltTracksPerZone
= 0;
4256 mdata
.pdata
.pg3
.AltTracksPerVolume
= 0;
4257 mdata
.pdata
.pg3
.SectorsPerTrack
= cpu_to_be16(sectors
);
4258 mdata
.pdata
.pg3
.BytesPerSector
= cpu_to_be16(IPS_BLKSIZE
);
4259 mdata
.pdata
.pg3
.Interleave
= cpu_to_be16(1);
4260 mdata
.pdata
.pg3
.TrackSkew
= 0;
4261 mdata
.pdata
.pg3
.CylinderSkew
= 0;
4262 mdata
.pdata
.pg3
.flags
= IPS_SCSI_MP3_SoftSector
;
4266 mdata
.pdata
.pg4
.PageCode
= 4;
4267 mdata
.pdata
.pg4
.PageLength
= sizeof (IPS_SCSI_MODE_PAGE4
);
4268 mdata
.hdr
.DataLength
=
4269 3 + mdata
.hdr
.BlockDescLength
+ mdata
.pdata
.pg4
.PageLength
;
4270 mdata
.pdata
.pg4
.CylindersHigh
=
4271 cpu_to_be16((cylinders
>> 8) & 0xFFFF);
4272 mdata
.pdata
.pg4
.CylindersLow
= (cylinders
& 0xFF);
4273 mdata
.pdata
.pg4
.Heads
= heads
;
4274 mdata
.pdata
.pg4
.WritePrecompHigh
= 0;
4275 mdata
.pdata
.pg4
.WritePrecompLow
= 0;
4276 mdata
.pdata
.pg4
.ReducedWriteCurrentHigh
= 0;
4277 mdata
.pdata
.pg4
.ReducedWriteCurrentLow
= 0;
4278 mdata
.pdata
.pg4
.StepRate
= cpu_to_be16(1);
4279 mdata
.pdata
.pg4
.LandingZoneHigh
= 0;
4280 mdata
.pdata
.pg4
.LandingZoneLow
= 0;
4281 mdata
.pdata
.pg4
.flags
= 0;
4282 mdata
.pdata
.pg4
.RotationalOffset
= 0;
4283 mdata
.pdata
.pg4
.MediumRotationRate
= 0;
4286 mdata
.pdata
.pg8
.PageCode
= 8;
4287 mdata
.pdata
.pg8
.PageLength
= sizeof (IPS_SCSI_MODE_PAGE8
);
4288 mdata
.hdr
.DataLength
=
4289 3 + mdata
.hdr
.BlockDescLength
+ mdata
.pdata
.pg8
.PageLength
;
4290 /* everything else is left set to 0 */
4297 ips_scmd_buf_write(scb
->scsi_cmd
, &mdata
, sizeof (mdata
));
4302 /****************************************************************************/
4304 /* Routine Name: ips_reqsen */
4306 /* Routine Description: */
4308 /* Simulate a request sense command to a logical drive */
4310 /****************************************************************************/
4312 ips_reqsen(ips_ha_t
* ha
, ips_scb_t
* scb
)
4314 IPS_SCSI_REQSEN reqsen
;
4316 METHOD_TRACE("ips_reqsen", 1);
4318 memset(&reqsen
, 0, sizeof (IPS_SCSI_REQSEN
));
4320 reqsen
.ResponseCode
=
4321 IPS_SCSI_REQSEN_VALID
| IPS_SCSI_REQSEN_CURRENT_ERR
;
4322 reqsen
.AdditionalLength
= 10;
4323 reqsen
.AdditionalSenseCode
= IPS_SCSI_REQSEN_NO_SENSE
;
4324 reqsen
.AdditionalSenseCodeQual
= IPS_SCSI_REQSEN_NO_SENSE
;
4326 ips_scmd_buf_write(scb
->scsi_cmd
, &reqsen
, sizeof (reqsen
));
4331 /****************************************************************************/
4333 /* Routine Name: ips_free */
4335 /* Routine Description: */
4337 /* Free any allocated space for this controller */
4339 /****************************************************************************/
4341 ips_free(ips_ha_t
* ha
)
4344 METHOD_TRACE("ips_free", 1);
4348 pci_free_consistent(ha
->pcidev
, sizeof(IPS_ENQ
),
4349 ha
->enq
, ha
->enq_busaddr
);
4357 pci_free_consistent(ha
->pcidev
,
4358 sizeof (IPS_ADAPTER
) +
4359 sizeof (IPS_IO_CMD
), ha
->adapt
,
4360 ha
->adapt
->hw_status_start
);
4364 if (ha
->logical_drive_info
) {
4365 pci_free_consistent(ha
->pcidev
,
4366 sizeof (IPS_LD_INFO
),
4367 ha
->logical_drive_info
,
4368 ha
->logical_drive_info_dma_addr
);
4369 ha
->logical_drive_info
= NULL
;
4378 if (ha
->ioctl_data
) {
4379 pci_free_consistent(ha
->pcidev
, ha
->ioctl_len
,
4380 ha
->ioctl_data
, ha
->ioctl_busaddr
);
4381 ha
->ioctl_data
= NULL
;
4382 ha
->ioctl_datasize
= 0;
4385 ips_deallocatescbs(ha
, ha
->max_cmds
);
4387 /* free memory mapped (if applicable) */
4389 iounmap(ha
->ioremap_ptr
);
4390 ha
->ioremap_ptr
= NULL
;
4395 release_mem_region(ha
->mem_addr
, ha
->mem_len
);
4401 /****************************************************************************/
4403 /* Routine Name: ips_deallocatescbs */
4405 /* Routine Description: */
4407 /* Free the command blocks */
4409 /****************************************************************************/
4411 ips_deallocatescbs(ips_ha_t
* ha
, int cmds
)
4414 pci_free_consistent(ha
->pcidev
,
4415 IPS_SGLIST_SIZE(ha
) * IPS_MAX_SG
* cmds
,
4416 ha
->scbs
->sg_list
.list
,
4417 ha
->scbs
->sg_busaddr
);
4418 pci_free_consistent(ha
->pcidev
, sizeof (ips_scb_t
) * cmds
,
4419 ha
->scbs
, ha
->scbs
->scb_busaddr
);
4425 /****************************************************************************/
4427 /* Routine Name: ips_allocatescbs */
4429 /* Routine Description: */
4431 /* Allocate the command blocks */
4433 /****************************************************************************/
4435 ips_allocatescbs(ips_ha_t
* ha
)
4440 dma_addr_t command_dma
, sg_dma
;
4442 METHOD_TRACE("ips_allocatescbs", 1);
4444 /* Allocate memory for the SCBs */
4446 pci_alloc_consistent(ha
->pcidev
, ha
->max_cmds
* sizeof (ips_scb_t
),
4448 if (ha
->scbs
== NULL
)
4451 pci_alloc_consistent(ha
->pcidev
,
4452 IPS_SGLIST_SIZE(ha
) * IPS_MAX_SG
*
4453 ha
->max_cmds
, &sg_dma
);
4454 if (ips_sg
.list
== NULL
) {
4455 pci_free_consistent(ha
->pcidev
,
4456 ha
->max_cmds
* sizeof (ips_scb_t
), ha
->scbs
,
4461 memset(ha
->scbs
, 0, ha
->max_cmds
* sizeof (ips_scb_t
));
4463 for (i
= 0; i
< ha
->max_cmds
; i
++) {
4464 scb_p
= &ha
->scbs
[i
];
4465 scb_p
->scb_busaddr
= command_dma
+ sizeof (ips_scb_t
) * i
;
4466 /* set up S/G list */
4467 if (IPS_USE_ENH_SGLIST(ha
)) {
4468 scb_p
->sg_list
.enh_list
=
4469 ips_sg
.enh_list
+ i
* IPS_MAX_SG
;
4471 sg_dma
+ IPS_SGLIST_SIZE(ha
) * IPS_MAX_SG
* i
;
4473 scb_p
->sg_list
.std_list
=
4474 ips_sg
.std_list
+ i
* IPS_MAX_SG
;
4476 sg_dma
+ IPS_SGLIST_SIZE(ha
) * IPS_MAX_SG
* i
;
4479 /* add to the free list */
4480 if (i
< ha
->max_cmds
- 1) {
4481 scb_p
->q_next
= ha
->scb_freelist
;
4482 ha
->scb_freelist
= scb_p
;
4490 /****************************************************************************/
4492 /* Routine Name: ips_init_scb */
4494 /* Routine Description: */
4496 /* Initialize a CCB to default values */
4498 /****************************************************************************/
4500 ips_init_scb(ips_ha_t
* ha
, ips_scb_t
* scb
)
4502 IPS_SG_LIST sg_list
;
4503 uint32_t cmd_busaddr
, sg_busaddr
;
4504 METHOD_TRACE("ips_init_scb", 1);
4509 sg_list
.list
= scb
->sg_list
.list
;
4510 cmd_busaddr
= scb
->scb_busaddr
;
4511 sg_busaddr
= scb
->sg_busaddr
;
4513 memset(scb
, 0, sizeof (ips_scb_t
));
4514 memset(ha
->dummy
, 0, sizeof (IPS_IO_CMD
));
4516 /* Initialize dummy command bucket */
4517 ha
->dummy
->op_code
= 0xFF;
4518 ha
->dummy
->ccsar
= cpu_to_le32(ha
->adapt
->hw_status_start
4519 + sizeof (IPS_ADAPTER
));
4520 ha
->dummy
->command_id
= IPS_MAX_CMDS
;
4522 /* set bus address of scb */
4523 scb
->scb_busaddr
= cmd_busaddr
;
4524 scb
->sg_busaddr
= sg_busaddr
;
4525 scb
->sg_list
.list
= sg_list
.list
;
4528 scb
->cmd
.basic_io
.cccr
= cpu_to_le32((uint32_t) IPS_BIT_ILE
);
4529 scb
->cmd
.basic_io
.ccsar
= cpu_to_le32(ha
->adapt
->hw_status_start
4530 + sizeof (IPS_ADAPTER
));
4533 /****************************************************************************/
4535 /* Routine Name: ips_get_scb */
4537 /* Routine Description: */
4539 /* Initialize a CCB to default values */
4541 /* ASSUMED to be callled from within a lock */
4543 /****************************************************************************/
4545 ips_getscb(ips_ha_t
* ha
)
4549 METHOD_TRACE("ips_getscb", 1);
4551 if ((scb
= ha
->scb_freelist
) == NULL
) {
4556 ha
->scb_freelist
= scb
->q_next
;
4560 ips_init_scb(ha
, scb
);
4565 /****************************************************************************/
4567 /* Routine Name: ips_free_scb */
4569 /* Routine Description: */
4571 /* Return an unused CCB back to the free list */
4573 /* ASSUMED to be called from within a lock */
4575 /****************************************************************************/
4577 ips_freescb(ips_ha_t
* ha
, ips_scb_t
* scb
)
4580 METHOD_TRACE("ips_freescb", 1);
4581 if (scb
->flags
& IPS_SCB_MAP_SG
)
4582 scsi_dma_unmap(scb
->scsi_cmd
);
4583 else if (scb
->flags
& IPS_SCB_MAP_SINGLE
)
4584 pci_unmap_single(ha
->pcidev
, scb
->data_busaddr
, scb
->data_len
,
4587 /* check to make sure this is not our "special" scb */
4588 if (IPS_COMMAND_ID(ha
, scb
) < (ha
->max_cmds
- 1)) {
4589 scb
->q_next
= ha
->scb_freelist
;
4590 ha
->scb_freelist
= scb
;
4594 /****************************************************************************/
4596 /* Routine Name: ips_isinit_copperhead */
4598 /* Routine Description: */
4600 /* Is controller initialized ? */
4602 /****************************************************************************/
4604 ips_isinit_copperhead(ips_ha_t
* ha
)
4609 METHOD_TRACE("ips_isinit_copperhead", 1);
4611 isr
= inb(ha
->io_addr
+ IPS_REG_HISR
);
4612 scpr
= inb(ha
->io_addr
+ IPS_REG_SCPR
);
4614 if (((isr
& IPS_BIT_EI
) == 0) && ((scpr
& IPS_BIT_EBM
) == 0))
4620 /****************************************************************************/
4622 /* Routine Name: ips_isinit_copperhead_memio */
4624 /* Routine Description: */
4626 /* Is controller initialized ? */
4628 /****************************************************************************/
4630 ips_isinit_copperhead_memio(ips_ha_t
* ha
)
4635 METHOD_TRACE("ips_is_init_copperhead_memio", 1);
4637 isr
= readb(ha
->mem_ptr
+ IPS_REG_HISR
);
4638 scpr
= readb(ha
->mem_ptr
+ IPS_REG_SCPR
);
4640 if (((isr
& IPS_BIT_EI
) == 0) && ((scpr
& IPS_BIT_EBM
) == 0))
4646 /****************************************************************************/
4648 /* Routine Name: ips_isinit_morpheus */
4650 /* Routine Description: */
4652 /* Is controller initialized ? */
4654 /****************************************************************************/
4656 ips_isinit_morpheus(ips_ha_t
* ha
)
4661 METHOD_TRACE("ips_is_init_morpheus", 1);
4663 if (ips_isintr_morpheus(ha
))
4664 ips_flush_and_reset(ha
);
4666 post
= readl(ha
->mem_ptr
+ IPS_REG_I960_MSG0
);
4667 bits
= readl(ha
->mem_ptr
+ IPS_REG_I2O_HIR
);
4671 else if (bits
& 0x3)
4677 /****************************************************************************/
4679 /* Routine Name: ips_flush_and_reset */
4681 /* Routine Description: */
4683 /* Perform cleanup ( FLUSH and RESET ) when the adapter is in an unknown */
4684 /* state ( was trying to INIT and an interrupt was already pending ) ... */
4686 /****************************************************************************/
4688 ips_flush_and_reset(ips_ha_t
*ha
)
4694 dma_addr_t command_dma
;
4696 /* Create a usuable SCB */
4697 scb
= pci_alloc_consistent(ha
->pcidev
, sizeof(ips_scb_t
), &command_dma
);
4699 memset(scb
, 0, sizeof(ips_scb_t
));
4700 ips_init_scb(ha
, scb
);
4701 scb
->scb_busaddr
= command_dma
;
4703 scb
->timeout
= ips_cmd_timeout
;
4704 scb
->cdb
[0] = IPS_CMD_FLUSH
;
4706 scb
->cmd
.flush_cache
.op_code
= IPS_CMD_FLUSH
;
4707 scb
->cmd
.flush_cache
.command_id
= IPS_MAX_CMDS
; /* Use an ID that would otherwise not exist */
4708 scb
->cmd
.flush_cache
.state
= IPS_NORM_STATE
;
4709 scb
->cmd
.flush_cache
.reserved
= 0;
4710 scb
->cmd
.flush_cache
.reserved2
= 0;
4711 scb
->cmd
.flush_cache
.reserved3
= 0;
4712 scb
->cmd
.flush_cache
.reserved4
= 0;
4714 ret
= ips_send_cmd(ha
, scb
); /* Send the Flush Command */
4716 if (ret
== IPS_SUCCESS
) {
4717 time
= 60 * IPS_ONE_SEC
; /* Max Wait time is 60 seconds */
4720 while ((time
> 0) && (!done
)) {
4721 done
= ips_poll_for_flush_complete(ha
);
4722 /* This may look evil, but it's only done during extremely rare start-up conditions ! */
4729 /* Now RESET and INIT the adapter */
4730 (*ha
->func
.reset
) (ha
);
4732 pci_free_consistent(ha
->pcidev
, sizeof(ips_scb_t
), scb
, command_dma
);
4736 /****************************************************************************/
4738 /* Routine Name: ips_poll_for_flush_complete */
4740 /* Routine Description: */
4742 /* Poll for the Flush Command issued by ips_flush_and_reset() to complete */
4743 /* All other responses are just taken off the queue and ignored */
4745 /****************************************************************************/
4747 ips_poll_for_flush_complete(ips_ha_t
* ha
)
4752 cstatus
.value
= (*ha
->func
.statupd
) (ha
);
4754 if (cstatus
.value
== 0xffffffff) /* If No Interrupt to process */
4757 /* Success is when we see the Flush Command ID */
4758 if (cstatus
.fields
.command_id
== IPS_MAX_CMDS
)
4765 /****************************************************************************/
4767 /* Routine Name: ips_enable_int_copperhead */
4769 /* Routine Description: */
4770 /* Turn on interrupts */
4772 /****************************************************************************/
4774 ips_enable_int_copperhead(ips_ha_t
* ha
)
4776 METHOD_TRACE("ips_enable_int_copperhead", 1);
4778 outb(ha
->io_addr
+ IPS_REG_HISR
, IPS_BIT_EI
);
4779 inb(ha
->io_addr
+ IPS_REG_HISR
); /*Ensure PCI Posting Completes*/
4782 /****************************************************************************/
4784 /* Routine Name: ips_enable_int_copperhead_memio */
4786 /* Routine Description: */
4787 /* Turn on interrupts */
4789 /****************************************************************************/
4791 ips_enable_int_copperhead_memio(ips_ha_t
* ha
)
4793 METHOD_TRACE("ips_enable_int_copperhead_memio", 1);
4795 writeb(IPS_BIT_EI
, ha
->mem_ptr
+ IPS_REG_HISR
);
4796 readb(ha
->mem_ptr
+ IPS_REG_HISR
); /*Ensure PCI Posting Completes*/
4799 /****************************************************************************/
4801 /* Routine Name: ips_enable_int_morpheus */
4803 /* Routine Description: */
4804 /* Turn on interrupts */
4806 /****************************************************************************/
4808 ips_enable_int_morpheus(ips_ha_t
* ha
)
4812 METHOD_TRACE("ips_enable_int_morpheus", 1);
4814 Oimr
= readl(ha
->mem_ptr
+ IPS_REG_I960_OIMR
);
4816 writel(Oimr
, ha
->mem_ptr
+ IPS_REG_I960_OIMR
);
4817 readl(ha
->mem_ptr
+ IPS_REG_I960_OIMR
); /*Ensure PCI Posting Completes*/
4820 /****************************************************************************/
4822 /* Routine Name: ips_init_copperhead */
4824 /* Routine Description: */
4826 /* Initialize a copperhead controller */
4828 /****************************************************************************/
4830 ips_init_copperhead(ips_ha_t
* ha
)
4834 uint8_t PostByte
[IPS_MAX_POST_BYTES
];
4835 uint8_t ConfigByte
[IPS_MAX_CONFIG_BYTES
];
4838 METHOD_TRACE("ips_init_copperhead", 1);
4840 for (i
= 0; i
< IPS_MAX_POST_BYTES
; i
++) {
4841 for (j
= 0; j
< 45; j
++) {
4842 Isr
= inb(ha
->io_addr
+ IPS_REG_HISR
);
4843 if (Isr
& IPS_BIT_GHI
)
4846 /* Delay for 1 Second */
4847 MDELAY(IPS_ONE_SEC
);
4851 /* error occurred */
4854 PostByte
[i
] = inb(ha
->io_addr
+ IPS_REG_ISPR
);
4855 outb(Isr
, ha
->io_addr
+ IPS_REG_HISR
);
4858 if (PostByte
[0] < IPS_GOOD_POST_STATUS
) {
4859 IPS_PRINTK(KERN_WARNING
, ha
->pcidev
,
4860 "reset controller fails (post status %x %x).\n",
4861 PostByte
[0], PostByte
[1]);
4866 for (i
= 0; i
< IPS_MAX_CONFIG_BYTES
; i
++) {
4867 for (j
= 0; j
< 240; j
++) {
4868 Isr
= inb(ha
->io_addr
+ IPS_REG_HISR
);
4869 if (Isr
& IPS_BIT_GHI
)
4872 /* Delay for 1 Second */
4873 MDELAY(IPS_ONE_SEC
);
4877 /* error occurred */
4880 ConfigByte
[i
] = inb(ha
->io_addr
+ IPS_REG_ISPR
);
4881 outb(Isr
, ha
->io_addr
+ IPS_REG_HISR
);
4884 for (i
= 0; i
< 240; i
++) {
4885 Cbsp
= inb(ha
->io_addr
+ IPS_REG_CBSP
);
4887 if ((Cbsp
& IPS_BIT_OP
) == 0)
4890 /* Delay for 1 Second */
4891 MDELAY(IPS_ONE_SEC
);
4899 outl(cpu_to_le32(0x1010), ha
->io_addr
+ IPS_REG_CCCR
);
4901 /* Enable busmastering */
4902 outb(IPS_BIT_EBM
, ha
->io_addr
+ IPS_REG_SCPR
);
4904 if (ha
->revision_id
== IPS_REVID_TROMBONE64
)
4905 /* fix for anaconda64 */
4906 outl(0, ha
->io_addr
+ IPS_REG_NDAE
);
4908 /* Enable interrupts */
4909 outb(IPS_BIT_EI
, ha
->io_addr
+ IPS_REG_HISR
);
4914 /****************************************************************************/
4916 /* Routine Name: ips_init_copperhead_memio */
4918 /* Routine Description: */
4920 /* Initialize a copperhead controller with memory mapped I/O */
4922 /****************************************************************************/
4924 ips_init_copperhead_memio(ips_ha_t
* ha
)
4928 uint8_t PostByte
[IPS_MAX_POST_BYTES
];
4929 uint8_t ConfigByte
[IPS_MAX_CONFIG_BYTES
];
4932 METHOD_TRACE("ips_init_copperhead_memio", 1);
4934 for (i
= 0; i
< IPS_MAX_POST_BYTES
; i
++) {
4935 for (j
= 0; j
< 45; j
++) {
4936 Isr
= readb(ha
->mem_ptr
+ IPS_REG_HISR
);
4937 if (Isr
& IPS_BIT_GHI
)
4940 /* Delay for 1 Second */
4941 MDELAY(IPS_ONE_SEC
);
4945 /* error occurred */
4948 PostByte
[i
] = readb(ha
->mem_ptr
+ IPS_REG_ISPR
);
4949 writeb(Isr
, ha
->mem_ptr
+ IPS_REG_HISR
);
4952 if (PostByte
[0] < IPS_GOOD_POST_STATUS
) {
4953 IPS_PRINTK(KERN_WARNING
, ha
->pcidev
,
4954 "reset controller fails (post status %x %x).\n",
4955 PostByte
[0], PostByte
[1]);
4960 for (i
= 0; i
< IPS_MAX_CONFIG_BYTES
; i
++) {
4961 for (j
= 0; j
< 240; j
++) {
4962 Isr
= readb(ha
->mem_ptr
+ IPS_REG_HISR
);
4963 if (Isr
& IPS_BIT_GHI
)
4966 /* Delay for 1 Second */
4967 MDELAY(IPS_ONE_SEC
);
4971 /* error occurred */
4974 ConfigByte
[i
] = readb(ha
->mem_ptr
+ IPS_REG_ISPR
);
4975 writeb(Isr
, ha
->mem_ptr
+ IPS_REG_HISR
);
4978 for (i
= 0; i
< 240; i
++) {
4979 Cbsp
= readb(ha
->mem_ptr
+ IPS_REG_CBSP
);
4981 if ((Cbsp
& IPS_BIT_OP
) == 0)
4984 /* Delay for 1 Second */
4985 MDELAY(IPS_ONE_SEC
);
4989 /* error occurred */
4993 writel(0x1010, ha
->mem_ptr
+ IPS_REG_CCCR
);
4995 /* Enable busmastering */
4996 writeb(IPS_BIT_EBM
, ha
->mem_ptr
+ IPS_REG_SCPR
);
4998 if (ha
->revision_id
== IPS_REVID_TROMBONE64
)
4999 /* fix for anaconda64 */
5000 writel(0, ha
->mem_ptr
+ IPS_REG_NDAE
);
5002 /* Enable interrupts */
5003 writeb(IPS_BIT_EI
, ha
->mem_ptr
+ IPS_REG_HISR
);
5005 /* if we get here then everything went OK */
5009 /****************************************************************************/
5011 /* Routine Name: ips_init_morpheus */
5013 /* Routine Description: */
5015 /* Initialize a morpheus controller */
5017 /****************************************************************************/
5019 ips_init_morpheus(ips_ha_t
* ha
)
5027 METHOD_TRACE("ips_init_morpheus", 1);
5029 /* Wait up to 45 secs for Post */
5030 for (i
= 0; i
< 45; i
++) {
5031 Isr
= readl(ha
->mem_ptr
+ IPS_REG_I2O_HIR
);
5033 if (Isr
& IPS_BIT_I960_MSG0I
)
5036 /* Delay for 1 Second */
5037 MDELAY(IPS_ONE_SEC
);
5041 /* error occurred */
5042 IPS_PRINTK(KERN_WARNING
, ha
->pcidev
,
5043 "timeout waiting for post.\n");
5048 Post
= readl(ha
->mem_ptr
+ IPS_REG_I960_MSG0
);
5050 if (Post
== 0x4F00) { /* If Flashing the Battery PIC */
5051 IPS_PRINTK(KERN_WARNING
, ha
->pcidev
,
5052 "Flashing Battery PIC, Please wait ...\n");
5054 /* Clear the interrupt bit */
5055 Isr
= (uint32_t) IPS_BIT_I960_MSG0I
;
5056 writel(Isr
, ha
->mem_ptr
+ IPS_REG_I2O_HIR
);
5058 for (i
= 0; i
< 120; i
++) { /* Wait Up to 2 Min. for Completion */
5059 Post
= readl(ha
->mem_ptr
+ IPS_REG_I960_MSG0
);
5062 /* Delay for 1 Second */
5063 MDELAY(IPS_ONE_SEC
);
5067 IPS_PRINTK(KERN_WARNING
, ha
->pcidev
,
5068 "timeout waiting for Battery PIC Flash\n");
5074 /* Clear the interrupt bit */
5075 Isr
= (uint32_t) IPS_BIT_I960_MSG0I
;
5076 writel(Isr
, ha
->mem_ptr
+ IPS_REG_I2O_HIR
);
5078 if (Post
< (IPS_GOOD_POST_STATUS
<< 8)) {
5079 IPS_PRINTK(KERN_WARNING
, ha
->pcidev
,
5080 "reset controller fails (post status %x).\n", Post
);
5085 /* Wait up to 240 secs for config bytes */
5086 for (i
= 0; i
< 240; i
++) {
5087 Isr
= readl(ha
->mem_ptr
+ IPS_REG_I2O_HIR
);
5089 if (Isr
& IPS_BIT_I960_MSG1I
)
5092 /* Delay for 1 Second */
5093 MDELAY(IPS_ONE_SEC
);
5097 /* error occurred */
5098 IPS_PRINTK(KERN_WARNING
, ha
->pcidev
,
5099 "timeout waiting for config.\n");
5104 Config
= readl(ha
->mem_ptr
+ IPS_REG_I960_MSG1
);
5106 /* Clear interrupt bit */
5107 Isr
= (uint32_t) IPS_BIT_I960_MSG1I
;
5108 writel(Isr
, ha
->mem_ptr
+ IPS_REG_I2O_HIR
);
5110 /* Turn on the interrupts */
5111 Oimr
= readl(ha
->mem_ptr
+ IPS_REG_I960_OIMR
);
5113 writel(Oimr
, ha
->mem_ptr
+ IPS_REG_I960_OIMR
);
5115 /* if we get here then everything went OK */
5117 /* Since we did a RESET, an EraseStripeLock may be needed */
5118 if (Post
== 0xEF10) {
5119 if ((Config
== 0x000F) || (Config
== 0x0009))
5120 ha
->requires_esl
= 1;
5126 /****************************************************************************/
5128 /* Routine Name: ips_reset_copperhead */
5130 /* Routine Description: */
5132 /* Reset the controller */
5134 /****************************************************************************/
5136 ips_reset_copperhead(ips_ha_t
* ha
)
5140 METHOD_TRACE("ips_reset_copperhead", 1);
5142 DEBUG_VAR(1, "(%s%d) ips_reset_copperhead: io addr: %x, irq: %d",
5143 ips_name
, ha
->host_num
, ha
->io_addr
, ha
->irq
);
5147 while (reset_counter
< 2) {
5150 outb(IPS_BIT_RST
, ha
->io_addr
+ IPS_REG_SCPR
);
5152 /* Delay for 1 Second */
5153 MDELAY(IPS_ONE_SEC
);
5155 outb(0, ha
->io_addr
+ IPS_REG_SCPR
);
5157 /* Delay for 1 Second */
5158 MDELAY(IPS_ONE_SEC
);
5160 if ((*ha
->func
.init
) (ha
))
5162 else if (reset_counter
>= 2) {
5171 /****************************************************************************/
5173 /* Routine Name: ips_reset_copperhead_memio */
5175 /* Routine Description: */
5177 /* Reset the controller */
5179 /****************************************************************************/
5181 ips_reset_copperhead_memio(ips_ha_t
* ha
)
5185 METHOD_TRACE("ips_reset_copperhead_memio", 1);
5187 DEBUG_VAR(1, "(%s%d) ips_reset_copperhead_memio: mem addr: %x, irq: %d",
5188 ips_name
, ha
->host_num
, ha
->mem_addr
, ha
->irq
);
5192 while (reset_counter
< 2) {
5195 writeb(IPS_BIT_RST
, ha
->mem_ptr
+ IPS_REG_SCPR
);
5197 /* Delay for 1 Second */
5198 MDELAY(IPS_ONE_SEC
);
5200 writeb(0, ha
->mem_ptr
+ IPS_REG_SCPR
);
5202 /* Delay for 1 Second */
5203 MDELAY(IPS_ONE_SEC
);
5205 if ((*ha
->func
.init
) (ha
))
5207 else if (reset_counter
>= 2) {
5216 /****************************************************************************/
5218 /* Routine Name: ips_reset_morpheus */
5220 /* Routine Description: */
5222 /* Reset the controller */
5224 /****************************************************************************/
5226 ips_reset_morpheus(ips_ha_t
* ha
)
5231 METHOD_TRACE("ips_reset_morpheus", 1);
5233 DEBUG_VAR(1, "(%s%d) ips_reset_morpheus: mem addr: %x, irq: %d",
5234 ips_name
, ha
->host_num
, ha
->mem_addr
, ha
->irq
);
5238 while (reset_counter
< 2) {
5241 writel(0x80000000, ha
->mem_ptr
+ IPS_REG_I960_IDR
);
5243 /* Delay for 5 Seconds */
5244 MDELAY(5 * IPS_ONE_SEC
);
5246 /* Do a PCI config read to wait for adapter */
5247 pci_read_config_byte(ha
->pcidev
, 4, &junk
);
5249 if ((*ha
->func
.init
) (ha
))
5251 else if (reset_counter
>= 2) {
5260 /****************************************************************************/
5262 /* Routine Name: ips_statinit */
5264 /* Routine Description: */
5266 /* Initialize the status queues on the controller */
5268 /****************************************************************************/
5270 ips_statinit(ips_ha_t
* ha
)
5272 uint32_t phys_status_start
;
5274 METHOD_TRACE("ips_statinit", 1);
5276 ha
->adapt
->p_status_start
= ha
->adapt
->status
;
5277 ha
->adapt
->p_status_end
= ha
->adapt
->status
+ IPS_MAX_CMDS
;
5278 ha
->adapt
->p_status_tail
= ha
->adapt
->status
;
5280 phys_status_start
= ha
->adapt
->hw_status_start
;
5281 outl(cpu_to_le32(phys_status_start
), ha
->io_addr
+ IPS_REG_SQSR
);
5282 outl(cpu_to_le32(phys_status_start
+ IPS_STATUS_Q_SIZE
),
5283 ha
->io_addr
+ IPS_REG_SQER
);
5284 outl(cpu_to_le32(phys_status_start
+ IPS_STATUS_SIZE
),
5285 ha
->io_addr
+ IPS_REG_SQHR
);
5286 outl(cpu_to_le32(phys_status_start
), ha
->io_addr
+ IPS_REG_SQTR
);
5288 ha
->adapt
->hw_status_tail
= phys_status_start
;
5291 /****************************************************************************/
5293 /* Routine Name: ips_statinit_memio */
5295 /* Routine Description: */
5297 /* Initialize the status queues on the controller */
5299 /****************************************************************************/
5301 ips_statinit_memio(ips_ha_t
* ha
)
5303 uint32_t phys_status_start
;
5305 METHOD_TRACE("ips_statinit_memio", 1);
5307 ha
->adapt
->p_status_start
= ha
->adapt
->status
;
5308 ha
->adapt
->p_status_end
= ha
->adapt
->status
+ IPS_MAX_CMDS
;
5309 ha
->adapt
->p_status_tail
= ha
->adapt
->status
;
5311 phys_status_start
= ha
->adapt
->hw_status_start
;
5312 writel(phys_status_start
, ha
->mem_ptr
+ IPS_REG_SQSR
);
5313 writel(phys_status_start
+ IPS_STATUS_Q_SIZE
,
5314 ha
->mem_ptr
+ IPS_REG_SQER
);
5315 writel(phys_status_start
+ IPS_STATUS_SIZE
, ha
->mem_ptr
+ IPS_REG_SQHR
);
5316 writel(phys_status_start
, ha
->mem_ptr
+ IPS_REG_SQTR
);
5318 ha
->adapt
->hw_status_tail
= phys_status_start
;
5321 /****************************************************************************/
5323 /* Routine Name: ips_statupd_copperhead */
5325 /* Routine Description: */
5327 /* Remove an element from the status queue */
5329 /****************************************************************************/
5331 ips_statupd_copperhead(ips_ha_t
* ha
)
5333 METHOD_TRACE("ips_statupd_copperhead", 1);
5335 if (ha
->adapt
->p_status_tail
!= ha
->adapt
->p_status_end
) {
5336 ha
->adapt
->p_status_tail
++;
5337 ha
->adapt
->hw_status_tail
+= sizeof (IPS_STATUS
);
5339 ha
->adapt
->p_status_tail
= ha
->adapt
->p_status_start
;
5340 ha
->adapt
->hw_status_tail
= ha
->adapt
->hw_status_start
;
5343 outl(cpu_to_le32(ha
->adapt
->hw_status_tail
),
5344 ha
->io_addr
+ IPS_REG_SQTR
);
5346 return (ha
->adapt
->p_status_tail
->value
);
5349 /****************************************************************************/
5351 /* Routine Name: ips_statupd_copperhead_memio */
5353 /* Routine Description: */
5355 /* Remove an element from the status queue */
5357 /****************************************************************************/
5359 ips_statupd_copperhead_memio(ips_ha_t
* ha
)
5361 METHOD_TRACE("ips_statupd_copperhead_memio", 1);
5363 if (ha
->adapt
->p_status_tail
!= ha
->adapt
->p_status_end
) {
5364 ha
->adapt
->p_status_tail
++;
5365 ha
->adapt
->hw_status_tail
+= sizeof (IPS_STATUS
);
5367 ha
->adapt
->p_status_tail
= ha
->adapt
->p_status_start
;
5368 ha
->adapt
->hw_status_tail
= ha
->adapt
->hw_status_start
;
5371 writel(ha
->adapt
->hw_status_tail
, ha
->mem_ptr
+ IPS_REG_SQTR
);
5373 return (ha
->adapt
->p_status_tail
->value
);
5376 /****************************************************************************/
5378 /* Routine Name: ips_statupd_morpheus */
5380 /* Routine Description: */
5382 /* Remove an element from the status queue */
5384 /****************************************************************************/
5386 ips_statupd_morpheus(ips_ha_t
* ha
)
5390 METHOD_TRACE("ips_statupd_morpheus", 1);
5392 val
= readl(ha
->mem_ptr
+ IPS_REG_I2O_OUTMSGQ
);
5397 /****************************************************************************/
5399 /* Routine Name: ips_issue_copperhead */
5401 /* Routine Description: */
5403 /* Send a command down to the controller */
5405 /****************************************************************************/
5407 ips_issue_copperhead(ips_ha_t
* ha
, ips_scb_t
* scb
)
5412 METHOD_TRACE("ips_issue_copperhead", 1);
5414 if (scb
->scsi_cmd
) {
5415 DEBUG_VAR(2, "(%s%d) ips_issue: cmd 0x%X id %d (%d %d %d)",
5419 scb
->cmd
.basic_io
.command_id
,
5420 scb
->bus
, scb
->target_id
, scb
->lun
);
5422 DEBUG_VAR(2, KERN_NOTICE
"(%s%d) ips_issue: logical cmd id %d",
5423 ips_name
, ha
->host_num
, scb
->cmd
.basic_io
.command_id
);
5429 le32_to_cpu(inl(ha
->io_addr
+ IPS_REG_CCCR
))) & IPS_BIT_SEM
) {
5432 if (++TimeOut
>= IPS_SEM_TIMEOUT
) {
5433 if (!(val
& IPS_BIT_START_STOP
))
5436 IPS_PRINTK(KERN_WARNING
, ha
->pcidev
,
5437 "ips_issue val [0x%x].\n", val
);
5438 IPS_PRINTK(KERN_WARNING
, ha
->pcidev
,
5439 "ips_issue semaphore chk timeout.\n");
5441 return (IPS_FAILURE
);
5445 outl(cpu_to_le32(scb
->scb_busaddr
), ha
->io_addr
+ IPS_REG_CCSAR
);
5446 outw(cpu_to_le32(IPS_BIT_START_CMD
), ha
->io_addr
+ IPS_REG_CCCR
);
5448 return (IPS_SUCCESS
);
5451 /****************************************************************************/
5453 /* Routine Name: ips_issue_copperhead_memio */
5455 /* Routine Description: */
5457 /* Send a command down to the controller */
5459 /****************************************************************************/
5461 ips_issue_copperhead_memio(ips_ha_t
* ha
, ips_scb_t
* scb
)
5466 METHOD_TRACE("ips_issue_copperhead_memio", 1);
5468 if (scb
->scsi_cmd
) {
5469 DEBUG_VAR(2, "(%s%d) ips_issue: cmd 0x%X id %d (%d %d %d)",
5473 scb
->cmd
.basic_io
.command_id
,
5474 scb
->bus
, scb
->target_id
, scb
->lun
);
5476 DEBUG_VAR(2, "(%s%d) ips_issue: logical cmd id %d",
5477 ips_name
, ha
->host_num
, scb
->cmd
.basic_io
.command_id
);
5482 while ((val
= readl(ha
->mem_ptr
+ IPS_REG_CCCR
)) & IPS_BIT_SEM
) {
5485 if (++TimeOut
>= IPS_SEM_TIMEOUT
) {
5486 if (!(val
& IPS_BIT_START_STOP
))
5489 IPS_PRINTK(KERN_WARNING
, ha
->pcidev
,
5490 "ips_issue val [0x%x].\n", val
);
5491 IPS_PRINTK(KERN_WARNING
, ha
->pcidev
,
5492 "ips_issue semaphore chk timeout.\n");
5494 return (IPS_FAILURE
);
5498 writel(scb
->scb_busaddr
, ha
->mem_ptr
+ IPS_REG_CCSAR
);
5499 writel(IPS_BIT_START_CMD
, ha
->mem_ptr
+ IPS_REG_CCCR
);
5501 return (IPS_SUCCESS
);
5504 /****************************************************************************/
5506 /* Routine Name: ips_issue_i2o */
5508 /* Routine Description: */
5510 /* Send a command down to the controller */
5512 /****************************************************************************/
5514 ips_issue_i2o(ips_ha_t
* ha
, ips_scb_t
* scb
)
5517 METHOD_TRACE("ips_issue_i2o", 1);
5519 if (scb
->scsi_cmd
) {
5520 DEBUG_VAR(2, "(%s%d) ips_issue: cmd 0x%X id %d (%d %d %d)",
5524 scb
->cmd
.basic_io
.command_id
,
5525 scb
->bus
, scb
->target_id
, scb
->lun
);
5527 DEBUG_VAR(2, "(%s%d) ips_issue: logical cmd id %d",
5528 ips_name
, ha
->host_num
, scb
->cmd
.basic_io
.command_id
);
5531 outl(cpu_to_le32(scb
->scb_busaddr
), ha
->io_addr
+ IPS_REG_I2O_INMSGQ
);
5533 return (IPS_SUCCESS
);
5536 /****************************************************************************/
5538 /* Routine Name: ips_issue_i2o_memio */
5540 /* Routine Description: */
5542 /* Send a command down to the controller */
5544 /****************************************************************************/
5546 ips_issue_i2o_memio(ips_ha_t
* ha
, ips_scb_t
* scb
)
5549 METHOD_TRACE("ips_issue_i2o_memio", 1);
5551 if (scb
->scsi_cmd
) {
5552 DEBUG_VAR(2, "(%s%d) ips_issue: cmd 0x%X id %d (%d %d %d)",
5556 scb
->cmd
.basic_io
.command_id
,
5557 scb
->bus
, scb
->target_id
, scb
->lun
);
5559 DEBUG_VAR(2, "(%s%d) ips_issue: logical cmd id %d",
5560 ips_name
, ha
->host_num
, scb
->cmd
.basic_io
.command_id
);
5563 writel(scb
->scb_busaddr
, ha
->mem_ptr
+ IPS_REG_I2O_INMSGQ
);
5565 return (IPS_SUCCESS
);
5568 /****************************************************************************/
5570 /* Routine Name: ips_isintr_copperhead */
5572 /* Routine Description: */
5574 /* Test to see if an interrupt is for us */
5576 /****************************************************************************/
5578 ips_isintr_copperhead(ips_ha_t
* ha
)
5582 METHOD_TRACE("ips_isintr_copperhead", 2);
5584 Isr
= inb(ha
->io_addr
+ IPS_REG_HISR
);
5587 /* ?!?! Nothing really there */
5590 if (Isr
& IPS_BIT_SCE
)
5592 else if (Isr
& (IPS_BIT_SQO
| IPS_BIT_GHI
)) {
5593 /* status queue overflow or GHI */
5594 /* just clear the interrupt */
5595 outb(Isr
, ha
->io_addr
+ IPS_REG_HISR
);
5601 /****************************************************************************/
5603 /* Routine Name: ips_isintr_copperhead_memio */
5605 /* Routine Description: */
5607 /* Test to see if an interrupt is for us */
5609 /****************************************************************************/
5611 ips_isintr_copperhead_memio(ips_ha_t
* ha
)
5615 METHOD_TRACE("ips_isintr_memio", 2);
5617 Isr
= readb(ha
->mem_ptr
+ IPS_REG_HISR
);
5620 /* ?!?! Nothing really there */
5623 if (Isr
& IPS_BIT_SCE
)
5625 else if (Isr
& (IPS_BIT_SQO
| IPS_BIT_GHI
)) {
5626 /* status queue overflow or GHI */
5627 /* just clear the interrupt */
5628 writeb(Isr
, ha
->mem_ptr
+ IPS_REG_HISR
);
5634 /****************************************************************************/
5636 /* Routine Name: ips_isintr_morpheus */
5638 /* Routine Description: */
5640 /* Test to see if an interrupt is for us */
5642 /****************************************************************************/
5644 ips_isintr_morpheus(ips_ha_t
* ha
)
5648 METHOD_TRACE("ips_isintr_morpheus", 2);
5650 Isr
= readl(ha
->mem_ptr
+ IPS_REG_I2O_HIR
);
5652 if (Isr
& IPS_BIT_I2O_OPQI
)
5658 /****************************************************************************/
5660 /* Routine Name: ips_wait */
5662 /* Routine Description: */
5664 /* Wait for a command to complete */
5666 /****************************************************************************/
5668 ips_wait(ips_ha_t
* ha
, int time
, int intr
)
5673 METHOD_TRACE("ips_wait", 1);
5678 time
*= IPS_ONE_SEC
; /* convert seconds */
5680 while ((time
> 0) && (!done
)) {
5681 if (intr
== IPS_INTR_ON
) {
5682 if (ha
->waitflag
== FALSE
) {
5687 } else if (intr
== IPS_INTR_IORL
) {
5688 if (ha
->waitflag
== FALSE
) {
5690 * controller generated an interrupt to
5691 * acknowledge completion of the command
5692 * and ips_intr() has serviced the interrupt.
5700 * NOTE: we already have the io_request_lock so
5701 * even if we get an interrupt it won't get serviced
5702 * until after we finish.
5705 (*ha
->func
.intr
) (ha
);
5708 /* This looks like a very evil loop, but it only does this during start-up */
5716 /****************************************************************************/
5718 /* Routine Name: ips_write_driver_status */
5720 /* Routine Description: */
5722 /* Write OS/Driver version to Page 5 of the nvram on the controller */
5724 /****************************************************************************/
5726 ips_write_driver_status(ips_ha_t
* ha
, int intr
)
5728 METHOD_TRACE("ips_write_driver_status", 1);
5730 if (!ips_readwrite_page5(ha
, FALSE
, intr
)) {
5731 IPS_PRINTK(KERN_WARNING
, ha
->pcidev
,
5732 "unable to read NVRAM page 5.\n");
5737 /* check to make sure the page has a valid */
5739 if (le32_to_cpu(ha
->nvram
->signature
) != IPS_NVRAM_P5_SIG
) {
5741 "(%s%d) NVRAM page 5 has an invalid signature: %X.",
5742 ips_name
, ha
->host_num
, ha
->nvram
->signature
);
5743 ha
->nvram
->signature
= IPS_NVRAM_P5_SIG
;
5747 "(%s%d) Ad Type: %d, Ad Slot: %d, BIOS: %c%c%c%c %c%c%c%c.",
5748 ips_name
, ha
->host_num
, le16_to_cpu(ha
->nvram
->adapter_type
),
5749 ha
->nvram
->adapter_slot
, ha
->nvram
->bios_high
[0],
5750 ha
->nvram
->bios_high
[1], ha
->nvram
->bios_high
[2],
5751 ha
->nvram
->bios_high
[3], ha
->nvram
->bios_low
[0],
5752 ha
->nvram
->bios_low
[1], ha
->nvram
->bios_low
[2],
5753 ha
->nvram
->bios_low
[3]);
5755 ips_get_bios_version(ha
, intr
);
5757 /* change values (as needed) */
5758 ha
->nvram
->operating_system
= IPS_OS_LINUX
;
5759 ha
->nvram
->adapter_type
= ha
->ad_type
;
5760 strncpy((char *) ha
->nvram
->driver_high
, IPS_VERSION_HIGH
, 4);
5761 strncpy((char *) ha
->nvram
->driver_low
, IPS_VERSION_LOW
, 4);
5762 strncpy((char *) ha
->nvram
->bios_high
, ha
->bios_version
, 4);
5763 strncpy((char *) ha
->nvram
->bios_low
, ha
->bios_version
+ 4, 4);
5765 ha
->nvram
->versioning
= 0; /* Indicate the Driver Does Not Support Versioning */
5767 /* now update the page */
5768 if (!ips_readwrite_page5(ha
, TRUE
, intr
)) {
5769 IPS_PRINTK(KERN_WARNING
, ha
->pcidev
,
5770 "unable to write NVRAM page 5.\n");
5775 /* IF NVRAM Page 5 is OK, Use it for Slot Number Info Because Linux Doesn't Do Slots */
5776 ha
->slot_num
= ha
->nvram
->adapter_slot
;
5781 /****************************************************************************/
5783 /* Routine Name: ips_read_adapter_status */
5785 /* Routine Description: */
5787 /* Do an Inquiry command to the adapter */
5789 /****************************************************************************/
5791 ips_read_adapter_status(ips_ha_t
* ha
, int intr
)
5796 METHOD_TRACE("ips_read_adapter_status", 1);
5798 scb
= &ha
->scbs
[ha
->max_cmds
- 1];
5800 ips_init_scb(ha
, scb
);
5802 scb
->timeout
= ips_cmd_timeout
;
5803 scb
->cdb
[0] = IPS_CMD_ENQUIRY
;
5805 scb
->cmd
.basic_io
.op_code
= IPS_CMD_ENQUIRY
;
5806 scb
->cmd
.basic_io
.command_id
= IPS_COMMAND_ID(ha
, scb
);
5807 scb
->cmd
.basic_io
.sg_count
= 0;
5808 scb
->cmd
.basic_io
.lba
= 0;
5809 scb
->cmd
.basic_io
.sector_count
= 0;
5810 scb
->cmd
.basic_io
.log_drv
= 0;
5811 scb
->data_len
= sizeof (*ha
->enq
);
5812 scb
->cmd
.basic_io
.sg_addr
= ha
->enq_busaddr
;
5816 ips_send_wait(ha
, scb
, ips_cmd_timeout
, intr
)) == IPS_FAILURE
)
5817 || (ret
== IPS_SUCCESS_IMM
)
5818 || ((scb
->basic_status
& IPS_GSC_STATUS_MASK
) > 1))
5824 /****************************************************************************/
5826 /* Routine Name: ips_read_subsystem_parameters */
5828 /* Routine Description: */
5830 /* Read subsystem parameters from the adapter */
5832 /****************************************************************************/
5834 ips_read_subsystem_parameters(ips_ha_t
* ha
, int intr
)
5839 METHOD_TRACE("ips_read_subsystem_parameters", 1);
5841 scb
= &ha
->scbs
[ha
->max_cmds
- 1];
5843 ips_init_scb(ha
, scb
);
5845 scb
->timeout
= ips_cmd_timeout
;
5846 scb
->cdb
[0] = IPS_CMD_GET_SUBSYS
;
5848 scb
->cmd
.basic_io
.op_code
= IPS_CMD_GET_SUBSYS
;
5849 scb
->cmd
.basic_io
.command_id
= IPS_COMMAND_ID(ha
, scb
);
5850 scb
->cmd
.basic_io
.sg_count
= 0;
5851 scb
->cmd
.basic_io
.lba
= 0;
5852 scb
->cmd
.basic_io
.sector_count
= 0;
5853 scb
->cmd
.basic_io
.log_drv
= 0;
5854 scb
->data_len
= sizeof (*ha
->subsys
);
5855 scb
->cmd
.basic_io
.sg_addr
= ha
->ioctl_busaddr
;
5859 ips_send_wait(ha
, scb
, ips_cmd_timeout
, intr
)) == IPS_FAILURE
)
5860 || (ret
== IPS_SUCCESS_IMM
)
5861 || ((scb
->basic_status
& IPS_GSC_STATUS_MASK
) > 1))
5864 memcpy(ha
->subsys
, ha
->ioctl_data
, sizeof(*ha
->subsys
));
5868 /****************************************************************************/
5870 /* Routine Name: ips_read_config */
5872 /* Routine Description: */
5874 /* Read the configuration on the adapter */
5876 /****************************************************************************/
5878 ips_read_config(ips_ha_t
* ha
, int intr
)
5884 METHOD_TRACE("ips_read_config", 1);
5886 /* set defaults for initiator IDs */
5887 for (i
= 0; i
< 4; i
++)
5888 ha
->conf
->init_id
[i
] = 7;
5890 scb
= &ha
->scbs
[ha
->max_cmds
- 1];
5892 ips_init_scb(ha
, scb
);
5894 scb
->timeout
= ips_cmd_timeout
;
5895 scb
->cdb
[0] = IPS_CMD_READ_CONF
;
5897 scb
->cmd
.basic_io
.op_code
= IPS_CMD_READ_CONF
;
5898 scb
->cmd
.basic_io
.command_id
= IPS_COMMAND_ID(ha
, scb
);
5899 scb
->data_len
= sizeof (*ha
->conf
);
5900 scb
->cmd
.basic_io
.sg_addr
= ha
->ioctl_busaddr
;
5904 ips_send_wait(ha
, scb
, ips_cmd_timeout
, intr
)) == IPS_FAILURE
)
5905 || (ret
== IPS_SUCCESS_IMM
)
5906 || ((scb
->basic_status
& IPS_GSC_STATUS_MASK
) > 1)) {
5908 memset(ha
->conf
, 0, sizeof (IPS_CONF
));
5910 /* reset initiator IDs */
5911 for (i
= 0; i
< 4; i
++)
5912 ha
->conf
->init_id
[i
] = 7;
5914 /* Allow Completed with Errors, so JCRM can access the Adapter to fix the problems */
5915 if ((scb
->basic_status
& IPS_GSC_STATUS_MASK
) ==
5916 IPS_CMD_CMPLT_WERROR
)
5922 memcpy(ha
->conf
, ha
->ioctl_data
, sizeof(*ha
->conf
));
5926 /****************************************************************************/
5928 /* Routine Name: ips_readwrite_page5 */
5930 /* Routine Description: */
5932 /* Read nvram page 5 from the adapter */
5934 /****************************************************************************/
5936 ips_readwrite_page5(ips_ha_t
* ha
, int write
, int intr
)
5941 METHOD_TRACE("ips_readwrite_page5", 1);
5943 scb
= &ha
->scbs
[ha
->max_cmds
- 1];
5945 ips_init_scb(ha
, scb
);
5947 scb
->timeout
= ips_cmd_timeout
;
5948 scb
->cdb
[0] = IPS_CMD_RW_NVRAM_PAGE
;
5950 scb
->cmd
.nvram
.op_code
= IPS_CMD_RW_NVRAM_PAGE
;
5951 scb
->cmd
.nvram
.command_id
= IPS_COMMAND_ID(ha
, scb
);
5952 scb
->cmd
.nvram
.page
= 5;
5953 scb
->cmd
.nvram
.write
= write
;
5954 scb
->cmd
.nvram
.reserved
= 0;
5955 scb
->cmd
.nvram
.reserved2
= 0;
5956 scb
->data_len
= sizeof (*ha
->nvram
);
5957 scb
->cmd
.nvram
.buffer_addr
= ha
->ioctl_busaddr
;
5959 memcpy(ha
->ioctl_data
, ha
->nvram
, sizeof(*ha
->nvram
));
5961 /* issue the command */
5963 ips_send_wait(ha
, scb
, ips_cmd_timeout
, intr
)) == IPS_FAILURE
)
5964 || (ret
== IPS_SUCCESS_IMM
)
5965 || ((scb
->basic_status
& IPS_GSC_STATUS_MASK
) > 1)) {
5967 memset(ha
->nvram
, 0, sizeof (IPS_NVRAM_P5
));
5972 memcpy(ha
->nvram
, ha
->ioctl_data
, sizeof(*ha
->nvram
));
5976 /****************************************************************************/
5978 /* Routine Name: ips_clear_adapter */
5980 /* Routine Description: */
5982 /* Clear the stripe lock tables */
5984 /****************************************************************************/
5986 ips_clear_adapter(ips_ha_t
* ha
, int intr
)
5991 METHOD_TRACE("ips_clear_adapter", 1);
5993 scb
= &ha
->scbs
[ha
->max_cmds
- 1];
5995 ips_init_scb(ha
, scb
);
5997 scb
->timeout
= ips_reset_timeout
;
5998 scb
->cdb
[0] = IPS_CMD_CONFIG_SYNC
;
6000 scb
->cmd
.config_sync
.op_code
= IPS_CMD_CONFIG_SYNC
;
6001 scb
->cmd
.config_sync
.command_id
= IPS_COMMAND_ID(ha
, scb
);
6002 scb
->cmd
.config_sync
.channel
= 0;
6003 scb
->cmd
.config_sync
.source_target
= IPS_POCL
;
6004 scb
->cmd
.config_sync
.reserved
= 0;
6005 scb
->cmd
.config_sync
.reserved2
= 0;
6006 scb
->cmd
.config_sync
.reserved3
= 0;
6010 ips_send_wait(ha
, scb
, ips_reset_timeout
, intr
)) == IPS_FAILURE
)
6011 || (ret
== IPS_SUCCESS_IMM
)
6012 || ((scb
->basic_status
& IPS_GSC_STATUS_MASK
) > 1))
6015 /* send unlock stripe command */
6016 ips_init_scb(ha
, scb
);
6018 scb
->cdb
[0] = IPS_CMD_ERROR_TABLE
;
6019 scb
->timeout
= ips_reset_timeout
;
6021 scb
->cmd
.unlock_stripe
.op_code
= IPS_CMD_ERROR_TABLE
;
6022 scb
->cmd
.unlock_stripe
.command_id
= IPS_COMMAND_ID(ha
, scb
);
6023 scb
->cmd
.unlock_stripe
.log_drv
= 0;
6024 scb
->cmd
.unlock_stripe
.control
= IPS_CSL
;
6025 scb
->cmd
.unlock_stripe
.reserved
= 0;
6026 scb
->cmd
.unlock_stripe
.reserved2
= 0;
6027 scb
->cmd
.unlock_stripe
.reserved3
= 0;
6031 ips_send_wait(ha
, scb
, ips_cmd_timeout
, intr
)) == IPS_FAILURE
)
6032 || (ret
== IPS_SUCCESS_IMM
)
6033 || ((scb
->basic_status
& IPS_GSC_STATUS_MASK
) > 1))
6039 /****************************************************************************/
6041 /* Routine Name: ips_ffdc_reset */
6043 /* Routine Description: */
6045 /* FFDC: write reset info */
6047 /****************************************************************************/
6049 ips_ffdc_reset(ips_ha_t
* ha
, int intr
)
6053 METHOD_TRACE("ips_ffdc_reset", 1);
6055 scb
= &ha
->scbs
[ha
->max_cmds
- 1];
6057 ips_init_scb(ha
, scb
);
6059 scb
->timeout
= ips_cmd_timeout
;
6060 scb
->cdb
[0] = IPS_CMD_FFDC
;
6061 scb
->cmd
.ffdc
.op_code
= IPS_CMD_FFDC
;
6062 scb
->cmd
.ffdc
.command_id
= IPS_COMMAND_ID(ha
, scb
);
6063 scb
->cmd
.ffdc
.reset_count
= ha
->reset_count
;
6064 scb
->cmd
.ffdc
.reset_type
= 0x80;
6066 /* convert time to what the card wants */
6067 ips_fix_ffdc_time(ha
, scb
, ha
->last_ffdc
);
6070 ips_send_wait(ha
, scb
, ips_cmd_timeout
, intr
);
6073 /****************************************************************************/
6075 /* Routine Name: ips_ffdc_time */
6077 /* Routine Description: */
6079 /* FFDC: write time info */
6081 /****************************************************************************/
6083 ips_ffdc_time(ips_ha_t
* ha
)
6087 METHOD_TRACE("ips_ffdc_time", 1);
6089 DEBUG_VAR(1, "(%s%d) Sending time update.", ips_name
, ha
->host_num
);
6091 scb
= &ha
->scbs
[ha
->max_cmds
- 1];
6093 ips_init_scb(ha
, scb
);
6095 scb
->timeout
= ips_cmd_timeout
;
6096 scb
->cdb
[0] = IPS_CMD_FFDC
;
6097 scb
->cmd
.ffdc
.op_code
= IPS_CMD_FFDC
;
6098 scb
->cmd
.ffdc
.command_id
= IPS_COMMAND_ID(ha
, scb
);
6099 scb
->cmd
.ffdc
.reset_count
= 0;
6100 scb
->cmd
.ffdc
.reset_type
= 0;
6102 /* convert time to what the card wants */
6103 ips_fix_ffdc_time(ha
, scb
, ha
->last_ffdc
);
6106 ips_send_wait(ha
, scb
, ips_cmd_timeout
, IPS_FFDC
);
6109 /****************************************************************************/
6111 /* Routine Name: ips_fix_ffdc_time */
6113 /* Routine Description: */
6114 /* Adjust time_t to what the card wants */
6116 /****************************************************************************/
6118 ips_fix_ffdc_time(ips_ha_t
* ha
, ips_scb_t
* scb
, time_t current_time
)
6125 int year_lengths
[2] = { IPS_DAYS_NORMAL_YEAR
, IPS_DAYS_LEAP_YEAR
};
6126 int month_lengths
[12][2] = { {31, 31},
6140 METHOD_TRACE("ips_fix_ffdc_time", 1);
6142 days
= current_time
/ IPS_SECS_DAY
;
6143 rem
= current_time
% IPS_SECS_DAY
;
6145 scb
->cmd
.ffdc
.hour
= (rem
/ IPS_SECS_HOUR
);
6146 rem
= rem
% IPS_SECS_HOUR
;
6147 scb
->cmd
.ffdc
.minute
= (rem
/ IPS_SECS_MIN
);
6148 scb
->cmd
.ffdc
.second
= (rem
% IPS_SECS_MIN
);
6150 year
= IPS_EPOCH_YEAR
;
6151 while (days
< 0 || days
>= year_lengths
[yleap
= IPS_IS_LEAP_YEAR(year
)]) {
6154 newy
= year
+ (days
/ IPS_DAYS_NORMAL_YEAR
);
6157 days
-= (newy
- year
) * IPS_DAYS_NORMAL_YEAR
+
6158 IPS_NUM_LEAP_YEARS_THROUGH(newy
- 1) -
6159 IPS_NUM_LEAP_YEARS_THROUGH(year
- 1);
6163 scb
->cmd
.ffdc
.yearH
= year
/ 100;
6164 scb
->cmd
.ffdc
.yearL
= year
% 100;
6166 for (i
= 0; days
>= month_lengths
[i
][yleap
]; ++i
)
6167 days
-= month_lengths
[i
][yleap
];
6169 scb
->cmd
.ffdc
.month
= i
+ 1;
6170 scb
->cmd
.ffdc
.day
= days
+ 1;
6173 /****************************************************************************
6174 * BIOS Flash Routines *
6175 ****************************************************************************/
6177 /****************************************************************************/
6179 /* Routine Name: ips_erase_bios */
6181 /* Routine Description: */
6182 /* Erase the BIOS on the adapter */
6184 /****************************************************************************/
6186 ips_erase_bios(ips_ha_t
* ha
)
6191 METHOD_TRACE("ips_erase_bios", 1);
6195 /* Clear the status register */
6196 outl(0, ha
->io_addr
+ IPS_REG_FLAP
);
6197 if (ha
->revision_id
== IPS_REVID_TROMBONE64
)
6198 udelay(25); /* 25 us */
6200 outb(0x50, ha
->io_addr
+ IPS_REG_FLDP
);
6201 if (ha
->revision_id
== IPS_REVID_TROMBONE64
)
6202 udelay(25); /* 25 us */
6205 outb(0x20, ha
->io_addr
+ IPS_REG_FLDP
);
6206 if (ha
->revision_id
== IPS_REVID_TROMBONE64
)
6207 udelay(25); /* 25 us */
6210 outb(0xD0, ha
->io_addr
+ IPS_REG_FLDP
);
6211 if (ha
->revision_id
== IPS_REVID_TROMBONE64
)
6212 udelay(25); /* 25 us */
6215 outb(0x70, ha
->io_addr
+ IPS_REG_FLDP
);
6216 if (ha
->revision_id
== IPS_REVID_TROMBONE64
)
6217 udelay(25); /* 25 us */
6219 timeout
= 80000; /* 80 seconds */
6221 while (timeout
> 0) {
6222 if (ha
->revision_id
== IPS_REVID_TROMBONE64
) {
6223 outl(0, ha
->io_addr
+ IPS_REG_FLAP
);
6224 udelay(25); /* 25 us */
6227 status
= inb(ha
->io_addr
+ IPS_REG_FLDP
);
6236 /* check for timeout */
6240 /* try to suspend the erase */
6241 outb(0xB0, ha
->io_addr
+ IPS_REG_FLDP
);
6242 if (ha
->revision_id
== IPS_REVID_TROMBONE64
)
6243 udelay(25); /* 25 us */
6245 /* wait for 10 seconds */
6247 while (timeout
> 0) {
6248 if (ha
->revision_id
== IPS_REVID_TROMBONE64
) {
6249 outl(0, ha
->io_addr
+ IPS_REG_FLAP
);
6250 udelay(25); /* 25 us */
6253 status
= inb(ha
->io_addr
+ IPS_REG_FLDP
);
6265 /* check for valid VPP */
6270 /* check for successful flash */
6272 /* sequence error */
6275 /* Otherwise, we were successful */
6277 outb(0x50, ha
->io_addr
+ IPS_REG_FLDP
);
6278 if (ha
->revision_id
== IPS_REVID_TROMBONE64
)
6279 udelay(25); /* 25 us */
6282 outb(0xFF, ha
->io_addr
+ IPS_REG_FLDP
);
6283 if (ha
->revision_id
== IPS_REVID_TROMBONE64
)
6284 udelay(25); /* 25 us */
6289 /****************************************************************************/
6291 /* Routine Name: ips_erase_bios_memio */
6293 /* Routine Description: */
6294 /* Erase the BIOS on the adapter */
6296 /****************************************************************************/
6298 ips_erase_bios_memio(ips_ha_t
* ha
)
6303 METHOD_TRACE("ips_erase_bios_memio", 1);
6307 /* Clear the status register */
6308 writel(0, ha
->mem_ptr
+ IPS_REG_FLAP
);
6309 if (ha
->revision_id
== IPS_REVID_TROMBONE64
)
6310 udelay(25); /* 25 us */
6312 writeb(0x50, ha
->mem_ptr
+ IPS_REG_FLDP
);
6313 if (ha
->revision_id
== IPS_REVID_TROMBONE64
)
6314 udelay(25); /* 25 us */
6317 writeb(0x20, ha
->mem_ptr
+ IPS_REG_FLDP
);
6318 if (ha
->revision_id
== IPS_REVID_TROMBONE64
)
6319 udelay(25); /* 25 us */
6322 writeb(0xD0, ha
->mem_ptr
+ IPS_REG_FLDP
);
6323 if (ha
->revision_id
== IPS_REVID_TROMBONE64
)
6324 udelay(25); /* 25 us */
6327 writeb(0x70, ha
->mem_ptr
+ IPS_REG_FLDP
);
6328 if (ha
->revision_id
== IPS_REVID_TROMBONE64
)
6329 udelay(25); /* 25 us */
6331 timeout
= 80000; /* 80 seconds */
6333 while (timeout
> 0) {
6334 if (ha
->revision_id
== IPS_REVID_TROMBONE64
) {
6335 writel(0, ha
->mem_ptr
+ IPS_REG_FLAP
);
6336 udelay(25); /* 25 us */
6339 status
= readb(ha
->mem_ptr
+ IPS_REG_FLDP
);
6348 /* check for timeout */
6352 /* try to suspend the erase */
6353 writeb(0xB0, ha
->mem_ptr
+ IPS_REG_FLDP
);
6354 if (ha
->revision_id
== IPS_REVID_TROMBONE64
)
6355 udelay(25); /* 25 us */
6357 /* wait for 10 seconds */
6359 while (timeout
> 0) {
6360 if (ha
->revision_id
== IPS_REVID_TROMBONE64
) {
6361 writel(0, ha
->mem_ptr
+ IPS_REG_FLAP
);
6362 udelay(25); /* 25 us */
6365 status
= readb(ha
->mem_ptr
+ IPS_REG_FLDP
);
6377 /* check for valid VPP */
6382 /* check for successful flash */
6384 /* sequence error */
6387 /* Otherwise, we were successful */
6389 writeb(0x50, ha
->mem_ptr
+ IPS_REG_FLDP
);
6390 if (ha
->revision_id
== IPS_REVID_TROMBONE64
)
6391 udelay(25); /* 25 us */
6394 writeb(0xFF, ha
->mem_ptr
+ IPS_REG_FLDP
);
6395 if (ha
->revision_id
== IPS_REVID_TROMBONE64
)
6396 udelay(25); /* 25 us */
6401 /****************************************************************************/
6403 /* Routine Name: ips_program_bios */
6405 /* Routine Description: */
6406 /* Program the BIOS on the adapter */
6408 /****************************************************************************/
6410 ips_program_bios(ips_ha_t
* ha
, char *buffer
, uint32_t buffersize
,
6417 METHOD_TRACE("ips_program_bios", 1);
6421 for (i
= 0; i
< buffersize
; i
++) {
6423 outl(cpu_to_le32(i
+ offset
), ha
->io_addr
+ IPS_REG_FLAP
);
6424 if (ha
->revision_id
== IPS_REVID_TROMBONE64
)
6425 udelay(25); /* 25 us */
6427 outb(0x40, ha
->io_addr
+ IPS_REG_FLDP
);
6428 if (ha
->revision_id
== IPS_REVID_TROMBONE64
)
6429 udelay(25); /* 25 us */
6431 outb(buffer
[i
], ha
->io_addr
+ IPS_REG_FLDP
);
6432 if (ha
->revision_id
== IPS_REVID_TROMBONE64
)
6433 udelay(25); /* 25 us */
6435 /* wait up to one second */
6437 while (timeout
> 0) {
6438 if (ha
->revision_id
== IPS_REVID_TROMBONE64
) {
6439 outl(0, ha
->io_addr
+ IPS_REG_FLAP
);
6440 udelay(25); /* 25 us */
6443 status
= inb(ha
->io_addr
+ IPS_REG_FLDP
);
6454 outl(0, ha
->io_addr
+ IPS_REG_FLAP
);
6455 if (ha
->revision_id
== IPS_REVID_TROMBONE64
)
6456 udelay(25); /* 25 us */
6458 outb(0xFF, ha
->io_addr
+ IPS_REG_FLDP
);
6459 if (ha
->revision_id
== IPS_REVID_TROMBONE64
)
6460 udelay(25); /* 25 us */
6465 /* check the status */
6466 if (status
& 0x18) {
6467 /* programming error */
6468 outl(0, ha
->io_addr
+ IPS_REG_FLAP
);
6469 if (ha
->revision_id
== IPS_REVID_TROMBONE64
)
6470 udelay(25); /* 25 us */
6472 outb(0xFF, ha
->io_addr
+ IPS_REG_FLDP
);
6473 if (ha
->revision_id
== IPS_REVID_TROMBONE64
)
6474 udelay(25); /* 25 us */
6480 /* Enable reading */
6481 outl(0, ha
->io_addr
+ IPS_REG_FLAP
);
6482 if (ha
->revision_id
== IPS_REVID_TROMBONE64
)
6483 udelay(25); /* 25 us */
6485 outb(0xFF, ha
->io_addr
+ IPS_REG_FLDP
);
6486 if (ha
->revision_id
== IPS_REVID_TROMBONE64
)
6487 udelay(25); /* 25 us */
6492 /****************************************************************************/
6494 /* Routine Name: ips_program_bios_memio */
6496 /* Routine Description: */
6497 /* Program the BIOS on the adapter */
6499 /****************************************************************************/
6501 ips_program_bios_memio(ips_ha_t
* ha
, char *buffer
, uint32_t buffersize
,
6508 METHOD_TRACE("ips_program_bios_memio", 1);
6512 for (i
= 0; i
< buffersize
; i
++) {
6514 writel(i
+ offset
, ha
->mem_ptr
+ IPS_REG_FLAP
);
6515 if (ha
->revision_id
== IPS_REVID_TROMBONE64
)
6516 udelay(25); /* 25 us */
6518 writeb(0x40, ha
->mem_ptr
+ IPS_REG_FLDP
);
6519 if (ha
->revision_id
== IPS_REVID_TROMBONE64
)
6520 udelay(25); /* 25 us */
6522 writeb(buffer
[i
], ha
->mem_ptr
+ IPS_REG_FLDP
);
6523 if (ha
->revision_id
== IPS_REVID_TROMBONE64
)
6524 udelay(25); /* 25 us */
6526 /* wait up to one second */
6528 while (timeout
> 0) {
6529 if (ha
->revision_id
== IPS_REVID_TROMBONE64
) {
6530 writel(0, ha
->mem_ptr
+ IPS_REG_FLAP
);
6531 udelay(25); /* 25 us */
6534 status
= readb(ha
->mem_ptr
+ IPS_REG_FLDP
);
6545 writel(0, ha
->mem_ptr
+ IPS_REG_FLAP
);
6546 if (ha
->revision_id
== IPS_REVID_TROMBONE64
)
6547 udelay(25); /* 25 us */
6549 writeb(0xFF, ha
->mem_ptr
+ IPS_REG_FLDP
);
6550 if (ha
->revision_id
== IPS_REVID_TROMBONE64
)
6551 udelay(25); /* 25 us */
6556 /* check the status */
6557 if (status
& 0x18) {
6558 /* programming error */
6559 writel(0, ha
->mem_ptr
+ IPS_REG_FLAP
);
6560 if (ha
->revision_id
== IPS_REVID_TROMBONE64
)
6561 udelay(25); /* 25 us */
6563 writeb(0xFF, ha
->mem_ptr
+ IPS_REG_FLDP
);
6564 if (ha
->revision_id
== IPS_REVID_TROMBONE64
)
6565 udelay(25); /* 25 us */
6571 /* Enable reading */
6572 writel(0, ha
->mem_ptr
+ IPS_REG_FLAP
);
6573 if (ha
->revision_id
== IPS_REVID_TROMBONE64
)
6574 udelay(25); /* 25 us */
6576 writeb(0xFF, ha
->mem_ptr
+ IPS_REG_FLDP
);
6577 if (ha
->revision_id
== IPS_REVID_TROMBONE64
)
6578 udelay(25); /* 25 us */
6583 /****************************************************************************/
6585 /* Routine Name: ips_verify_bios */
6587 /* Routine Description: */
6588 /* Verify the BIOS on the adapter */
6590 /****************************************************************************/
6592 ips_verify_bios(ips_ha_t
* ha
, char *buffer
, uint32_t buffersize
,
6598 METHOD_TRACE("ips_verify_bios", 1);
6601 outl(0, ha
->io_addr
+ IPS_REG_FLAP
);
6602 if (ha
->revision_id
== IPS_REVID_TROMBONE64
)
6603 udelay(25); /* 25 us */
6605 if (inb(ha
->io_addr
+ IPS_REG_FLDP
) != 0x55)
6608 outl(cpu_to_le32(1), ha
->io_addr
+ IPS_REG_FLAP
);
6609 if (ha
->revision_id
== IPS_REVID_TROMBONE64
)
6610 udelay(25); /* 25 us */
6611 if (inb(ha
->io_addr
+ IPS_REG_FLDP
) != 0xAA)
6615 for (i
= 2; i
< buffersize
; i
++) {
6617 outl(cpu_to_le32(i
+ offset
), ha
->io_addr
+ IPS_REG_FLAP
);
6618 if (ha
->revision_id
== IPS_REVID_TROMBONE64
)
6619 udelay(25); /* 25 us */
6621 checksum
= (uint8_t) checksum
+ inb(ha
->io_addr
+ IPS_REG_FLDP
);
6632 /****************************************************************************/
6634 /* Routine Name: ips_verify_bios_memio */
6636 /* Routine Description: */
6637 /* Verify the BIOS on the adapter */
6639 /****************************************************************************/
6641 ips_verify_bios_memio(ips_ha_t
* ha
, char *buffer
, uint32_t buffersize
,
6647 METHOD_TRACE("ips_verify_bios_memio", 1);
6650 writel(0, ha
->mem_ptr
+ IPS_REG_FLAP
);
6651 if (ha
->revision_id
== IPS_REVID_TROMBONE64
)
6652 udelay(25); /* 25 us */
6654 if (readb(ha
->mem_ptr
+ IPS_REG_FLDP
) != 0x55)
6657 writel(1, ha
->mem_ptr
+ IPS_REG_FLAP
);
6658 if (ha
->revision_id
== IPS_REVID_TROMBONE64
)
6659 udelay(25); /* 25 us */
6660 if (readb(ha
->mem_ptr
+ IPS_REG_FLDP
) != 0xAA)
6664 for (i
= 2; i
< buffersize
; i
++) {
6666 writel(i
+ offset
, ha
->mem_ptr
+ IPS_REG_FLAP
);
6667 if (ha
->revision_id
== IPS_REVID_TROMBONE64
)
6668 udelay(25); /* 25 us */
6671 (uint8_t) checksum
+ readb(ha
->mem_ptr
+ IPS_REG_FLDP
);
6682 /****************************************************************************/
6684 /* Routine Name: ips_abort_init */
6686 /* Routine Description: */
6687 /* cleanup routine for a failed adapter initialization */
6688 /****************************************************************************/
6690 ips_abort_init(ips_ha_t
* ha
, int index
)
6694 ips_ha
[index
] = NULL
;
6695 ips_sh
[index
] = NULL
;
6699 /****************************************************************************/
6701 /* Routine Name: ips_shift_controllers */
6703 /* Routine Description: */
6704 /* helper function for ordering adapters */
6705 /****************************************************************************/
6707 ips_shift_controllers(int lowindex
, int highindex
)
6709 ips_ha_t
*ha_sav
= ips_ha
[highindex
];
6710 struct Scsi_Host
*sh_sav
= ips_sh
[highindex
];
6713 for (i
= highindex
; i
> lowindex
; i
--) {
6714 ips_ha
[i
] = ips_ha
[i
- 1];
6715 ips_sh
[i
] = ips_sh
[i
- 1];
6716 ips_ha
[i
]->host_num
= i
;
6718 ha_sav
->host_num
= lowindex
;
6719 ips_ha
[lowindex
] = ha_sav
;
6720 ips_sh
[lowindex
] = sh_sav
;
6723 /****************************************************************************/
6725 /* Routine Name: ips_order_controllers */
6727 /* Routine Description: */
6728 /* place controllers is the "proper" boot order */
6729 /****************************************************************************/
6731 ips_order_controllers(void)
6733 int i
, j
, tmp
, position
= 0;
6734 IPS_NVRAM_P5
*nvram
;
6737 nvram
= ips_ha
[0]->nvram
;
6739 if (nvram
->adapter_order
[0]) {
6740 for (i
= 1; i
<= nvram
->adapter_order
[0]; i
++) {
6741 for (j
= position
; j
< ips_num_controllers
; j
++) {
6742 switch (ips_ha
[j
]->ad_type
) {
6743 case IPS_ADTYPE_SERVERAID6M
:
6744 case IPS_ADTYPE_SERVERAID7M
:
6745 if (nvram
->adapter_order
[i
] == 'M') {
6746 ips_shift_controllers(position
,
6751 case IPS_ADTYPE_SERVERAID4L
:
6752 case IPS_ADTYPE_SERVERAID4M
:
6753 case IPS_ADTYPE_SERVERAID4MX
:
6754 case IPS_ADTYPE_SERVERAID4LX
:
6755 if (nvram
->adapter_order
[i
] == 'N') {
6756 ips_shift_controllers(position
,
6761 case IPS_ADTYPE_SERVERAID6I
:
6762 case IPS_ADTYPE_SERVERAID5I2
:
6763 case IPS_ADTYPE_SERVERAID5I1
:
6764 case IPS_ADTYPE_SERVERAID7k
:
6765 if (nvram
->adapter_order
[i
] == 'S') {
6766 ips_shift_controllers(position
,
6771 case IPS_ADTYPE_SERVERAID
:
6772 case IPS_ADTYPE_SERVERAID2
:
6773 case IPS_ADTYPE_NAVAJO
:
6774 case IPS_ADTYPE_KIOWA
:
6775 case IPS_ADTYPE_SERVERAID3L
:
6776 case IPS_ADTYPE_SERVERAID3
:
6777 case IPS_ADTYPE_SERVERAID4H
:
6778 if (nvram
->adapter_order
[i
] == 'A') {
6779 ips_shift_controllers(position
,
6789 /* if adapter_order[0], then ordering is complete */
6792 /* old bios, use older ordering */
6794 for (i
= position
; i
< ips_num_controllers
; i
++) {
6795 if (ips_ha
[i
]->ad_type
== IPS_ADTYPE_SERVERAID5I2
||
6796 ips_ha
[i
]->ad_type
== IPS_ADTYPE_SERVERAID5I1
) {
6797 ips_shift_controllers(position
, i
);
6802 /* if there were no 5I cards, then don't do any extra ordering */
6805 for (i
= position
; i
< ips_num_controllers
; i
++) {
6806 if (ips_ha
[i
]->ad_type
== IPS_ADTYPE_SERVERAID4L
||
6807 ips_ha
[i
]->ad_type
== IPS_ADTYPE_SERVERAID4M
||
6808 ips_ha
[i
]->ad_type
== IPS_ADTYPE_SERVERAID4LX
||
6809 ips_ha
[i
]->ad_type
== IPS_ADTYPE_SERVERAID4MX
) {
6810 ips_shift_controllers(position
, i
);
6818 /****************************************************************************/
6820 /* Routine Name: ips_register_scsi */
6822 /* Routine Description: */
6823 /* perform any registration and setup with the scsi layer */
6824 /****************************************************************************/
6826 ips_register_scsi(int index
)
6828 struct Scsi_Host
*sh
;
6829 ips_ha_t
*ha
, *oldha
= ips_ha
[index
];
6830 sh
= scsi_host_alloc(&ips_driver_template
, sizeof (ips_ha_t
));
6832 IPS_PRINTK(KERN_WARNING
, oldha
->pcidev
,
6833 "Unable to register controller with SCSI subsystem\n");
6837 memcpy(ha
, oldha
, sizeof (ips_ha_t
));
6838 free_irq(oldha
->irq
, oldha
);
6839 /* Install the interrupt handler with the new ha */
6840 if (request_irq(ha
->irq
, do_ipsintr
, IRQF_SHARED
, ips_name
, ha
)) {
6841 IPS_PRINTK(KERN_WARNING
, ha
->pcidev
,
6842 "Unable to install interrupt handler\n");
6851 /* Store away needed values for later use */
6852 sh
->io_port
= ha
->io_addr
;
6853 sh
->n_io_port
= ha
->io_addr
? 255 : 0;
6854 sh
->unique_id
= (ha
->io_addr
) ? ha
->io_addr
: ha
->mem_addr
;
6856 sh
->sg_tablesize
= sh
->hostt
->sg_tablesize
;
6857 sh
->can_queue
= sh
->hostt
->can_queue
;
6858 sh
->cmd_per_lun
= sh
->hostt
->cmd_per_lun
;
6859 sh
->unchecked_isa_dma
= sh
->hostt
->unchecked_isa_dma
;
6860 sh
->use_clustering
= sh
->hostt
->use_clustering
;
6861 sh
->max_sectors
= 128;
6863 sh
->max_id
= ha
->ntargets
;
6864 sh
->max_lun
= ha
->nlun
;
6865 sh
->max_channel
= ha
->nbus
- 1;
6866 sh
->can_queue
= ha
->max_cmds
- 1;
6868 scsi_add_host(sh
, NULL
);
6874 /*---------------------------------------------------------------------------*/
6875 /* Routine Name: ips_remove_device */
6877 /* Routine Description: */
6878 /* Remove one Adapter ( Hot Plugging ) */
6879 /*---------------------------------------------------------------------------*/
6880 static void __devexit
6881 ips_remove_device(struct pci_dev
*pci_dev
)
6884 struct Scsi_Host
*sh
;
6887 for (i
= 0; i
< IPS_MAX_ADAPTERS
; i
++) {
6890 if ((pci_dev
->bus
->number
== ha
->pcidev
->bus
->number
) &&
6891 (pci_dev
->devfn
== ha
->pcidev
->devfn
)) {
6899 /****************************************************************************/
6901 /* Routine Name: ips_module_init */
6903 /* Routine Description: */
6904 /* function called on module load */
6905 /****************************************************************************/
6907 ips_module_init(void)
6909 if (pci_register_driver(&ips_pci_driver
) < 0)
6911 ips_driver_template
.module
= THIS_MODULE
;
6912 ips_order_controllers();
6913 if (!ips_detect(&ips_driver_template
)) {
6914 pci_unregister_driver(&ips_pci_driver
);
6917 register_reboot_notifier(&ips_notifier
);
6921 /****************************************************************************/
6923 /* Routine Name: ips_module_exit */
6925 /* Routine Description: */
6926 /* function called on module unload */
6927 /****************************************************************************/
6929 ips_module_exit(void)
6931 pci_unregister_driver(&ips_pci_driver
);
6932 unregister_reboot_notifier(&ips_notifier
);
6935 module_init(ips_module_init
);
6936 module_exit(ips_module_exit
);
6938 /*---------------------------------------------------------------------------*/
6939 /* Routine Name: ips_insert_device */
6941 /* Routine Description: */
6942 /* Add One Adapter ( Hot Plug ) */
6945 /* 0 if Successful, else non-zero */
6946 /*---------------------------------------------------------------------------*/
6947 static int __devinit
6948 ips_insert_device(struct pci_dev
*pci_dev
, const struct pci_device_id
*ent
)
6950 int uninitialized_var(index
);
6953 METHOD_TRACE("ips_insert_device", 1);
6954 if (pci_enable_device(pci_dev
))
6957 rc
= ips_init_phase1(pci_dev
, &index
);
6959 rc
= ips_init_phase2(index
);
6962 if (ips_register_scsi(index
)) {
6963 ips_free(ips_ha
[index
]);
6968 ips_num_controllers
++;
6970 ips_next_controller
= ips_num_controllers
;
6974 /*---------------------------------------------------------------------------*/
6975 /* Routine Name: ips_init_phase1 */
6977 /* Routine Description: */
6978 /* Adapter Initialization */
6981 /* 0 if Successful, else non-zero */
6982 /*---------------------------------------------------------------------------*/
6984 ips_init_phase1(struct pci_dev
*pci_dev
, int *indexPtr
)
6994 uint16_t subdevice_id
;
6997 dma_addr_t dma_address
;
6998 char __iomem
*ioremap_ptr
;
6999 char __iomem
*mem_ptr
;
7002 METHOD_TRACE("ips_init_phase1", 1);
7003 index
= IPS_MAX_ADAPTERS
;
7004 for (j
= 0; j
< IPS_MAX_ADAPTERS
; j
++) {
7005 if (ips_ha
[j
] == 0) {
7011 if (index
>= IPS_MAX_ADAPTERS
)
7014 /* stuff that we get in dev */
7016 bus
= pci_dev
->bus
->number
;
7017 func
= pci_dev
->devfn
;
7019 /* Init MEM/IO addresses to 0 */
7025 for (j
= 0; j
< 2; j
++) {
7026 if (!pci_resource_start(pci_dev
, j
))
7029 if (pci_resource_flags(pci_dev
, j
) & IORESOURCE_IO
) {
7030 io_addr
= pci_resource_start(pci_dev
, j
);
7031 io_len
= pci_resource_len(pci_dev
, j
);
7033 mem_addr
= pci_resource_start(pci_dev
, j
);
7034 mem_len
= pci_resource_len(pci_dev
, j
);
7038 /* setup memory mapped area (if applicable) */
7043 if (!request_mem_region(mem_addr
, mem_len
, "ips")) {
7044 IPS_PRINTK(KERN_WARNING
, pci_dev
,
7045 "Couldn't allocate IO Memory space %x len %d.\n",
7050 base
= mem_addr
& PAGE_MASK
;
7051 offs
= mem_addr
- base
;
7052 ioremap_ptr
= ioremap(base
, PAGE_SIZE
);
7053 mem_ptr
= ioremap_ptr
+ offs
;
7059 /* setup I/O mapped area (if applicable) */
7061 if (!request_region(io_addr
, io_len
, "ips")) {
7062 IPS_PRINTK(KERN_WARNING
, pci_dev
,
7063 "Couldn't allocate IO space %x len %d.\n",
7069 subdevice_id
= pci_dev
->subsystem_device
;
7071 /* found a controller */
7072 ha
= kzalloc(sizeof (ips_ha_t
), GFP_KERNEL
);
7074 IPS_PRINTK(KERN_WARNING
, pci_dev
,
7075 "Unable to allocate temporary ha struct\n");
7080 ips_sh
[index
] = NULL
;
7084 /* Store info in HA structure */
7086 ha
->io_addr
= io_addr
;
7087 ha
->io_len
= io_len
;
7088 ha
->mem_addr
= mem_addr
;
7089 ha
->mem_len
= mem_len
;
7090 ha
->mem_ptr
= mem_ptr
;
7091 ha
->ioremap_ptr
= ioremap_ptr
;
7092 ha
->host_num
= (uint32_t) index
;
7093 ha
->revision_id
= pci_dev
->revision
;
7094 ha
->slot_num
= PCI_SLOT(pci_dev
->devfn
);
7095 ha
->device_id
= pci_dev
->device
;
7096 ha
->subdevice_id
= subdevice_id
;
7097 ha
->pcidev
= pci_dev
;
7100 * Set the pci_dev's dma_mask. Not all adapters support 64bit
7101 * addressing so don't enable it if the adapter can't support
7102 * it! Also, don't use 64bit addressing if dma addresses
7103 * are guaranteed to be < 4G.
7105 if (IPS_ENABLE_DMA64
&& IPS_HAS_ENH_SGLIST(ha
) &&
7106 !pci_set_dma_mask(ha
->pcidev
, DMA_64BIT_MASK
)) {
7107 (ha
)->flags
|= IPS_HA_ENH_SG
;
7109 if (pci_set_dma_mask(ha
->pcidev
, DMA_32BIT_MASK
) != 0) {
7110 printk(KERN_WARNING
"Unable to set DMA Mask\n");
7111 return ips_abort_init(ha
, index
);
7114 if(ips_cd_boot
&& !ips_FlashData
){
7115 ips_FlashData
= pci_alloc_consistent(pci_dev
, PAGE_SIZE
<< 7,
7119 ha
->enq
= pci_alloc_consistent(pci_dev
, sizeof (IPS_ENQ
),
7122 IPS_PRINTK(KERN_WARNING
, pci_dev
,
7123 "Unable to allocate host inquiry structure\n");
7124 return ips_abort_init(ha
, index
);
7127 ha
->adapt
= pci_alloc_consistent(pci_dev
, sizeof (IPS_ADAPTER
) +
7128 sizeof (IPS_IO_CMD
), &dma_address
);
7130 IPS_PRINTK(KERN_WARNING
, pci_dev
,
7131 "Unable to allocate host adapt & dummy structures\n");
7132 return ips_abort_init(ha
, index
);
7134 ha
->adapt
->hw_status_start
= dma_address
;
7135 ha
->dummy
= (void *) (ha
->adapt
+ 1);
7139 ha
->logical_drive_info
= pci_alloc_consistent(pci_dev
, sizeof (IPS_LD_INFO
), &dma_address
);
7140 if (!ha
->logical_drive_info
) {
7141 IPS_PRINTK(KERN_WARNING
, pci_dev
,
7142 "Unable to allocate logical drive info structure\n");
7143 return ips_abort_init(ha
, index
);
7145 ha
->logical_drive_info_dma_addr
= dma_address
;
7148 ha
->conf
= kmalloc(sizeof (IPS_CONF
), GFP_KERNEL
);
7151 IPS_PRINTK(KERN_WARNING
, pci_dev
,
7152 "Unable to allocate host conf structure\n");
7153 return ips_abort_init(ha
, index
);
7156 ha
->nvram
= kmalloc(sizeof (IPS_NVRAM_P5
), GFP_KERNEL
);
7159 IPS_PRINTK(KERN_WARNING
, pci_dev
,
7160 "Unable to allocate host NVRAM structure\n");
7161 return ips_abort_init(ha
, index
);
7164 ha
->subsys
= kmalloc(sizeof (IPS_SUBSYS
), GFP_KERNEL
);
7167 IPS_PRINTK(KERN_WARNING
, pci_dev
,
7168 "Unable to allocate host subsystem structure\n");
7169 return ips_abort_init(ha
, index
);
7172 /* the ioctl buffer is now used during adapter initialization, so its
7173 * successful allocation is now required */
7174 if (ips_ioctlsize
< PAGE_SIZE
)
7175 ips_ioctlsize
= PAGE_SIZE
;
7177 ha
->ioctl_data
= pci_alloc_consistent(pci_dev
, ips_ioctlsize
,
7178 &ha
->ioctl_busaddr
);
7179 ha
->ioctl_len
= ips_ioctlsize
;
7180 if (!ha
->ioctl_data
) {
7181 IPS_PRINTK(KERN_WARNING
, pci_dev
,
7182 "Unable to allocate IOCTL data\n");
7183 return ips_abort_init(ha
, index
);
7189 ips_setup_funclist(ha
);
7191 if ((IPS_IS_MORPHEUS(ha
)) || (IPS_IS_MARCO(ha
))) {
7192 /* If Morpheus appears dead, reset it */
7193 IsDead
= readl(ha
->mem_ptr
+ IPS_REG_I960_MSG1
);
7194 if (IsDead
== 0xDEADBEEF) {
7195 ips_reset_morpheus(ha
);
7200 * Initialize the card if it isn't already
7203 if (!(*ha
->func
.isinit
) (ha
)) {
7204 if (!(*ha
->func
.init
) (ha
)) {
7206 * Initialization failed
7208 IPS_PRINTK(KERN_WARNING
, pci_dev
,
7209 "Unable to initialize controller\n");
7210 return ips_abort_init(ha
, index
);
7218 /*---------------------------------------------------------------------------*/
7219 /* Routine Name: ips_init_phase2 */
7221 /* Routine Description: */
7222 /* Adapter Initialization Phase 2 */
7225 /* 0 if Successful, else non-zero */
7226 /*---------------------------------------------------------------------------*/
7228 ips_init_phase2(int index
)
7234 METHOD_TRACE("ips_init_phase2", 1);
7236 ips_ha
[index
] = NULL
;
7240 /* Install the interrupt handler */
7241 if (request_irq(ha
->irq
, do_ipsintr
, IRQF_SHARED
, ips_name
, ha
)) {
7242 IPS_PRINTK(KERN_WARNING
, ha
->pcidev
,
7243 "Unable to install interrupt handler\n");
7244 return ips_abort_init(ha
, index
);
7248 * Allocate a temporary SCB for initialization
7251 if (!ips_allocatescbs(ha
)) {
7252 IPS_PRINTK(KERN_WARNING
, ha
->pcidev
,
7253 "Unable to allocate a CCB\n");
7254 free_irq(ha
->irq
, ha
);
7255 return ips_abort_init(ha
, index
);
7258 if (!ips_hainit(ha
)) {
7259 IPS_PRINTK(KERN_WARNING
, ha
->pcidev
,
7260 "Unable to initialize controller\n");
7261 free_irq(ha
->irq
, ha
);
7262 return ips_abort_init(ha
, index
);
7264 /* Free the temporary SCB */
7265 ips_deallocatescbs(ha
, 1);
7268 if (!ips_allocatescbs(ha
)) {
7269 IPS_PRINTK(KERN_WARNING
, ha
->pcidev
,
7270 "Unable to allocate CCBs\n");
7271 free_irq(ha
->irq
, ha
);
7272 return ips_abort_init(ha
, index
);
7278 MODULE_LICENSE("GPL");
7279 MODULE_DESCRIPTION("IBM ServeRAID Adapter Driver " IPS_VER_STRING
);
7280 MODULE_VERSION(IPS_VER_STRING
);
7284 * Overrides for Emacs so that we almost follow Linus's tabbing style.
7285 * Emacs will notice this stuff at the end of the file and automatically
7286 * adjust the settings for this buffer only. This must remain at the end
7288 * ---------------------------------------------------------------------------
7291 * c-brace-imaginary-offset: 0
7292 * c-brace-offset: -2
7293 * c-argdecl-indent: 2
7294 * c-label-offset: -2
7295 * c-continued-statement-offset: 2
7296 * c-continued-brace-offset: 0
7297 * indent-tabs-mode: nil