5 * Copyright Information:
6 * Copyright Digital Equipment Corporation 1996.
8 * This software may be used and distributed according to the terms of
9 * the GNU General Public License, incorporated herein by reference.
12 * A Linux device driver supporting the Digital Equipment Corporation
13 * FDDI TURBOchannel, EISA and PCI controller families. Supported
16 * DEC FDDIcontroller/TURBOchannel (DEFTA)
17 * DEC FDDIcontroller/EISA (DEFEA)
18 * DEC FDDIcontroller/PCI (DEFPA)
20 * The original author:
21 * LVS Lawrence V. Stefani <lstefani@yahoo.com>
24 * macro Maciej W. Rozycki <macro@linux-mips.org>
27 * I'd like to thank Patricia Cross for helping me get started with
28 * Linux, David Davies for a lot of help upgrading and configuring
29 * my development system and for answering many OS and driver
30 * development questions, and Alan Cox for recommendations and
31 * integration help on getting FDDI support into Linux. LVS
33 * Driver Architecture:
34 * The driver architecture is largely based on previous driver work
35 * for other operating systems. The upper edge interface and
36 * functions were largely taken from existing Linux device drivers
37 * such as David Davies' DE4X5.C driver and Donald Becker's TULIP.C
41 * The driver scans for supported EISA adapters by reading the
42 * SLOT ID register for each EISA slot and making a match
43 * against the expected value.
45 * Bus-Specific Initialization -
46 * This driver currently supports both EISA and PCI controller
47 * families. While the custom DMA chip and FDDI logic is similar
48 * or identical, the bus logic is very different. After
49 * initialization, the only bus-specific differences is in how the
50 * driver enables and disables interrupts. Other than that, the
51 * run-time critical code behaves the same on both families.
52 * It's important to note that both adapter families are configured
53 * to I/O map, rather than memory map, the adapter registers.
56 * In the driver open routine, the driver ISR (interrupt service
57 * routine) is registered and the adapter is brought to an
58 * operational state. In the driver close routine, the opposite
59 * occurs; the driver ISR is deregistered and the adapter is
60 * brought to a safe, but closed state. Users may use consecutive
61 * commands to bring the adapter up and down as in the following
68 * Apparently, there is no shutdown or halt routine support under
69 * Linux. This routine would be called during "reboot" or
70 * "shutdown" to allow the driver to place the adapter in a safe
71 * state before a warm reboot occurs. To be really safe, the user
72 * should close the adapter before shutdown (eg. ifconfig fddi0 down)
73 * to ensure that the adapter DMA engine is taken off-line. However,
74 * the current driver code anticipates this problem and always issues
75 * a soft reset of the adapter at the beginning of driver initialization.
76 * A future driver enhancement in this area may occur in 2.1.X where
77 * Alan indicated that a shutdown handler may be implemented.
79 * Interrupt Service Routine -
80 * The driver supports shared interrupts, so the ISR is registered for
81 * each board with the appropriate flag and the pointer to that board's
82 * device structure. This provides the context during interrupt
83 * processing to support shared interrupts and multiple boards.
85 * Interrupt enabling/disabling can occur at many levels. At the host
86 * end, you can disable system interrupts, or disable interrupts at the
87 * PIC (on Intel systems). Across the bus, both EISA and PCI adapters
88 * have a bus-logic chip interrupt enable/disable as well as a DMA
89 * controller interrupt enable/disable.
91 * The driver currently enables and disables adapter interrupts at the
92 * bus-logic chip and assumes that Linux will take care of clearing or
93 * acknowledging any host-based interrupt chips.
96 * Control functions are those used to support functions such as adding
97 * or deleting multicast addresses, enabling or disabling packet
98 * reception filters, or other custom/proprietary commands. Presently,
99 * the driver supports the "get statistics", "set multicast list", and
100 * "set mac address" functions defined by Linux. A list of possible
101 * enhancements include:
103 * - Custom ioctl interface for executing port interface commands
104 * - Custom ioctl interface for adding unicast addresses to
105 * adapter CAM (to support bridge functions).
106 * - Custom ioctl interface for supporting firmware upgrades.
108 * Hardware (port interface) Support Routines -
109 * The driver function names that start with "dfx_hw_" represent
110 * low-level port interface routines that are called frequently. They
111 * include issuing a DMA or port control command to the adapter,
112 * resetting the adapter, or reading the adapter state. Since the
113 * driver initialization and run-time code must make calls into the
114 * port interface, these routines were written to be as generic and
115 * usable as possible.
118 * The adapter DMA engine supports a 256 entry receive descriptor block
119 * of which up to 255 entries can be used at any given time. The
120 * architecture is a standard producer, consumer, completion model in
121 * which the driver "produces" receive buffers to the adapter, the
122 * adapter "consumes" the receive buffers by DMAing incoming packet data,
123 * and the driver "completes" the receive buffers by servicing the
124 * incoming packet, then "produces" a new buffer and starts the cycle
125 * again. Receive buffers can be fragmented in up to 16 fragments
126 * (descriptor entries). For simplicity, this driver posts
127 * single-fragment receive buffers of 4608 bytes, then allocates a
128 * sk_buff, copies the data, then reposts the buffer. To reduce CPU
129 * utilization, a better approach would be to pass up the receive
130 * buffer (no extra copy) then allocate and post a replacement buffer.
131 * This is a performance enhancement that should be looked into at
135 * Like the receive path, the adapter DMA engine supports a 256 entry
136 * transmit descriptor block of which up to 255 entries can be used at
137 * any given time. Transmit buffers can be fragmented in up to 255
138 * fragments (descriptor entries). This driver always posts one
139 * fragment per transmit packet request.
141 * The fragment contains the entire packet from FC to end of data.
142 * Before posting the buffer to the adapter, the driver sets a three-byte
143 * packet request header (PRH) which is required by the Motorola MAC chip
144 * used on the adapters. The PRH tells the MAC the type of token to
145 * receive/send, whether or not to generate and append the CRC, whether
146 * synchronous or asynchronous framing is used, etc. Since the PRH
147 * definition is not necessarily consistent across all FDDI chipsets,
148 * the driver, rather than the common FDDI packet handler routines,
151 * To reduce the amount of descriptor fetches needed per transmit request,
152 * the driver takes advantage of the fact that there are at least three
153 * bytes available before the skb->data field on the outgoing transmit
154 * request. This is guaranteed by having fddi_setup() in net_init.c set
155 * dev->hard_header_len to 24 bytes. 21 bytes accounts for the largest
156 * header in an 802.2 SNAP frame. The other 3 bytes are the extra "pad"
157 * bytes which we'll use to store the PRH.
159 * There's a subtle advantage to adding these pad bytes to the
160 * hard_header_len, it ensures that the data portion of the packet for
161 * an 802.2 SNAP frame is longword aligned. Other FDDI driver
162 * implementations may not need the extra padding and can start copying
163 * or DMAing directly from the FC byte which starts at skb->data. Should
164 * another driver implementation need ADDITIONAL padding, the net_init.c
165 * module should be updated and dev->hard_header_len should be increased.
166 * NOTE: To maintain the alignment on the data portion of the packet,
167 * dev->hard_header_len should always be evenly divisible by 4 and at
168 * least 24 bytes in size.
170 * Modification History:
171 * Date Name Description
172 * 16-Aug-96 LVS Created.
173 * 20-Aug-96 LVS Updated dfx_probe so that version information
174 * string is only displayed if 1 or more cards are
175 * found. Changed dfx_rcv_queue_process to copy
176 * 3 NULL bytes before FC to ensure that data is
177 * longword aligned in receive buffer.
178 * 09-Sep-96 LVS Updated dfx_ctl_set_multicast_list to enable
179 * LLC group promiscuous mode if multicast list
180 * is too large. LLC individual/group promiscuous
181 * mode is now disabled if IFF_PROMISC flag not set.
182 * dfx_xmt_queue_pkt no longer checks for NULL skb
183 * on Alan Cox recommendation. Added node address
185 * 12-Sep-96 LVS Reset current address to factory address during
186 * device open. Updated transmit path to post a
187 * single fragment which includes PRH->end of data.
188 * Mar 2000 AC Did various cleanups for 2.3.x
189 * Jun 2000 jgarzik PCI and resource alloc cleanups
190 * Jul 2000 tjeerd Much cleanup and some bug fixes
191 * Sep 2000 tjeerd Fix leak on unload, cosmetic code cleanup
192 * Feb 2001 Skb allocation fixes
193 * Feb 2001 davej PCI enable cleanups.
194 * 04 Aug 2003 macro Converted to the DMA API.
195 * 14 Aug 2004 macro Fix device names reported.
196 * 14 Jun 2005 macro Use irqreturn_t.
197 * 23 Oct 2006 macro Big-endian host support.
198 * 14 Dec 2006 macro TURBOchannel support.
202 #include <linux/bitops.h>
203 #include <linux/compiler.h>
204 #include <linux/delay.h>
205 #include <linux/dma-mapping.h>
206 #include <linux/eisa.h>
207 #include <linux/errno.h>
208 #include <linux/fddidevice.h>
209 #include <linux/init.h>
210 #include <linux/interrupt.h>
211 #include <linux/ioport.h>
212 #include <linux/kernel.h>
213 #include <linux/module.h>
214 #include <linux/netdevice.h>
215 #include <linux/pci.h>
216 #include <linux/skbuff.h>
217 #include <linux/slab.h>
218 #include <linux/string.h>
219 #include <linux/tc.h>
221 #include <asm/byteorder.h>
226 /* Version information string should be updated prior to each new release! */
227 #define DRV_NAME "defxx"
228 #define DRV_VERSION "v1.10"
229 #define DRV_RELDATE "2006/12/14"
231 static char version
[] __devinitdata
=
232 DRV_NAME
": " DRV_VERSION
" " DRV_RELDATE
233 " Lawrence V. Stefani and others\n";
235 #define DYNAMIC_BUFFERS 1
237 #define SKBUFF_RX_COPYBREAK 200
239 * NEW_SKB_SIZE = PI_RCV_DATA_K_SIZE_MAX+128 to allow 128 byte
240 * alignment for compatibility with old EISA boards.
242 #define NEW_SKB_SIZE (PI_RCV_DATA_K_SIZE_MAX+128)
245 #define DFX_BUS_PCI(dev) (dev->bus == &pci_bus_type)
247 #define DFX_BUS_PCI(dev) 0
251 #define DFX_BUS_EISA(dev) (dev->bus == &eisa_bus_type)
253 #define DFX_BUS_EISA(dev) 0
257 #define DFX_BUS_TC(dev) (dev->bus == &tc_bus_type)
259 #define DFX_BUS_TC(dev) 0
262 #ifdef CONFIG_DEFXX_MMIO
268 /* Define module-wide (static) routines */
270 static void dfx_bus_init(struct net_device
*dev
);
271 static void dfx_bus_uninit(struct net_device
*dev
);
272 static void dfx_bus_config_check(DFX_board_t
*bp
);
274 static int dfx_driver_init(struct net_device
*dev
,
275 const char *print_name
,
276 resource_size_t bar_start
);
277 static int dfx_adap_init(DFX_board_t
*bp
, int get_buffers
);
279 static int dfx_open(struct net_device
*dev
);
280 static int dfx_close(struct net_device
*dev
);
282 static void dfx_int_pr_halt_id(DFX_board_t
*bp
);
283 static void dfx_int_type_0_process(DFX_board_t
*bp
);
284 static void dfx_int_common(struct net_device
*dev
);
285 static irqreturn_t
dfx_interrupt(int irq
, void *dev_id
);
287 static struct net_device_stats
*dfx_ctl_get_stats(struct net_device
*dev
);
288 static void dfx_ctl_set_multicast_list(struct net_device
*dev
);
289 static int dfx_ctl_set_mac_address(struct net_device
*dev
, void *addr
);
290 static int dfx_ctl_update_cam(DFX_board_t
*bp
);
291 static int dfx_ctl_update_filters(DFX_board_t
*bp
);
293 static int dfx_hw_dma_cmd_req(DFX_board_t
*bp
);
294 static int dfx_hw_port_ctrl_req(DFX_board_t
*bp
, PI_UINT32 command
, PI_UINT32 data_a
, PI_UINT32 data_b
, PI_UINT32
*host_data
);
295 static void dfx_hw_adap_reset(DFX_board_t
*bp
, PI_UINT32 type
);
296 static int dfx_hw_adap_state_rd(DFX_board_t
*bp
);
297 static int dfx_hw_dma_uninit(DFX_board_t
*bp
, PI_UINT32 type
);
299 static int dfx_rcv_init(DFX_board_t
*bp
, int get_buffers
);
300 static void dfx_rcv_queue_process(DFX_board_t
*bp
);
301 static void dfx_rcv_flush(DFX_board_t
*bp
);
303 static int dfx_xmt_queue_pkt(struct sk_buff
*skb
, struct net_device
*dev
);
304 static int dfx_xmt_done(DFX_board_t
*bp
);
305 static void dfx_xmt_flush(DFX_board_t
*bp
);
307 /* Define module-wide (static) variables */
309 static struct pci_driver dfx_pci_driver
;
310 static struct eisa_driver dfx_eisa_driver
;
311 static struct tc_driver dfx_tc_driver
;
315 * =======================
316 * = dfx_port_write_long =
317 * = dfx_port_read_long =
318 * =======================
321 * Routines for reading and writing values from/to adapter
327 * bp - pointer to board information
328 * offset - register offset from base I/O address
329 * data - for dfx_port_write_long, this is a value to write;
330 * for dfx_port_read_long, this is a pointer to store
333 * Functional Description:
334 * These routines perform the correct operation to read or write
335 * the adapter register.
337 * EISA port block base addresses are based on the slot number in which the
338 * controller is installed. For example, if the EISA controller is installed
339 * in slot 4, the port block base address is 0x4000. If the controller is
340 * installed in slot 2, the port block base address is 0x2000, and so on.
341 * This port block can be used to access PDQ, ESIC, and DEFEA on-board
342 * registers using the register offsets defined in DEFXX.H.
344 * PCI port block base addresses are assigned by the PCI BIOS or system
345 * firmware. There is one 128 byte port block which can be accessed. It
346 * allows for I/O mapping of both PDQ and PFI registers using the register
347 * offsets defined in DEFXX.H.
353 * bp->base is a valid base I/O address for this adapter.
354 * offset is a valid register offset for this adapter.
357 * Rather than produce macros for these functions, these routines
358 * are defined using "inline" to ensure that the compiler will
359 * generate inline code and not waste a procedure call and return.
360 * This provides all the benefits of macros, but with the
361 * advantage of strict data type checking.
364 static inline void dfx_writel(DFX_board_t
*bp
, int offset
, u32 data
)
366 writel(data
, bp
->base
.mem
+ offset
);
370 static inline void dfx_outl(DFX_board_t
*bp
, int offset
, u32 data
)
372 outl(data
, bp
->base
.port
+ offset
);
375 static void dfx_port_write_long(DFX_board_t
*bp
, int offset
, u32 data
)
377 struct device __maybe_unused
*bdev
= bp
->bus_dev
;
378 int dfx_bus_tc
= DFX_BUS_TC(bdev
);
379 int dfx_use_mmio
= DFX_MMIO
|| dfx_bus_tc
;
382 dfx_writel(bp
, offset
, data
);
384 dfx_outl(bp
, offset
, data
);
388 static inline void dfx_readl(DFX_board_t
*bp
, int offset
, u32
*data
)
391 *data
= readl(bp
->base
.mem
+ offset
);
394 static inline void dfx_inl(DFX_board_t
*bp
, int offset
, u32
*data
)
396 *data
= inl(bp
->base
.port
+ offset
);
399 static void dfx_port_read_long(DFX_board_t
*bp
, int offset
, u32
*data
)
401 struct device __maybe_unused
*bdev
= bp
->bus_dev
;
402 int dfx_bus_tc
= DFX_BUS_TC(bdev
);
403 int dfx_use_mmio
= DFX_MMIO
|| dfx_bus_tc
;
406 dfx_readl(bp
, offset
, data
);
408 dfx_inl(bp
, offset
, data
);
418 * Retrieves the address range used to access control and status
425 * bdev - pointer to device information
426 * bar_start - pointer to store the start address
427 * bar_len - pointer to store the length of the area
430 * I am sure there are some.
435 static void dfx_get_bars(struct device
*bdev
,
436 resource_size_t
*bar_start
, resource_size_t
*bar_len
)
438 int dfx_bus_pci
= DFX_BUS_PCI(bdev
);
439 int dfx_bus_eisa
= DFX_BUS_EISA(bdev
);
440 int dfx_bus_tc
= DFX_BUS_TC(bdev
);
441 int dfx_use_mmio
= DFX_MMIO
|| dfx_bus_tc
;
444 int num
= dfx_use_mmio
? 0 : 1;
446 *bar_start
= pci_resource_start(to_pci_dev(bdev
), num
);
447 *bar_len
= pci_resource_len(to_pci_dev(bdev
), num
);
450 unsigned long base_addr
= to_eisa_device(bdev
)->base_addr
;
454 bar
= inb(base_addr
+ PI_ESIC_K_MEM_ADD_CMP_2
);
456 bar
|= inb(base_addr
+ PI_ESIC_K_MEM_ADD_CMP_1
);
458 bar
|= inb(base_addr
+ PI_ESIC_K_MEM_ADD_CMP_0
);
461 bar
= inb(base_addr
+ PI_ESIC_K_MEM_ADD_MASK_2
);
463 bar
|= inb(base_addr
+ PI_ESIC_K_MEM_ADD_MASK_1
);
465 bar
|= inb(base_addr
+ PI_ESIC_K_MEM_ADD_MASK_0
);
467 *bar_len
= (bar
| PI_MEM_ADD_MASK_M
) + 1;
469 *bar_start
= base_addr
;
470 *bar_len
= PI_ESIC_K_CSR_IO_LEN
;
474 *bar_start
= to_tc_dev(bdev
)->resource
.start
+
476 *bar_len
= PI_TC_K_CSR_LEN
;
486 * Initializes a supported FDDI controller
492 * bdev - pointer to device information
494 * Functional Description:
497 * 0 - This device (fddi0, fddi1, etc) configured successfully
498 * -EBUSY - Failed to get resources, or dfx_driver_init failed.
501 * It compiles so it should work :-( (PCI cards do :-)
504 * Device structures for FDDI adapters (fddi0, fddi1, etc) are
505 * initialized and the board resources are read and stored in
506 * the device structure.
508 static int __devinit
dfx_register(struct device
*bdev
)
510 static int version_disp
;
511 int dfx_bus_pci
= DFX_BUS_PCI(bdev
);
512 int dfx_bus_tc
= DFX_BUS_TC(bdev
);
513 int dfx_use_mmio
= DFX_MMIO
|| dfx_bus_tc
;
514 char *print_name
= bdev
->bus_id
;
515 struct net_device
*dev
;
516 DFX_board_t
*bp
; /* board pointer */
517 resource_size_t bar_start
= 0; /* pointer to port */
518 resource_size_t bar_len
= 0; /* resource length */
519 int alloc_size
; /* total buffer size used */
520 struct resource
*region
;
523 if (!version_disp
) { /* display version info if adapter is found */
524 version_disp
= 1; /* set display flag to TRUE so that */
525 printk(version
); /* we only display this string ONCE */
528 dev
= alloc_fddidev(sizeof(*bp
));
530 printk(KERN_ERR
"%s: Unable to allocate fddidev, aborting\n",
535 /* Enable PCI device. */
536 if (dfx_bus_pci
&& pci_enable_device(to_pci_dev(bdev
))) {
537 printk(KERN_ERR
"%s: Cannot enable PCI device, aborting\n",
542 SET_NETDEV_DEV(dev
, bdev
);
544 bp
= netdev_priv(dev
);
546 dev_set_drvdata(bdev
, dev
);
548 dfx_get_bars(bdev
, &bar_start
, &bar_len
);
551 region
= request_mem_region(bar_start
, bar_len
, print_name
);
553 region
= request_region(bar_start
, bar_len
, print_name
);
555 printk(KERN_ERR
"%s: Cannot reserve I/O resource "
556 "0x%lx @ 0x%lx, aborting\n",
557 print_name
, (long)bar_len
, (long)bar_start
);
559 goto err_out_disable
;
562 /* Set up I/O base address. */
564 bp
->base
.mem
= ioremap_nocache(bar_start
, bar_len
);
566 printk(KERN_ERR
"%s: Cannot map MMIO\n", print_name
);
571 bp
->base
.port
= bar_start
;
572 dev
->base_addr
= bar_start
;
575 /* Initialize new device structure */
577 dev
->get_stats
= dfx_ctl_get_stats
;
578 dev
->open
= dfx_open
;
579 dev
->stop
= dfx_close
;
580 dev
->hard_start_xmit
= dfx_xmt_queue_pkt
;
581 dev
->set_multicast_list
= dfx_ctl_set_multicast_list
;
582 dev
->set_mac_address
= dfx_ctl_set_mac_address
;
585 pci_set_master(to_pci_dev(bdev
));
587 if (dfx_driver_init(dev
, print_name
, bar_start
) != DFX_K_SUCCESS
) {
592 err
= register_netdev(dev
);
596 printk("%s: registered as %s\n", print_name
, dev
->name
);
600 alloc_size
= sizeof(PI_DESCR_BLOCK
) +
601 PI_CMD_REQ_K_SIZE_MAX
+ PI_CMD_RSP_K_SIZE_MAX
+
602 #ifndef DYNAMIC_BUFFERS
603 (bp
->rcv_bufs_to_post
* PI_RCV_DATA_K_SIZE_MAX
) +
605 sizeof(PI_CONSUMER_BLOCK
) +
606 (PI_ALIGN_K_DESC_BLK
- 1);
608 dma_free_coherent(bdev
, alloc_size
,
609 bp
->kmalloced
, bp
->kmalloced_dma
);
613 iounmap(bp
->base
.mem
);
617 release_mem_region(bar_start
, bar_len
);
619 release_region(bar_start
, bar_len
);
623 pci_disable_device(to_pci_dev(bdev
));
637 * Initializes the bus-specific controller logic.
643 * dev - pointer to device information
645 * Functional Description:
646 * Determine and save adapter IRQ in device table,
647 * then perform bus-specific logic initialization.
653 * bp->base has already been set with the proper
654 * base I/O address for this device.
657 * Interrupts are enabled at the adapter bus-specific logic.
658 * Note: Interrupts at the DMA engine (PDQ chip) are not
662 static void __devinit
dfx_bus_init(struct net_device
*dev
)
664 DFX_board_t
*bp
= netdev_priv(dev
);
665 struct device
*bdev
= bp
->bus_dev
;
666 int dfx_bus_pci
= DFX_BUS_PCI(bdev
);
667 int dfx_bus_eisa
= DFX_BUS_EISA(bdev
);
668 int dfx_bus_tc
= DFX_BUS_TC(bdev
);
669 int dfx_use_mmio
= DFX_MMIO
|| dfx_bus_tc
;
672 DBG_printk("In dfx_bus_init...\n");
674 /* Initialize a pointer back to the net_device struct */
677 /* Initialize adapter based on bus type */
680 dev
->irq
= to_tc_dev(bdev
)->interrupt
;
682 unsigned long base_addr
= to_eisa_device(bdev
)->base_addr
;
684 /* Get the interrupt level from the ESIC chip. */
685 val
= inb(base_addr
+ PI_ESIC_K_IO_CONFIG_STAT_0
);
686 val
&= PI_CONFIG_STAT_0_M_IRQ
;
687 val
>>= PI_CONFIG_STAT_0_V_IRQ
;
690 case PI_CONFIG_STAT_0_IRQ_K_9
:
694 case PI_CONFIG_STAT_0_IRQ_K_10
:
698 case PI_CONFIG_STAT_0_IRQ_K_11
:
702 case PI_CONFIG_STAT_0_IRQ_K_15
:
708 * Enable memory decoding (MEMCS0) and/or port decoding
709 * (IOCS1/IOCS0) as appropriate in Function Control
710 * Register. One of the port chip selects seems to be
711 * used for the Burst Holdoff register, but this bit of
712 * documentation is missing and as yet it has not been
713 * determined which of the two. This is also the reason
714 * the size of the decoded port range is twice as large
715 * as one required by the PDQ.
718 /* Set the decode range of the board. */
719 val
= ((bp
->base
.port
>> 12) << PI_IO_CMP_V_SLOT
);
720 outb(base_addr
+ PI_ESIC_K_IO_ADD_CMP_0_1
, val
);
721 outb(base_addr
+ PI_ESIC_K_IO_ADD_CMP_0_0
, 0);
722 outb(base_addr
+ PI_ESIC_K_IO_ADD_CMP_1_1
, val
);
723 outb(base_addr
+ PI_ESIC_K_IO_ADD_CMP_1_0
, 0);
724 val
= PI_ESIC_K_CSR_IO_LEN
- 1;
725 outb(base_addr
+ PI_ESIC_K_IO_ADD_MASK_0_1
, (val
>> 8) & 0xff);
726 outb(base_addr
+ PI_ESIC_K_IO_ADD_MASK_0_0
, val
& 0xff);
727 outb(base_addr
+ PI_ESIC_K_IO_ADD_MASK_1_1
, (val
>> 8) & 0xff);
728 outb(base_addr
+ PI_ESIC_K_IO_ADD_MASK_1_0
, val
& 0xff);
730 /* Enable the decoders. */
731 val
= PI_FUNCTION_CNTRL_M_IOCS1
| PI_FUNCTION_CNTRL_M_IOCS0
;
733 val
|= PI_FUNCTION_CNTRL_M_MEMCS0
;
734 outb(base_addr
+ PI_ESIC_K_FUNCTION_CNTRL
, val
);
737 * Enable access to the rest of the module
738 * (including PDQ and packet memory).
740 val
= PI_SLOT_CNTRL_M_ENB
;
741 outb(base_addr
+ PI_ESIC_K_SLOT_CNTRL
, val
);
744 * Map PDQ registers into memory or port space. This is
745 * done with a bit in the Burst Holdoff register.
747 val
= inb(base_addr
+ PI_DEFEA_K_BURST_HOLDOFF
);
749 val
|= PI_BURST_HOLDOFF_V_MEM_MAP
;
751 val
&= ~PI_BURST_HOLDOFF_V_MEM_MAP
;
752 outb(base_addr
+ PI_DEFEA_K_BURST_HOLDOFF
, val
);
754 /* Enable interrupts at EISA bus interface chip (ESIC) */
755 val
= inb(base_addr
+ PI_ESIC_K_IO_CONFIG_STAT_0
);
756 val
|= PI_CONFIG_STAT_0_M_INT_ENB
;
757 outb(base_addr
+ PI_ESIC_K_IO_CONFIG_STAT_0
, val
);
760 struct pci_dev
*pdev
= to_pci_dev(bdev
);
762 /* Get the interrupt level from the PCI Configuration Table */
764 dev
->irq
= pdev
->irq
;
766 /* Check Latency Timer and set if less than minimal */
768 pci_read_config_byte(pdev
, PCI_LATENCY_TIMER
, &val
);
769 if (val
< PFI_K_LAT_TIMER_MIN
) {
770 val
= PFI_K_LAT_TIMER_DEF
;
771 pci_write_config_byte(pdev
, PCI_LATENCY_TIMER
, val
);
774 /* Enable interrupts at PCI bus interface chip (PFI) */
775 val
= PFI_MODE_M_PDQ_INT_ENB
| PFI_MODE_M_DMA_ENB
;
776 dfx_port_write_long(bp
, PFI_K_REG_MODE_CTRL
, val
);
786 * Uninitializes the bus-specific controller logic.
792 * dev - pointer to device information
794 * Functional Description:
795 * Perform bus-specific logic uninitialization.
801 * bp->base has already been set with the proper
802 * base I/O address for this device.
805 * Interrupts are disabled at the adapter bus-specific logic.
808 static void __devexit
dfx_bus_uninit(struct net_device
*dev
)
810 DFX_board_t
*bp
= netdev_priv(dev
);
811 struct device
*bdev
= bp
->bus_dev
;
812 int dfx_bus_pci
= DFX_BUS_PCI(bdev
);
813 int dfx_bus_eisa
= DFX_BUS_EISA(bdev
);
816 DBG_printk("In dfx_bus_uninit...\n");
818 /* Uninitialize adapter based on bus type */
821 unsigned long base_addr
= to_eisa_device(bdev
)->base_addr
;
823 /* Disable interrupts at EISA bus interface chip (ESIC) */
824 val
= inb(base_addr
+ PI_ESIC_K_IO_CONFIG_STAT_0
);
825 val
&= ~PI_CONFIG_STAT_0_M_INT_ENB
;
826 outb(base_addr
+ PI_ESIC_K_IO_CONFIG_STAT_0
, val
);
829 /* Disable interrupts at PCI bus interface chip (PFI) */
830 dfx_port_write_long(bp
, PFI_K_REG_MODE_CTRL
, 0);
836 * ========================
837 * = dfx_bus_config_check =
838 * ========================
841 * Checks the configuration (burst size, full-duplex, etc.) If any parameters
842 * are illegal, then this routine will set new defaults.
848 * bp - pointer to board information
850 * Functional Description:
851 * For Revision 1 FDDI EISA, Revision 2 or later FDDI EISA with rev E or later
852 * PDQ, and all FDDI PCI controllers, all values are legal.
858 * dfx_adap_init has NOT been called yet so burst size and other items have
865 static void __devinit
dfx_bus_config_check(DFX_board_t
*bp
)
867 struct device __maybe_unused
*bdev
= bp
->bus_dev
;
868 int dfx_bus_eisa
= DFX_BUS_EISA(bdev
);
869 int status
; /* return code from adapter port control call */
870 u32 host_data
; /* LW data returned from port control call */
872 DBG_printk("In dfx_bus_config_check...\n");
874 /* Configuration check only valid for EISA adapter */
878 * First check if revision 2 EISA controller. Rev. 1 cards used
879 * PDQ revision B, so no workaround needed in this case. Rev. 3
880 * cards used PDQ revision E, so no workaround needed in this
881 * case, either. Only Rev. 2 cards used either Rev. D or E
882 * chips, so we must verify the chip revision on Rev. 2 cards.
884 if (to_eisa_device(bdev
)->id
.driver_data
== DEFEA_PROD_ID_2
) {
886 * Revision 2 FDDI EISA controller found,
887 * so let's check PDQ revision of adapter.
889 status
= dfx_hw_port_ctrl_req(bp
,
891 PI_SUB_CMD_K_PDQ_REV_GET
,
894 if ((status
!= DFX_K_SUCCESS
) || (host_data
== 2))
897 * Either we couldn't determine the PDQ revision, or
898 * we determined that it is at revision D. In either case,
899 * we need to implement the workaround.
902 /* Ensure that the burst size is set to 8 longwords or less */
904 switch (bp
->burst_size
)
906 case PI_PDATA_B_DMA_BURST_SIZE_32
:
907 case PI_PDATA_B_DMA_BURST_SIZE_16
:
908 bp
->burst_size
= PI_PDATA_B_DMA_BURST_SIZE_8
;
915 /* Ensure that full-duplex mode is not enabled */
917 bp
->full_duplex_enb
= PI_SNMP_K_FALSE
;
925 * ===================
926 * = dfx_driver_init =
927 * ===================
930 * Initializes remaining adapter board structure information
931 * and makes sure adapter is in a safe state prior to dfx_open().
937 * dev - pointer to device information
938 * print_name - printable device name
940 * Functional Description:
941 * This function allocates additional resources such as the host memory
942 * blocks needed by the adapter (eg. descriptor and consumer blocks).
943 * Remaining bus initialization steps are also completed. The adapter
944 * is also reset so that it is in the DMA_UNAVAILABLE state. The OS
945 * must call dfx_open() to open the adapter and bring it on-line.
948 * DFX_K_SUCCESS - initialization succeeded
949 * DFX_K_FAILURE - initialization failed - could not allocate memory
950 * or read adapter MAC address
953 * Memory allocated from pci_alloc_consistent() call is physically
954 * contiguous, locked memory.
957 * Adapter is reset and should be in DMA_UNAVAILABLE state before
958 * returning from this routine.
961 static int __devinit
dfx_driver_init(struct net_device
*dev
,
962 const char *print_name
,
963 resource_size_t bar_start
)
965 DFX_board_t
*bp
= netdev_priv(dev
);
966 struct device
*bdev
= bp
->bus_dev
;
967 int dfx_bus_pci
= DFX_BUS_PCI(bdev
);
968 int dfx_bus_eisa
= DFX_BUS_EISA(bdev
);
969 int dfx_bus_tc
= DFX_BUS_TC(bdev
);
970 int dfx_use_mmio
= DFX_MMIO
|| dfx_bus_tc
;
971 int alloc_size
; /* total buffer size needed */
972 char *top_v
, *curr_v
; /* virtual addrs into memory block */
973 dma_addr_t top_p
, curr_p
; /* physical addrs into memory block */
974 u32 data
; /* host data register value */
976 char *board_name
= NULL
;
978 DBG_printk("In dfx_driver_init...\n");
980 /* Initialize bus-specific hardware registers */
985 * Initialize default values for configurable parameters
987 * Note: All of these parameters are ones that a user may
988 * want to customize. It'd be nice to break these
989 * out into Space.c or someplace else that's more
990 * accessible/understandable than this file.
993 bp
->full_duplex_enb
= PI_SNMP_K_FALSE
;
994 bp
->req_ttrt
= 8 * 12500; /* 8ms in 80 nanosec units */
995 bp
->burst_size
= PI_PDATA_B_DMA_BURST_SIZE_DEF
;
996 bp
->rcv_bufs_to_post
= RCV_BUFS_DEF
;
999 * Ensure that HW configuration is OK
1001 * Note: Depending on the hardware revision, we may need to modify
1002 * some of the configurable parameters to workaround hardware
1003 * limitations. We'll perform this configuration check AFTER
1004 * setting the parameters to their default values.
1007 dfx_bus_config_check(bp
);
1009 /* Disable PDQ interrupts first */
1011 dfx_port_write_long(bp
, PI_PDQ_K_REG_HOST_INT_ENB
, PI_HOST_INT_K_DISABLE_ALL_INTS
);
1013 /* Place adapter in DMA_UNAVAILABLE state by resetting adapter */
1015 (void) dfx_hw_dma_uninit(bp
, PI_PDATA_A_RESET_M_SKIP_ST
);
1017 /* Read the factory MAC address from the adapter then save it */
1019 if (dfx_hw_port_ctrl_req(bp
, PI_PCTRL_M_MLA
, PI_PDATA_A_MLA_K_LO
, 0,
1020 &data
) != DFX_K_SUCCESS
) {
1021 printk("%s: Could not read adapter factory MAC address!\n",
1023 return(DFX_K_FAILURE
);
1025 le32
= cpu_to_le32(data
);
1026 memcpy(&bp
->factory_mac_addr
[0], &le32
, sizeof(u32
));
1028 if (dfx_hw_port_ctrl_req(bp
, PI_PCTRL_M_MLA
, PI_PDATA_A_MLA_K_HI
, 0,
1029 &data
) != DFX_K_SUCCESS
) {
1030 printk("%s: Could not read adapter factory MAC address!\n",
1032 return(DFX_K_FAILURE
);
1034 le32
= cpu_to_le32(data
);
1035 memcpy(&bp
->factory_mac_addr
[4], &le32
, sizeof(u16
));
1038 * Set current address to factory address
1040 * Note: Node address override support is handled through
1041 * dfx_ctl_set_mac_address.
1044 memcpy(dev
->dev_addr
, bp
->factory_mac_addr
, FDDI_K_ALEN
);
1046 board_name
= "DEFTA";
1048 board_name
= "DEFEA";
1050 board_name
= "DEFPA";
1051 pr_info("%s: %s at %saddr = 0x%llx, IRQ = %d, "
1052 "Hardware addr = %02X-%02X-%02X-%02X-%02X-%02X\n",
1053 print_name
, board_name
, dfx_use_mmio
? "" : "I/O ",
1054 (long long)bar_start
, dev
->irq
,
1055 dev
->dev_addr
[0], dev
->dev_addr
[1], dev
->dev_addr
[2],
1056 dev
->dev_addr
[3], dev
->dev_addr
[4], dev
->dev_addr
[5]);
1059 * Get memory for descriptor block, consumer block, and other buffers
1060 * that need to be DMA read or written to by the adapter.
1063 alloc_size
= sizeof(PI_DESCR_BLOCK
) +
1064 PI_CMD_REQ_K_SIZE_MAX
+
1065 PI_CMD_RSP_K_SIZE_MAX
+
1066 #ifndef DYNAMIC_BUFFERS
1067 (bp
->rcv_bufs_to_post
* PI_RCV_DATA_K_SIZE_MAX
) +
1069 sizeof(PI_CONSUMER_BLOCK
) +
1070 (PI_ALIGN_K_DESC_BLK
- 1);
1071 bp
->kmalloced
= top_v
= dma_alloc_coherent(bp
->bus_dev
, alloc_size
,
1074 if (top_v
== NULL
) {
1075 printk("%s: Could not allocate memory for host buffers "
1076 "and structures!\n", print_name
);
1077 return(DFX_K_FAILURE
);
1079 memset(top_v
, 0, alloc_size
); /* zero out memory before continuing */
1080 top_p
= bp
->kmalloced_dma
; /* get physical address of buffer */
1083 * To guarantee the 8K alignment required for the descriptor block, 8K - 1
1084 * plus the amount of memory needed was allocated. The physical address
1085 * is now 8K aligned. By carving up the memory in a specific order,
1086 * we'll guarantee the alignment requirements for all other structures.
1088 * Note: If the assumptions change regarding the non-paged, non-cached,
1089 * physically contiguous nature of the memory block or the address
1090 * alignments, then we'll need to implement a different algorithm
1091 * for allocating the needed memory.
1094 curr_p
= ALIGN(top_p
, PI_ALIGN_K_DESC_BLK
);
1095 curr_v
= top_v
+ (curr_p
- top_p
);
1097 /* Reserve space for descriptor block */
1099 bp
->descr_block_virt
= (PI_DESCR_BLOCK
*) curr_v
;
1100 bp
->descr_block_phys
= curr_p
;
1101 curr_v
+= sizeof(PI_DESCR_BLOCK
);
1102 curr_p
+= sizeof(PI_DESCR_BLOCK
);
1104 /* Reserve space for command request buffer */
1106 bp
->cmd_req_virt
= (PI_DMA_CMD_REQ
*) curr_v
;
1107 bp
->cmd_req_phys
= curr_p
;
1108 curr_v
+= PI_CMD_REQ_K_SIZE_MAX
;
1109 curr_p
+= PI_CMD_REQ_K_SIZE_MAX
;
1111 /* Reserve space for command response buffer */
1113 bp
->cmd_rsp_virt
= (PI_DMA_CMD_RSP
*) curr_v
;
1114 bp
->cmd_rsp_phys
= curr_p
;
1115 curr_v
+= PI_CMD_RSP_K_SIZE_MAX
;
1116 curr_p
+= PI_CMD_RSP_K_SIZE_MAX
;
1118 /* Reserve space for the LLC host receive queue buffers */
1120 bp
->rcv_block_virt
= curr_v
;
1121 bp
->rcv_block_phys
= curr_p
;
1123 #ifndef DYNAMIC_BUFFERS
1124 curr_v
+= (bp
->rcv_bufs_to_post
* PI_RCV_DATA_K_SIZE_MAX
);
1125 curr_p
+= (bp
->rcv_bufs_to_post
* PI_RCV_DATA_K_SIZE_MAX
);
1128 /* Reserve space for the consumer block */
1130 bp
->cons_block_virt
= (PI_CONSUMER_BLOCK
*) curr_v
;
1131 bp
->cons_block_phys
= curr_p
;
1133 /* Display virtual and physical addresses if debug driver */
1135 DBG_printk("%s: Descriptor block virt = %0lX, phys = %0X\n",
1137 (long)bp
->descr_block_virt
, bp
->descr_block_phys
);
1138 DBG_printk("%s: Command Request buffer virt = %0lX, phys = %0X\n",
1139 print_name
, (long)bp
->cmd_req_virt
, bp
->cmd_req_phys
);
1140 DBG_printk("%s: Command Response buffer virt = %0lX, phys = %0X\n",
1141 print_name
, (long)bp
->cmd_rsp_virt
, bp
->cmd_rsp_phys
);
1142 DBG_printk("%s: Receive buffer block virt = %0lX, phys = %0X\n",
1143 print_name
, (long)bp
->rcv_block_virt
, bp
->rcv_block_phys
);
1144 DBG_printk("%s: Consumer block virt = %0lX, phys = %0X\n",
1145 print_name
, (long)bp
->cons_block_virt
, bp
->cons_block_phys
);
1147 return(DFX_K_SUCCESS
);
1157 * Brings the adapter to the link avail/link unavailable state.
1163 * bp - pointer to board information
1164 * get_buffers - non-zero if buffers to be allocated
1166 * Functional Description:
1167 * Issues the low-level firmware/hardware calls necessary to bring
1168 * the adapter up, or to properly reset and restore adapter during
1172 * DFX_K_SUCCESS - Adapter brought up successfully
1173 * DFX_K_FAILURE - Adapter initialization failed
1176 * bp->reset_type should be set to a valid reset type value before
1177 * calling this routine.
1180 * Adapter should be in LINK_AVAILABLE or LINK_UNAVAILABLE state
1181 * upon a successful return of this routine.
1184 static int dfx_adap_init(DFX_board_t
*bp
, int get_buffers
)
1186 DBG_printk("In dfx_adap_init...\n");
1188 /* Disable PDQ interrupts first */
1190 dfx_port_write_long(bp
, PI_PDQ_K_REG_HOST_INT_ENB
, PI_HOST_INT_K_DISABLE_ALL_INTS
);
1192 /* Place adapter in DMA_UNAVAILABLE state by resetting adapter */
1194 if (dfx_hw_dma_uninit(bp
, bp
->reset_type
) != DFX_K_SUCCESS
)
1196 printk("%s: Could not uninitialize/reset adapter!\n", bp
->dev
->name
);
1197 return(DFX_K_FAILURE
);
1201 * When the PDQ is reset, some false Type 0 interrupts may be pending,
1202 * so we'll acknowledge all Type 0 interrupts now before continuing.
1205 dfx_port_write_long(bp
, PI_PDQ_K_REG_TYPE_0_STATUS
, PI_HOST_INT_K_ACK_ALL_TYPE_0
);
1208 * Clear Type 1 and Type 2 registers before going to DMA_AVAILABLE state
1210 * Note: We only need to clear host copies of these registers. The PDQ reset
1211 * takes care of the on-board register values.
1214 bp
->cmd_req_reg
.lword
= 0;
1215 bp
->cmd_rsp_reg
.lword
= 0;
1216 bp
->rcv_xmt_reg
.lword
= 0;
1218 /* Clear consumer block before going to DMA_AVAILABLE state */
1220 memset(bp
->cons_block_virt
, 0, sizeof(PI_CONSUMER_BLOCK
));
1222 /* Initialize the DMA Burst Size */
1224 if (dfx_hw_port_ctrl_req(bp
,
1226 PI_SUB_CMD_K_BURST_SIZE_SET
,
1228 NULL
) != DFX_K_SUCCESS
)
1230 printk("%s: Could not set adapter burst size!\n", bp
->dev
->name
);
1231 return(DFX_K_FAILURE
);
1235 * Set base address of Consumer Block
1237 * Assumption: 32-bit physical address of consumer block is 64 byte
1238 * aligned. That is, bits 0-5 of the address must be zero.
1241 if (dfx_hw_port_ctrl_req(bp
,
1242 PI_PCTRL_M_CONS_BLOCK
,
1243 bp
->cons_block_phys
,
1245 NULL
) != DFX_K_SUCCESS
)
1247 printk("%s: Could not set consumer block address!\n", bp
->dev
->name
);
1248 return(DFX_K_FAILURE
);
1252 * Set the base address of Descriptor Block and bring adapter
1253 * to DMA_AVAILABLE state.
1255 * Note: We also set the literal and data swapping requirements
1258 * Assumption: 32-bit physical address of descriptor block
1259 * is 8Kbyte aligned.
1261 if (dfx_hw_port_ctrl_req(bp
, PI_PCTRL_M_INIT
,
1262 (u32
)(bp
->descr_block_phys
|
1263 PI_PDATA_A_INIT_M_BSWAP_INIT
),
1264 0, NULL
) != DFX_K_SUCCESS
) {
1265 printk("%s: Could not set descriptor block address!\n",
1267 return DFX_K_FAILURE
;
1270 /* Set transmit flush timeout value */
1272 bp
->cmd_req_virt
->cmd_type
= PI_CMD_K_CHARS_SET
;
1273 bp
->cmd_req_virt
->char_set
.item
[0].item_code
= PI_ITEM_K_FLUSH_TIME
;
1274 bp
->cmd_req_virt
->char_set
.item
[0].value
= 3; /* 3 seconds */
1275 bp
->cmd_req_virt
->char_set
.item
[0].item_index
= 0;
1276 bp
->cmd_req_virt
->char_set
.item
[1].item_code
= PI_ITEM_K_EOL
;
1277 if (dfx_hw_dma_cmd_req(bp
) != DFX_K_SUCCESS
)
1279 printk("%s: DMA command request failed!\n", bp
->dev
->name
);
1280 return(DFX_K_FAILURE
);
1283 /* Set the initial values for eFDXEnable and MACTReq MIB objects */
1285 bp
->cmd_req_virt
->cmd_type
= PI_CMD_K_SNMP_SET
;
1286 bp
->cmd_req_virt
->snmp_set
.item
[0].item_code
= PI_ITEM_K_FDX_ENB_DIS
;
1287 bp
->cmd_req_virt
->snmp_set
.item
[0].value
= bp
->full_duplex_enb
;
1288 bp
->cmd_req_virt
->snmp_set
.item
[0].item_index
= 0;
1289 bp
->cmd_req_virt
->snmp_set
.item
[1].item_code
= PI_ITEM_K_MAC_T_REQ
;
1290 bp
->cmd_req_virt
->snmp_set
.item
[1].value
= bp
->req_ttrt
;
1291 bp
->cmd_req_virt
->snmp_set
.item
[1].item_index
= 0;
1292 bp
->cmd_req_virt
->snmp_set
.item
[2].item_code
= PI_ITEM_K_EOL
;
1293 if (dfx_hw_dma_cmd_req(bp
) != DFX_K_SUCCESS
)
1295 printk("%s: DMA command request failed!\n", bp
->dev
->name
);
1296 return(DFX_K_FAILURE
);
1299 /* Initialize adapter CAM */
1301 if (dfx_ctl_update_cam(bp
) != DFX_K_SUCCESS
)
1303 printk("%s: Adapter CAM update failed!\n", bp
->dev
->name
);
1304 return(DFX_K_FAILURE
);
1307 /* Initialize adapter filters */
1309 if (dfx_ctl_update_filters(bp
) != DFX_K_SUCCESS
)
1311 printk("%s: Adapter filters update failed!\n", bp
->dev
->name
);
1312 return(DFX_K_FAILURE
);
1316 * Remove any existing dynamic buffers (i.e. if the adapter is being
1323 /* Initialize receive descriptor block and produce buffers */
1325 if (dfx_rcv_init(bp
, get_buffers
))
1327 printk("%s: Receive buffer allocation failed\n", bp
->dev
->name
);
1330 return(DFX_K_FAILURE
);
1333 /* Issue START command and bring adapter to LINK_(UN)AVAILABLE state */
1335 bp
->cmd_req_virt
->cmd_type
= PI_CMD_K_START
;
1336 if (dfx_hw_dma_cmd_req(bp
) != DFX_K_SUCCESS
)
1338 printk("%s: Start command failed\n", bp
->dev
->name
);
1341 return(DFX_K_FAILURE
);
1344 /* Initialization succeeded, reenable PDQ interrupts */
1346 dfx_port_write_long(bp
, PI_PDQ_K_REG_HOST_INT_ENB
, PI_HOST_INT_K_ENABLE_DEF_INTS
);
1347 return(DFX_K_SUCCESS
);
1363 * dev - pointer to device information
1365 * Functional Description:
1366 * This function brings the adapter to an operational state.
1369 * 0 - Adapter was successfully opened
1370 * -EAGAIN - Could not register IRQ or adapter initialization failed
1373 * This routine should only be called for a device that was
1374 * initialized successfully.
1377 * Adapter should be in LINK_AVAILABLE or LINK_UNAVAILABLE state
1378 * if the open is successful.
1381 static int dfx_open(struct net_device
*dev
)
1383 DFX_board_t
*bp
= netdev_priv(dev
);
1386 DBG_printk("In dfx_open...\n");
1388 /* Register IRQ - support shared interrupts by passing device ptr */
1390 ret
= request_irq(dev
->irq
, dfx_interrupt
, IRQF_SHARED
, dev
->name
,
1393 printk(KERN_ERR
"%s: Requested IRQ %d is busy\n", dev
->name
, dev
->irq
);
1398 * Set current address to factory MAC address
1400 * Note: We've already done this step in dfx_driver_init.
1401 * However, it's possible that a user has set a node
1402 * address override, then closed and reopened the
1403 * adapter. Unless we reset the device address field
1404 * now, we'll continue to use the existing modified
1408 memcpy(dev
->dev_addr
, bp
->factory_mac_addr
, FDDI_K_ALEN
);
1410 /* Clear local unicast/multicast address tables and counts */
1412 memset(bp
->uc_table
, 0, sizeof(bp
->uc_table
));
1413 memset(bp
->mc_table
, 0, sizeof(bp
->mc_table
));
1417 /* Disable promiscuous filter settings */
1419 bp
->ind_group_prom
= PI_FSTATE_K_BLOCK
;
1420 bp
->group_prom
= PI_FSTATE_K_BLOCK
;
1422 spin_lock_init(&bp
->lock
);
1424 /* Reset and initialize adapter */
1426 bp
->reset_type
= PI_PDATA_A_RESET_M_SKIP_ST
; /* skip self-test */
1427 if (dfx_adap_init(bp
, 1) != DFX_K_SUCCESS
)
1429 printk(KERN_ERR
"%s: Adapter open failed!\n", dev
->name
);
1430 free_irq(dev
->irq
, dev
);
1434 /* Set device structure info */
1435 netif_start_queue(dev
);
1446 * Closes the device/module.
1452 * dev - pointer to device information
1454 * Functional Description:
1455 * This routine closes the adapter and brings it to a safe state.
1456 * The interrupt service routine is deregistered with the OS.
1457 * The adapter can be opened again with another call to dfx_open().
1463 * No further requests for this adapter are made after this routine is
1464 * called. dfx_open() can be called to reset and reinitialize the
1468 * Adapter should be in DMA_UNAVAILABLE state upon completion of this
1472 static int dfx_close(struct net_device
*dev
)
1474 DFX_board_t
*bp
= netdev_priv(dev
);
1476 DBG_printk("In dfx_close...\n");
1478 /* Disable PDQ interrupts first */
1480 dfx_port_write_long(bp
, PI_PDQ_K_REG_HOST_INT_ENB
, PI_HOST_INT_K_DISABLE_ALL_INTS
);
1482 /* Place adapter in DMA_UNAVAILABLE state by resetting adapter */
1484 (void) dfx_hw_dma_uninit(bp
, PI_PDATA_A_RESET_M_SKIP_ST
);
1487 * Flush any pending transmit buffers
1489 * Note: It's important that we flush the transmit buffers
1490 * BEFORE we clear our copy of the Type 2 register.
1491 * Otherwise, we'll have no idea how many buffers
1498 * Clear Type 1 and Type 2 registers after adapter reset
1500 * Note: Even though we're closing the adapter, it's
1501 * possible that an interrupt will occur after
1502 * dfx_close is called. Without some assurance to
1503 * the contrary we want to make sure that we don't
1504 * process receive and transmit LLC frames and update
1505 * the Type 2 register with bad information.
1508 bp
->cmd_req_reg
.lword
= 0;
1509 bp
->cmd_rsp_reg
.lword
= 0;
1510 bp
->rcv_xmt_reg
.lword
= 0;
1512 /* Clear consumer block for the same reason given above */
1514 memset(bp
->cons_block_virt
, 0, sizeof(PI_CONSUMER_BLOCK
));
1516 /* Release all dynamically allocate skb in the receive ring. */
1520 /* Clear device structure flags */
1522 netif_stop_queue(dev
);
1524 /* Deregister (free) IRQ */
1526 free_irq(dev
->irq
, dev
);
1533 * ======================
1534 * = dfx_int_pr_halt_id =
1535 * ======================
1538 * Displays halt id's in string form.
1544 * bp - pointer to board information
1546 * Functional Description:
1547 * Determine current halt id and display appropriate string.
1559 static void dfx_int_pr_halt_id(DFX_board_t
*bp
)
1561 PI_UINT32 port_status
; /* PDQ port status register value */
1562 PI_UINT32 halt_id
; /* PDQ port status halt ID */
1564 /* Read the latest port status */
1566 dfx_port_read_long(bp
, PI_PDQ_K_REG_PORT_STATUS
, &port_status
);
1568 /* Display halt state transition information */
1570 halt_id
= (port_status
& PI_PSTATUS_M_HALT_ID
) >> PI_PSTATUS_V_HALT_ID
;
1573 case PI_HALT_ID_K_SELFTEST_TIMEOUT
:
1574 printk("%s: Halt ID: Selftest Timeout\n", bp
->dev
->name
);
1577 case PI_HALT_ID_K_PARITY_ERROR
:
1578 printk("%s: Halt ID: Host Bus Parity Error\n", bp
->dev
->name
);
1581 case PI_HALT_ID_K_HOST_DIR_HALT
:
1582 printk("%s: Halt ID: Host-Directed Halt\n", bp
->dev
->name
);
1585 case PI_HALT_ID_K_SW_FAULT
:
1586 printk("%s: Halt ID: Adapter Software Fault\n", bp
->dev
->name
);
1589 case PI_HALT_ID_K_HW_FAULT
:
1590 printk("%s: Halt ID: Adapter Hardware Fault\n", bp
->dev
->name
);
1593 case PI_HALT_ID_K_PC_TRACE
:
1594 printk("%s: Halt ID: FDDI Network PC Trace Path Test\n", bp
->dev
->name
);
1597 case PI_HALT_ID_K_DMA_ERROR
:
1598 printk("%s: Halt ID: Adapter DMA Error\n", bp
->dev
->name
);
1601 case PI_HALT_ID_K_IMAGE_CRC_ERROR
:
1602 printk("%s: Halt ID: Firmware Image CRC Error\n", bp
->dev
->name
);
1605 case PI_HALT_ID_K_BUS_EXCEPTION
:
1606 printk("%s: Halt ID: 68000 Bus Exception\n", bp
->dev
->name
);
1610 printk("%s: Halt ID: Unknown (code = %X)\n", bp
->dev
->name
, halt_id
);
1617 * ==========================
1618 * = dfx_int_type_0_process =
1619 * ==========================
1622 * Processes Type 0 interrupts.
1628 * bp - pointer to board information
1630 * Functional Description:
1631 * Processes all enabled Type 0 interrupts. If the reason for the interrupt
1632 * is a serious fault on the adapter, then an error message is displayed
1633 * and the adapter is reset.
1635 * One tricky potential timing window is the rapid succession of "link avail"
1636 * "link unavail" state change interrupts. The acknowledgement of the Type 0
1637 * interrupt must be done before reading the state from the Port Status
1638 * register. This is true because a state change could occur after reading
1639 * the data, but before acknowledging the interrupt. If this state change
1640 * does happen, it would be lost because the driver is using the old state,
1641 * and it will never know about the new state because it subsequently
1642 * acknowledges the state change interrupt.
1645 * read type 0 int reasons read type 0 int reasons
1646 * read adapter state ack type 0 interrupts
1647 * ack type 0 interrupts read adapter state
1648 * ... process interrupt ... ... process interrupt ...
1657 * An adapter reset may occur if the adapter has any Type 0 error interrupts
1658 * or if the port status indicates that the adapter is halted. The driver
1659 * is responsible for reinitializing the adapter with the current CAM
1660 * contents and adapter filter settings.
1663 static void dfx_int_type_0_process(DFX_board_t
*bp
)
1666 PI_UINT32 type_0_status
; /* Host Interrupt Type 0 register */
1667 PI_UINT32 state
; /* current adap state (from port status) */
1670 * Read host interrupt Type 0 register to determine which Type 0
1671 * interrupts are pending. Immediately write it back out to clear
1675 dfx_port_read_long(bp
, PI_PDQ_K_REG_TYPE_0_STATUS
, &type_0_status
);
1676 dfx_port_write_long(bp
, PI_PDQ_K_REG_TYPE_0_STATUS
, type_0_status
);
1678 /* Check for Type 0 error interrupts */
1680 if (type_0_status
& (PI_TYPE_0_STAT_M_NXM
|
1681 PI_TYPE_0_STAT_M_PM_PAR_ERR
|
1682 PI_TYPE_0_STAT_M_BUS_PAR_ERR
))
1684 /* Check for Non-Existent Memory error */
1686 if (type_0_status
& PI_TYPE_0_STAT_M_NXM
)
1687 printk("%s: Non-Existent Memory Access Error\n", bp
->dev
->name
);
1689 /* Check for Packet Memory Parity error */
1691 if (type_0_status
& PI_TYPE_0_STAT_M_PM_PAR_ERR
)
1692 printk("%s: Packet Memory Parity Error\n", bp
->dev
->name
);
1694 /* Check for Host Bus Parity error */
1696 if (type_0_status
& PI_TYPE_0_STAT_M_BUS_PAR_ERR
)
1697 printk("%s: Host Bus Parity Error\n", bp
->dev
->name
);
1699 /* Reset adapter and bring it back on-line */
1701 bp
->link_available
= PI_K_FALSE
; /* link is no longer available */
1702 bp
->reset_type
= 0; /* rerun on-board diagnostics */
1703 printk("%s: Resetting adapter...\n", bp
->dev
->name
);
1704 if (dfx_adap_init(bp
, 0) != DFX_K_SUCCESS
)
1706 printk("%s: Adapter reset failed! Disabling adapter interrupts.\n", bp
->dev
->name
);
1707 dfx_port_write_long(bp
, PI_PDQ_K_REG_HOST_INT_ENB
, PI_HOST_INT_K_DISABLE_ALL_INTS
);
1710 printk("%s: Adapter reset successful!\n", bp
->dev
->name
);
1714 /* Check for transmit flush interrupt */
1716 if (type_0_status
& PI_TYPE_0_STAT_M_XMT_FLUSH
)
1718 /* Flush any pending xmt's and acknowledge the flush interrupt */
1720 bp
->link_available
= PI_K_FALSE
; /* link is no longer available */
1721 dfx_xmt_flush(bp
); /* flush any outstanding packets */
1722 (void) dfx_hw_port_ctrl_req(bp
,
1723 PI_PCTRL_M_XMT_DATA_FLUSH_DONE
,
1729 /* Check for adapter state change */
1731 if (type_0_status
& PI_TYPE_0_STAT_M_STATE_CHANGE
)
1733 /* Get latest adapter state */
1735 state
= dfx_hw_adap_state_rd(bp
); /* get adapter state */
1736 if (state
== PI_STATE_K_HALTED
)
1739 * Adapter has transitioned to HALTED state, try to reset
1740 * adapter to bring it back on-line. If reset fails,
1741 * leave the adapter in the broken state.
1744 printk("%s: Controller has transitioned to HALTED state!\n", bp
->dev
->name
);
1745 dfx_int_pr_halt_id(bp
); /* display halt id as string */
1747 /* Reset adapter and bring it back on-line */
1749 bp
->link_available
= PI_K_FALSE
; /* link is no longer available */
1750 bp
->reset_type
= 0; /* rerun on-board diagnostics */
1751 printk("%s: Resetting adapter...\n", bp
->dev
->name
);
1752 if (dfx_adap_init(bp
, 0) != DFX_K_SUCCESS
)
1754 printk("%s: Adapter reset failed! Disabling adapter interrupts.\n", bp
->dev
->name
);
1755 dfx_port_write_long(bp
, PI_PDQ_K_REG_HOST_INT_ENB
, PI_HOST_INT_K_DISABLE_ALL_INTS
);
1758 printk("%s: Adapter reset successful!\n", bp
->dev
->name
);
1760 else if (state
== PI_STATE_K_LINK_AVAIL
)
1762 bp
->link_available
= PI_K_TRUE
; /* set link available flag */
1769 * ==================
1770 * = dfx_int_common =
1771 * ==================
1774 * Interrupt service routine (ISR)
1780 * bp - pointer to board information
1782 * Functional Description:
1783 * This is the ISR which processes incoming adapter interrupts.
1789 * This routine assumes PDQ interrupts have not been disabled.
1790 * When interrupts are disabled at the PDQ, the Port Status register
1791 * is automatically cleared. This routine uses the Port Status
1792 * register value to determine whether a Type 0 interrupt occurred,
1793 * so it's important that adapter interrupts are not normally
1794 * enabled/disabled at the PDQ.
1796 * It's vital that this routine is NOT reentered for the
1797 * same board and that the OS is not in another section of
1798 * code (eg. dfx_xmt_queue_pkt) for the same board on a
1802 * Pending interrupts are serviced. Depending on the type of
1803 * interrupt, acknowledging and clearing the interrupt at the
1804 * PDQ involves writing a register to clear the interrupt bit
1805 * or updating completion indices.
1808 static void dfx_int_common(struct net_device
*dev
)
1810 DFX_board_t
*bp
= netdev_priv(dev
);
1811 PI_UINT32 port_status
; /* Port Status register */
1813 /* Process xmt interrupts - frequent case, so always call this routine */
1815 if(dfx_xmt_done(bp
)) /* free consumed xmt packets */
1816 netif_wake_queue(dev
);
1818 /* Process rcv interrupts - frequent case, so always call this routine */
1820 dfx_rcv_queue_process(bp
); /* service received LLC frames */
1823 * Transmit and receive producer and completion indices are updated on the
1824 * adapter by writing to the Type 2 Producer register. Since the frequent
1825 * case is that we'll be processing either LLC transmit or receive buffers,
1826 * we'll optimize I/O writes by doing a single register write here.
1829 dfx_port_write_long(bp
, PI_PDQ_K_REG_TYPE_2_PROD
, bp
->rcv_xmt_reg
.lword
);
1831 /* Read PDQ Port Status register to find out which interrupts need processing */
1833 dfx_port_read_long(bp
, PI_PDQ_K_REG_PORT_STATUS
, &port_status
);
1835 /* Process Type 0 interrupts (if any) - infrequent, so only call when needed */
1837 if (port_status
& PI_PSTATUS_M_TYPE_0_PENDING
)
1838 dfx_int_type_0_process(bp
); /* process Type 0 interrupts */
1848 * Interrupt processing routine
1851 * Whether a valid interrupt was seen.
1854 * irq - interrupt vector
1855 * dev_id - pointer to device information
1857 * Functional Description:
1858 * This routine calls the interrupt processing routine for this adapter. It
1859 * disables and reenables adapter interrupts, as appropriate. We can support
1860 * shared interrupts since the incoming dev_id pointer provides our device
1861 * structure context.
1864 * IRQ_HANDLED - an IRQ was handled.
1865 * IRQ_NONE - no IRQ was handled.
1868 * The interrupt acknowledgement at the hardware level (eg. ACKing the PIC
1869 * on Intel-based systems) is done by the operating system outside this
1872 * System interrupts are enabled through this call.
1875 * Interrupts are disabled, then reenabled at the adapter.
1878 static irqreturn_t
dfx_interrupt(int irq
, void *dev_id
)
1880 struct net_device
*dev
= dev_id
;
1881 DFX_board_t
*bp
= netdev_priv(dev
);
1882 struct device
*bdev
= bp
->bus_dev
;
1883 int dfx_bus_pci
= DFX_BUS_PCI(bdev
);
1884 int dfx_bus_eisa
= DFX_BUS_EISA(bdev
);
1885 int dfx_bus_tc
= DFX_BUS_TC(bdev
);
1887 /* Service adapter interrupts */
1892 dfx_port_read_long(bp
, PFI_K_REG_STATUS
, &status
);
1893 if (!(status
& PFI_STATUS_M_PDQ_INT
))
1896 spin_lock(&bp
->lock
);
1898 /* Disable PDQ-PFI interrupts at PFI */
1899 dfx_port_write_long(bp
, PFI_K_REG_MODE_CTRL
,
1900 PFI_MODE_M_DMA_ENB
);
1902 /* Call interrupt service routine for this adapter */
1903 dfx_int_common(dev
);
1905 /* Clear PDQ interrupt status bit and reenable interrupts */
1906 dfx_port_write_long(bp
, PFI_K_REG_STATUS
,
1907 PFI_STATUS_M_PDQ_INT
);
1908 dfx_port_write_long(bp
, PFI_K_REG_MODE_CTRL
,
1909 (PFI_MODE_M_PDQ_INT_ENB
|
1910 PFI_MODE_M_DMA_ENB
));
1912 spin_unlock(&bp
->lock
);
1915 unsigned long base_addr
= to_eisa_device(bdev
)->base_addr
;
1918 status
= inb(base_addr
+ PI_ESIC_K_IO_CONFIG_STAT_0
);
1919 if (!(status
& PI_CONFIG_STAT_0_M_PEND
))
1922 spin_lock(&bp
->lock
);
1924 /* Disable interrupts at the ESIC */
1925 status
&= ~PI_CONFIG_STAT_0_M_INT_ENB
;
1926 outb(base_addr
+ PI_ESIC_K_IO_CONFIG_STAT_0
, status
);
1928 /* Call interrupt service routine for this adapter */
1929 dfx_int_common(dev
);
1931 /* Reenable interrupts at the ESIC */
1932 status
= inb(base_addr
+ PI_ESIC_K_IO_CONFIG_STAT_0
);
1933 status
|= PI_CONFIG_STAT_0_M_INT_ENB
;
1934 outb(base_addr
+ PI_ESIC_K_IO_CONFIG_STAT_0
, status
);
1936 spin_unlock(&bp
->lock
);
1941 dfx_port_read_long(bp
, PI_PDQ_K_REG_PORT_STATUS
, &status
);
1942 if (!(status
& (PI_PSTATUS_M_RCV_DATA_PENDING
|
1943 PI_PSTATUS_M_XMT_DATA_PENDING
|
1944 PI_PSTATUS_M_SMT_HOST_PENDING
|
1945 PI_PSTATUS_M_UNSOL_PENDING
|
1946 PI_PSTATUS_M_CMD_RSP_PENDING
|
1947 PI_PSTATUS_M_CMD_REQ_PENDING
|
1948 PI_PSTATUS_M_TYPE_0_PENDING
)))
1951 spin_lock(&bp
->lock
);
1953 /* Call interrupt service routine for this adapter */
1954 dfx_int_common(dev
);
1956 spin_unlock(&bp
->lock
);
1964 * =====================
1965 * = dfx_ctl_get_stats =
1966 * =====================
1969 * Get statistics for FDDI adapter
1972 * Pointer to FDDI statistics structure
1975 * dev - pointer to device information
1977 * Functional Description:
1978 * Gets current MIB objects from adapter, then
1979 * returns FDDI statistics structure as defined
1982 * Note: Since the FDDI statistics structure is
1983 * still new and the device structure doesn't
1984 * have an FDDI-specific get statistics handler,
1985 * we'll return the FDDI statistics structure as
1986 * a pointer to an Ethernet statistics structure.
1987 * That way, at least the first part of the statistics
1988 * structure can be decoded properly, and it allows
1989 * "smart" applications to perform a second cast to
1990 * decode the FDDI-specific statistics.
1992 * We'll have to pay attention to this routine as the
1993 * device structure becomes more mature and LAN media
2006 static struct net_device_stats
*dfx_ctl_get_stats(struct net_device
*dev
)
2008 DFX_board_t
*bp
= netdev_priv(dev
);
2010 /* Fill the bp->stats structure with driver-maintained counters */
2012 bp
->stats
.gen
.rx_packets
= bp
->rcv_total_frames
;
2013 bp
->stats
.gen
.tx_packets
= bp
->xmt_total_frames
;
2014 bp
->stats
.gen
.rx_bytes
= bp
->rcv_total_bytes
;
2015 bp
->stats
.gen
.tx_bytes
= bp
->xmt_total_bytes
;
2016 bp
->stats
.gen
.rx_errors
= bp
->rcv_crc_errors
+
2017 bp
->rcv_frame_status_errors
+
2018 bp
->rcv_length_errors
;
2019 bp
->stats
.gen
.tx_errors
= bp
->xmt_length_errors
;
2020 bp
->stats
.gen
.rx_dropped
= bp
->rcv_discards
;
2021 bp
->stats
.gen
.tx_dropped
= bp
->xmt_discards
;
2022 bp
->stats
.gen
.multicast
= bp
->rcv_multicast_frames
;
2023 bp
->stats
.gen
.collisions
= 0; /* always zero (0) for FDDI */
2025 /* Get FDDI SMT MIB objects */
2027 bp
->cmd_req_virt
->cmd_type
= PI_CMD_K_SMT_MIB_GET
;
2028 if (dfx_hw_dma_cmd_req(bp
) != DFX_K_SUCCESS
)
2029 return((struct net_device_stats
*) &bp
->stats
);
2031 /* Fill the bp->stats structure with the SMT MIB object values */
2033 memcpy(bp
->stats
.smt_station_id
, &bp
->cmd_rsp_virt
->smt_mib_get
.smt_station_id
, sizeof(bp
->cmd_rsp_virt
->smt_mib_get
.smt_station_id
));
2034 bp
->stats
.smt_op_version_id
= bp
->cmd_rsp_virt
->smt_mib_get
.smt_op_version_id
;
2035 bp
->stats
.smt_hi_version_id
= bp
->cmd_rsp_virt
->smt_mib_get
.smt_hi_version_id
;
2036 bp
->stats
.smt_lo_version_id
= bp
->cmd_rsp_virt
->smt_mib_get
.smt_lo_version_id
;
2037 memcpy(bp
->stats
.smt_user_data
, &bp
->cmd_rsp_virt
->smt_mib_get
.smt_user_data
, sizeof(bp
->cmd_rsp_virt
->smt_mib_get
.smt_user_data
));
2038 bp
->stats
.smt_mib_version_id
= bp
->cmd_rsp_virt
->smt_mib_get
.smt_mib_version_id
;
2039 bp
->stats
.smt_mac_cts
= bp
->cmd_rsp_virt
->smt_mib_get
.smt_mac_ct
;
2040 bp
->stats
.smt_non_master_cts
= bp
->cmd_rsp_virt
->smt_mib_get
.smt_non_master_ct
;
2041 bp
->stats
.smt_master_cts
= bp
->cmd_rsp_virt
->smt_mib_get
.smt_master_ct
;
2042 bp
->stats
.smt_available_paths
= bp
->cmd_rsp_virt
->smt_mib_get
.smt_available_paths
;
2043 bp
->stats
.smt_config_capabilities
= bp
->cmd_rsp_virt
->smt_mib_get
.smt_config_capabilities
;
2044 bp
->stats
.smt_config_policy
= bp
->cmd_rsp_virt
->smt_mib_get
.smt_config_policy
;
2045 bp
->stats
.smt_connection_policy
= bp
->cmd_rsp_virt
->smt_mib_get
.smt_connection_policy
;
2046 bp
->stats
.smt_t_notify
= bp
->cmd_rsp_virt
->smt_mib_get
.smt_t_notify
;
2047 bp
->stats
.smt_stat_rpt_policy
= bp
->cmd_rsp_virt
->smt_mib_get
.smt_stat_rpt_policy
;
2048 bp
->stats
.smt_trace_max_expiration
= bp
->cmd_rsp_virt
->smt_mib_get
.smt_trace_max_expiration
;
2049 bp
->stats
.smt_bypass_present
= bp
->cmd_rsp_virt
->smt_mib_get
.smt_bypass_present
;
2050 bp
->stats
.smt_ecm_state
= bp
->cmd_rsp_virt
->smt_mib_get
.smt_ecm_state
;
2051 bp
->stats
.smt_cf_state
= bp
->cmd_rsp_virt
->smt_mib_get
.smt_cf_state
;
2052 bp
->stats
.smt_remote_disconnect_flag
= bp
->cmd_rsp_virt
->smt_mib_get
.smt_remote_disconnect_flag
;
2053 bp
->stats
.smt_station_status
= bp
->cmd_rsp_virt
->smt_mib_get
.smt_station_status
;
2054 bp
->stats
.smt_peer_wrap_flag
= bp
->cmd_rsp_virt
->smt_mib_get
.smt_peer_wrap_flag
;
2055 bp
->stats
.smt_time_stamp
= bp
->cmd_rsp_virt
->smt_mib_get
.smt_msg_time_stamp
.ls
;
2056 bp
->stats
.smt_transition_time_stamp
= bp
->cmd_rsp_virt
->smt_mib_get
.smt_transition_time_stamp
.ls
;
2057 bp
->stats
.mac_frame_status_functions
= bp
->cmd_rsp_virt
->smt_mib_get
.mac_frame_status_functions
;
2058 bp
->stats
.mac_t_max_capability
= bp
->cmd_rsp_virt
->smt_mib_get
.mac_t_max_capability
;
2059 bp
->stats
.mac_tvx_capability
= bp
->cmd_rsp_virt
->smt_mib_get
.mac_tvx_capability
;
2060 bp
->stats
.mac_available_paths
= bp
->cmd_rsp_virt
->smt_mib_get
.mac_available_paths
;
2061 bp
->stats
.mac_current_path
= bp
->cmd_rsp_virt
->smt_mib_get
.mac_current_path
;
2062 memcpy(bp
->stats
.mac_upstream_nbr
, &bp
->cmd_rsp_virt
->smt_mib_get
.mac_upstream_nbr
, FDDI_K_ALEN
);
2063 memcpy(bp
->stats
.mac_downstream_nbr
, &bp
->cmd_rsp_virt
->smt_mib_get
.mac_downstream_nbr
, FDDI_K_ALEN
);
2064 memcpy(bp
->stats
.mac_old_upstream_nbr
, &bp
->cmd_rsp_virt
->smt_mib_get
.mac_old_upstream_nbr
, FDDI_K_ALEN
);
2065 memcpy(bp
->stats
.mac_old_downstream_nbr
, &bp
->cmd_rsp_virt
->smt_mib_get
.mac_old_downstream_nbr
, FDDI_K_ALEN
);
2066 bp
->stats
.mac_dup_address_test
= bp
->cmd_rsp_virt
->smt_mib_get
.mac_dup_address_test
;
2067 bp
->stats
.mac_requested_paths
= bp
->cmd_rsp_virt
->smt_mib_get
.mac_requested_paths
;
2068 bp
->stats
.mac_downstream_port_type
= bp
->cmd_rsp_virt
->smt_mib_get
.mac_downstream_port_type
;
2069 memcpy(bp
->stats
.mac_smt_address
, &bp
->cmd_rsp_virt
->smt_mib_get
.mac_smt_address
, FDDI_K_ALEN
);
2070 bp
->stats
.mac_t_req
= bp
->cmd_rsp_virt
->smt_mib_get
.mac_t_req
;
2071 bp
->stats
.mac_t_neg
= bp
->cmd_rsp_virt
->smt_mib_get
.mac_t_neg
;
2072 bp
->stats
.mac_t_max
= bp
->cmd_rsp_virt
->smt_mib_get
.mac_t_max
;
2073 bp
->stats
.mac_tvx_value
= bp
->cmd_rsp_virt
->smt_mib_get
.mac_tvx_value
;
2074 bp
->stats
.mac_frame_error_threshold
= bp
->cmd_rsp_virt
->smt_mib_get
.mac_frame_error_threshold
;
2075 bp
->stats
.mac_frame_error_ratio
= bp
->cmd_rsp_virt
->smt_mib_get
.mac_frame_error_ratio
;
2076 bp
->stats
.mac_rmt_state
= bp
->cmd_rsp_virt
->smt_mib_get
.mac_rmt_state
;
2077 bp
->stats
.mac_da_flag
= bp
->cmd_rsp_virt
->smt_mib_get
.mac_da_flag
;
2078 bp
->stats
.mac_una_da_flag
= bp
->cmd_rsp_virt
->smt_mib_get
.mac_unda_flag
;
2079 bp
->stats
.mac_frame_error_flag
= bp
->cmd_rsp_virt
->smt_mib_get
.mac_frame_error_flag
;
2080 bp
->stats
.mac_ma_unitdata_available
= bp
->cmd_rsp_virt
->smt_mib_get
.mac_ma_unitdata_available
;
2081 bp
->stats
.mac_hardware_present
= bp
->cmd_rsp_virt
->smt_mib_get
.mac_hardware_present
;
2082 bp
->stats
.mac_ma_unitdata_enable
= bp
->cmd_rsp_virt
->smt_mib_get
.mac_ma_unitdata_enable
;
2083 bp
->stats
.path_tvx_lower_bound
= bp
->cmd_rsp_virt
->smt_mib_get
.path_tvx_lower_bound
;
2084 bp
->stats
.path_t_max_lower_bound
= bp
->cmd_rsp_virt
->smt_mib_get
.path_t_max_lower_bound
;
2085 bp
->stats
.path_max_t_req
= bp
->cmd_rsp_virt
->smt_mib_get
.path_max_t_req
;
2086 memcpy(bp
->stats
.path_configuration
, &bp
->cmd_rsp_virt
->smt_mib_get
.path_configuration
, sizeof(bp
->cmd_rsp_virt
->smt_mib_get
.path_configuration
));
2087 bp
->stats
.port_my_type
[0] = bp
->cmd_rsp_virt
->smt_mib_get
.port_my_type
[0];
2088 bp
->stats
.port_my_type
[1] = bp
->cmd_rsp_virt
->smt_mib_get
.port_my_type
[1];
2089 bp
->stats
.port_neighbor_type
[0] = bp
->cmd_rsp_virt
->smt_mib_get
.port_neighbor_type
[0];
2090 bp
->stats
.port_neighbor_type
[1] = bp
->cmd_rsp_virt
->smt_mib_get
.port_neighbor_type
[1];
2091 bp
->stats
.port_connection_policies
[0] = bp
->cmd_rsp_virt
->smt_mib_get
.port_connection_policies
[0];
2092 bp
->stats
.port_connection_policies
[1] = bp
->cmd_rsp_virt
->smt_mib_get
.port_connection_policies
[1];
2093 bp
->stats
.port_mac_indicated
[0] = bp
->cmd_rsp_virt
->smt_mib_get
.port_mac_indicated
[0];
2094 bp
->stats
.port_mac_indicated
[1] = bp
->cmd_rsp_virt
->smt_mib_get
.port_mac_indicated
[1];
2095 bp
->stats
.port_current_path
[0] = bp
->cmd_rsp_virt
->smt_mib_get
.port_current_path
[0];
2096 bp
->stats
.port_current_path
[1] = bp
->cmd_rsp_virt
->smt_mib_get
.port_current_path
[1];
2097 memcpy(&bp
->stats
.port_requested_paths
[0*3], &bp
->cmd_rsp_virt
->smt_mib_get
.port_requested_paths
[0], 3);
2098 memcpy(&bp
->stats
.port_requested_paths
[1*3], &bp
->cmd_rsp_virt
->smt_mib_get
.port_requested_paths
[1], 3);
2099 bp
->stats
.port_mac_placement
[0] = bp
->cmd_rsp_virt
->smt_mib_get
.port_mac_placement
[0];
2100 bp
->stats
.port_mac_placement
[1] = bp
->cmd_rsp_virt
->smt_mib_get
.port_mac_placement
[1];
2101 bp
->stats
.port_available_paths
[0] = bp
->cmd_rsp_virt
->smt_mib_get
.port_available_paths
[0];
2102 bp
->stats
.port_available_paths
[1] = bp
->cmd_rsp_virt
->smt_mib_get
.port_available_paths
[1];
2103 bp
->stats
.port_pmd_class
[0] = bp
->cmd_rsp_virt
->smt_mib_get
.port_pmd_class
[0];
2104 bp
->stats
.port_pmd_class
[1] = bp
->cmd_rsp_virt
->smt_mib_get
.port_pmd_class
[1];
2105 bp
->stats
.port_connection_capabilities
[0] = bp
->cmd_rsp_virt
->smt_mib_get
.port_connection_capabilities
[0];
2106 bp
->stats
.port_connection_capabilities
[1] = bp
->cmd_rsp_virt
->smt_mib_get
.port_connection_capabilities
[1];
2107 bp
->stats
.port_bs_flag
[0] = bp
->cmd_rsp_virt
->smt_mib_get
.port_bs_flag
[0];
2108 bp
->stats
.port_bs_flag
[1] = bp
->cmd_rsp_virt
->smt_mib_get
.port_bs_flag
[1];
2109 bp
->stats
.port_ler_estimate
[0] = bp
->cmd_rsp_virt
->smt_mib_get
.port_ler_estimate
[0];
2110 bp
->stats
.port_ler_estimate
[1] = bp
->cmd_rsp_virt
->smt_mib_get
.port_ler_estimate
[1];
2111 bp
->stats
.port_ler_cutoff
[0] = bp
->cmd_rsp_virt
->smt_mib_get
.port_ler_cutoff
[0];
2112 bp
->stats
.port_ler_cutoff
[1] = bp
->cmd_rsp_virt
->smt_mib_get
.port_ler_cutoff
[1];
2113 bp
->stats
.port_ler_alarm
[0] = bp
->cmd_rsp_virt
->smt_mib_get
.port_ler_alarm
[0];
2114 bp
->stats
.port_ler_alarm
[1] = bp
->cmd_rsp_virt
->smt_mib_get
.port_ler_alarm
[1];
2115 bp
->stats
.port_connect_state
[0] = bp
->cmd_rsp_virt
->smt_mib_get
.port_connect_state
[0];
2116 bp
->stats
.port_connect_state
[1] = bp
->cmd_rsp_virt
->smt_mib_get
.port_connect_state
[1];
2117 bp
->stats
.port_pcm_state
[0] = bp
->cmd_rsp_virt
->smt_mib_get
.port_pcm_state
[0];
2118 bp
->stats
.port_pcm_state
[1] = bp
->cmd_rsp_virt
->smt_mib_get
.port_pcm_state
[1];
2119 bp
->stats
.port_pc_withhold
[0] = bp
->cmd_rsp_virt
->smt_mib_get
.port_pc_withhold
[0];
2120 bp
->stats
.port_pc_withhold
[1] = bp
->cmd_rsp_virt
->smt_mib_get
.port_pc_withhold
[1];
2121 bp
->stats
.port_ler_flag
[0] = bp
->cmd_rsp_virt
->smt_mib_get
.port_ler_flag
[0];
2122 bp
->stats
.port_ler_flag
[1] = bp
->cmd_rsp_virt
->smt_mib_get
.port_ler_flag
[1];
2123 bp
->stats
.port_hardware_present
[0] = bp
->cmd_rsp_virt
->smt_mib_get
.port_hardware_present
[0];
2124 bp
->stats
.port_hardware_present
[1] = bp
->cmd_rsp_virt
->smt_mib_get
.port_hardware_present
[1];
2126 /* Get FDDI counters */
2128 bp
->cmd_req_virt
->cmd_type
= PI_CMD_K_CNTRS_GET
;
2129 if (dfx_hw_dma_cmd_req(bp
) != DFX_K_SUCCESS
)
2130 return((struct net_device_stats
*) &bp
->stats
);
2132 /* Fill the bp->stats structure with the FDDI counter values */
2134 bp
->stats
.mac_frame_cts
= bp
->cmd_rsp_virt
->cntrs_get
.cntrs
.frame_cnt
.ls
;
2135 bp
->stats
.mac_copied_cts
= bp
->cmd_rsp_virt
->cntrs_get
.cntrs
.copied_cnt
.ls
;
2136 bp
->stats
.mac_transmit_cts
= bp
->cmd_rsp_virt
->cntrs_get
.cntrs
.transmit_cnt
.ls
;
2137 bp
->stats
.mac_error_cts
= bp
->cmd_rsp_virt
->cntrs_get
.cntrs
.error_cnt
.ls
;
2138 bp
->stats
.mac_lost_cts
= bp
->cmd_rsp_virt
->cntrs_get
.cntrs
.lost_cnt
.ls
;
2139 bp
->stats
.port_lct_fail_cts
[0] = bp
->cmd_rsp_virt
->cntrs_get
.cntrs
.lct_rejects
[0].ls
;
2140 bp
->stats
.port_lct_fail_cts
[1] = bp
->cmd_rsp_virt
->cntrs_get
.cntrs
.lct_rejects
[1].ls
;
2141 bp
->stats
.port_lem_reject_cts
[0] = bp
->cmd_rsp_virt
->cntrs_get
.cntrs
.lem_rejects
[0].ls
;
2142 bp
->stats
.port_lem_reject_cts
[1] = bp
->cmd_rsp_virt
->cntrs_get
.cntrs
.lem_rejects
[1].ls
;
2143 bp
->stats
.port_lem_cts
[0] = bp
->cmd_rsp_virt
->cntrs_get
.cntrs
.link_errors
[0].ls
;
2144 bp
->stats
.port_lem_cts
[1] = bp
->cmd_rsp_virt
->cntrs_get
.cntrs
.link_errors
[1].ls
;
2146 return((struct net_device_stats
*) &bp
->stats
);
2151 * ==============================
2152 * = dfx_ctl_set_multicast_list =
2153 * ==============================
2156 * Enable/Disable LLC frame promiscuous mode reception
2157 * on the adapter and/or update multicast address table.
2163 * dev - pointer to device information
2165 * Functional Description:
2166 * This routine follows a fairly simple algorithm for setting the
2167 * adapter filters and CAM:
2169 * if IFF_PROMISC flag is set
2170 * enable LLC individual/group promiscuous mode
2172 * disable LLC individual/group promiscuous mode
2173 * if number of incoming multicast addresses >
2174 * (CAM max size - number of unicast addresses in CAM)
2175 * enable LLC group promiscuous mode
2176 * set driver-maintained multicast address count to zero
2178 * disable LLC group promiscuous mode
2179 * set driver-maintained multicast address count to incoming count
2180 * update adapter CAM
2181 * update adapter filters
2187 * Multicast addresses are presented in canonical (LSB) format.
2190 * On-board adapter CAM and filters are updated.
2193 static void dfx_ctl_set_multicast_list(struct net_device
*dev
)
2195 DFX_board_t
*bp
= netdev_priv(dev
);
2196 int i
; /* used as index in for loop */
2197 struct dev_mc_list
*dmi
; /* ptr to multicast addr entry */
2199 /* Enable LLC frame promiscuous mode, if necessary */
2201 if (dev
->flags
& IFF_PROMISC
)
2202 bp
->ind_group_prom
= PI_FSTATE_K_PASS
; /* Enable LLC ind/group prom mode */
2204 /* Else, update multicast address table */
2208 bp
->ind_group_prom
= PI_FSTATE_K_BLOCK
; /* Disable LLC ind/group prom mode */
2210 * Check whether incoming multicast address count exceeds table size
2212 * Note: The adapters utilize an on-board 64 entry CAM for
2213 * supporting perfect filtering of multicast packets
2214 * and bridge functions when adding unicast addresses.
2215 * There is no hash function available. To support
2216 * additional multicast addresses, the all multicast
2217 * filter (LLC group promiscuous mode) must be enabled.
2219 * The firmware reserves two CAM entries for SMT-related
2220 * multicast addresses, which leaves 62 entries available.
2221 * The following code ensures that we're not being asked
2222 * to add more than 62 addresses to the CAM. If we are,
2223 * the driver will enable the all multicast filter.
2224 * Should the number of multicast addresses drop below
2225 * the high water mark, the filter will be disabled and
2226 * perfect filtering will be used.
2229 if (dev
->mc_count
> (PI_CMD_ADDR_FILTER_K_SIZE
- bp
->uc_count
))
2231 bp
->group_prom
= PI_FSTATE_K_PASS
; /* Enable LLC group prom mode */
2232 bp
->mc_count
= 0; /* Don't add mc addrs to CAM */
2236 bp
->group_prom
= PI_FSTATE_K_BLOCK
; /* Disable LLC group prom mode */
2237 bp
->mc_count
= dev
->mc_count
; /* Add mc addrs to CAM */
2240 /* Copy addresses to multicast address table, then update adapter CAM */
2242 dmi
= dev
->mc_list
; /* point to first multicast addr */
2243 for (i
=0; i
< bp
->mc_count
; i
++)
2245 memcpy(&bp
->mc_table
[i
*FDDI_K_ALEN
], dmi
->dmi_addr
, FDDI_K_ALEN
);
2246 dmi
= dmi
->next
; /* point to next multicast addr */
2248 if (dfx_ctl_update_cam(bp
) != DFX_K_SUCCESS
)
2250 DBG_printk("%s: Could not update multicast address table!\n", dev
->name
);
2254 DBG_printk("%s: Multicast address table updated! Added %d addresses.\n", dev
->name
, bp
->mc_count
);
2258 /* Update adapter filters */
2260 if (dfx_ctl_update_filters(bp
) != DFX_K_SUCCESS
)
2262 DBG_printk("%s: Could not update adapter filters!\n", dev
->name
);
2266 DBG_printk("%s: Adapter filters updated!\n", dev
->name
);
2272 * ===========================
2273 * = dfx_ctl_set_mac_address =
2274 * ===========================
2277 * Add node address override (unicast address) to adapter
2278 * CAM and update dev_addr field in device table.
2284 * dev - pointer to device information
2285 * addr - pointer to sockaddr structure containing unicast address to add
2287 * Functional Description:
2288 * The adapter supports node address overrides by adding one or more
2289 * unicast addresses to the adapter CAM. This is similar to adding
2290 * multicast addresses. In this routine we'll update the driver and
2291 * device structures with the new address, then update the adapter CAM
2292 * to ensure that the adapter will copy and strip frames destined and
2293 * sourced by that address.
2296 * Always returns zero.
2299 * The address pointed to by addr->sa_data is a valid unicast
2300 * address and is presented in canonical (LSB) format.
2303 * On-board adapter CAM is updated. On-board adapter filters
2307 static int dfx_ctl_set_mac_address(struct net_device
*dev
, void *addr
)
2309 struct sockaddr
*p_sockaddr
= (struct sockaddr
*)addr
;
2310 DFX_board_t
*bp
= netdev_priv(dev
);
2312 /* Copy unicast address to driver-maintained structs and update count */
2314 memcpy(dev
->dev_addr
, p_sockaddr
->sa_data
, FDDI_K_ALEN
); /* update device struct */
2315 memcpy(&bp
->uc_table
[0], p_sockaddr
->sa_data
, FDDI_K_ALEN
); /* update driver struct */
2319 * Verify we're not exceeding the CAM size by adding unicast address
2321 * Note: It's possible that before entering this routine we've
2322 * already filled the CAM with 62 multicast addresses.
2323 * Since we need to place the node address override into
2324 * the CAM, we have to check to see that we're not
2325 * exceeding the CAM size. If we are, we have to enable
2326 * the LLC group (multicast) promiscuous mode filter as
2327 * in dfx_ctl_set_multicast_list.
2330 if ((bp
->uc_count
+ bp
->mc_count
) > PI_CMD_ADDR_FILTER_K_SIZE
)
2332 bp
->group_prom
= PI_FSTATE_K_PASS
; /* Enable LLC group prom mode */
2333 bp
->mc_count
= 0; /* Don't add mc addrs to CAM */
2335 /* Update adapter filters */
2337 if (dfx_ctl_update_filters(bp
) != DFX_K_SUCCESS
)
2339 DBG_printk("%s: Could not update adapter filters!\n", dev
->name
);
2343 DBG_printk("%s: Adapter filters updated!\n", dev
->name
);
2347 /* Update adapter CAM with new unicast address */
2349 if (dfx_ctl_update_cam(bp
) != DFX_K_SUCCESS
)
2351 DBG_printk("%s: Could not set new MAC address!\n", dev
->name
);
2355 DBG_printk("%s: Adapter CAM updated with new MAC address\n", dev
->name
);
2357 return(0); /* always return zero */
2362 * ======================
2363 * = dfx_ctl_update_cam =
2364 * ======================
2367 * Procedure to update adapter CAM (Content Addressable Memory)
2368 * with desired unicast and multicast address entries.
2374 * bp - pointer to board information
2376 * Functional Description:
2377 * Updates adapter CAM with current contents of board structure
2378 * unicast and multicast address tables. Since there are only 62
2379 * free entries in CAM, this routine ensures that the command
2380 * request buffer is not overrun.
2383 * DFX_K_SUCCESS - Request succeeded
2384 * DFX_K_FAILURE - Request failed
2387 * All addresses being added (unicast and multicast) are in canonical
2391 * On-board adapter CAM is updated.
2394 static int dfx_ctl_update_cam(DFX_board_t
*bp
)
2396 int i
; /* used as index */
2397 PI_LAN_ADDR
*p_addr
; /* pointer to CAM entry */
2400 * Fill in command request information
2402 * Note: Even though both the unicast and multicast address
2403 * table entries are stored as contiguous 6 byte entries,
2404 * the firmware address filter set command expects each
2405 * entry to be two longwords (8 bytes total). We must be
2406 * careful to only copy the six bytes of each unicast and
2407 * multicast table entry into each command entry. This
2408 * is also why we must first clear the entire command
2412 memset(bp
->cmd_req_virt
, 0, PI_CMD_REQ_K_SIZE_MAX
); /* first clear buffer */
2413 bp
->cmd_req_virt
->cmd_type
= PI_CMD_K_ADDR_FILTER_SET
;
2414 p_addr
= &bp
->cmd_req_virt
->addr_filter_set
.entry
[0];
2416 /* Now add unicast addresses to command request buffer, if any */
2418 for (i
=0; i
< (int)bp
->uc_count
; i
++)
2420 if (i
< PI_CMD_ADDR_FILTER_K_SIZE
)
2422 memcpy(p_addr
, &bp
->uc_table
[i
*FDDI_K_ALEN
], FDDI_K_ALEN
);
2423 p_addr
++; /* point to next command entry */
2427 /* Now add multicast addresses to command request buffer, if any */
2429 for (i
=0; i
< (int)bp
->mc_count
; i
++)
2431 if ((i
+ bp
->uc_count
) < PI_CMD_ADDR_FILTER_K_SIZE
)
2433 memcpy(p_addr
, &bp
->mc_table
[i
*FDDI_K_ALEN
], FDDI_K_ALEN
);
2434 p_addr
++; /* point to next command entry */
2438 /* Issue command to update adapter CAM, then return */
2440 if (dfx_hw_dma_cmd_req(bp
) != DFX_K_SUCCESS
)
2441 return(DFX_K_FAILURE
);
2442 return(DFX_K_SUCCESS
);
2447 * ==========================
2448 * = dfx_ctl_update_filters =
2449 * ==========================
2452 * Procedure to update adapter filters with desired
2459 * bp - pointer to board information
2461 * Functional Description:
2462 * Enables or disables filter using current filter settings.
2465 * DFX_K_SUCCESS - Request succeeded.
2466 * DFX_K_FAILURE - Request failed.
2469 * We must always pass up packets destined to the broadcast
2470 * address (FF-FF-FF-FF-FF-FF), so we'll always keep the
2471 * broadcast filter enabled.
2474 * On-board adapter filters are updated.
2477 static int dfx_ctl_update_filters(DFX_board_t
*bp
)
2479 int i
= 0; /* used as index */
2481 /* Fill in command request information */
2483 bp
->cmd_req_virt
->cmd_type
= PI_CMD_K_FILTERS_SET
;
2485 /* Initialize Broadcast filter - * ALWAYS ENABLED * */
2487 bp
->cmd_req_virt
->filter_set
.item
[i
].item_code
= PI_ITEM_K_BROADCAST
;
2488 bp
->cmd_req_virt
->filter_set
.item
[i
++].value
= PI_FSTATE_K_PASS
;
2490 /* Initialize LLC Individual/Group Promiscuous filter */
2492 bp
->cmd_req_virt
->filter_set
.item
[i
].item_code
= PI_ITEM_K_IND_GROUP_PROM
;
2493 bp
->cmd_req_virt
->filter_set
.item
[i
++].value
= bp
->ind_group_prom
;
2495 /* Initialize LLC Group Promiscuous filter */
2497 bp
->cmd_req_virt
->filter_set
.item
[i
].item_code
= PI_ITEM_K_GROUP_PROM
;
2498 bp
->cmd_req_virt
->filter_set
.item
[i
++].value
= bp
->group_prom
;
2500 /* Terminate the item code list */
2502 bp
->cmd_req_virt
->filter_set
.item
[i
].item_code
= PI_ITEM_K_EOL
;
2504 /* Issue command to update adapter filters, then return */
2506 if (dfx_hw_dma_cmd_req(bp
) != DFX_K_SUCCESS
)
2507 return(DFX_K_FAILURE
);
2508 return(DFX_K_SUCCESS
);
2513 * ======================
2514 * = dfx_hw_dma_cmd_req =
2515 * ======================
2518 * Sends PDQ DMA command to adapter firmware
2524 * bp - pointer to board information
2526 * Functional Description:
2527 * The command request and response buffers are posted to the adapter in the manner
2528 * described in the PDQ Port Specification:
2530 * 1. Command Response Buffer is posted to adapter.
2531 * 2. Command Request Buffer is posted to adapter.
2532 * 3. Command Request consumer index is polled until it indicates that request
2533 * buffer has been DMA'd to adapter.
2534 * 4. Command Response consumer index is polled until it indicates that response
2535 * buffer has been DMA'd from adapter.
2537 * This ordering ensures that a response buffer is already available for the firmware
2538 * to use once it's done processing the request buffer.
2541 * DFX_K_SUCCESS - DMA command succeeded
2542 * DFX_K_OUTSTATE - Adapter is NOT in proper state
2543 * DFX_K_HW_TIMEOUT - DMA command timed out
2546 * Command request buffer has already been filled with desired DMA command.
2552 static int dfx_hw_dma_cmd_req(DFX_board_t
*bp
)
2554 int status
; /* adapter status */
2555 int timeout_cnt
; /* used in for loops */
2557 /* Make sure the adapter is in a state that we can issue the DMA command in */
2559 status
= dfx_hw_adap_state_rd(bp
);
2560 if ((status
== PI_STATE_K_RESET
) ||
2561 (status
== PI_STATE_K_HALTED
) ||
2562 (status
== PI_STATE_K_DMA_UNAVAIL
) ||
2563 (status
== PI_STATE_K_UPGRADE
))
2564 return(DFX_K_OUTSTATE
);
2566 /* Put response buffer on the command response queue */
2568 bp
->descr_block_virt
->cmd_rsp
[bp
->cmd_rsp_reg
.index
.prod
].long_0
= (u32
) (PI_RCV_DESCR_M_SOP
|
2569 ((PI_CMD_RSP_K_SIZE_MAX
/ PI_ALIGN_K_CMD_RSP_BUFF
) << PI_RCV_DESCR_V_SEG_LEN
));
2570 bp
->descr_block_virt
->cmd_rsp
[bp
->cmd_rsp_reg
.index
.prod
].long_1
= bp
->cmd_rsp_phys
;
2572 /* Bump (and wrap) the producer index and write out to register */
2574 bp
->cmd_rsp_reg
.index
.prod
+= 1;
2575 bp
->cmd_rsp_reg
.index
.prod
&= PI_CMD_RSP_K_NUM_ENTRIES
-1;
2576 dfx_port_write_long(bp
, PI_PDQ_K_REG_CMD_RSP_PROD
, bp
->cmd_rsp_reg
.lword
);
2578 /* Put request buffer on the command request queue */
2580 bp
->descr_block_virt
->cmd_req
[bp
->cmd_req_reg
.index
.prod
].long_0
= (u32
) (PI_XMT_DESCR_M_SOP
|
2581 PI_XMT_DESCR_M_EOP
| (PI_CMD_REQ_K_SIZE_MAX
<< PI_XMT_DESCR_V_SEG_LEN
));
2582 bp
->descr_block_virt
->cmd_req
[bp
->cmd_req_reg
.index
.prod
].long_1
= bp
->cmd_req_phys
;
2584 /* Bump (and wrap) the producer index and write out to register */
2586 bp
->cmd_req_reg
.index
.prod
+= 1;
2587 bp
->cmd_req_reg
.index
.prod
&= PI_CMD_REQ_K_NUM_ENTRIES
-1;
2588 dfx_port_write_long(bp
, PI_PDQ_K_REG_CMD_REQ_PROD
, bp
->cmd_req_reg
.lword
);
2591 * Here we wait for the command request consumer index to be equal
2592 * to the producer, indicating that the adapter has DMAed the request.
2595 for (timeout_cnt
= 20000; timeout_cnt
> 0; timeout_cnt
--)
2597 if (bp
->cmd_req_reg
.index
.prod
== (u8
)(bp
->cons_block_virt
->cmd_req
))
2599 udelay(100); /* wait for 100 microseconds */
2601 if (timeout_cnt
== 0)
2602 return(DFX_K_HW_TIMEOUT
);
2604 /* Bump (and wrap) the completion index and write out to register */
2606 bp
->cmd_req_reg
.index
.comp
+= 1;
2607 bp
->cmd_req_reg
.index
.comp
&= PI_CMD_REQ_K_NUM_ENTRIES
-1;
2608 dfx_port_write_long(bp
, PI_PDQ_K_REG_CMD_REQ_PROD
, bp
->cmd_req_reg
.lword
);
2611 * Here we wait for the command response consumer index to be equal
2612 * to the producer, indicating that the adapter has DMAed the response.
2615 for (timeout_cnt
= 20000; timeout_cnt
> 0; timeout_cnt
--)
2617 if (bp
->cmd_rsp_reg
.index
.prod
== (u8
)(bp
->cons_block_virt
->cmd_rsp
))
2619 udelay(100); /* wait for 100 microseconds */
2621 if (timeout_cnt
== 0)
2622 return(DFX_K_HW_TIMEOUT
);
2624 /* Bump (and wrap) the completion index and write out to register */
2626 bp
->cmd_rsp_reg
.index
.comp
+= 1;
2627 bp
->cmd_rsp_reg
.index
.comp
&= PI_CMD_RSP_K_NUM_ENTRIES
-1;
2628 dfx_port_write_long(bp
, PI_PDQ_K_REG_CMD_RSP_PROD
, bp
->cmd_rsp_reg
.lword
);
2629 return(DFX_K_SUCCESS
);
2634 * ========================
2635 * = dfx_hw_port_ctrl_req =
2636 * ========================
2639 * Sends PDQ port control command to adapter firmware
2642 * Host data register value in host_data if ptr is not NULL
2645 * bp - pointer to board information
2646 * command - port control command
2647 * data_a - port data A register value
2648 * data_b - port data B register value
2649 * host_data - ptr to host data register value
2651 * Functional Description:
2652 * Send generic port control command to adapter by writing
2653 * to various PDQ port registers, then polling for completion.
2656 * DFX_K_SUCCESS - port control command succeeded
2657 * DFX_K_HW_TIMEOUT - port control command timed out
2666 static int dfx_hw_port_ctrl_req(
2671 PI_UINT32
*host_data
2675 PI_UINT32 port_cmd
; /* Port Control command register value */
2676 int timeout_cnt
; /* used in for loops */
2678 /* Set Command Error bit in command longword */
2680 port_cmd
= (PI_UINT32
) (command
| PI_PCTRL_M_CMD_ERROR
);
2682 /* Issue port command to the adapter */
2684 dfx_port_write_long(bp
, PI_PDQ_K_REG_PORT_DATA_A
, data_a
);
2685 dfx_port_write_long(bp
, PI_PDQ_K_REG_PORT_DATA_B
, data_b
);
2686 dfx_port_write_long(bp
, PI_PDQ_K_REG_PORT_CTRL
, port_cmd
);
2688 /* Now wait for command to complete */
2690 if (command
== PI_PCTRL_M_BLAST_FLASH
)
2691 timeout_cnt
= 600000; /* set command timeout count to 60 seconds */
2693 timeout_cnt
= 20000; /* set command timeout count to 2 seconds */
2695 for (; timeout_cnt
> 0; timeout_cnt
--)
2697 dfx_port_read_long(bp
, PI_PDQ_K_REG_PORT_CTRL
, &port_cmd
);
2698 if (!(port_cmd
& PI_PCTRL_M_CMD_ERROR
))
2700 udelay(100); /* wait for 100 microseconds */
2702 if (timeout_cnt
== 0)
2703 return(DFX_K_HW_TIMEOUT
);
2706 * If the address of host_data is non-zero, assume caller has supplied a
2707 * non NULL pointer, and return the contents of the HOST_DATA register in
2711 if (host_data
!= NULL
)
2712 dfx_port_read_long(bp
, PI_PDQ_K_REG_HOST_DATA
, host_data
);
2713 return(DFX_K_SUCCESS
);
2718 * =====================
2719 * = dfx_hw_adap_reset =
2720 * =====================
2729 * bp - pointer to board information
2730 * type - type of reset to perform
2732 * Functional Description:
2733 * Issue soft reset to adapter by writing to PDQ Port Reset
2734 * register. Use incoming reset type to tell adapter what
2735 * kind of reset operation to perform.
2741 * This routine merely issues a soft reset to the adapter.
2742 * It is expected that after this routine returns, the caller
2743 * will appropriately poll the Port Status register for the
2744 * adapter to enter the proper state.
2747 * Internal adapter registers are cleared.
2750 static void dfx_hw_adap_reset(
2756 /* Set Reset type and assert reset */
2758 dfx_port_write_long(bp
, PI_PDQ_K_REG_PORT_DATA_A
, type
); /* tell adapter type of reset */
2759 dfx_port_write_long(bp
, PI_PDQ_K_REG_PORT_RESET
, PI_RESET_M_ASSERT_RESET
);
2761 /* Wait for at least 1 Microsecond according to the spec. We wait 20 just to be safe */
2765 /* Deassert reset */
2767 dfx_port_write_long(bp
, PI_PDQ_K_REG_PORT_RESET
, 0);
2772 * ========================
2773 * = dfx_hw_adap_state_rd =
2774 * ========================
2777 * Returns current adapter state
2780 * Adapter state per PDQ Port Specification
2783 * bp - pointer to board information
2785 * Functional Description:
2786 * Reads PDQ Port Status register and returns adapter state.
2798 static int dfx_hw_adap_state_rd(DFX_board_t
*bp
)
2800 PI_UINT32 port_status
; /* Port Status register value */
2802 dfx_port_read_long(bp
, PI_PDQ_K_REG_PORT_STATUS
, &port_status
);
2803 return((port_status
& PI_PSTATUS_M_STATE
) >> PI_PSTATUS_V_STATE
);
2808 * =====================
2809 * = dfx_hw_dma_uninit =
2810 * =====================
2813 * Brings adapter to DMA_UNAVAILABLE state
2819 * bp - pointer to board information
2820 * type - type of reset to perform
2822 * Functional Description:
2823 * Bring adapter to DMA_UNAVAILABLE state by performing the following:
2824 * 1. Set reset type bit in Port Data A Register then reset adapter.
2825 * 2. Check that adapter is in DMA_UNAVAILABLE state.
2828 * DFX_K_SUCCESS - adapter is in DMA_UNAVAILABLE state
2829 * DFX_K_HW_TIMEOUT - adapter did not reset properly
2835 * Internal adapter registers are cleared.
2838 static int dfx_hw_dma_uninit(DFX_board_t
*bp
, PI_UINT32 type
)
2840 int timeout_cnt
; /* used in for loops */
2842 /* Set reset type bit and reset adapter */
2844 dfx_hw_adap_reset(bp
, type
);
2846 /* Now wait for adapter to enter DMA_UNAVAILABLE state */
2848 for (timeout_cnt
= 100000; timeout_cnt
> 0; timeout_cnt
--)
2850 if (dfx_hw_adap_state_rd(bp
) == PI_STATE_K_DMA_UNAVAIL
)
2852 udelay(100); /* wait for 100 microseconds */
2854 if (timeout_cnt
== 0)
2855 return(DFX_K_HW_TIMEOUT
);
2856 return(DFX_K_SUCCESS
);
2860 * Align an sk_buff to a boundary power of 2
2864 static void my_skb_align(struct sk_buff
*skb
, int n
)
2866 unsigned long x
= (unsigned long)skb
->data
;
2869 v
= ALIGN(x
, n
); /* Where we want to be */
2871 skb_reserve(skb
, v
- x
);
2881 * Produces buffers to adapter LLC Host receive descriptor block
2887 * bp - pointer to board information
2888 * get_buffers - non-zero if buffers to be allocated
2890 * Functional Description:
2891 * This routine can be called during dfx_adap_init() or during an adapter
2892 * reset. It initializes the descriptor block and produces all allocated
2893 * LLC Host queue receive buffers.
2896 * Return 0 on success or -ENOMEM if buffer allocation failed (when using
2897 * dynamic buffer allocation). If the buffer allocation failed, the
2898 * already allocated buffers will not be released and the caller should do
2902 * The PDQ has been reset and the adapter and driver maintained Type 2
2903 * register indices are cleared.
2906 * Receive buffers are posted to the adapter LLC queue and the adapter
2910 static int dfx_rcv_init(DFX_board_t
*bp
, int get_buffers
)
2912 int i
, j
; /* used in for loop */
2915 * Since each receive buffer is a single fragment of same length, initialize
2916 * first longword in each receive descriptor for entire LLC Host descriptor
2917 * block. Also initialize second longword in each receive descriptor with
2918 * physical address of receive buffer. We'll always allocate receive
2919 * buffers in powers of 2 so that we can easily fill the 256 entry descriptor
2920 * block and produce new receive buffers by simply updating the receive
2924 * To support all shipping versions of PDQ, the receive buffer size
2925 * must be mod 128 in length and the physical address must be 128 byte
2926 * aligned. In other words, bits 0-6 of the length and address must
2927 * be zero for the following descriptor field entries to be correct on
2928 * all PDQ-based boards. We guaranteed both requirements during
2929 * driver initialization when we allocated memory for the receive buffers.
2933 #ifdef DYNAMIC_BUFFERS
2934 for (i
= 0; i
< (int)(bp
->rcv_bufs_to_post
); i
++)
2935 for (j
= 0; (i
+ j
) < (int)PI_RCV_DATA_K_NUM_ENTRIES
; j
+= bp
->rcv_bufs_to_post
)
2937 struct sk_buff
*newskb
= __dev_alloc_skb(NEW_SKB_SIZE
, GFP_NOIO
);
2940 bp
->descr_block_virt
->rcv_data
[i
+j
].long_0
= (u32
) (PI_RCV_DESCR_M_SOP
|
2941 ((PI_RCV_DATA_K_SIZE_MAX
/ PI_ALIGN_K_RCV_DATA_BUFF
) << PI_RCV_DESCR_V_SEG_LEN
));
2943 * align to 128 bytes for compatibility with
2944 * the old EISA boards.
2947 my_skb_align(newskb
, 128);
2948 bp
->descr_block_virt
->rcv_data
[i
+ j
].long_1
=
2949 (u32
)dma_map_single(bp
->bus_dev
, newskb
->data
,
2953 * p_rcv_buff_va is only used inside the
2954 * kernel so we put the skb pointer here.
2956 bp
->p_rcv_buff_va
[i
+j
] = (char *) newskb
;
2959 for (i
=0; i
< (int)(bp
->rcv_bufs_to_post
); i
++)
2960 for (j
=0; (i
+ j
) < (int)PI_RCV_DATA_K_NUM_ENTRIES
; j
+= bp
->rcv_bufs_to_post
)
2962 bp
->descr_block_virt
->rcv_data
[i
+j
].long_0
= (u32
) (PI_RCV_DESCR_M_SOP
|
2963 ((PI_RCV_DATA_K_SIZE_MAX
/ PI_ALIGN_K_RCV_DATA_BUFF
) << PI_RCV_DESCR_V_SEG_LEN
));
2964 bp
->descr_block_virt
->rcv_data
[i
+j
].long_1
= (u32
) (bp
->rcv_block_phys
+ (i
* PI_RCV_DATA_K_SIZE_MAX
));
2965 bp
->p_rcv_buff_va
[i
+j
] = (char *) (bp
->rcv_block_virt
+ (i
* PI_RCV_DATA_K_SIZE_MAX
));
2970 /* Update receive producer and Type 2 register */
2972 bp
->rcv_xmt_reg
.index
.rcv_prod
= bp
->rcv_bufs_to_post
;
2973 dfx_port_write_long(bp
, PI_PDQ_K_REG_TYPE_2_PROD
, bp
->rcv_xmt_reg
.lword
);
2979 * =========================
2980 * = dfx_rcv_queue_process =
2981 * =========================
2984 * Process received LLC frames.
2990 * bp - pointer to board information
2992 * Functional Description:
2993 * Received LLC frames are processed until there are no more consumed frames.
2994 * Once all frames are processed, the receive buffers are returned to the
2995 * adapter. Note that this algorithm fixes the length of time that can be spent
2996 * in this routine, because there are a fixed number of receive buffers to
2997 * process and buffers are not produced until this routine exits and returns
3010 static void dfx_rcv_queue_process(
3015 PI_TYPE_2_CONSUMER
*p_type_2_cons
; /* ptr to rcv/xmt consumer block register */
3016 char *p_buff
; /* ptr to start of packet receive buffer (FMC descriptor) */
3017 u32 descr
, pkt_len
; /* FMC descriptor field and packet length */
3018 struct sk_buff
*skb
; /* pointer to a sk_buff to hold incoming packet data */
3020 /* Service all consumed LLC receive frames */
3022 p_type_2_cons
= (PI_TYPE_2_CONSUMER
*)(&bp
->cons_block_virt
->xmt_rcv_data
);
3023 while (bp
->rcv_xmt_reg
.index
.rcv_comp
!= p_type_2_cons
->index
.rcv_cons
)
3025 /* Process any errors */
3029 entry
= bp
->rcv_xmt_reg
.index
.rcv_comp
;
3030 #ifdef DYNAMIC_BUFFERS
3031 p_buff
= (char *) (((struct sk_buff
*)bp
->p_rcv_buff_va
[entry
])->data
);
3033 p_buff
= (char *) bp
->p_rcv_buff_va
[entry
];
3035 memcpy(&descr
, p_buff
+ RCV_BUFF_K_DESCR
, sizeof(u32
));
3037 if (descr
& PI_FMC_DESCR_M_RCC_FLUSH
)
3039 if (descr
& PI_FMC_DESCR_M_RCC_CRC
)
3040 bp
->rcv_crc_errors
++;
3042 bp
->rcv_frame_status_errors
++;
3046 int rx_in_place
= 0;
3048 /* The frame was received without errors - verify packet length */
3050 pkt_len
= (u32
)((descr
& PI_FMC_DESCR_M_LEN
) >> PI_FMC_DESCR_V_LEN
);
3051 pkt_len
-= 4; /* subtract 4 byte CRC */
3052 if (!IN_RANGE(pkt_len
, FDDI_K_LLC_ZLEN
, FDDI_K_LLC_LEN
))
3053 bp
->rcv_length_errors
++;
3055 #ifdef DYNAMIC_BUFFERS
3056 if (pkt_len
> SKBUFF_RX_COPYBREAK
) {
3057 struct sk_buff
*newskb
;
3059 newskb
= dev_alloc_skb(NEW_SKB_SIZE
);
3063 my_skb_align(newskb
, 128);
3064 skb
= (struct sk_buff
*)bp
->p_rcv_buff_va
[entry
];
3065 dma_unmap_single(bp
->bus_dev
,
3066 bp
->descr_block_virt
->rcv_data
[entry
].long_1
,
3069 skb_reserve(skb
, RCV_BUFF_K_PADDING
);
3070 bp
->p_rcv_buff_va
[entry
] = (char *)newskb
;
3071 bp
->descr_block_virt
->rcv_data
[entry
].long_1
=
3072 (u32
)dma_map_single(bp
->bus_dev
,
3080 skb
= dev_alloc_skb(pkt_len
+3); /* alloc new buffer to pass up, add room for PRH */
3083 printk("%s: Could not allocate receive buffer. Dropping packet.\n", bp
->dev
->name
);
3088 #ifndef DYNAMIC_BUFFERS
3092 /* Receive buffer allocated, pass receive packet up */
3094 skb_copy_to_linear_data(skb
,
3095 p_buff
+ RCV_BUFF_K_PADDING
,
3099 skb_reserve(skb
,3); /* adjust data field so that it points to FC byte */
3100 skb_put(skb
, pkt_len
); /* pass up packet length, NOT including CRC */
3101 skb
->protocol
= fddi_type_trans(skb
, bp
->dev
);
3102 bp
->rcv_total_bytes
+= skb
->len
;
3105 /* Update the rcv counters */
3106 bp
->dev
->last_rx
= jiffies
;
3107 bp
->rcv_total_frames
++;
3108 if (*(p_buff
+ RCV_BUFF_K_DA
) & 0x01)
3109 bp
->rcv_multicast_frames
++;
3115 * Advance the producer (for recycling) and advance the completion
3116 * (for servicing received frames). Note that it is okay to
3117 * advance the producer without checking that it passes the
3118 * completion index because they are both advanced at the same
3122 bp
->rcv_xmt_reg
.index
.rcv_prod
+= 1;
3123 bp
->rcv_xmt_reg
.index
.rcv_comp
+= 1;
3129 * =====================
3130 * = dfx_xmt_queue_pkt =
3131 * =====================
3134 * Queues packets for transmission
3140 * skb - pointer to sk_buff to queue for transmission
3141 * dev - pointer to device information
3143 * Functional Description:
3144 * Here we assume that an incoming skb transmit request
3145 * is contained in a single physically contiguous buffer
3146 * in which the virtual address of the start of packet
3147 * (skb->data) can be converted to a physical address
3148 * by using pci_map_single().
3150 * Since the adapter architecture requires a three byte
3151 * packet request header to prepend the start of packet,
3152 * we'll write the three byte field immediately prior to
3153 * the FC byte. This assumption is valid because we've
3154 * ensured that dev->hard_header_len includes three pad
3155 * bytes. By posting a single fragment to the adapter,
3156 * we'll reduce the number of descriptor fetches and
3157 * bus traffic needed to send the request.
3159 * Also, we can't free the skb until after it's been DMA'd
3160 * out by the adapter, so we'll queue it in the driver and
3161 * return it in dfx_xmt_done.
3164 * 0 - driver queued packet, link is unavailable, or skbuff was bad
3165 * 1 - caller should requeue the sk_buff for later transmission
3168 * First and foremost, we assume the incoming skb pointer
3169 * is NOT NULL and is pointing to a valid sk_buff structure.
3171 * The outgoing packet is complete, starting with the
3172 * frame control byte including the last byte of data,
3173 * but NOT including the 4 byte CRC. We'll let the
3174 * adapter hardware generate and append the CRC.
3176 * The entire packet is stored in one physically
3177 * contiguous buffer which is not cached and whose
3178 * 32-bit physical address can be determined.
3180 * It's vital that this routine is NOT reentered for the
3181 * same board and that the OS is not in another section of
3182 * code (eg. dfx_int_common) for the same board on a
3189 static int dfx_xmt_queue_pkt(
3190 struct sk_buff
*skb
,
3191 struct net_device
*dev
3195 DFX_board_t
*bp
= netdev_priv(dev
);
3196 u8 prod
; /* local transmit producer index */
3197 PI_XMT_DESCR
*p_xmt_descr
; /* ptr to transmit descriptor block entry */
3198 XMT_DRIVER_DESCR
*p_xmt_drv_descr
; /* ptr to transmit driver descriptor */
3199 unsigned long flags
;
3201 netif_stop_queue(dev
);
3204 * Verify that incoming transmit request is OK
3206 * Note: The packet size check is consistent with other
3207 * Linux device drivers, although the correct packet
3208 * size should be verified before calling the
3212 if (!IN_RANGE(skb
->len
, FDDI_K_LLC_ZLEN
, FDDI_K_LLC_LEN
))
3214 printk("%s: Invalid packet length - %u bytes\n",
3215 dev
->name
, skb
->len
);
3216 bp
->xmt_length_errors
++; /* bump error counter */
3217 netif_wake_queue(dev
);
3219 return(0); /* return "success" */
3222 * See if adapter link is available, if not, free buffer
3224 * Note: If the link isn't available, free buffer and return 0
3225 * rather than tell the upper layer to requeue the packet.
3226 * The methodology here is that by the time the link
3227 * becomes available, the packet to be sent will be
3228 * fairly stale. By simply dropping the packet, the
3229 * higher layer protocols will eventually time out
3230 * waiting for response packets which it won't receive.
3233 if (bp
->link_available
== PI_K_FALSE
)
3235 if (dfx_hw_adap_state_rd(bp
) == PI_STATE_K_LINK_AVAIL
) /* is link really available? */
3236 bp
->link_available
= PI_K_TRUE
; /* if so, set flag and continue */
3239 bp
->xmt_discards
++; /* bump error counter */
3240 dev_kfree_skb(skb
); /* free sk_buff now */
3241 netif_wake_queue(dev
);
3242 return(0); /* return "success" */
3246 spin_lock_irqsave(&bp
->lock
, flags
);
3248 /* Get the current producer and the next free xmt data descriptor */
3250 prod
= bp
->rcv_xmt_reg
.index
.xmt_prod
;
3251 p_xmt_descr
= &(bp
->descr_block_virt
->xmt_data
[prod
]);
3254 * Get pointer to auxiliary queue entry to contain information
3257 * Note: The current xmt producer index will become the
3258 * current xmt completion index when we complete this
3259 * packet later on. So, we'll get the pointer to the
3260 * next auxiliary queue entry now before we bump the
3264 p_xmt_drv_descr
= &(bp
->xmt_drv_descr_blk
[prod
++]); /* also bump producer index */
3266 /* Write the three PRH bytes immediately before the FC byte */
3269 skb
->data
[0] = DFX_PRH0_BYTE
; /* these byte values are defined */
3270 skb
->data
[1] = DFX_PRH1_BYTE
; /* in the Motorola FDDI MAC chip */
3271 skb
->data
[2] = DFX_PRH2_BYTE
; /* specification */
3274 * Write the descriptor with buffer info and bump producer
3276 * Note: Since we need to start DMA from the packet request
3277 * header, we'll add 3 bytes to the DMA buffer length,
3278 * and we'll determine the physical address of the
3279 * buffer from the PRH, not skb->data.
3282 * 1. Packet starts with the frame control (FC) byte
3284 * 2. The 4-byte CRC is not appended to the buffer or
3285 * included in the length.
3286 * 3. Packet length (skb->len) is from FC to end of
3288 * 4. The packet length does not exceed the maximum
3289 * FDDI LLC frame length of 4491 bytes.
3290 * 5. The entire packet is contained in a physically
3291 * contiguous, non-cached, locked memory space
3292 * comprised of a single buffer pointed to by
3294 * 6. The physical address of the start of packet
3295 * can be determined from the virtual address
3296 * by using pci_map_single() and is only 32-bits
3300 p_xmt_descr
->long_0
= (u32
) (PI_XMT_DESCR_M_SOP
| PI_XMT_DESCR_M_EOP
| ((skb
->len
) << PI_XMT_DESCR_V_SEG_LEN
));
3301 p_xmt_descr
->long_1
= (u32
)dma_map_single(bp
->bus_dev
, skb
->data
,
3302 skb
->len
, DMA_TO_DEVICE
);
3305 * Verify that descriptor is actually available
3307 * Note: If descriptor isn't available, return 1 which tells
3308 * the upper layer to requeue the packet for later
3311 * We need to ensure that the producer never reaches the
3312 * completion, except to indicate that the queue is empty.
3315 if (prod
== bp
->rcv_xmt_reg
.index
.xmt_comp
)
3318 spin_unlock_irqrestore(&bp
->lock
, flags
);
3319 return(1); /* requeue packet for later */
3323 * Save info for this packet for xmt done indication routine
3325 * Normally, we'd save the producer index in the p_xmt_drv_descr
3326 * structure so that we'd have it handy when we complete this
3327 * packet later (in dfx_xmt_done). However, since the current
3328 * transmit architecture guarantees a single fragment for the
3329 * entire packet, we can simply bump the completion index by
3330 * one (1) for each completed packet.
3332 * Note: If this assumption changes and we're presented with
3333 * an inconsistent number of transmit fragments for packet
3334 * data, we'll need to modify this code to save the current
3335 * transmit producer index.
3338 p_xmt_drv_descr
->p_skb
= skb
;
3340 /* Update Type 2 register */
3342 bp
->rcv_xmt_reg
.index
.xmt_prod
= prod
;
3343 dfx_port_write_long(bp
, PI_PDQ_K_REG_TYPE_2_PROD
, bp
->rcv_xmt_reg
.lword
);
3344 spin_unlock_irqrestore(&bp
->lock
, flags
);
3345 netif_wake_queue(dev
);
3346 return(0); /* packet queued to adapter */
3356 * Processes all frames that have been transmitted.
3362 * bp - pointer to board information
3364 * Functional Description:
3365 * For all consumed transmit descriptors that have not
3366 * yet been completed, we'll free the skb we were holding
3367 * onto using dev_kfree_skb and bump the appropriate
3374 * The Type 2 register is not updated in this routine. It is
3375 * assumed that it will be updated in the ISR when dfx_xmt_done
3382 static int dfx_xmt_done(DFX_board_t
*bp
)
3384 XMT_DRIVER_DESCR
*p_xmt_drv_descr
; /* ptr to transmit driver descriptor */
3385 PI_TYPE_2_CONSUMER
*p_type_2_cons
; /* ptr to rcv/xmt consumer block register */
3386 u8 comp
; /* local transmit completion index */
3387 int freed
= 0; /* buffers freed */
3389 /* Service all consumed transmit frames */
3391 p_type_2_cons
= (PI_TYPE_2_CONSUMER
*)(&bp
->cons_block_virt
->xmt_rcv_data
);
3392 while (bp
->rcv_xmt_reg
.index
.xmt_comp
!= p_type_2_cons
->index
.xmt_cons
)
3394 /* Get pointer to the transmit driver descriptor block information */
3396 p_xmt_drv_descr
= &(bp
->xmt_drv_descr_blk
[bp
->rcv_xmt_reg
.index
.xmt_comp
]);
3398 /* Increment transmit counters */
3400 bp
->xmt_total_frames
++;
3401 bp
->xmt_total_bytes
+= p_xmt_drv_descr
->p_skb
->len
;
3403 /* Return skb to operating system */
3404 comp
= bp
->rcv_xmt_reg
.index
.xmt_comp
;
3405 dma_unmap_single(bp
->bus_dev
,
3406 bp
->descr_block_virt
->xmt_data
[comp
].long_1
,
3407 p_xmt_drv_descr
->p_skb
->len
,
3409 dev_kfree_skb_irq(p_xmt_drv_descr
->p_skb
);
3412 * Move to start of next packet by updating completion index
3414 * Here we assume that a transmit packet request is always
3415 * serviced by posting one fragment. We can therefore
3416 * simplify the completion code by incrementing the
3417 * completion index by one. This code will need to be
3418 * modified if this assumption changes. See comments
3419 * in dfx_xmt_queue_pkt for more details.
3422 bp
->rcv_xmt_reg
.index
.xmt_comp
+= 1;
3435 * Remove all skb's in the receive ring.
3441 * bp - pointer to board information
3443 * Functional Description:
3444 * Free's all the dynamically allocated skb's that are
3445 * currently attached to the device receive ring. This
3446 * function is typically only used when the device is
3447 * initialized or reinitialized.
3455 #ifdef DYNAMIC_BUFFERS
3456 static void dfx_rcv_flush( DFX_board_t
*bp
)
3460 for (i
= 0; i
< (int)(bp
->rcv_bufs_to_post
); i
++)
3461 for (j
= 0; (i
+ j
) < (int)PI_RCV_DATA_K_NUM_ENTRIES
; j
+= bp
->rcv_bufs_to_post
)
3463 struct sk_buff
*skb
;
3464 skb
= (struct sk_buff
*)bp
->p_rcv_buff_va
[i
+j
];
3467 bp
->p_rcv_buff_va
[i
+j
] = NULL
;
3472 static inline void dfx_rcv_flush( DFX_board_t
*bp
)
3475 #endif /* DYNAMIC_BUFFERS */
3483 * Processes all frames whether they've been transmitted
3490 * bp - pointer to board information
3492 * Functional Description:
3493 * For all produced transmit descriptors that have not
3494 * yet been completed, we'll free the skb we were holding
3495 * onto using dev_kfree_skb and bump the appropriate
3496 * counters. Of course, it's possible that some of
3497 * these transmit requests actually did go out, but we
3498 * won't make that distinction here. Finally, we'll
3499 * update the consumer index to match the producer.
3505 * This routine does NOT update the Type 2 register. It
3506 * is assumed that this routine is being called during a
3507 * transmit flush interrupt, or a shutdown or close routine.
3513 static void dfx_xmt_flush( DFX_board_t
*bp
)
3515 u32 prod_cons
; /* rcv/xmt consumer block longword */
3516 XMT_DRIVER_DESCR
*p_xmt_drv_descr
; /* ptr to transmit driver descriptor */
3517 u8 comp
; /* local transmit completion index */
3519 /* Flush all outstanding transmit frames */
3521 while (bp
->rcv_xmt_reg
.index
.xmt_comp
!= bp
->rcv_xmt_reg
.index
.xmt_prod
)
3523 /* Get pointer to the transmit driver descriptor block information */
3525 p_xmt_drv_descr
= &(bp
->xmt_drv_descr_blk
[bp
->rcv_xmt_reg
.index
.xmt_comp
]);
3527 /* Return skb to operating system */
3528 comp
= bp
->rcv_xmt_reg
.index
.xmt_comp
;
3529 dma_unmap_single(bp
->bus_dev
,
3530 bp
->descr_block_virt
->xmt_data
[comp
].long_1
,
3531 p_xmt_drv_descr
->p_skb
->len
,
3533 dev_kfree_skb(p_xmt_drv_descr
->p_skb
);
3535 /* Increment transmit error counter */
3540 * Move to start of next packet by updating completion index
3542 * Here we assume that a transmit packet request is always
3543 * serviced by posting one fragment. We can therefore
3544 * simplify the completion code by incrementing the
3545 * completion index by one. This code will need to be
3546 * modified if this assumption changes. See comments
3547 * in dfx_xmt_queue_pkt for more details.
3550 bp
->rcv_xmt_reg
.index
.xmt_comp
+= 1;
3553 /* Update the transmit consumer index in the consumer block */
3555 prod_cons
= (u32
)(bp
->cons_block_virt
->xmt_rcv_data
& ~PI_CONS_M_XMT_INDEX
);
3556 prod_cons
|= (u32
)(bp
->rcv_xmt_reg
.index
.xmt_prod
<< PI_CONS_V_XMT_INDEX
);
3557 bp
->cons_block_virt
->xmt_rcv_data
= prod_cons
;
3561 * ==================
3562 * = dfx_unregister =
3563 * ==================
3566 * Shuts down an FDDI controller
3572 * bdev - pointer to device information
3574 * Functional Description:
3580 * It compiles so it should work :-( (PCI cards do :-)
3583 * Device structures for FDDI adapters (fddi0, fddi1, etc) are
3586 static void __devexit
dfx_unregister(struct device
*bdev
)
3588 struct net_device
*dev
= dev_get_drvdata(bdev
);
3589 DFX_board_t
*bp
= netdev_priv(dev
);
3590 int dfx_bus_pci
= DFX_BUS_PCI(bdev
);
3591 int dfx_bus_tc
= DFX_BUS_TC(bdev
);
3592 int dfx_use_mmio
= DFX_MMIO
|| dfx_bus_tc
;
3593 resource_size_t bar_start
= 0; /* pointer to port */
3594 resource_size_t bar_len
= 0; /* resource length */
3595 int alloc_size
; /* total buffer size used */
3597 unregister_netdev(dev
);
3599 alloc_size
= sizeof(PI_DESCR_BLOCK
) +
3600 PI_CMD_REQ_K_SIZE_MAX
+ PI_CMD_RSP_K_SIZE_MAX
+
3601 #ifndef DYNAMIC_BUFFERS
3602 (bp
->rcv_bufs_to_post
* PI_RCV_DATA_K_SIZE_MAX
) +
3604 sizeof(PI_CONSUMER_BLOCK
) +
3605 (PI_ALIGN_K_DESC_BLK
- 1);
3607 dma_free_coherent(bdev
, alloc_size
,
3608 bp
->kmalloced
, bp
->kmalloced_dma
);
3610 dfx_bus_uninit(dev
);
3612 dfx_get_bars(bdev
, &bar_start
, &bar_len
);
3614 iounmap(bp
->base
.mem
);
3615 release_mem_region(bar_start
, bar_len
);
3617 release_region(bar_start
, bar_len
);
3620 pci_disable_device(to_pci_dev(bdev
));
3626 static int __devinit __maybe_unused
dfx_dev_register(struct device
*);
3627 static int __devexit __maybe_unused
dfx_dev_unregister(struct device
*);
3630 static int __devinit
dfx_pci_register(struct pci_dev
*,
3631 const struct pci_device_id
*);
3632 static void __devexit
dfx_pci_unregister(struct pci_dev
*);
3634 static struct pci_device_id dfx_pci_table
[] = {
3635 { PCI_DEVICE(PCI_VENDOR_ID_DEC
, PCI_DEVICE_ID_DEC_FDDI
) },
3638 MODULE_DEVICE_TABLE(pci
, dfx_pci_table
);
3640 static struct pci_driver dfx_pci_driver
= {
3642 .id_table
= dfx_pci_table
,
3643 .probe
= dfx_pci_register
,
3644 .remove
= __devexit_p(dfx_pci_unregister
),
3647 static __devinit
int dfx_pci_register(struct pci_dev
*pdev
,
3648 const struct pci_device_id
*ent
)
3650 return dfx_register(&pdev
->dev
);
3653 static void __devexit
dfx_pci_unregister(struct pci_dev
*pdev
)
3655 dfx_unregister(&pdev
->dev
);
3657 #endif /* CONFIG_PCI */
3660 static struct eisa_device_id dfx_eisa_table
[] = {
3661 { "DEC3001", DEFEA_PROD_ID_1
},
3662 { "DEC3002", DEFEA_PROD_ID_2
},
3663 { "DEC3003", DEFEA_PROD_ID_3
},
3664 { "DEC3004", DEFEA_PROD_ID_4
},
3667 MODULE_DEVICE_TABLE(eisa
, dfx_eisa_table
);
3669 static struct eisa_driver dfx_eisa_driver
= {
3670 .id_table
= dfx_eisa_table
,
3673 .bus
= &eisa_bus_type
,
3674 .probe
= dfx_dev_register
,
3675 .remove
= __devexit_p(dfx_dev_unregister
),
3678 #endif /* CONFIG_EISA */
3681 static struct tc_device_id
const dfx_tc_table
[] = {
3682 { "DEC ", "PMAF-FA " },
3683 { "DEC ", "PMAF-FD " },
3684 { "DEC ", "PMAF-FS " },
3685 { "DEC ", "PMAF-FU " },
3688 MODULE_DEVICE_TABLE(tc
, dfx_tc_table
);
3690 static struct tc_driver dfx_tc_driver
= {
3691 .id_table
= dfx_tc_table
,
3694 .bus
= &tc_bus_type
,
3695 .probe
= dfx_dev_register
,
3696 .remove
= __devexit_p(dfx_dev_unregister
),
3699 #endif /* CONFIG_TC */
3701 static int __devinit __maybe_unused
dfx_dev_register(struct device
*dev
)
3705 status
= dfx_register(dev
);
3711 static int __devexit __maybe_unused
dfx_dev_unregister(struct device
*dev
)
3714 dfx_unregister(dev
);
3719 static int __devinit
dfx_init(void)
3723 status
= pci_register_driver(&dfx_pci_driver
);
3725 status
= eisa_driver_register(&dfx_eisa_driver
);
3727 status
= tc_register_driver(&dfx_tc_driver
);
3731 static void __devexit
dfx_cleanup(void)
3733 tc_unregister_driver(&dfx_tc_driver
);
3734 eisa_driver_unregister(&dfx_eisa_driver
);
3735 pci_unregister_driver(&dfx_pci_driver
);
3738 module_init(dfx_init
);
3739 module_exit(dfx_cleanup
);
3740 MODULE_AUTHOR("Lawrence V. Stefani");
3741 MODULE_DESCRIPTION("DEC FDDIcontroller TC/EISA/PCI (DEFTA/DEFEA/DEFPA) driver "
3742 DRV_VERSION
" " DRV_RELDATE
);
3743 MODULE_LICENSE("GPL");
3748 * kernel-compile-command: "gcc -D__KERNEL__ -I/root/linux/include -Wall -Wstrict-prototypes -O2 -pipe -fomit-frame-pointer -fno-strength-reduce -m486 -malign-loops=2 -malign-jumps=2 -malign-functions=2 -c defxx.c"