drivers/usb/host/ehci-mem.c

   1 /*
   2  * Copyright (c) 2001 by David Brownell
   3  *
   4  * This program is free software; you can redistribute it and/or modify it
   5  * under the terms of the GNU General Public License as published by the
   6  * Free Software Foundation; either version 2 of the License, or (at your
   7  * option) any later version.
   8  *
   9  * This program is distributed in the hope that it will be useful, but
  10  * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  11  * or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  12  * for more details.
  13  *
  14  * You should have received a copy of the GNU General Public License
  15  * along with this program; if not, write to the Free Software Foundation,
  16  * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  17  */
  18
  19 /* this file is part of ehci-hcd.c */
  20
  21 /*-------------------------------------------------------------------------*/
  22
  23 /*
  24  * There's basically three types of memory:
  25  *      - data used only by the HCD ... kmalloc is fine
  26  *      - async and periodic schedules, shared by HC and HCD ... these
  27  *        need to use dma_pool or dma_alloc_coherent
  28  *      - driver buffers, read/written by HC ... single shot DMA mapped
  29  *
  30  * There's also "register" data (e.g. PCI or SOC), which is memory mapped.
  31  * No memory seen by this driver is pageable.
  32  */
  33
  34 /*-------------------------------------------------------------------------*/
  35
  36 /* Allocate the key transfer structures from the previously allocated pool */
  37
  38 static inline void ehci_qtd_init(struct ehci_hcd *ehci, struct ehci_qtd *qtd,
  39                                   dma_addr_t dma)
  40 {
  41         memset (qtd, 0, sizeof *qtd);
  42         qtd->qtd_dma = dma;
  43         qtd->hw_token = cpu_to_le32 (QTD_STS_HALT);
  44         qtd->hw_next = EHCI_LIST_END(ehci);
  45         qtd->hw_alt_next = EHCI_LIST_END(ehci);
  46         INIT_LIST_HEAD (&qtd->qtd_list);
  47 }
  48
  49 static struct ehci_qtd *ehci_qtd_alloc (struct ehci_hcd *ehci, gfp_t flags)
  50 {
  51         struct ehci_qtd         *qtd;
  52         dma_addr_t              dma;
  53
  54         qtd = dma_pool_alloc (ehci->qtd_pool, flags, &dma);
  55         if (qtd != NULL) {
  56                 ehci_qtd_init(ehci, qtd, dma);
  57         }
  58         return qtd;
  59 }
  60
  61 static inline void ehci_qtd_free (struct ehci_hcd *ehci, struct ehci_qtd *qtd)
  62 {
  63         dma_pool_free (ehci->qtd_pool, qtd, qtd->qtd_dma);
  64 }
  65
  66
  67 static void qh_destroy (struct kref *kref)
  68 {
  69         struct ehci_qh *qh = container_of(kref, struct ehci_qh, kref);
  70         struct ehci_hcd *ehci = qh->ehci;
  71
  72         /* clean qtds first, and know this is not linked */
  73         if (!list_empty (&qh->qtd_list) || qh->qh_next.ptr) {
  74                 ehci_dbg (ehci, "unused qh not empty!\n");
  75                 BUG ();
  76         }
  77         if (qh->dummy)
  78                 ehci_qtd_free (ehci, qh->dummy);
  79         dma_pool_free (ehci->qh_pool, qh, qh->qh_dma);
  80 }
  81
  82 static struct ehci_qh *ehci_qh_alloc (struct ehci_hcd *ehci, gfp_t flags)
  83 {
  84         struct ehci_qh          *qh;
  85         dma_addr_t              dma;
  86
  87         qh = (struct ehci_qh *)
  88                 dma_pool_alloc (ehci->qh_pool, flags, &dma);
  89         if (!qh)
  90                 return qh;
  91
  92         memset (qh, 0, sizeof *qh);
  93         kref_init(&qh->kref);
  94         qh->ehci = ehci;
  95         qh->qh_dma = dma;
  96         // INIT_LIST_HEAD (&qh->qh_list);
  97         INIT_LIST_HEAD (&qh->qtd_list);
  98 #ifdef CONFIG_CPU_FREQ
  99         INIT_LIST_HEAD (&qh->split_intr_qhs);
 100 #endif
 101
 102         /* dummy td enables safe urb queuing */
 103         qh->dummy = ehci_qtd_alloc (ehci, flags);
 104         if (qh->dummy == NULL) {
 105                 ehci_dbg (ehci, "no dummy td\n");
 106                 dma_pool_free (ehci->qh_pool, qh, qh->qh_dma);
 107                 qh = NULL;
 108         }
 109         return qh;
 110 }
 111
 112 /* to share a qh (cpu threads, or hc) */
 113 static inline struct ehci_qh *qh_get (struct ehci_qh *qh)
 114 {
 115         kref_get(&qh->kref);
 116         return qh;
 117 }
 118
 119 static inline void qh_put (struct ehci_qh *qh)
 120 {
 121         kref_put(&qh->kref, qh_destroy);
 122 }
 123
 124 /*-------------------------------------------------------------------------*/
 125
 126 /* The queue heads and transfer descriptors are managed from pools tied
 127  * to each of the "per device" structures.
 128  * This is the initialisation and cleanup code.
 129  */
 130
 131 static void ehci_mem_cleanup (struct ehci_hcd *ehci)
 132 {
 133         if (ehci->async)
 134                 qh_put (ehci->async);
 135         ehci->async = NULL;
 136
 137         /* DMA consistent memory and pools */
 138         if (ehci->qtd_pool)
 139                 dma_pool_destroy (ehci->qtd_pool);
 140         ehci->qtd_pool = NULL;
 141
 142         if (ehci->qh_pool) {
 143                 dma_pool_destroy (ehci->qh_pool);
 144                 ehci->qh_pool = NULL;
 145         }
 146
 147         if (ehci->itd_pool)
 148                 dma_pool_destroy (ehci->itd_pool);
 149         ehci->itd_pool = NULL;
 150
 151         if (ehci->sitd_pool)
 152                 dma_pool_destroy (ehci->sitd_pool);
 153         ehci->sitd_pool = NULL;
 154
 155         if (ehci->periodic)
 156                 dma_free_coherent (ehci_to_hcd(ehci)->self.controller,
 157                         ehci->periodic_size * sizeof (u32),
 158                         ehci->periodic, ehci->periodic_dma);
 159         ehci->periodic = NULL;
 160
 161         /* shadow periodic table */
 162         kfree(ehci->pshadow);
 163         ehci->pshadow = NULL;
 164 }
 165
 166 /* remember to add cleanup code (above) if you add anything here */
 167 static int ehci_mem_init (struct ehci_hcd *ehci, gfp_t flags)
 168 {
 169         int i;
 170
 171         /* QTDs for control/bulk/intr transfers */
 172         ehci->qtd_pool = dma_pool_create ("ehci_qtd",
 173                         ehci_to_hcd(ehci)->self.controller,
 174                         sizeof (struct ehci_qtd),
 175                         32 /* byte alignment (for hw parts) */,
 176                         4096 /* can't cross 4K */);
 177         if (!ehci->qtd_pool) {
 178                 goto fail;
 179         }
 180
 181         /* QHs for control/bulk/intr transfers */
 182         ehci->qh_pool = dma_pool_create ("ehci_qh",
 183                         ehci_to_hcd(ehci)->self.controller,
 184                         sizeof (struct ehci_qh),
 185                         32 /* byte alignment (for hw parts) */,
 186                         4096 /* can't cross 4K */);
 187         if (!ehci->qh_pool) {
 188                 goto fail;
 189         }
 190         ehci->async = ehci_qh_alloc (ehci, flags);
 191         if (!ehci->async) {
 192                 goto fail;
 193         }
 194
 195         /* ITD for high speed ISO transfers */
 196         ehci->itd_pool = dma_pool_create ("ehci_itd",
 197                         ehci_to_hcd(ehci)->self.controller,
 198                         sizeof (struct ehci_itd),
 199                         32 /* byte alignment (for hw parts) */,
 200                         4096 /* can't cross 4K */);
 201         if (!ehci->itd_pool) {
 202                 goto fail;
 203         }
 204
 205         /* SITD for full/low speed split ISO transfers */
 206         ehci->sitd_pool = dma_pool_create ("ehci_sitd",
 207                         ehci_to_hcd(ehci)->self.controller,
 208                         sizeof (struct ehci_sitd),
 209                         32 /* byte alignment (for hw parts) */,
 210                         4096 /* can't cross 4K */);
 211         if (!ehci->sitd_pool) {
 212                 goto fail;
 213         }
 214
 215         /* Hardware periodic table */
 216         ehci->periodic = (__le32 *)
 217                 dma_alloc_coherent (ehci_to_hcd(ehci)->self.controller,
 218                         ehci->periodic_size * sizeof(__le32),
 219                         &ehci->periodic_dma, 0);
 220         if (ehci->periodic == NULL) {
 221                 goto fail;
 222         }
 223         for (i = 0; i < ehci->periodic_size; i++)
 224                 ehci->periodic [i] = EHCI_LIST_END(ehci);
 225
 226         /* software shadow of hardware table */
 227         ehci->pshadow = kcalloc(ehci->periodic_size, sizeof(void *), flags);
 228         if (ehci->pshadow != NULL)
 229                 return 0;
 230
 231 fail:
 232         ehci_dbg (ehci, "couldn't init memory\n");
 233         ehci_mem_cleanup (ehci);
 234         return -ENOMEM;
 235 }