arch/arm/mach-s3c2410/mach-qt2410.c

   1 /* linux/arch/arm/mach-s3c2410/mach-qt2410.c
   2  *
   3  * Copyright (C) 2006 by OpenMoko, Inc.
   4  * Author: Harald Welte <laforge@openmoko.org>
   5  * All rights reserved.
   6  *
   7  * This program is free software; you can redistribute it and/or
   8  * modify it under the terms of the GNU General Public License as
   9  * published by the Free Software Foundation; either version 2 of
  10  * the License, or (at your option) any later version.
  11  *
  12  * This program is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  * GNU General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU General Public License
  18  * along with this program; if not, write to the Free Software
  19  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  20  * MA 02111-1307 USA
  21  *
  22  */
  23
  24 #include <linux/kernel.h>
  25 #include <linux/types.h>
  26 #include <linux/interrupt.h>
  27 #include <linux/list.h>
  28 #include <linux/timer.h>
  29 #include <linux/init.h>
  30 #include <linux/sysdev.h>
  31 #include <linux/platform_device.h>
  32 #include <linux/serial_core.h>
  33 #include <linux/spi/spi.h>
  34 #include <linux/spi/spi_bitbang.h>
  35
  36 #include <linux/mtd/mtd.h>
  37 #include <linux/mtd/nand.h>
  38 #include <linux/mtd/nand_ecc.h>
  39 #include <linux/mtd/partitions.h>
  40
  41 #include <asm/mach/arch.h>
  42 #include <asm/mach/map.h>
  43 #include <asm/mach/irq.h>
  44
  45 #include <asm/hardware.h>
  46 #include <asm/io.h>
  47 #include <asm/irq.h>
  48 #include <asm/mach-types.h>
  49
  50 #include <asm/arch/regs-gpio.h>
  51 #include <asm/arch/leds-gpio.h>
  52 #include <asm/plat-s3c/regs-serial.h>
  53 #include <asm/arch/fb.h>
  54 #include <asm/plat-s3c/nand.h>
  55 #include <asm/plat-s3c24xx/udc.h>
  56 #include <asm/arch/spi.h>
  57 #include <asm/arch/spi-gpio.h>
  58
  59 #include <asm/plat-s3c24xx/common-smdk.h>
  60 #include <asm/plat-s3c24xx/devs.h>
  61 #include <asm/plat-s3c24xx/cpu.h>
  62 #include <asm/plat-s3c24xx/pm.h>
  63
  64 static struct map_desc qt2410_iodesc[] __initdata = {
  65         { 0xe0000000, __phys_to_pfn(S3C2410_CS3+0x01000000), SZ_1M, MT_DEVICE }
  66 };
  67
  68 #define UCON S3C2410_UCON_DEFAULT
  69 #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
  70 #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
  71
  72 static struct s3c2410_uartcfg smdk2410_uartcfgs[] = {
  73         [0] = {
  74                 .hwport      = 0,
  75                 .flags       = 0,
  76                 .ucon        = UCON,
  77                 .ulcon       = ULCON,
  78                 .ufcon       = UFCON,
  79         },
  80         [1] = {
  81                 .hwport      = 1,
  82                 .flags       = 0,
  83                 .ucon        = UCON,
  84                 .ulcon       = ULCON,
  85                 .ufcon       = UFCON,
  86         },
  87         [2] = {
  88                 .hwport      = 2,
  89                 .flags       = 0,
  90                 .ucon        = UCON,
  91                 .ulcon       = ULCON,
  92                 .ufcon       = UFCON,
  93         }
  94 };
  95
  96 /* LCD driver info */
  97
  98 static struct s3c2410fb_display qt2410_lcd_cfg[] __initdata = {
  99         {
 100                 /* Configuration for 640x480 SHARP LQ080V3DG01 */
 101                 .lcdcon1 = S3C2410_LCDCON1_TFT16BPP |
 102                            S3C2410_LCDCON1_TFT |
 103                            S3C2410_LCDCON1_CLKVAL(0x01), /* HCLK/4 */
 104
 105                 .lcdcon2 = S3C2410_LCDCON2_VBPD(18) |   /* 19 */
 106                            S3C2410_LCDCON2_LINEVAL(479) |
 107                            S3C2410_LCDCON2_VFPD(10) |   /* 11 */
 108                            S3C2410_LCDCON2_VSPW(14),    /* 15 */
 109
 110                 .lcdcon4 = S3C2410_LCDCON4_MVAL(0) |
 111                            S3C2410_LCDCON4_HSPW(95),    /* 96 */
 112
 113                 .lcdcon5 = S3C2410_LCDCON5_FRM565 |
 114                            S3C2410_LCDCON5_INVVLINE |
 115                            S3C2410_LCDCON5_INVVFRAME |
 116                            S3C2410_LCDCON5_PWREN |
 117                            S3C2410_LCDCON5_HWSWP,
 118
 119                 .type           = S3C2410_LCDCON1_TFT,
 120                 .width          = 640,
 121                 .height         = 480,
 122
 123                 .xres           = 640,
 124                 .yres           = 480,
 125                 .bpp            = 16,
 126                 .left_margin    = 44,
 127                 .right_margin   = 116,
 128                 .upper_margin   = 19,
 129                 .lower_margin   = 11,
 130         },
 131         {
 132                 /* Configuration for 480x640 toppoly TD028TTEC1 */
 133                 .lcdcon1 = S3C2410_LCDCON1_TFT16BPP |
 134                            S3C2410_LCDCON1_TFT |
 135                            S3C2410_LCDCON1_CLKVAL(0x01), /* HCLK/4 */
 136
 137                 .lcdcon2 = S3C2410_LCDCON2_VBPD(1) |    /* 2 */
 138                            S3C2410_LCDCON2_LINEVAL(639) |/* 640 */
 139                            S3C2410_LCDCON2_VFPD(3) |    /* 4 */
 140                            S3C2410_LCDCON2_VSPW(1),     /* 2 */
 141
 142                 .lcdcon4 = S3C2410_LCDCON4_MVAL(0) |
 143                            S3C2410_LCDCON4_HSPW(7),     /* 8 */
 144
 145                 .lcdcon5 = S3C2410_LCDCON5_FRM565 |
 146                            S3C2410_LCDCON5_INVVLINE |
 147                            S3C2410_LCDCON5_INVVFRAME |
 148                            S3C2410_LCDCON5_PWREN |
 149                            S3C2410_LCDCON5_HWSWP,
 150
 151                 .type           = S3C2410_LCDCON1_TFT,
 152                 .width          = 480,
 153                 .height         = 640,
 154                 .xres           = 480,
 155                 .yres           = 640,
 156                 .bpp            = 16,
 157                 .left_margin    = 8,
 158                 .right_margin   = 24,
 159                 .upper_margin   = 2,
 160                 .lower_margin   = 4,
 161         },
 162         {
 163                 /* Config for 240x320 LCD */
 164                 .lcdcon1 = S3C2410_LCDCON1_TFT16BPP |
 165                            S3C2410_LCDCON1_TFT |
 166                            S3C2410_LCDCON1_CLKVAL(0x04),
 167
 168                 .lcdcon2 = S3C2410_LCDCON2_VBPD(1) |
 169                            S3C2410_LCDCON2_LINEVAL(319) |
 170                            S3C2410_LCDCON2_VFPD(6) |
 171                            S3C2410_LCDCON2_VSPW(3),
 172
 173                 .lcdcon4 = S3C2410_LCDCON4_MVAL(0) |
 174                            S3C2410_LCDCON4_HSPW(3),
 175
 176                 .lcdcon5 = S3C2410_LCDCON5_FRM565 |
 177                            S3C2410_LCDCON5_INVVLINE |
 178                            S3C2410_LCDCON5_INVVFRAME |
 179                            S3C2410_LCDCON5_PWREN |
 180                            S3C2410_LCDCON5_HWSWP,
 181
 182                 .type           = S3C2410_LCDCON1_TFT,
 183                 .width          = 240,
 184                 .height         = 320,
 185                 .xres           = 240,
 186                 .yres           = 320,
 187                 .bpp            = 16,
 188                 .left_margin    = 13,
 189                 .right_margin   = 8,
 190                 .upper_margin   = 2,
 191                 .lower_margin   = 7,
 192         },
 193 };
 194
 195
 196 static struct s3c2410fb_mach_info qt2410_fb_info __initdata = {
 197         .displays       = qt2410_lcd_cfg,
 198         .num_displays   = ARRAY_SIZE(qt2410_lcd_cfg),
 199         .default_display = 0,
 200
 201         .lpcsel         = ((0xCE6) & ~7) | 1<<4,
 202 };
 203
 204 /* CS8900 */
 205
 206 static struct resource qt2410_cs89x0_resources[] = {
 207         [0] = {
 208                 .start  = 0x19000000,
 209                 .end    = 0x19000000 + 16,
 210                 .flags  = IORESOURCE_MEM,
 211         },
 212         [1] = {
 213                 .start  = IRQ_EINT9,
 214                 .end    = IRQ_EINT9,
 215                 .flags  = IORESOURCE_IRQ,
 216         },
 217 };
 218
 219 static struct platform_device qt2410_cs89x0 = {
 220         .name           = "cirrus-cs89x0",
 221         .num_resources  = ARRAY_SIZE(qt2410_cs89x0_resources),
 222         .resource       = qt2410_cs89x0_resources,
 223 };
 224
 225 /* LED */
 226
 227 static struct s3c24xx_led_platdata qt2410_pdata_led = {
 228         .gpio           = S3C2410_GPB0,
 229         .flags          = S3C24XX_LEDF_ACTLOW | S3C24XX_LEDF_TRISTATE,
 230         .name           = "led",
 231         .def_trigger    = "timer",
 232 };
 233
 234 static struct platform_device qt2410_led = {
 235         .name           = "s3c24xx_led",
 236         .id             = 0,
 237         .dev            = {
 238                 .platform_data = &qt2410_pdata_led,
 239         },
 240 };
 241
 242 /* SPI */
 243
 244 static void spi_gpio_cs(struct s3c2410_spigpio_info *spi, int cs)
 245 {
 246         switch (cs) {
 247         case BITBANG_CS_ACTIVE:
 248                 s3c2410_gpio_setpin(S3C2410_GPB5, 0);
 249                 break;
 250         case BITBANG_CS_INACTIVE:
 251                 s3c2410_gpio_setpin(S3C2410_GPB5, 1);
 252                 break;
 253         }
 254 }
 255
 256 static struct s3c2410_spigpio_info spi_gpio_cfg = {
 257         .pin_clk        = S3C2410_GPG7,
 258         .pin_mosi       = S3C2410_GPG6,
 259         .pin_miso       = S3C2410_GPG5,
 260         .chip_select    = &spi_gpio_cs,
 261 };
 262
 263
 264 static struct platform_device qt2410_spi = {
 265         .name             = "s3c24xx-spi-gpio",
 266         .id               = 1,
 267         .dev = {
 268                 .platform_data = &spi_gpio_cfg,
 269         },
 270 };
 271
 272 /* Board devices */
 273
 274 static struct platform_device *qt2410_devices[] __initdata = {
 275         &s3c_device_usb,
 276         &s3c_device_lcd,
 277         &s3c_device_wdt,
 278         &s3c_device_i2c,
 279         &s3c_device_iis,
 280         &s3c_device_sdi,
 281         &s3c_device_usbgadget,
 282         &qt2410_spi,
 283         &qt2410_cs89x0,
 284         &qt2410_led,
 285 };
 286
 287 static struct mtd_partition qt2410_nand_part[] = {
 288         [0] = {
 289                 .name   = "U-Boot",
 290                 .size   = 0x30000,
 291                 .offset = 0,
 292         },
 293         [1] = {
 294                 .name   = "U-Boot environment",
 295                 .offset = 0x30000,
 296                 .size   = 0x4000,
 297         },
 298         [2] = {
 299                 .name   = "kernel",
 300                 .offset = 0x34000,
 301                 .size   = SZ_2M,
 302         },
 303         [3] = {
 304                 .name   = "initrd",
 305                 .offset = 0x234000,
 306                 .size   = SZ_4M,
 307         },
 308         [4] = {
 309                 .name   = "jffs2",
 310                 .offset = 0x634000,
 311                 .size   = 0x39cc000,
 312         },
 313 };
 314
 315 static struct s3c2410_nand_set qt2410_nand_sets[] = {
 316         [0] = {
 317                 .name           = "NAND",
 318                 .nr_chips       = 1,
 319                 .nr_partitions  = ARRAY_SIZE(qt2410_nand_part),
 320                 .partitions     = qt2410_nand_part,
 321         },
 322 };
 323
 324 /* choose a set of timings which should suit most 512Mbit
 325  * chips and beyond.
 326  */
 327
 328 static struct s3c2410_platform_nand qt2410_nand_info = {
 329         .tacls          = 20,
 330         .twrph0         = 60,
 331         .twrph1         = 20,
 332         .nr_sets        = ARRAY_SIZE(qt2410_nand_sets),
 333         .sets           = qt2410_nand_sets,
 334 };
 335
 336 /* UDC */
 337
 338 static struct s3c2410_udc_mach_info qt2410_udc_cfg = {
 339 };
 340
 341 static char tft_type = 's';
 342
 343 static int __init qt2410_tft_setup(char *str)
 344 {
 345         tft_type = str[0];
 346         return 1;
 347 }
 348
 349 __setup("tft=", qt2410_tft_setup);
 350
 351 static void __init qt2410_map_io(void)
 352 {
 353         s3c24xx_init_io(qt2410_iodesc, ARRAY_SIZE(qt2410_iodesc));
 354         s3c24xx_init_clocks(12*1000*1000);
 355         s3c24xx_init_uarts(smdk2410_uartcfgs, ARRAY_SIZE(smdk2410_uartcfgs));
 356 }
 357
 358 static void __init qt2410_machine_init(void)
 359 {
 360         s3c_device_nand.dev.platform_data = &qt2410_nand_info;
 361
 362         switch (tft_type) {
 363         case 'p': /* production */
 364                 qt2410_fb_info.default_display = 1;
 365                 break;
 366         case 'b': /* big */
 367                 qt2410_fb_info.default_display = 0;
 368                 break;
 369         case 's': /* small */
 370         default:
 371                 qt2410_fb_info.default_display = 2;
 372                 break;
 373         }
 374         s3c24xx_fb_set_platdata(&qt2410_fb_info);
 375
 376         s3c2410_gpio_cfgpin(S3C2410_GPB0, S3C2410_GPIO_OUTPUT);
 377         s3c2410_gpio_setpin(S3C2410_GPB0, 1);
 378
 379         s3c24xx_udc_set_platdata(&qt2410_udc_cfg);
 380
 381         s3c2410_gpio_cfgpin(S3C2410_GPB5, S3C2410_GPIO_OUTPUT);
 382
 383         platform_add_devices(qt2410_devices, ARRAY_SIZE(qt2410_devices));
 384         s3c2410_pm_init();
 385 }
 386
 387 MACHINE_START(QT2410, "QT2410")
 388         .phys_io        = S3C2410_PA_UART,
 389         .io_pg_offst    = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc,
 390         .boot_params    = S3C2410_SDRAM_PA + 0x100,
 391         .map_io         = qt2410_map_io,
 392         .init_irq       = s3c24xx_init_irq,
 393         .init_machine   = qt2410_machine_init,
 394         .timer          = &s3c24xx_timer,
 395 MACHINE_END
 396
 397