m68k: drivers/input/serio/hp_sdc.c needs <linux/semaphore.h>
[linux-2.6/zen-sources.git] / drivers / input / serio / hp_sdc.c
blobedfedd9a166cef53a42d5c17846fe9adbb77bb21
1 /*
2 * HP i8042-based System Device Controller driver.
4 * Copyright (c) 2001 Brian S. Julin
5 * All rights reserved.
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions, and the following disclaimer,
12 * without modification.
13 * 2. The name of the author may not be used to endorse or promote products
14 * derived from this software without specific prior written permission.
16 * Alternatively, this software may be distributed under the terms of the
17 * GNU General Public License ("GPL").
19 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
23 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
24 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
29 * References:
30 * System Device Controller Microprocessor Firmware Theory of Operation
31 * for Part Number 1820-4784 Revision B. Dwg No. A-1820-4784-2
32 * Helge Deller's original hilkbd.c port for PA-RISC.
35 * Driver theory of operation:
37 * hp_sdc_put does all writing to the SDC. ISR can run on a different
38 * CPU than hp_sdc_put, but only one CPU runs hp_sdc_put at a time
39 * (it cannot really benefit from SMP anyway.) A tasket fit this perfectly.
41 * All data coming back from the SDC is sent via interrupt and can be read
42 * fully in the ISR, so there are no latency/throughput problems there.
43 * The problem is with output, due to the slow clock speed of the SDC
44 * compared to the CPU. This should not be too horrible most of the time,
45 * but if used with HIL devices that support the multibyte transfer command,
46 * keeping outbound throughput flowing at the 6500KBps that the HIL is
47 * capable of is more than can be done at HZ=100.
49 * Busy polling for IBF clear wastes CPU cycles and bus cycles. hp_sdc.ibf
50 * is set to 0 when the IBF flag in the status register has cleared. ISR
51 * may do this, and may also access the parts of queued transactions related
52 * to reading data back from the SDC, but otherwise will not touch the
53 * hp_sdc state. Whenever a register is written hp_sdc.ibf is set to 1.
55 * The i8042 write index and the values in the 4-byte input buffer
56 * starting at 0x70 are kept track of in hp_sdc.wi, and .r7[], respectively,
57 * to minimize the amount of IO needed to the SDC. However these values
58 * do not need to be locked since they are only ever accessed by hp_sdc_put.
60 * A timer task schedules the tasklet once per second just to make
61 * sure it doesn't freeze up and to allow for bad reads to time out.
64 #include <linux/hp_sdc.h>
65 #include <linux/errno.h>
66 #include <linux/init.h>
67 #include <linux/module.h>
68 #include <linux/ioport.h>
69 #include <linux/time.h>
70 #include <linux/slab.h>
71 #include <linux/hil.h>
72 #include <linux/semaphore.h>
73 #include <asm/io.h>
74 #include <asm/system.h>
76 /* Machine-specific abstraction */
78 #if defined(__hppa__)
79 # include <asm/parisc-device.h>
80 # define sdc_readb(p) gsc_readb(p)
81 # define sdc_writeb(v,p) gsc_writeb((v),(p))
82 #elif defined(__mc68000__)
83 # include <asm/uaccess.h>
84 # define sdc_readb(p) in_8(p)
85 # define sdc_writeb(v,p) out_8((p),(v))
86 #else
87 # error "HIL is not supported on this platform"
88 #endif
90 #define PREFIX "HP SDC: "
92 MODULE_AUTHOR("Brian S. Julin <bri@calyx.com>");
93 MODULE_DESCRIPTION("HP i8042-based SDC Driver");
94 MODULE_LICENSE("Dual BSD/GPL");
96 EXPORT_SYMBOL(hp_sdc_request_timer_irq);
97 EXPORT_SYMBOL(hp_sdc_request_hil_irq);
98 EXPORT_SYMBOL(hp_sdc_request_cooked_irq);
100 EXPORT_SYMBOL(hp_sdc_release_timer_irq);
101 EXPORT_SYMBOL(hp_sdc_release_hil_irq);
102 EXPORT_SYMBOL(hp_sdc_release_cooked_irq);
104 EXPORT_SYMBOL(__hp_sdc_enqueue_transaction);
105 EXPORT_SYMBOL(hp_sdc_enqueue_transaction);
106 EXPORT_SYMBOL(hp_sdc_dequeue_transaction);
108 static hp_i8042_sdc hp_sdc; /* All driver state is kept in here. */
110 /*************** primitives for use in any context *********************/
111 static inline uint8_t hp_sdc_status_in8(void)
113 uint8_t status;
114 unsigned long flags;
116 write_lock_irqsave(&hp_sdc.ibf_lock, flags);
117 status = sdc_readb(hp_sdc.status_io);
118 if (!(status & HP_SDC_STATUS_IBF))
119 hp_sdc.ibf = 0;
120 write_unlock_irqrestore(&hp_sdc.ibf_lock, flags);
122 return status;
125 static inline uint8_t hp_sdc_data_in8(void)
127 return sdc_readb(hp_sdc.data_io);
130 static inline void hp_sdc_status_out8(uint8_t val)
132 unsigned long flags;
134 write_lock_irqsave(&hp_sdc.ibf_lock, flags);
135 hp_sdc.ibf = 1;
136 if ((val & 0xf0) == 0xe0)
137 hp_sdc.wi = 0xff;
138 sdc_writeb(val, hp_sdc.status_io);
139 write_unlock_irqrestore(&hp_sdc.ibf_lock, flags);
142 static inline void hp_sdc_data_out8(uint8_t val)
144 unsigned long flags;
146 write_lock_irqsave(&hp_sdc.ibf_lock, flags);
147 hp_sdc.ibf = 1;
148 sdc_writeb(val, hp_sdc.data_io);
149 write_unlock_irqrestore(&hp_sdc.ibf_lock, flags);
152 /* Care must be taken to only invoke hp_sdc_spin_ibf when
153 * absolutely needed, or in rarely invoked subroutines.
154 * Not only does it waste CPU cycles, it also wastes bus cycles.
156 static inline void hp_sdc_spin_ibf(void)
158 unsigned long flags;
159 rwlock_t *lock;
161 lock = &hp_sdc.ibf_lock;
163 read_lock_irqsave(lock, flags);
164 if (!hp_sdc.ibf) {
165 read_unlock_irqrestore(lock, flags);
166 return;
168 read_unlock(lock);
169 write_lock(lock);
170 while (sdc_readb(hp_sdc.status_io) & HP_SDC_STATUS_IBF)
172 hp_sdc.ibf = 0;
173 write_unlock_irqrestore(lock, flags);
177 /************************ Interrupt context functions ************************/
178 static void hp_sdc_take(int irq, void *dev_id, uint8_t status, uint8_t data)
180 hp_sdc_transaction *curr;
182 read_lock(&hp_sdc.rtq_lock);
183 if (hp_sdc.rcurr < 0) {
184 read_unlock(&hp_sdc.rtq_lock);
185 return;
187 curr = hp_sdc.tq[hp_sdc.rcurr];
188 read_unlock(&hp_sdc.rtq_lock);
190 curr->seq[curr->idx++] = status;
191 curr->seq[curr->idx++] = data;
192 hp_sdc.rqty -= 2;
193 do_gettimeofday(&hp_sdc.rtv);
195 if (hp_sdc.rqty <= 0) {
196 /* All data has been gathered. */
197 if (curr->seq[curr->actidx] & HP_SDC_ACT_SEMAPHORE)
198 if (curr->act.semaphore)
199 up(curr->act.semaphore);
201 if (curr->seq[curr->actidx] & HP_SDC_ACT_CALLBACK)
202 if (curr->act.irqhook)
203 curr->act.irqhook(irq, dev_id, status, data);
205 curr->actidx = curr->idx;
206 curr->idx++;
207 /* Return control of this transaction */
208 write_lock(&hp_sdc.rtq_lock);
209 hp_sdc.rcurr = -1;
210 hp_sdc.rqty = 0;
211 write_unlock(&hp_sdc.rtq_lock);
212 tasklet_schedule(&hp_sdc.task);
216 static irqreturn_t hp_sdc_isr(int irq, void *dev_id)
218 uint8_t status, data;
220 status = hp_sdc_status_in8();
221 /* Read data unconditionally to advance i8042. */
222 data = hp_sdc_data_in8();
224 /* For now we are ignoring these until we get the SDC to behave. */
225 if (((status & 0xf1) == 0x51) && data == 0x82)
226 return IRQ_HANDLED;
228 switch (status & HP_SDC_STATUS_IRQMASK) {
229 case 0: /* This case is not documented. */
230 break;
232 case HP_SDC_STATUS_USERTIMER:
233 case HP_SDC_STATUS_PERIODIC:
234 case HP_SDC_STATUS_TIMER:
235 read_lock(&hp_sdc.hook_lock);
236 if (hp_sdc.timer != NULL)
237 hp_sdc.timer(irq, dev_id, status, data);
238 read_unlock(&hp_sdc.hook_lock);
239 break;
241 case HP_SDC_STATUS_REG:
242 hp_sdc_take(irq, dev_id, status, data);
243 break;
245 case HP_SDC_STATUS_HILCMD:
246 case HP_SDC_STATUS_HILDATA:
247 read_lock(&hp_sdc.hook_lock);
248 if (hp_sdc.hil != NULL)
249 hp_sdc.hil(irq, dev_id, status, data);
250 read_unlock(&hp_sdc.hook_lock);
251 break;
253 case HP_SDC_STATUS_PUP:
254 read_lock(&hp_sdc.hook_lock);
255 if (hp_sdc.pup != NULL)
256 hp_sdc.pup(irq, dev_id, status, data);
257 else
258 printk(KERN_INFO PREFIX "HP SDC reports successful PUP.\n");
259 read_unlock(&hp_sdc.hook_lock);
260 break;
262 default:
263 read_lock(&hp_sdc.hook_lock);
264 if (hp_sdc.cooked != NULL)
265 hp_sdc.cooked(irq, dev_id, status, data);
266 read_unlock(&hp_sdc.hook_lock);
267 break;
270 return IRQ_HANDLED;
274 static irqreturn_t hp_sdc_nmisr(int irq, void *dev_id)
276 int status;
278 status = hp_sdc_status_in8();
279 printk(KERN_WARNING PREFIX "NMI !\n");
281 #if 0
282 if (status & HP_SDC_NMISTATUS_FHS) {
283 read_lock(&hp_sdc.hook_lock);
284 if (hp_sdc.timer != NULL)
285 hp_sdc.timer(irq, dev_id, status, 0);
286 read_unlock(&hp_sdc.hook_lock);
287 } else {
288 /* TODO: pass this on to the HIL handler, or do SAK here? */
289 printk(KERN_WARNING PREFIX "HIL NMI\n");
291 #endif
293 return IRQ_HANDLED;
297 /***************** Kernel (tasklet) context functions ****************/
299 unsigned long hp_sdc_put(void);
301 static void hp_sdc_tasklet(unsigned long foo)
303 write_lock_irq(&hp_sdc.rtq_lock);
305 if (hp_sdc.rcurr >= 0) {
306 struct timeval tv;
308 do_gettimeofday(&tv);
309 if (tv.tv_sec > hp_sdc.rtv.tv_sec)
310 tv.tv_usec += USEC_PER_SEC;
312 if (tv.tv_usec - hp_sdc.rtv.tv_usec > HP_SDC_MAX_REG_DELAY) {
313 hp_sdc_transaction *curr;
314 uint8_t tmp;
316 curr = hp_sdc.tq[hp_sdc.rcurr];
317 /* If this turns out to be a normal failure mode
318 * we'll need to figure out a way to communicate
319 * it back to the application. and be less verbose.
321 printk(KERN_WARNING PREFIX "read timeout (%ius)!\n",
322 tv.tv_usec - hp_sdc.rtv.tv_usec);
323 curr->idx += hp_sdc.rqty;
324 hp_sdc.rqty = 0;
325 tmp = curr->seq[curr->actidx];
326 curr->seq[curr->actidx] |= HP_SDC_ACT_DEAD;
327 if (tmp & HP_SDC_ACT_SEMAPHORE)
328 if (curr->act.semaphore)
329 up(curr->act.semaphore);
331 if (tmp & HP_SDC_ACT_CALLBACK) {
332 /* Note this means that irqhooks may be called
333 * in tasklet/bh context.
335 if (curr->act.irqhook)
336 curr->act.irqhook(0, NULL, 0, 0);
339 curr->actidx = curr->idx;
340 curr->idx++;
341 hp_sdc.rcurr = -1;
344 write_unlock_irq(&hp_sdc.rtq_lock);
345 hp_sdc_put();
348 unsigned long hp_sdc_put(void)
350 hp_sdc_transaction *curr;
351 uint8_t act;
352 int idx, curridx;
354 int limit = 0;
356 write_lock(&hp_sdc.lock);
358 /* If i8042 buffers are full, we cannot do anything that
359 requires output, so we skip to the administrativa. */
360 if (hp_sdc.ibf) {
361 hp_sdc_status_in8();
362 if (hp_sdc.ibf)
363 goto finish;
366 anew:
367 /* See if we are in the middle of a sequence. */
368 if (hp_sdc.wcurr < 0)
369 hp_sdc.wcurr = 0;
370 read_lock_irq(&hp_sdc.rtq_lock);
371 if (hp_sdc.rcurr == hp_sdc.wcurr)
372 hp_sdc.wcurr++;
373 read_unlock_irq(&hp_sdc.rtq_lock);
374 if (hp_sdc.wcurr >= HP_SDC_QUEUE_LEN)
375 hp_sdc.wcurr = 0;
376 curridx = hp_sdc.wcurr;
378 if (hp_sdc.tq[curridx] != NULL)
379 goto start;
381 while (++curridx != hp_sdc.wcurr) {
382 if (curridx >= HP_SDC_QUEUE_LEN) {
383 curridx = -1; /* Wrap to top */
384 continue;
386 read_lock_irq(&hp_sdc.rtq_lock);
387 if (hp_sdc.rcurr == curridx) {
388 read_unlock_irq(&hp_sdc.rtq_lock);
389 continue;
391 read_unlock_irq(&hp_sdc.rtq_lock);
392 if (hp_sdc.tq[curridx] != NULL)
393 break; /* Found one. */
395 if (curridx == hp_sdc.wcurr) { /* There's nothing queued to do. */
396 curridx = -1;
398 hp_sdc.wcurr = curridx;
400 start:
402 /* Check to see if the interrupt mask needs to be set. */
403 if (hp_sdc.set_im) {
404 hp_sdc_status_out8(hp_sdc.im | HP_SDC_CMD_SET_IM);
405 hp_sdc.set_im = 0;
406 goto finish;
409 if (hp_sdc.wcurr == -1)
410 goto done;
412 curr = hp_sdc.tq[curridx];
413 idx = curr->actidx;
415 if (curr->actidx >= curr->endidx) {
416 hp_sdc.tq[curridx] = NULL;
417 /* Interleave outbound data between the transactions. */
418 hp_sdc.wcurr++;
419 if (hp_sdc.wcurr >= HP_SDC_QUEUE_LEN)
420 hp_sdc.wcurr = 0;
421 goto finish;
424 act = curr->seq[idx];
425 idx++;
427 if (curr->idx >= curr->endidx) {
428 if (act & HP_SDC_ACT_DEALLOC)
429 kfree(curr);
430 hp_sdc.tq[curridx] = NULL;
431 /* Interleave outbound data between the transactions. */
432 hp_sdc.wcurr++;
433 if (hp_sdc.wcurr >= HP_SDC_QUEUE_LEN)
434 hp_sdc.wcurr = 0;
435 goto finish;
438 while (act & HP_SDC_ACT_PRECMD) {
439 if (curr->idx != idx) {
440 idx++;
441 act &= ~HP_SDC_ACT_PRECMD;
442 break;
444 hp_sdc_status_out8(curr->seq[idx]);
445 curr->idx++;
446 /* act finished? */
447 if ((act & HP_SDC_ACT_DURING) == HP_SDC_ACT_PRECMD)
448 goto actdone;
449 /* skip quantity field if data-out sequence follows. */
450 if (act & HP_SDC_ACT_DATAOUT)
451 curr->idx++;
452 goto finish;
454 if (act & HP_SDC_ACT_DATAOUT) {
455 int qty;
457 qty = curr->seq[idx];
458 idx++;
459 if (curr->idx - idx < qty) {
460 hp_sdc_data_out8(curr->seq[curr->idx]);
461 curr->idx++;
462 /* act finished? */
463 if (curr->idx - idx >= qty &&
464 (act & HP_SDC_ACT_DURING) == HP_SDC_ACT_DATAOUT)
465 goto actdone;
466 goto finish;
468 idx += qty;
469 act &= ~HP_SDC_ACT_DATAOUT;
470 } else
471 while (act & HP_SDC_ACT_DATAREG) {
472 int mask;
473 uint8_t w7[4];
475 mask = curr->seq[idx];
476 if (idx != curr->idx) {
477 idx++;
478 idx += !!(mask & 1);
479 idx += !!(mask & 2);
480 idx += !!(mask & 4);
481 idx += !!(mask & 8);
482 act &= ~HP_SDC_ACT_DATAREG;
483 break;
486 w7[0] = (mask & 1) ? curr->seq[++idx] : hp_sdc.r7[0];
487 w7[1] = (mask & 2) ? curr->seq[++idx] : hp_sdc.r7[1];
488 w7[2] = (mask & 4) ? curr->seq[++idx] : hp_sdc.r7[2];
489 w7[3] = (mask & 8) ? curr->seq[++idx] : hp_sdc.r7[3];
491 if (hp_sdc.wi > 0x73 || hp_sdc.wi < 0x70 ||
492 w7[hp_sdc.wi - 0x70] == hp_sdc.r7[hp_sdc.wi - 0x70]) {
493 int i = 0;
495 /* Need to point the write index register */
496 while (i < 4 && w7[i] == hp_sdc.r7[i])
497 i++;
499 if (i < 4) {
500 hp_sdc_status_out8(HP_SDC_CMD_SET_D0 + i);
501 hp_sdc.wi = 0x70 + i;
502 goto finish;
505 idx++;
506 if ((act & HP_SDC_ACT_DURING) == HP_SDC_ACT_DATAREG)
507 goto actdone;
509 curr->idx = idx;
510 act &= ~HP_SDC_ACT_DATAREG;
511 break;
514 hp_sdc_data_out8(w7[hp_sdc.wi - 0x70]);
515 hp_sdc.r7[hp_sdc.wi - 0x70] = w7[hp_sdc.wi - 0x70];
516 hp_sdc.wi++; /* write index register autoincrements */
518 int i = 0;
520 while ((i < 4) && w7[i] == hp_sdc.r7[i])
521 i++;
522 if (i >= 4) {
523 curr->idx = idx + 1;
524 if ((act & HP_SDC_ACT_DURING) ==
525 HP_SDC_ACT_DATAREG)
526 goto actdone;
529 goto finish;
531 /* We don't go any further in the command if there is a pending read,
532 because we don't want interleaved results. */
533 read_lock_irq(&hp_sdc.rtq_lock);
534 if (hp_sdc.rcurr >= 0) {
535 read_unlock_irq(&hp_sdc.rtq_lock);
536 goto finish;
538 read_unlock_irq(&hp_sdc.rtq_lock);
541 if (act & HP_SDC_ACT_POSTCMD) {
542 uint8_t postcmd;
544 /* curr->idx should == idx at this point. */
545 postcmd = curr->seq[idx];
546 curr->idx++;
547 if (act & HP_SDC_ACT_DATAIN) {
549 /* Start a new read */
550 hp_sdc.rqty = curr->seq[curr->idx];
551 do_gettimeofday(&hp_sdc.rtv);
552 curr->idx++;
553 /* Still need to lock here in case of spurious irq. */
554 write_lock_irq(&hp_sdc.rtq_lock);
555 hp_sdc.rcurr = curridx;
556 write_unlock_irq(&hp_sdc.rtq_lock);
557 hp_sdc_status_out8(postcmd);
558 goto finish;
560 hp_sdc_status_out8(postcmd);
561 goto actdone;
564 actdone:
565 if (act & HP_SDC_ACT_SEMAPHORE)
566 up(curr->act.semaphore);
567 else if (act & HP_SDC_ACT_CALLBACK)
568 curr->act.irqhook(0,NULL,0,0);
570 if (curr->idx >= curr->endidx) { /* This transaction is over. */
571 if (act & HP_SDC_ACT_DEALLOC)
572 kfree(curr);
573 hp_sdc.tq[curridx] = NULL;
574 } else {
575 curr->actidx = idx + 1;
576 curr->idx = idx + 2;
578 /* Interleave outbound data between the transactions. */
579 hp_sdc.wcurr++;
580 if (hp_sdc.wcurr >= HP_SDC_QUEUE_LEN)
581 hp_sdc.wcurr = 0;
583 finish:
584 /* If by some quirk IBF has cleared and our ISR has run to
585 see that that has happened, do it all again. */
586 if (!hp_sdc.ibf && limit++ < 20)
587 goto anew;
589 done:
590 if (hp_sdc.wcurr >= 0)
591 tasklet_schedule(&hp_sdc.task);
592 write_unlock(&hp_sdc.lock);
594 return 0;
597 /******* Functions called in either user or kernel context ****/
598 int __hp_sdc_enqueue_transaction(hp_sdc_transaction *this)
600 int i;
602 if (this == NULL) {
603 BUG();
604 return -EINVAL;
607 /* Can't have same transaction on queue twice */
608 for (i = 0; i < HP_SDC_QUEUE_LEN; i++)
609 if (hp_sdc.tq[i] == this)
610 goto fail;
612 this->actidx = 0;
613 this->idx = 1;
615 /* Search for empty slot */
616 for (i = 0; i < HP_SDC_QUEUE_LEN; i++)
617 if (hp_sdc.tq[i] == NULL) {
618 hp_sdc.tq[i] = this;
619 tasklet_schedule(&hp_sdc.task);
620 return 0;
623 printk(KERN_WARNING PREFIX "No free slot to add transaction.\n");
624 return -EBUSY;
626 fail:
627 printk(KERN_WARNING PREFIX "Transaction add failed: transaction already queued?\n");
628 return -EINVAL;
631 int hp_sdc_enqueue_transaction(hp_sdc_transaction *this) {
632 unsigned long flags;
633 int ret;
635 write_lock_irqsave(&hp_sdc.lock, flags);
636 ret = __hp_sdc_enqueue_transaction(this);
637 write_unlock_irqrestore(&hp_sdc.lock,flags);
639 return ret;
642 int hp_sdc_dequeue_transaction(hp_sdc_transaction *this)
644 unsigned long flags;
645 int i;
647 write_lock_irqsave(&hp_sdc.lock, flags);
649 /* TODO: don't remove it if it's not done. */
651 for (i = 0; i < HP_SDC_QUEUE_LEN; i++)
652 if (hp_sdc.tq[i] == this)
653 hp_sdc.tq[i] = NULL;
655 write_unlock_irqrestore(&hp_sdc.lock, flags);
656 return 0;
661 /********************** User context functions **************************/
662 int hp_sdc_request_timer_irq(hp_sdc_irqhook *callback)
664 if (callback == NULL || hp_sdc.dev == NULL)
665 return -EINVAL;
667 write_lock_irq(&hp_sdc.hook_lock);
668 if (hp_sdc.timer != NULL) {
669 write_unlock_irq(&hp_sdc.hook_lock);
670 return -EBUSY;
673 hp_sdc.timer = callback;
674 /* Enable interrupts from the timers */
675 hp_sdc.im &= ~HP_SDC_IM_FH;
676 hp_sdc.im &= ~HP_SDC_IM_PT;
677 hp_sdc.im &= ~HP_SDC_IM_TIMERS;
678 hp_sdc.set_im = 1;
679 write_unlock_irq(&hp_sdc.hook_lock);
681 tasklet_schedule(&hp_sdc.task);
683 return 0;
686 int hp_sdc_request_hil_irq(hp_sdc_irqhook *callback)
688 if (callback == NULL || hp_sdc.dev == NULL)
689 return -EINVAL;
691 write_lock_irq(&hp_sdc.hook_lock);
692 if (hp_sdc.hil != NULL) {
693 write_unlock_irq(&hp_sdc.hook_lock);
694 return -EBUSY;
697 hp_sdc.hil = callback;
698 hp_sdc.im &= ~(HP_SDC_IM_HIL | HP_SDC_IM_RESET);
699 hp_sdc.set_im = 1;
700 write_unlock_irq(&hp_sdc.hook_lock);
702 tasklet_schedule(&hp_sdc.task);
704 return 0;
707 int hp_sdc_request_cooked_irq(hp_sdc_irqhook *callback)
709 if (callback == NULL || hp_sdc.dev == NULL)
710 return -EINVAL;
712 write_lock_irq(&hp_sdc.hook_lock);
713 if (hp_sdc.cooked != NULL) {
714 write_unlock_irq(&hp_sdc.hook_lock);
715 return -EBUSY;
718 /* Enable interrupts from the HIL MLC */
719 hp_sdc.cooked = callback;
720 hp_sdc.im &= ~(HP_SDC_IM_HIL | HP_SDC_IM_RESET);
721 hp_sdc.set_im = 1;
722 write_unlock_irq(&hp_sdc.hook_lock);
724 tasklet_schedule(&hp_sdc.task);
726 return 0;
729 int hp_sdc_release_timer_irq(hp_sdc_irqhook *callback)
731 write_lock_irq(&hp_sdc.hook_lock);
732 if ((callback != hp_sdc.timer) ||
733 (hp_sdc.timer == NULL)) {
734 write_unlock_irq(&hp_sdc.hook_lock);
735 return -EINVAL;
738 /* Disable interrupts from the timers */
739 hp_sdc.timer = NULL;
740 hp_sdc.im |= HP_SDC_IM_TIMERS;
741 hp_sdc.im |= HP_SDC_IM_FH;
742 hp_sdc.im |= HP_SDC_IM_PT;
743 hp_sdc.set_im = 1;
744 write_unlock_irq(&hp_sdc.hook_lock);
745 tasklet_schedule(&hp_sdc.task);
747 return 0;
750 int hp_sdc_release_hil_irq(hp_sdc_irqhook *callback)
752 write_lock_irq(&hp_sdc.hook_lock);
753 if ((callback != hp_sdc.hil) ||
754 (hp_sdc.hil == NULL)) {
755 write_unlock_irq(&hp_sdc.hook_lock);
756 return -EINVAL;
759 hp_sdc.hil = NULL;
760 /* Disable interrupts from HIL only if there is no cooked driver. */
761 if(hp_sdc.cooked == NULL) {
762 hp_sdc.im |= (HP_SDC_IM_HIL | HP_SDC_IM_RESET);
763 hp_sdc.set_im = 1;
765 write_unlock_irq(&hp_sdc.hook_lock);
766 tasklet_schedule(&hp_sdc.task);
768 return 0;
771 int hp_sdc_release_cooked_irq(hp_sdc_irqhook *callback)
773 write_lock_irq(&hp_sdc.hook_lock);
774 if ((callback != hp_sdc.cooked) ||
775 (hp_sdc.cooked == NULL)) {
776 write_unlock_irq(&hp_sdc.hook_lock);
777 return -EINVAL;
780 hp_sdc.cooked = NULL;
781 /* Disable interrupts from HIL only if there is no raw HIL driver. */
782 if(hp_sdc.hil == NULL) {
783 hp_sdc.im |= (HP_SDC_IM_HIL | HP_SDC_IM_RESET);
784 hp_sdc.set_im = 1;
786 write_unlock_irq(&hp_sdc.hook_lock);
787 tasklet_schedule(&hp_sdc.task);
789 return 0;
792 /************************* Keepalive timer task *********************/
794 void hp_sdc_kicker (unsigned long data)
796 tasklet_schedule(&hp_sdc.task);
797 /* Re-insert the periodic task. */
798 mod_timer(&hp_sdc.kicker, jiffies + HZ);
801 /************************** Module Initialization ***************************/
803 #if defined(__hppa__)
805 static const struct parisc_device_id hp_sdc_tbl[] = {
807 .hw_type = HPHW_FIO,
808 .hversion_rev = HVERSION_REV_ANY_ID,
809 .hversion = HVERSION_ANY_ID,
810 .sversion = 0x73,
812 { 0, }
815 MODULE_DEVICE_TABLE(parisc, hp_sdc_tbl);
817 static int __init hp_sdc_init_hppa(struct parisc_device *d);
819 static struct parisc_driver hp_sdc_driver = {
820 .name = "hp_sdc",
821 .id_table = hp_sdc_tbl,
822 .probe = hp_sdc_init_hppa,
825 #endif /* __hppa__ */
827 static int __init hp_sdc_init(void)
829 char *errstr;
830 hp_sdc_transaction t_sync;
831 uint8_t ts_sync[6];
832 struct semaphore s_sync;
834 rwlock_init(&hp_sdc.lock);
835 rwlock_init(&hp_sdc.ibf_lock);
836 rwlock_init(&hp_sdc.rtq_lock);
837 rwlock_init(&hp_sdc.hook_lock);
839 hp_sdc.timer = NULL;
840 hp_sdc.hil = NULL;
841 hp_sdc.pup = NULL;
842 hp_sdc.cooked = NULL;
843 hp_sdc.im = HP_SDC_IM_MASK; /* Mask maskable irqs */
844 hp_sdc.set_im = 1;
845 hp_sdc.wi = 0xff;
846 hp_sdc.r7[0] = 0xff;
847 hp_sdc.r7[1] = 0xff;
848 hp_sdc.r7[2] = 0xff;
849 hp_sdc.r7[3] = 0xff;
850 hp_sdc.ibf = 1;
852 memset(&hp_sdc.tq, 0, sizeof(hp_sdc.tq));
854 hp_sdc.wcurr = -1;
855 hp_sdc.rcurr = -1;
856 hp_sdc.rqty = 0;
858 hp_sdc.dev_err = -ENODEV;
860 errstr = "IO not found for";
861 if (!hp_sdc.base_io)
862 goto err0;
864 errstr = "IRQ not found for";
865 if (!hp_sdc.irq)
866 goto err0;
868 hp_sdc.dev_err = -EBUSY;
870 #if defined(__hppa__)
871 errstr = "IO not available for";
872 if (request_region(hp_sdc.data_io, 2, hp_sdc_driver.name))
873 goto err0;
874 #endif
876 errstr = "IRQ not available for";
877 if (request_irq(hp_sdc.irq, &hp_sdc_isr, IRQF_SHARED|IRQF_SAMPLE_RANDOM,
878 "HP SDC", &hp_sdc))
879 goto err1;
881 errstr = "NMI not available for";
882 if (request_irq(hp_sdc.nmi, &hp_sdc_nmisr, IRQF_SHARED,
883 "HP SDC NMI", &hp_sdc))
884 goto err2;
886 printk(KERN_INFO PREFIX "HP SDC at 0x%p, IRQ %d (NMI IRQ %d)\n",
887 (void *)hp_sdc.base_io, hp_sdc.irq, hp_sdc.nmi);
889 hp_sdc_status_in8();
890 hp_sdc_data_in8();
892 tasklet_init(&hp_sdc.task, hp_sdc_tasklet, 0);
894 /* Sync the output buffer registers, thus scheduling hp_sdc_tasklet. */
895 t_sync.actidx = 0;
896 t_sync.idx = 1;
897 t_sync.endidx = 6;
898 t_sync.seq = ts_sync;
899 ts_sync[0] = HP_SDC_ACT_DATAREG | HP_SDC_ACT_SEMAPHORE;
900 ts_sync[1] = 0x0f;
901 ts_sync[2] = ts_sync[3] = ts_sync[4] = ts_sync[5] = 0;
902 t_sync.act.semaphore = &s_sync;
903 init_MUTEX_LOCKED(&s_sync);
904 hp_sdc_enqueue_transaction(&t_sync);
905 down(&s_sync); /* Wait for t_sync to complete */
907 /* Create the keepalive task */
908 init_timer(&hp_sdc.kicker);
909 hp_sdc.kicker.expires = jiffies + HZ;
910 hp_sdc.kicker.function = &hp_sdc_kicker;
911 add_timer(&hp_sdc.kicker);
913 hp_sdc.dev_err = 0;
914 return 0;
915 err2:
916 free_irq(hp_sdc.irq, &hp_sdc);
917 err1:
918 release_region(hp_sdc.data_io, 2);
919 err0:
920 printk(KERN_WARNING PREFIX ": %s SDC IO=0x%p IRQ=0x%x NMI=0x%x\n",
921 errstr, (void *)hp_sdc.base_io, hp_sdc.irq, hp_sdc.nmi);
922 hp_sdc.dev = NULL;
924 return hp_sdc.dev_err;
927 #if defined(__hppa__)
929 static int __init hp_sdc_init_hppa(struct parisc_device *d)
931 if (!d)
932 return 1;
933 if (hp_sdc.dev != NULL)
934 return 1; /* We only expect one SDC */
936 hp_sdc.dev = d;
937 hp_sdc.irq = d->irq;
938 hp_sdc.nmi = d->aux_irq;
939 hp_sdc.base_io = d->hpa.start;
940 hp_sdc.data_io = d->hpa.start + 0x800;
941 hp_sdc.status_io = d->hpa.start + 0x801;
943 return hp_sdc_init();
946 #endif /* __hppa__ */
948 static void hp_sdc_exit(void)
950 write_lock_irq(&hp_sdc.lock);
952 /* Turn off all maskable "sub-function" irq's. */
953 hp_sdc_spin_ibf();
954 sdc_writeb(HP_SDC_CMD_SET_IM | HP_SDC_IM_MASK, hp_sdc.status_io);
956 /* Wait until we know this has been processed by the i8042 */
957 hp_sdc_spin_ibf();
959 free_irq(hp_sdc.nmi, &hp_sdc);
960 free_irq(hp_sdc.irq, &hp_sdc);
961 write_unlock_irq(&hp_sdc.lock);
963 del_timer(&hp_sdc.kicker);
965 tasklet_kill(&hp_sdc.task);
967 #if defined(__hppa__)
968 if (unregister_parisc_driver(&hp_sdc_driver))
969 printk(KERN_WARNING PREFIX "Error unregistering HP SDC");
970 #endif
973 static int __init hp_sdc_register(void)
975 hp_sdc_transaction tq_init;
976 uint8_t tq_init_seq[5];
977 struct semaphore tq_init_sem;
978 #if defined(__mc68000__)
979 mm_segment_t fs;
980 unsigned char i;
981 #endif
983 hp_sdc.dev = NULL;
984 hp_sdc.dev_err = 0;
985 #if defined(__hppa__)
986 if (register_parisc_driver(&hp_sdc_driver)) {
987 printk(KERN_WARNING PREFIX "Error registering SDC with system bus tree.\n");
988 return -ENODEV;
990 #elif defined(__mc68000__)
991 if (!MACH_IS_HP300)
992 return -ENODEV;
994 hp_sdc.irq = 1;
995 hp_sdc.nmi = 7;
996 hp_sdc.base_io = (unsigned long) 0xf0428000;
997 hp_sdc.data_io = (unsigned long) hp_sdc.base_io + 1;
998 hp_sdc.status_io = (unsigned long) hp_sdc.base_io + 3;
999 fs = get_fs();
1000 set_fs(KERNEL_DS);
1001 if (!get_user(i, (unsigned char *)hp_sdc.data_io))
1002 hp_sdc.dev = (void *)1;
1003 set_fs(fs);
1004 hp_sdc.dev_err = hp_sdc_init();
1005 #endif
1006 if (hp_sdc.dev == NULL) {
1007 printk(KERN_WARNING PREFIX "No SDC found.\n");
1008 return hp_sdc.dev_err;
1011 init_MUTEX_LOCKED(&tq_init_sem);
1013 tq_init.actidx = 0;
1014 tq_init.idx = 1;
1015 tq_init.endidx = 5;
1016 tq_init.seq = tq_init_seq;
1017 tq_init.act.semaphore = &tq_init_sem;
1019 tq_init_seq[0] =
1020 HP_SDC_ACT_POSTCMD | HP_SDC_ACT_DATAIN | HP_SDC_ACT_SEMAPHORE;
1021 tq_init_seq[1] = HP_SDC_CMD_READ_KCC;
1022 tq_init_seq[2] = 1;
1023 tq_init_seq[3] = 0;
1024 tq_init_seq[4] = 0;
1026 hp_sdc_enqueue_transaction(&tq_init);
1028 down(&tq_init_sem);
1029 up(&tq_init_sem);
1031 if ((tq_init_seq[0] & HP_SDC_ACT_DEAD) == HP_SDC_ACT_DEAD) {
1032 printk(KERN_WARNING PREFIX "Error reading config byte.\n");
1033 hp_sdc_exit();
1034 return -ENODEV;
1036 hp_sdc.r11 = tq_init_seq[4];
1037 if (hp_sdc.r11 & HP_SDC_CFG_NEW) {
1038 const char *str;
1039 printk(KERN_INFO PREFIX "New style SDC\n");
1040 tq_init_seq[1] = HP_SDC_CMD_READ_XTD;
1041 tq_init.actidx = 0;
1042 tq_init.idx = 1;
1043 down(&tq_init_sem);
1044 hp_sdc_enqueue_transaction(&tq_init);
1045 down(&tq_init_sem);
1046 up(&tq_init_sem);
1047 if ((tq_init_seq[0] & HP_SDC_ACT_DEAD) == HP_SDC_ACT_DEAD) {
1048 printk(KERN_WARNING PREFIX "Error reading extended config byte.\n");
1049 return -ENODEV;
1051 hp_sdc.r7e = tq_init_seq[4];
1052 HP_SDC_XTD_REV_STRINGS(hp_sdc.r7e & HP_SDC_XTD_REV, str)
1053 printk(KERN_INFO PREFIX "Revision: %s\n", str);
1054 if (hp_sdc.r7e & HP_SDC_XTD_BEEPER)
1055 printk(KERN_INFO PREFIX "TI SN76494 beeper present\n");
1056 if (hp_sdc.r7e & HP_SDC_XTD_BBRTC)
1057 printk(KERN_INFO PREFIX "OKI MSM-58321 BBRTC present\n");
1058 printk(KERN_INFO PREFIX "Spunking the self test register to force PUP "
1059 "on next firmware reset.\n");
1060 tq_init_seq[0] = HP_SDC_ACT_PRECMD |
1061 HP_SDC_ACT_DATAOUT | HP_SDC_ACT_SEMAPHORE;
1062 tq_init_seq[1] = HP_SDC_CMD_SET_STR;
1063 tq_init_seq[2] = 1;
1064 tq_init_seq[3] = 0;
1065 tq_init.actidx = 0;
1066 tq_init.idx = 1;
1067 tq_init.endidx = 4;
1068 down(&tq_init_sem);
1069 hp_sdc_enqueue_transaction(&tq_init);
1070 down(&tq_init_sem);
1071 up(&tq_init_sem);
1072 } else
1073 printk(KERN_INFO PREFIX "Old style SDC (1820-%s).\n",
1074 (hp_sdc.r11 & HP_SDC_CFG_REV) ? "3300" : "2564/3087");
1076 return 0;
1079 module_init(hp_sdc_register);
1080 module_exit(hp_sdc_exit);
1082 /* Timing notes: These measurements taken on my 64MHz 7100-LC (715/64)
1083 * cycles cycles-adj time
1084 * between two consecutive mfctl(16)'s: 4 n/a 63ns
1085 * hp_sdc_spin_ibf when idle: 119 115 1.7us
1086 * gsc_writeb status register: 83 79 1.2us
1087 * IBF to clear after sending SET_IM: 6204 6006 93us
1088 * IBF to clear after sending LOAD_RT: 4467 4352 68us
1089 * IBF to clear after sending two LOAD_RTs: 18974 18859 295us
1090 * READ_T1, read status/data, IRQ, call handler: 35564 n/a 556us
1091 * cmd to ~IBF READ_T1 2nd time right after: 5158403 n/a 81ms
1092 * between IRQ received and ~IBF for above: 2578877 n/a 40ms
1094 * Performance stats after a run of this module configuring HIL and
1095 * receiving a few mouse events:
1097 * status in8 282508 cycles 7128 calls
1098 * status out8 8404 cycles 341 calls
1099 * data out8 1734 cycles 78 calls
1100 * isr 174324 cycles 617 calls (includes take)
1101 * take 1241 cycles 2 calls
1102 * put 1411504 cycles 6937 calls
1103 * task 1655209 cycles 6937 calls (includes put)