2 * linux/drivers/mmc/host/at91_mci.c - ATMEL AT91 MCI Driver
4 * Copyright (C) 2005 Cougar Creek Computing Devices Ltd, All Rights Reserved
6 * Copyright (C) 2006 Malcolm Noyes
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
14 This is the AT91 MCI driver that has been tested with both MMC cards
15 and SD-cards. Boards that support write protect are now supported.
16 The CCAT91SBC001 board does not support SD cards.
18 The three entry points are at91_mci_request, at91_mci_set_ios
22 This configures the device to put it into the correct mode and clock speed
26 MCI request processes the commands sent in the mmc_request structure. This
27 can consist of a processing command and a stop command in the case of
28 multiple block transfers.
30 There are three main types of request, commands, reads and writes.
32 Commands are straight forward. The command is submitted to the controller and
33 the request function returns. When the controller generates an interrupt to indicate
34 the command is finished, the response to the command are read and the mmc_request_done
35 function called to end the request.
37 Reads and writes work in a similar manner to normal commands but involve the PDC (DMA)
38 controller to manage the transfers.
40 A read is done from the controller directly to the scatterlist passed in from the request.
41 Due to a bug in the AT91RM9200 controller, when a read is completed, all the words are byte
42 swapped in the scatterlist buffers. AT91SAM926x are not affected by this bug.
44 The sequence of read interrupts is: ENDRX, RXBUFF, CMDRDY
46 A write is slightly different in that the bytes to write are read from the scatterlist
47 into a dma memory buffer (this is in case the source buffer should be read only). The
48 entire write buffer is then done from this single dma memory buffer.
50 The sequence of write interrupts is: ENDTX, TXBUFE, NOTBUSY, CMDRDY
53 Gets the status of the write protect pin, if available.
56 #include <linux/module.h>
57 #include <linux/moduleparam.h>
58 #include <linux/init.h>
59 #include <linux/ioport.h>
60 #include <linux/platform_device.h>
61 #include <linux/interrupt.h>
62 #include <linux/blkdev.h>
63 #include <linux/delay.h>
64 #include <linux/err.h>
65 #include <linux/dma-mapping.h>
66 #include <linux/clk.h>
67 #include <linux/atmel_pdc.h>
69 #include <linux/mmc/host.h>
73 #include <asm/mach/mmc.h>
74 #include <asm/arch/board.h>
75 #include <asm/arch/cpu.h>
76 #include <asm/arch/gpio.h>
77 #include <asm/arch/at91_mci.h>
79 #define DRIVER_NAME "at91_mci"
81 #define FL_SENT_COMMAND (1 << 0)
82 #define FL_SENT_STOP (1 << 1)
84 #define AT91_MCI_ERRORS (AT91_MCI_RINDE | AT91_MCI_RDIRE | AT91_MCI_RCRCE \
85 | AT91_MCI_RENDE | AT91_MCI_RTOE | AT91_MCI_DCRCE \
86 | AT91_MCI_DTOE | AT91_MCI_OVRE | AT91_MCI_UNRE)
88 #define at91_mci_read(host, reg) __raw_readl((host)->baseaddr + (reg))
89 #define at91_mci_write(host, reg, val) __raw_writel((val), (host)->baseaddr + (reg))
93 * Low level type for this driver
98 struct mmc_command
*cmd
;
99 struct mmc_request
*request
;
101 void __iomem
*baseaddr
;
104 struct at91_mmc_data
*board
;
110 * Flag indicating when the command has been sent. This is used to
111 * work out whether or not to send the stop
114 /* flag for current bus settings */
117 /* DMA buffer used for transmitting */
118 unsigned int* buffer
;
119 dma_addr_t physical_address
;
120 unsigned int total_length
;
122 /* Latest in the scatterlist that has been enabled for transfer, but not freed */
125 /* Latest in the scatterlist that has been enabled for transfer */
130 * Copy from sg to a dma block - used for transfers
132 static inline void at91_mci_sg_to_dma(struct at91mci_host
*host
, struct mmc_data
*data
)
134 unsigned int len
, i
, size
;
135 unsigned *dmabuf
= host
->buffer
;
137 size
= host
->total_length
;
141 * Just loop through all entries. Size might not
142 * be the entire list though so make sure that
143 * we do not transfer too much.
145 for (i
= 0; i
< len
; i
++) {
146 struct scatterlist
*sg
;
148 unsigned int *sgbuffer
;
152 sgbuffer
= kmap_atomic(sg
->page
, KM_BIO_SRC_IRQ
) + sg
->offset
;
153 amount
= min(size
, sg
->length
);
156 if (cpu_is_at91rm9200()) { /* AT91RM9200 errata */
159 for (index
= 0; index
< (amount
/ 4); index
++)
160 *dmabuf
++ = swab32(sgbuffer
[index
]);
163 memcpy(dmabuf
, sgbuffer
, amount
);
165 kunmap_atomic(sgbuffer
, KM_BIO_SRC_IRQ
);
172 * Check that we didn't get a request to transfer
173 * more data than can fit into the SG list.
181 static void at91_mci_pre_dma_read(struct at91mci_host
*host
)
184 struct scatterlist
*sg
;
185 struct mmc_command
*cmd
;
186 struct mmc_data
*data
;
188 pr_debug("pre dma read\n");
192 pr_debug("no command\n");
198 pr_debug("no data\n");
202 for (i
= 0; i
< 2; i
++) {
203 /* nothing left to transfer */
204 if (host
->transfer_index
>= data
->sg_len
) {
205 pr_debug("Nothing left to transfer (index = %d)\n", host
->transfer_index
);
209 /* Check to see if this needs filling */
211 if (at91_mci_read(host
, ATMEL_PDC_RCR
) != 0) {
212 pr_debug("Transfer active in current\n");
217 if (at91_mci_read(host
, ATMEL_PDC_RNCR
) != 0) {
218 pr_debug("Transfer active in next\n");
223 /* Setup the next transfer */
224 pr_debug("Using transfer index %d\n", host
->transfer_index
);
226 sg
= &data
->sg
[host
->transfer_index
++];
227 pr_debug("sg = %p\n", sg
);
229 sg
->dma_address
= dma_map_page(NULL
, sg
->page
, sg
->offset
, sg
->length
, DMA_FROM_DEVICE
);
231 pr_debug("dma address = %08X, length = %d\n", sg
->dma_address
, sg
->length
);
234 at91_mci_write(host
, ATMEL_PDC_RPR
, sg
->dma_address
);
235 at91_mci_write(host
, ATMEL_PDC_RCR
, sg
->length
/ 4);
238 at91_mci_write(host
, ATMEL_PDC_RNPR
, sg
->dma_address
);
239 at91_mci_write(host
, ATMEL_PDC_RNCR
, sg
->length
/ 4);
243 pr_debug("pre dma read done\n");
247 * Handle after a dma read
249 static void at91_mci_post_dma_read(struct at91mci_host
*host
)
251 struct mmc_command
*cmd
;
252 struct mmc_data
*data
;
254 pr_debug("post dma read\n");
258 pr_debug("no command\n");
264 pr_debug("no data\n");
268 while (host
->in_use_index
< host
->transfer_index
) {
269 struct scatterlist
*sg
;
271 pr_debug("finishing index %d\n", host
->in_use_index
);
273 sg
= &data
->sg
[host
->in_use_index
++];
275 pr_debug("Unmapping page %08X\n", sg
->dma_address
);
277 dma_unmap_page(NULL
, sg
->dma_address
, sg
->length
, DMA_FROM_DEVICE
);
279 data
->bytes_xfered
+= sg
->length
;
281 if (cpu_is_at91rm9200()) { /* AT91RM9200 errata */
282 unsigned int *buffer
;
285 /* Swap the contents of the buffer */
286 buffer
= kmap_atomic(sg
->page
, KM_BIO_SRC_IRQ
) + sg
->offset
;
287 pr_debug("buffer = %p, length = %d\n", buffer
, sg
->length
);
289 for (index
= 0; index
< (sg
->length
/ 4); index
++)
290 buffer
[index
] = swab32(buffer
[index
]);
292 kunmap_atomic(buffer
, KM_BIO_SRC_IRQ
);
295 flush_dcache_page(sg
->page
);
298 /* Is there another transfer to trigger? */
299 if (host
->transfer_index
< data
->sg_len
)
300 at91_mci_pre_dma_read(host
);
302 at91_mci_write(host
, AT91_MCI_IDR
, AT91_MCI_ENDRX
);
303 at91_mci_write(host
, AT91_MCI_IER
, AT91_MCI_RXBUFF
);
306 pr_debug("post dma read done\n");
310 * Handle transmitted data
312 static void at91_mci_handle_transmitted(struct at91mci_host
*host
)
314 struct mmc_command
*cmd
;
315 struct mmc_data
*data
;
317 pr_debug("Handling the transmit\n");
319 /* Disable the transfer */
320 at91_mci_write(host
, ATMEL_PDC_PTCR
, ATMEL_PDC_RXTDIS
| ATMEL_PDC_TXTDIS
);
322 /* Now wait for cmd ready */
323 at91_mci_write(host
, AT91_MCI_IDR
, AT91_MCI_TXBUFE
);
331 if (cmd
->data
->flags
& MMC_DATA_MULTI
) {
332 pr_debug("multiple write : wait for BLKE...\n");
333 at91_mci_write(host
, AT91_MCI_IER
, AT91_MCI_BLKE
);
335 at91_mci_write(host
, AT91_MCI_IER
, AT91_MCI_NOTBUSY
);
337 data
->bytes_xfered
= host
->total_length
;
340 /*Handle after command sent ready*/
341 static int at91_mci_handle_cmdrdy(struct at91mci_host
*host
)
345 else if (!host
->cmd
->data
) {
346 if (host
->flags
& FL_SENT_STOP
) {
347 /*After multi block write, we must wait for NOTBUSY*/
348 at91_mci_write(host
, AT91_MCI_IER
, AT91_MCI_NOTBUSY
);
350 } else if (host
->cmd
->data
->flags
& MMC_DATA_WRITE
) {
351 /*After sendding multi-block-write command, start DMA transfer*/
352 at91_mci_write(host
, AT91_MCI_IER
, AT91_MCI_TXBUFE
);
353 at91_mci_write(host
, AT91_MCI_IER
, AT91_MCI_BLKE
);
354 at91_mci_write(host
, ATMEL_PDC_PTCR
, ATMEL_PDC_TXTEN
);
357 /* command not completed, have to wait */
363 * Enable the controller
365 static void at91_mci_enable(struct at91mci_host
*host
)
369 at91_mci_write(host
, AT91_MCI_CR
, AT91_MCI_MCIEN
);
370 at91_mci_write(host
, AT91_MCI_IDR
, 0xffffffff);
371 at91_mci_write(host
, AT91_MCI_DTOR
, AT91_MCI_DTOMUL_1M
| AT91_MCI_DTOCYC
);
372 mr
= AT91_MCI_PDCMODE
| 0x34a;
374 if (cpu_is_at91sam9260() || cpu_is_at91sam9263())
375 mr
|= AT91_MCI_RDPROOF
| AT91_MCI_WRPROOF
;
377 at91_mci_write(host
, AT91_MCI_MR
, mr
);
379 /* use Slot A or B (only one at same time) */
380 at91_mci_write(host
, AT91_MCI_SDCR
, host
->board
->slot_b
);
384 * Disable the controller
386 static void at91_mci_disable(struct at91mci_host
*host
)
388 at91_mci_write(host
, AT91_MCI_CR
, AT91_MCI_MCIDIS
| AT91_MCI_SWRST
);
394 static void at91_mci_send_command(struct at91mci_host
*host
, struct mmc_command
*cmd
)
396 unsigned int cmdr
, mr
;
397 unsigned int block_length
;
398 struct mmc_data
*data
= cmd
->data
;
401 unsigned int ier
= 0;
405 /* Needed for leaving busy state before CMD1 */
406 if ((at91_mci_read(host
, AT91_MCI_SR
) & AT91_MCI_RTOE
) && (cmd
->opcode
== 1)) {
407 pr_debug("Clearing timeout\n");
408 at91_mci_write(host
, AT91_MCI_ARGR
, 0);
409 at91_mci_write(host
, AT91_MCI_CMDR
, AT91_MCI_OPDCMD
);
410 while (!(at91_mci_read(host
, AT91_MCI_SR
) & AT91_MCI_CMDRDY
)) {
412 pr_debug("Clearing: SR = %08X\n", at91_mci_read(host
, AT91_MCI_SR
));
418 if (mmc_resp_type(cmd
) == MMC_RSP_NONE
)
419 cmdr
|= AT91_MCI_RSPTYP_NONE
;
421 /* if a response is expected then allow maximum response latancy */
422 cmdr
|= AT91_MCI_MAXLAT
;
423 /* set 136 bit response for R2, 48 bit response otherwise */
424 if (mmc_resp_type(cmd
) == MMC_RSP_R2
)
425 cmdr
|= AT91_MCI_RSPTYP_136
;
427 cmdr
|= AT91_MCI_RSPTYP_48
;
431 block_length
= data
->blksz
;
432 blocks
= data
->blocks
;
434 /* always set data start - also set direction flag for read */
435 if (data
->flags
& MMC_DATA_READ
)
436 cmdr
|= (AT91_MCI_TRDIR
| AT91_MCI_TRCMD_START
);
437 else if (data
->flags
& MMC_DATA_WRITE
)
438 cmdr
|= AT91_MCI_TRCMD_START
;
440 if (data
->flags
& MMC_DATA_STREAM
)
441 cmdr
|= AT91_MCI_TRTYP_STREAM
;
442 if (data
->flags
& MMC_DATA_MULTI
)
443 cmdr
|= AT91_MCI_TRTYP_MULTIPLE
;
450 if (host
->flags
& FL_SENT_STOP
)
451 cmdr
|= AT91_MCI_TRCMD_STOP
;
453 if (host
->bus_mode
== MMC_BUSMODE_OPENDRAIN
)
454 cmdr
|= AT91_MCI_OPDCMD
;
457 * Set the arguments and send the command
459 pr_debug("Sending command %d as %08X, arg = %08X, blocks = %d, length = %d (MR = %08X)\n",
460 cmd
->opcode
, cmdr
, cmd
->arg
, blocks
, block_length
, at91_mci_read(host
, AT91_MCI_MR
));
463 at91_mci_write(host
, ATMEL_PDC_PTCR
, ATMEL_PDC_TXTDIS
| ATMEL_PDC_RXTDIS
);
464 at91_mci_write(host
, ATMEL_PDC_RPR
, 0);
465 at91_mci_write(host
, ATMEL_PDC_RCR
, 0);
466 at91_mci_write(host
, ATMEL_PDC_RNPR
, 0);
467 at91_mci_write(host
, ATMEL_PDC_RNCR
, 0);
468 at91_mci_write(host
, ATMEL_PDC_TPR
, 0);
469 at91_mci_write(host
, ATMEL_PDC_TCR
, 0);
470 at91_mci_write(host
, ATMEL_PDC_TNPR
, 0);
471 at91_mci_write(host
, ATMEL_PDC_TNCR
, 0);
472 ier
= AT91_MCI_CMDRDY
;
474 /* zero block length and PDC mode */
475 mr
= at91_mci_read(host
, AT91_MCI_MR
) & 0x7fff;
476 at91_mci_write(host
, AT91_MCI_MR
, mr
| (block_length
<< 16) | AT91_MCI_PDCMODE
);
479 * Disable the PDC controller
481 at91_mci_write(host
, ATMEL_PDC_PTCR
, ATMEL_PDC_RXTDIS
| ATMEL_PDC_TXTDIS
);
483 if (cmdr
& AT91_MCI_TRCMD_START
) {
484 data
->bytes_xfered
= 0;
485 host
->transfer_index
= 0;
486 host
->in_use_index
= 0;
487 if (cmdr
& AT91_MCI_TRDIR
) {
492 host
->total_length
= 0;
494 at91_mci_pre_dma_read(host
);
495 ier
= AT91_MCI_ENDRX
/* | AT91_MCI_RXBUFF */;
501 host
->total_length
= block_length
* blocks
;
502 host
->buffer
= dma_alloc_coherent(NULL
,
504 &host
->physical_address
, GFP_KERNEL
);
506 at91_mci_sg_to_dma(host
, data
);
508 pr_debug("Transmitting %d bytes\n", host
->total_length
);
510 at91_mci_write(host
, ATMEL_PDC_TPR
, host
->physical_address
);
511 at91_mci_write(host
, ATMEL_PDC_TCR
, host
->total_length
/ 4);
512 ier
= AT91_MCI_CMDRDY
;
518 * Send the command and then enable the PDC - not the other way round as
519 * the data sheet says
522 at91_mci_write(host
, AT91_MCI_ARGR
, cmd
->arg
);
523 at91_mci_write(host
, AT91_MCI_CMDR
, cmdr
);
525 if (cmdr
& AT91_MCI_TRCMD_START
) {
526 if (cmdr
& AT91_MCI_TRDIR
)
527 at91_mci_write(host
, ATMEL_PDC_PTCR
, ATMEL_PDC_RXTEN
);
530 /* Enable selected interrupts */
531 at91_mci_write(host
, AT91_MCI_IER
, AT91_MCI_ERRORS
| ier
);
535 * Process the next step in the request
537 static void at91_mci_process_next(struct at91mci_host
*host
)
539 if (!(host
->flags
& FL_SENT_COMMAND
)) {
540 host
->flags
|= FL_SENT_COMMAND
;
541 at91_mci_send_command(host
, host
->request
->cmd
);
543 else if ((!(host
->flags
& FL_SENT_STOP
)) && host
->request
->stop
) {
544 host
->flags
|= FL_SENT_STOP
;
545 at91_mci_send_command(host
, host
->request
->stop
);
548 mmc_request_done(host
->mmc
, host
->request
);
552 * Handle a command that has been completed
554 static void at91_mci_completed_command(struct at91mci_host
*host
)
556 struct mmc_command
*cmd
= host
->cmd
;
559 at91_mci_write(host
, AT91_MCI_IDR
, 0xffffffff);
561 cmd
->resp
[0] = at91_mci_read(host
, AT91_MCI_RSPR(0));
562 cmd
->resp
[1] = at91_mci_read(host
, AT91_MCI_RSPR(1));
563 cmd
->resp
[2] = at91_mci_read(host
, AT91_MCI_RSPR(2));
564 cmd
->resp
[3] = at91_mci_read(host
, AT91_MCI_RSPR(3));
567 dma_free_coherent(NULL
, host
->total_length
, host
->buffer
, host
->physical_address
);
571 status
= at91_mci_read(host
, AT91_MCI_SR
);
573 pr_debug("Status = %08X [%08X %08X %08X %08X]\n",
574 status
, cmd
->resp
[0], cmd
->resp
[1], cmd
->resp
[2], cmd
->resp
[3]);
576 if (status
& (AT91_MCI_RINDE
| AT91_MCI_RDIRE
| AT91_MCI_RCRCE
|
577 AT91_MCI_RENDE
| AT91_MCI_RTOE
| AT91_MCI_DCRCE
|
578 AT91_MCI_DTOE
| AT91_MCI_OVRE
| AT91_MCI_UNRE
)) {
579 if ((status
& AT91_MCI_RCRCE
) && !(mmc_resp_type(cmd
) & MMC_RSP_CRC
)) {
583 if (status
& (AT91_MCI_RTOE
| AT91_MCI_DTOE
))
584 cmd
->error
= -ETIMEDOUT
;
585 else if (status
& (AT91_MCI_RCRCE
| AT91_MCI_DCRCE
))
586 cmd
->error
= -EILSEQ
;
590 pr_debug("Error detected and set to %d (cmd = %d, retries = %d)\n",
591 cmd
->error
, cmd
->opcode
, cmd
->retries
);
597 at91_mci_process_next(host
);
601 * Handle an MMC request
603 static void at91_mci_request(struct mmc_host
*mmc
, struct mmc_request
*mrq
)
605 struct at91mci_host
*host
= mmc_priv(mmc
);
609 at91_mci_process_next(host
);
615 static void at91_mci_set_ios(struct mmc_host
*mmc
, struct mmc_ios
*ios
)
618 struct at91mci_host
*host
= mmc_priv(mmc
);
619 unsigned long at91_master_clock
= clk_get_rate(host
->mci_clk
);
621 host
->bus_mode
= ios
->bus_mode
;
623 if (ios
->clock
== 0) {
624 /* Disable the MCI controller */
625 at91_mci_write(host
, AT91_MCI_CR
, AT91_MCI_MCIDIS
);
629 /* Enable the MCI controller */
630 at91_mci_write(host
, AT91_MCI_CR
, AT91_MCI_MCIEN
);
632 if ((at91_master_clock
% (ios
->clock
* 2)) == 0)
633 clkdiv
= ((at91_master_clock
/ ios
->clock
) / 2) - 1;
635 clkdiv
= (at91_master_clock
/ ios
->clock
) / 2;
637 pr_debug("clkdiv = %d. mcck = %ld\n", clkdiv
,
638 at91_master_clock
/ (2 * (clkdiv
+ 1)));
640 if (ios
->bus_width
== MMC_BUS_WIDTH_4
&& host
->board
->wire4
) {
641 pr_debug("MMC: Setting controller bus width to 4\n");
642 at91_mci_write(host
, AT91_MCI_SDCR
, at91_mci_read(host
, AT91_MCI_SDCR
) | AT91_MCI_SDCBUS
);
645 pr_debug("MMC: Setting controller bus width to 1\n");
646 at91_mci_write(host
, AT91_MCI_SDCR
, at91_mci_read(host
, AT91_MCI_SDCR
) & ~AT91_MCI_SDCBUS
);
649 /* Set the clock divider */
650 at91_mci_write(host
, AT91_MCI_MR
, (at91_mci_read(host
, AT91_MCI_MR
) & ~AT91_MCI_CLKDIV
) | clkdiv
);
652 /* maybe switch power to the card */
653 if (host
->board
->vcc_pin
) {
654 switch (ios
->power_mode
) {
656 at91_set_gpio_value(host
->board
->vcc_pin
, 0);
660 at91_set_gpio_value(host
->board
->vcc_pin
, 1);
667 * Handle an interrupt
669 static irqreturn_t
at91_mci_irq(int irq
, void *devid
)
671 struct at91mci_host
*host
= devid
;
673 unsigned int int_status
, int_mask
;
675 int_status
= at91_mci_read(host
, AT91_MCI_SR
);
676 int_mask
= at91_mci_read(host
, AT91_MCI_IMR
);
678 pr_debug("MCI irq: status = %08X, %08X, %08X\n", int_status
, int_mask
,
679 int_status
& int_mask
);
681 int_status
= int_status
& int_mask
;
683 if (int_status
& AT91_MCI_ERRORS
) {
686 if (int_status
& AT91_MCI_UNRE
)
687 pr_debug("MMC: Underrun error\n");
688 if (int_status
& AT91_MCI_OVRE
)
689 pr_debug("MMC: Overrun error\n");
690 if (int_status
& AT91_MCI_DTOE
)
691 pr_debug("MMC: Data timeout\n");
692 if (int_status
& AT91_MCI_DCRCE
)
693 pr_debug("MMC: CRC error in data\n");
694 if (int_status
& AT91_MCI_RTOE
)
695 pr_debug("MMC: Response timeout\n");
696 if (int_status
& AT91_MCI_RENDE
)
697 pr_debug("MMC: Response end bit error\n");
698 if (int_status
& AT91_MCI_RCRCE
)
699 pr_debug("MMC: Response CRC error\n");
700 if (int_status
& AT91_MCI_RDIRE
)
701 pr_debug("MMC: Response direction error\n");
702 if (int_status
& AT91_MCI_RINDE
)
703 pr_debug("MMC: Response index error\n");
705 /* Only continue processing if no errors */
707 if (int_status
& AT91_MCI_TXBUFE
) {
708 pr_debug("TX buffer empty\n");
709 at91_mci_handle_transmitted(host
);
712 if (int_status
& AT91_MCI_ENDRX
) {
714 at91_mci_post_dma_read(host
);
717 if (int_status
& AT91_MCI_RXBUFF
) {
718 pr_debug("RX buffer full\n");
719 at91_mci_write(host
, ATMEL_PDC_PTCR
, ATMEL_PDC_RXTDIS
| ATMEL_PDC_TXTDIS
);
720 at91_mci_write(host
, AT91_MCI_IDR
, AT91_MCI_RXBUFF
| AT91_MCI_ENDRX
);
724 if (int_status
& AT91_MCI_ENDTX
)
725 pr_debug("Transmit has ended\n");
727 if (int_status
& AT91_MCI_NOTBUSY
) {
728 pr_debug("Card is ready\n");
732 if (int_status
& AT91_MCI_DTIP
)
733 pr_debug("Data transfer in progress\n");
735 if (int_status
& AT91_MCI_BLKE
) {
736 pr_debug("Block transfer has ended\n");
740 if (int_status
& AT91_MCI_TXRDY
)
741 pr_debug("Ready to transmit\n");
743 if (int_status
& AT91_MCI_RXRDY
)
744 pr_debug("Ready to receive\n");
746 if (int_status
& AT91_MCI_CMDRDY
) {
747 pr_debug("Command ready\n");
748 completed
= at91_mci_handle_cmdrdy(host
);
753 pr_debug("Completed command\n");
754 at91_mci_write(host
, AT91_MCI_IDR
, 0xffffffff);
755 at91_mci_completed_command(host
);
757 at91_mci_write(host
, AT91_MCI_IDR
, int_status
);
762 static irqreturn_t
at91_mmc_det_irq(int irq
, void *_host
)
764 struct at91mci_host
*host
= _host
;
765 int present
= !at91_get_gpio_value(irq
);
768 * we expect this irq on both insert and remove,
769 * and use a short delay to debounce.
771 if (present
!= host
->present
) {
772 host
->present
= present
;
773 pr_debug("%s: card %s\n", mmc_hostname(host
->mmc
),
774 present
? "insert" : "remove");
776 pr_debug("****** Resetting SD-card bus width ******\n");
777 at91_mci_write(host
, AT91_MCI_SDCR
, at91_mci_read(host
, AT91_MCI_SDCR
) & ~AT91_MCI_SDCBUS
);
779 mmc_detect_change(host
->mmc
, msecs_to_jiffies(100));
784 static int at91_mci_get_ro(struct mmc_host
*mmc
)
787 struct at91mci_host
*host
= mmc_priv(mmc
);
789 if (host
->board
->wp_pin
) {
790 read_only
= at91_get_gpio_value(host
->board
->wp_pin
);
791 printk(KERN_WARNING
"%s: card is %s\n", mmc_hostname(mmc
),
792 (read_only
? "read-only" : "read-write") );
795 printk(KERN_WARNING
"%s: host does not support reading read-only "
796 "switch. Assuming write-enable.\n", mmc_hostname(mmc
));
801 static const struct mmc_host_ops at91_mci_ops
= {
802 .request
= at91_mci_request
,
803 .set_ios
= at91_mci_set_ios
,
804 .get_ro
= at91_mci_get_ro
,
808 * Probe for the device
810 static int __init
at91_mci_probe(struct platform_device
*pdev
)
812 struct mmc_host
*mmc
;
813 struct at91mci_host
*host
;
814 struct resource
*res
;
817 pr_debug("Probe MCI devices\n");
819 res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
823 if (!request_mem_region(res
->start
, res
->end
- res
->start
+ 1, DRIVER_NAME
))
826 mmc
= mmc_alloc_host(sizeof(struct at91mci_host
), &pdev
->dev
);
828 pr_debug("Failed to allocate mmc host\n");
829 release_mem_region(res
->start
, res
->end
- res
->start
+ 1);
833 mmc
->ops
= &at91_mci_ops
;
835 mmc
->f_max
= 25000000;
836 mmc
->ocr_avail
= MMC_VDD_32_33
| MMC_VDD_33_34
;
838 mmc
->max_blk_size
= 4095;
839 mmc
->max_blk_count
= mmc
->max_req_size
;
841 host
= mmc_priv(mmc
);
845 host
->board
= pdev
->dev
.platform_data
;
846 if (host
->board
->wire4
) {
847 if (cpu_is_at91sam9260() || cpu_is_at91sam9263())
848 mmc
->caps
|= MMC_CAP_4_BIT_DATA
;
850 printk("AT91 MMC: 4 wire bus mode not supported"
851 " - using 1 wire\n");
857 host
->mci_clk
= clk_get(&pdev
->dev
, "mci_clk");
858 if (IS_ERR(host
->mci_clk
)) {
859 printk(KERN_ERR
"AT91 MMC: no clock defined.\n");
861 release_mem_region(res
->start
, res
->end
- res
->start
+ 1);
868 host
->baseaddr
= ioremap(res
->start
, res
->end
- res
->start
+ 1);
869 if (!host
->baseaddr
) {
870 clk_put(host
->mci_clk
);
872 release_mem_region(res
->start
, res
->end
- res
->start
+ 1);
879 clk_enable(host
->mci_clk
); /* Enable the peripheral clock */
880 at91_mci_disable(host
);
881 at91_mci_enable(host
);
884 * Allocate the MCI interrupt
886 host
->irq
= platform_get_irq(pdev
, 0);
887 ret
= request_irq(host
->irq
, at91_mci_irq
, IRQF_SHARED
, DRIVER_NAME
, host
);
889 printk(KERN_ERR
"AT91 MMC: Failed to request MCI interrupt\n");
890 clk_disable(host
->mci_clk
);
891 clk_put(host
->mci_clk
);
893 iounmap(host
->baseaddr
);
894 release_mem_region(res
->start
, res
->end
- res
->start
+ 1);
898 platform_set_drvdata(pdev
, mmc
);
901 * Add host to MMC layer
903 if (host
->board
->det_pin
) {
904 host
->present
= !at91_get_gpio_value(host
->board
->det_pin
);
905 device_init_wakeup(&pdev
->dev
, 1);
913 * monitor card insertion/removal if we can
915 if (host
->board
->det_pin
) {
916 ret
= request_irq(host
->board
->det_pin
, at91_mmc_det_irq
,
917 0, DRIVER_NAME
, host
);
919 printk(KERN_ERR
"AT91 MMC: Couldn't allocate MMC detect irq\n");
922 pr_debug("Added MCI driver\n");
930 static int __exit
at91_mci_remove(struct platform_device
*pdev
)
932 struct mmc_host
*mmc
= platform_get_drvdata(pdev
);
933 struct at91mci_host
*host
;
934 struct resource
*res
;
939 host
= mmc_priv(mmc
);
941 if (host
->board
->det_pin
) {
942 device_init_wakeup(&pdev
->dev
, 0);
943 free_irq(host
->board
->det_pin
, host
);
944 cancel_delayed_work(&host
->mmc
->detect
);
947 at91_mci_disable(host
);
948 mmc_remove_host(mmc
);
949 free_irq(host
->irq
, host
);
951 clk_disable(host
->mci_clk
); /* Disable the peripheral clock */
952 clk_put(host
->mci_clk
);
954 iounmap(host
->baseaddr
);
955 res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
956 release_mem_region(res
->start
, res
->end
- res
->start
+ 1);
959 platform_set_drvdata(pdev
, NULL
);
960 pr_debug("MCI Removed\n");
966 static int at91_mci_suspend(struct platform_device
*pdev
, pm_message_t state
)
968 struct mmc_host
*mmc
= platform_get_drvdata(pdev
);
969 struct at91mci_host
*host
= mmc_priv(mmc
);
972 if (host
->board
->det_pin
&& device_may_wakeup(&pdev
->dev
))
973 enable_irq_wake(host
->board
->det_pin
);
976 ret
= mmc_suspend_host(mmc
, state
);
981 static int at91_mci_resume(struct platform_device
*pdev
)
983 struct mmc_host
*mmc
= platform_get_drvdata(pdev
);
984 struct at91mci_host
*host
= mmc_priv(mmc
);
987 if (host
->board
->det_pin
&& device_may_wakeup(&pdev
->dev
))
988 disable_irq_wake(host
->board
->det_pin
);
991 ret
= mmc_resume_host(mmc
);
996 #define at91_mci_suspend NULL
997 #define at91_mci_resume NULL
1000 static struct platform_driver at91_mci_driver
= {
1001 .remove
= __exit_p(at91_mci_remove
),
1002 .suspend
= at91_mci_suspend
,
1003 .resume
= at91_mci_resume
,
1005 .name
= DRIVER_NAME
,
1006 .owner
= THIS_MODULE
,
1010 static int __init
at91_mci_init(void)
1012 return platform_driver_probe(&at91_mci_driver
, at91_mci_probe
);
1015 static void __exit
at91_mci_exit(void)
1017 platform_driver_unregister(&at91_mci_driver
);
1020 module_init(at91_mci_init
);
1021 module_exit(at91_mci_exit
);
1023 MODULE_DESCRIPTION("AT91 Multimedia Card Interface driver");
1024 MODULE_AUTHOR("Nick Randell");
1025 MODULE_LICENSE("GPL");