2 * pata_it8213.c - iTE Tech. Inc. IT8213 PATA driver
4 * The IT8213 is a very Intel ICH like device for timing purposes, having
5 * a similar register layout and the same split clock arrangement. Cable
6 * detection is different, and it does not have slave channels or all the
7 * clutter of later ICH/SATA setups.
10 #include <linux/kernel.h>
11 #include <linux/module.h>
12 #include <linux/pci.h>
13 #include <linux/init.h>
14 #include <linux/blkdev.h>
15 #include <linux/delay.h>
16 #include <linux/device.h>
17 #include <scsi/scsi_host.h>
18 #include <linux/libata.h>
19 #include <linux/ata.h>
21 #define DRV_NAME "pata_it8213"
22 #define DRV_VERSION "0.0.3"
25 * it8213_pre_reset - check for 40/80 pin
27 * @deadline: deadline jiffies for the operation
29 * Filter out ports by the enable bits before doing the normal reset
33 static int it8213_pre_reset(struct ata_port
*ap
, unsigned long deadline
)
35 static const struct pci_bits it8213_enable_bits
[] = {
36 { 0x41U
, 1U, 0x80UL
, 0x80UL
}, /* port 0 */
38 struct pci_dev
*pdev
= to_pci_dev(ap
->host
->dev
);
39 if (!pci_test_config_bits(pdev
, &it8213_enable_bits
[ap
->port_no
]))
42 return ata_std_prereset(ap
, deadline
);
46 * it8213_error_handler - Probe specified port on PATA host controller
50 * None (inherited from caller).
53 static void it8213_error_handler(struct ata_port
*ap
)
55 ata_bmdma_drive_eh(ap
, it8213_pre_reset
, ata_std_softreset
, NULL
, ata_std_postreset
);
59 * it8213_cable_detect - check for 40/80 pin
62 * Perform cable detection for the 8213 ATA interface. This is
63 * different to the PIIX arrangement
66 static int it8213_cable_detect(struct ata_port
*ap
)
68 struct pci_dev
*pdev
= to_pci_dev(ap
->host
->dev
);
70 pci_read_config_byte(pdev
, 0x42, &tmp
);
71 if (tmp
& 2) /* The initial docs are incorrect */
72 return ATA_CBL_PATA40
;
73 return ATA_CBL_PATA80
;
77 * it8213_set_piomode - Initialize host controller PATA PIO timings
78 * @ap: Port whose timings we are configuring
79 * @adev: Device whose timings we are configuring
81 * Set PIO mode for device, in host controller PCI config space.
84 * None (inherited from caller).
87 static void it8213_set_piomode (struct ata_port
*ap
, struct ata_device
*adev
)
89 unsigned int pio
= adev
->pio_mode
- XFER_PIO_0
;
90 struct pci_dev
*dev
= to_pci_dev(ap
->host
->dev
);
91 unsigned int idetm_port
= ap
->port_no
? 0x42 : 0x40;
96 * See Intel Document 298600-004 for the timing programing rules
97 * for PIIX/ICH. The 8213 is a clone so very similar
100 static const /* ISP RTC */
101 u8 timings
[][2] = { { 0, 0 },
108 control
|= 1; /* TIME1 enable */
109 if (ata_pio_need_iordy(adev
)) /* PIO 3/4 require IORDY */
110 control
|= 2; /* IORDY enable */
111 /* Bit 2 is set for ATAPI on the IT8213 - reverse of ICH/PIIX */
112 if (adev
->class != ATA_DEV_ATA
)
115 pci_read_config_word(dev
, idetm_port
, &idetm_data
);
117 /* Enable PPE, IE and TIME as appropriate */
119 if (adev
->devno
== 0) {
120 idetm_data
&= 0xCCF0;
121 idetm_data
|= control
;
122 idetm_data
|= (timings
[pio
][0] << 12) |
123 (timings
[pio
][1] << 8);
127 idetm_data
&= 0xCC0F;
128 idetm_data
|= (control
<< 4);
130 /* Slave timing in seperate register */
131 pci_read_config_byte(dev
, 0x44, &slave_data
);
133 slave_data
|= ((timings
[pio
][0] << 2) | timings
[pio
][1]) << 4;
134 pci_write_config_byte(dev
, 0x44, slave_data
);
137 idetm_data
|= 0x4000; /* Ensure SITRE is enabled */
138 pci_write_config_word(dev
, idetm_port
, idetm_data
);
142 * it8213_set_dmamode - Initialize host controller PATA DMA timings
143 * @ap: Port whose timings we are configuring
144 * @adev: Device to program
146 * Set UDMA/MWDMA mode for device, in host controller PCI config space.
147 * This device is basically an ICH alike.
150 * None (inherited from caller).
153 static void it8213_set_dmamode (struct ata_port
*ap
, struct ata_device
*adev
)
155 struct pci_dev
*dev
= to_pci_dev(ap
->host
->dev
);
157 u8 speed
= adev
->dma_mode
;
158 int devid
= adev
->devno
;
161 static const /* ISP RTC */
162 u8 timings
[][2] = { { 0, 0 },
168 pci_read_config_word(dev
, 0x40, &master_data
);
169 pci_read_config_byte(dev
, 0x48, &udma_enable
);
171 if (speed
>= XFER_UDMA_0
) {
172 unsigned int udma
= adev
->dma_mode
- XFER_UDMA_0
;
175 int u_clock
, u_speed
;
177 /* Clocks follow the PIIX style */
178 u_speed
= min(2 - (udma
& 1), udma
);
180 u_clock
= 0x1000; /* 100Mhz */
182 u_clock
= 1; /* 66Mhz */
184 u_clock
= 0; /* 33Mhz */
186 udma_enable
|= (1 << devid
);
188 /* Load the UDMA mode number */
189 pci_read_config_word(dev
, 0x4A, &udma_timing
);
190 udma_timing
&= ~(3 << (4 * devid
));
191 udma_timing
|= (udma
& 3) << (4 * devid
);
192 pci_write_config_word(dev
, 0x4A, udma_timing
);
194 /* Load the clock selection */
195 pci_read_config_word(dev
, 0x54, &ideconf
);
196 ideconf
&= ~(0x1001 << devid
);
197 ideconf
|= u_clock
<< devid
;
198 pci_write_config_word(dev
, 0x54, ideconf
);
201 * MWDMA is driven by the PIO timings. We must also enable
202 * IORDY unconditionally along with TIME1. PPE has already
203 * been set when the PIO timing was set.
205 unsigned int mwdma
= adev
->dma_mode
- XFER_MW_DMA_0
;
206 unsigned int control
;
208 static const unsigned int needed_pio
[3] = {
209 XFER_PIO_0
, XFER_PIO_3
, XFER_PIO_4
211 int pio
= needed_pio
[mwdma
] - XFER_PIO_0
;
213 control
= 3; /* IORDY|TIME1 */
215 /* If the drive MWDMA is faster than it can do PIO then
216 we must force PIO into PIO0 */
218 if (adev
->pio_mode
< needed_pio
[mwdma
])
219 /* Enable DMA timing only */
220 control
|= 8; /* PIO cycles in PIO0 */
222 if (devid
) { /* Slave */
223 master_data
&= 0xFF4F; /* Mask out IORDY|TIME1|DMAONLY */
224 master_data
|= control
<< 4;
225 pci_read_config_byte(dev
, 0x44, &slave_data
);
226 slave_data
&= (0x0F + 0xE1 * ap
->port_no
);
227 /* Load the matching timing */
228 slave_data
|= ((timings
[pio
][0] << 2) | timings
[pio
][1]) << (ap
->port_no
? 4 : 0);
229 pci_write_config_byte(dev
, 0x44, slave_data
);
230 } else { /* Master */
231 master_data
&= 0xCCF4; /* Mask out IORDY|TIME1|DMAONLY
232 and master timing bits */
233 master_data
|= control
;
235 (timings
[pio
][0] << 12) |
236 (timings
[pio
][1] << 8);
238 udma_enable
&= ~(1 << devid
);
239 pci_write_config_word(dev
, 0x40, master_data
);
241 pci_write_config_byte(dev
, 0x48, udma_enable
);
244 static struct scsi_host_template it8213_sht
= {
245 .module
= THIS_MODULE
,
247 .ioctl
= ata_scsi_ioctl
,
248 .queuecommand
= ata_scsi_queuecmd
,
249 .can_queue
= ATA_DEF_QUEUE
,
250 .this_id
= ATA_SHT_THIS_ID
,
251 .sg_tablesize
= LIBATA_MAX_PRD
,
252 .max_sectors
= ATA_MAX_SECTORS
,
253 .cmd_per_lun
= ATA_SHT_CMD_PER_LUN
,
254 .emulated
= ATA_SHT_EMULATED
,
255 .use_clustering
= ATA_SHT_USE_CLUSTERING
,
256 .proc_name
= DRV_NAME
,
257 .dma_boundary
= ATA_DMA_BOUNDARY
,
258 .slave_configure
= ata_scsi_slave_config
,
259 .bios_param
= ata_std_bios_param
,
262 static const struct ata_port_operations it8213_ops
= {
263 .port_disable
= ata_port_disable
,
264 .set_piomode
= it8213_set_piomode
,
265 .set_dmamode
= it8213_set_dmamode
,
266 .mode_filter
= ata_pci_default_filter
,
268 .tf_load
= ata_tf_load
,
269 .tf_read
= ata_tf_read
,
270 .check_status
= ata_check_status
,
271 .exec_command
= ata_exec_command
,
272 .dev_select
= ata_std_dev_select
,
274 .freeze
= ata_bmdma_freeze
,
275 .thaw
= ata_bmdma_thaw
,
276 .error_handler
= it8213_error_handler
,
277 .post_internal_cmd
= ata_bmdma_post_internal_cmd
,
278 .cable_detect
= it8213_cable_detect
,
280 .bmdma_setup
= ata_bmdma_setup
,
281 .bmdma_start
= ata_bmdma_start
,
282 .bmdma_stop
= ata_bmdma_stop
,
283 .bmdma_status
= ata_bmdma_status
,
284 .qc_prep
= ata_qc_prep
,
285 .qc_issue
= ata_qc_issue_prot
,
286 .data_xfer
= ata_data_xfer
,
288 .irq_handler
= ata_interrupt
,
289 .irq_clear
= ata_bmdma_irq_clear
,
290 .irq_on
= ata_irq_on
,
291 .irq_ack
= ata_irq_ack
,
293 .port_start
= ata_port_start
,
298 * it8213_init_one - Register 8213 ATA PCI device with kernel services
299 * @pdev: PCI device to register
300 * @ent: Entry in it8213_pci_tbl matching with @pdev
302 * Called from kernel PCI layer.
305 * Inherited from PCI layer (may sleep).
308 * Zero on success, or -ERRNO value.
311 static int it8213_init_one (struct pci_dev
*pdev
, const struct pci_device_id
*ent
)
313 static int printed_version
;
314 static const struct ata_port_info info
= {
316 .flags
= ATA_FLAG_SLAVE_POSS
,
317 .pio_mask
= 0x1f, /* pio0-4 */
318 .mwdma_mask
= 0x07, /* mwdma0-2 */
319 .udma_mask
= 0x1f, /* UDMA 100 */
320 .port_ops
= &it8213_ops
,
322 /* Current IT8213 stuff is single port */
323 const struct ata_port_info
*ppi
[] = { &info
, &ata_dummy_port_info
};
325 if (!printed_version
++)
326 dev_printk(KERN_DEBUG
, &pdev
->dev
,
327 "version " DRV_VERSION
"\n");
329 return ata_pci_init_one(pdev
, ppi
);
332 static const struct pci_device_id it8213_pci_tbl
[] = {
333 { PCI_VDEVICE(ITE
, PCI_DEVICE_ID_ITE_8213
), },
335 { } /* terminate list */
338 static struct pci_driver it8213_pci_driver
= {
340 .id_table
= it8213_pci_tbl
,
341 .probe
= it8213_init_one
,
342 .remove
= ata_pci_remove_one
,
344 .suspend
= ata_pci_device_suspend
,
345 .resume
= ata_pci_device_resume
,
349 static int __init
it8213_init(void)
351 return pci_register_driver(&it8213_pci_driver
);
354 static void __exit
it8213_exit(void)
356 pci_unregister_driver(&it8213_pci_driver
);
359 module_init(it8213_init
);
360 module_exit(it8213_exit
);
362 MODULE_AUTHOR("Alan Cox");
363 MODULE_DESCRIPTION("SCSI low-level driver for the ITE 8213");
364 MODULE_LICENSE("GPL");
365 MODULE_DEVICE_TABLE(pci
, it8213_pci_tbl
);
366 MODULE_VERSION(DRV_VERSION
);