DM9000: Show the MAC address source after printing MAC
[linux-2.6/zen-sources.git] / drivers / net / bfin_mac.c
blobc993a32b3f50c1b0389a90ee193aa7bb24e94ba4
1 /*
2 * Blackfin On-Chip MAC Driver
4 * Copyright 2004-2007 Analog Devices Inc.
6 * Enter bugs at http://blackfin.uclinux.org/
8 * Licensed under the GPL-2 or later.
9 */
11 #include <linux/init.h>
12 #include <linux/module.h>
13 #include <linux/kernel.h>
14 #include <linux/sched.h>
15 #include <linux/slab.h>
16 #include <linux/delay.h>
17 #include <linux/timer.h>
18 #include <linux/errno.h>
19 #include <linux/irq.h>
20 #include <linux/io.h>
21 #include <linux/ioport.h>
22 #include <linux/crc32.h>
23 #include <linux/device.h>
24 #include <linux/spinlock.h>
25 #include <linux/ethtool.h>
26 #include <linux/mii.h>
27 #include <linux/phy.h>
28 #include <linux/netdevice.h>
29 #include <linux/etherdevice.h>
30 #include <linux/skbuff.h>
31 #include <linux/platform_device.h>
33 #include <asm/dma.h>
34 #include <linux/dma-mapping.h>
36 #include <asm/blackfin.h>
37 #include <asm/cacheflush.h>
38 #include <asm/portmux.h>
40 #include "bfin_mac.h"
42 #define DRV_NAME "bfin_mac"
43 #define DRV_VERSION "1.1"
44 #define DRV_AUTHOR "Bryan Wu, Luke Yang"
45 #define DRV_DESC "Blackfin BF53[67] BF527 on-chip Ethernet MAC driver"
47 MODULE_AUTHOR(DRV_AUTHOR);
48 MODULE_LICENSE("GPL");
49 MODULE_DESCRIPTION(DRV_DESC);
51 #if defined(CONFIG_BFIN_MAC_USE_L1)
52 # define bfin_mac_alloc(dma_handle, size) l1_data_sram_zalloc(size)
53 # define bfin_mac_free(dma_handle, ptr) l1_data_sram_free(ptr)
54 #else
55 # define bfin_mac_alloc(dma_handle, size) \
56 dma_alloc_coherent(NULL, size, dma_handle, GFP_KERNEL)
57 # define bfin_mac_free(dma_handle, ptr) \
58 dma_free_coherent(NULL, sizeof(*ptr), ptr, dma_handle)
59 #endif
61 #define PKT_BUF_SZ 1580
63 #define MAX_TIMEOUT_CNT 500
65 /* pointers to maintain transmit list */
66 static struct net_dma_desc_tx *tx_list_head;
67 static struct net_dma_desc_tx *tx_list_tail;
68 static struct net_dma_desc_rx *rx_list_head;
69 static struct net_dma_desc_rx *rx_list_tail;
70 static struct net_dma_desc_rx *current_rx_ptr;
71 static struct net_dma_desc_tx *current_tx_ptr;
72 static struct net_dma_desc_tx *tx_desc;
73 static struct net_dma_desc_rx *rx_desc;
75 static void bf537mac_disable(void);
76 static void bf537mac_enable(void);
78 static void desc_list_free(void)
80 struct net_dma_desc_rx *r;
81 struct net_dma_desc_tx *t;
82 int i;
83 #if !defined(CONFIG_BFIN_MAC_USE_L1)
84 dma_addr_t dma_handle = 0;
85 #endif
87 if (tx_desc) {
88 t = tx_list_head;
89 for (i = 0; i < CONFIG_BFIN_TX_DESC_NUM; i++) {
90 if (t) {
91 if (t->skb) {
92 dev_kfree_skb(t->skb);
93 t->skb = NULL;
95 t = t->next;
98 bfin_mac_free(dma_handle, tx_desc);
101 if (rx_desc) {
102 r = rx_list_head;
103 for (i = 0; i < CONFIG_BFIN_RX_DESC_NUM; i++) {
104 if (r) {
105 if (r->skb) {
106 dev_kfree_skb(r->skb);
107 r->skb = NULL;
109 r = r->next;
112 bfin_mac_free(dma_handle, rx_desc);
116 static int desc_list_init(void)
118 int i;
119 struct sk_buff *new_skb;
120 #if !defined(CONFIG_BFIN_MAC_USE_L1)
122 * This dma_handle is useless in Blackfin dma_alloc_coherent().
123 * The real dma handler is the return value of dma_alloc_coherent().
125 dma_addr_t dma_handle;
126 #endif
128 tx_desc = bfin_mac_alloc(&dma_handle,
129 sizeof(struct net_dma_desc_tx) *
130 CONFIG_BFIN_TX_DESC_NUM);
131 if (tx_desc == NULL)
132 goto init_error;
134 rx_desc = bfin_mac_alloc(&dma_handle,
135 sizeof(struct net_dma_desc_rx) *
136 CONFIG_BFIN_RX_DESC_NUM);
137 if (rx_desc == NULL)
138 goto init_error;
140 /* init tx_list */
141 tx_list_head = tx_list_tail = tx_desc;
143 for (i = 0; i < CONFIG_BFIN_TX_DESC_NUM; i++) {
144 struct net_dma_desc_tx *t = tx_desc + i;
145 struct dma_descriptor *a = &(t->desc_a);
146 struct dma_descriptor *b = &(t->desc_b);
149 * disable DMA
150 * read from memory WNR = 0
151 * wordsize is 32 bits
152 * 6 half words is desc size
153 * large desc flow
155 a->config = WDSIZE_32 | NDSIZE_6 | DMAFLOW_LARGE;
156 a->start_addr = (unsigned long)t->packet;
157 a->x_count = 0;
158 a->next_dma_desc = b;
161 * enabled DMA
162 * write to memory WNR = 1
163 * wordsize is 32 bits
164 * disable interrupt
165 * 6 half words is desc size
166 * large desc flow
168 b->config = DMAEN | WNR | WDSIZE_32 | NDSIZE_6 | DMAFLOW_LARGE;
169 b->start_addr = (unsigned long)(&(t->status));
170 b->x_count = 0;
172 t->skb = NULL;
173 tx_list_tail->desc_b.next_dma_desc = a;
174 tx_list_tail->next = t;
175 tx_list_tail = t;
177 tx_list_tail->next = tx_list_head; /* tx_list is a circle */
178 tx_list_tail->desc_b.next_dma_desc = &(tx_list_head->desc_a);
179 current_tx_ptr = tx_list_head;
181 /* init rx_list */
182 rx_list_head = rx_list_tail = rx_desc;
184 for (i = 0; i < CONFIG_BFIN_RX_DESC_NUM; i++) {
185 struct net_dma_desc_rx *r = rx_desc + i;
186 struct dma_descriptor *a = &(r->desc_a);
187 struct dma_descriptor *b = &(r->desc_b);
189 /* allocate a new skb for next time receive */
190 new_skb = dev_alloc_skb(PKT_BUF_SZ + 2);
191 if (!new_skb) {
192 printk(KERN_NOTICE DRV_NAME
193 ": init: low on mem - packet dropped\n");
194 goto init_error;
196 skb_reserve(new_skb, 2);
197 r->skb = new_skb;
200 * enabled DMA
201 * write to memory WNR = 1
202 * wordsize is 32 bits
203 * disable interrupt
204 * 6 half words is desc size
205 * large desc flow
207 a->config = DMAEN | WNR | WDSIZE_32 | NDSIZE_6 | DMAFLOW_LARGE;
208 /* since RXDWA is enabled */
209 a->start_addr = (unsigned long)new_skb->data - 2;
210 a->x_count = 0;
211 a->next_dma_desc = b;
214 * enabled DMA
215 * write to memory WNR = 1
216 * wordsize is 32 bits
217 * enable interrupt
218 * 6 half words is desc size
219 * large desc flow
221 b->config = DMAEN | WNR | WDSIZE_32 | DI_EN |
222 NDSIZE_6 | DMAFLOW_LARGE;
223 b->start_addr = (unsigned long)(&(r->status));
224 b->x_count = 0;
226 rx_list_tail->desc_b.next_dma_desc = a;
227 rx_list_tail->next = r;
228 rx_list_tail = r;
230 rx_list_tail->next = rx_list_head; /* rx_list is a circle */
231 rx_list_tail->desc_b.next_dma_desc = &(rx_list_head->desc_a);
232 current_rx_ptr = rx_list_head;
234 return 0;
236 init_error:
237 desc_list_free();
238 printk(KERN_ERR DRV_NAME ": kmalloc failed\n");
239 return -ENOMEM;
243 /*---PHY CONTROL AND CONFIGURATION-----------------------------------------*/
245 /* Set FER regs to MUX in Ethernet pins */
246 static int setup_pin_mux(int action)
248 #if defined(CONFIG_BFIN_MAC_RMII)
249 u16 pin_req[] = P_RMII0;
250 #else
251 u16 pin_req[] = P_MII0;
252 #endif
254 if (action) {
255 if (peripheral_request_list(pin_req, DRV_NAME)) {
256 printk(KERN_ERR DRV_NAME
257 ": Requesting Peripherals failed\n");
258 return -EFAULT;
260 } else
261 peripheral_free_list(pin_req);
263 return 0;
267 * MII operations
269 /* Wait until the previous MDC/MDIO transaction has completed */
270 static void mdio_poll(void)
272 int timeout_cnt = MAX_TIMEOUT_CNT;
274 /* poll the STABUSY bit */
275 while ((bfin_read_EMAC_STAADD()) & STABUSY) {
276 udelay(1);
277 if (timeout_cnt-- < 0) {
278 printk(KERN_ERR DRV_NAME
279 ": wait MDC/MDIO transaction to complete timeout\n");
280 break;
285 /* Read an off-chip register in a PHY through the MDC/MDIO port */
286 static int mdiobus_read(struct mii_bus *bus, int phy_addr, int regnum)
288 mdio_poll();
290 /* read mode */
291 bfin_write_EMAC_STAADD(SET_PHYAD((u16) phy_addr) |
292 SET_REGAD((u16) regnum) |
293 STABUSY);
295 mdio_poll();
297 return (int) bfin_read_EMAC_STADAT();
300 /* Write an off-chip register in a PHY through the MDC/MDIO port */
301 static int mdiobus_write(struct mii_bus *bus, int phy_addr, int regnum,
302 u16 value)
304 mdio_poll();
306 bfin_write_EMAC_STADAT((u32) value);
308 /* write mode */
309 bfin_write_EMAC_STAADD(SET_PHYAD((u16) phy_addr) |
310 SET_REGAD((u16) regnum) |
311 STAOP |
312 STABUSY);
314 mdio_poll();
316 return 0;
319 static int mdiobus_reset(struct mii_bus *bus)
321 return 0;
324 static void bf537_adjust_link(struct net_device *dev)
326 struct bf537mac_local *lp = netdev_priv(dev);
327 struct phy_device *phydev = lp->phydev;
328 unsigned long flags;
329 int new_state = 0;
331 spin_lock_irqsave(&lp->lock, flags);
332 if (phydev->link) {
333 /* Now we make sure that we can be in full duplex mode.
334 * If not, we operate in half-duplex mode. */
335 if (phydev->duplex != lp->old_duplex) {
336 u32 opmode = bfin_read_EMAC_OPMODE();
337 new_state = 1;
339 if (phydev->duplex)
340 opmode |= FDMODE;
341 else
342 opmode &= ~(FDMODE);
344 bfin_write_EMAC_OPMODE(opmode);
345 lp->old_duplex = phydev->duplex;
348 if (phydev->speed != lp->old_speed) {
349 #if defined(CONFIG_BFIN_MAC_RMII)
350 u32 opmode = bfin_read_EMAC_OPMODE();
351 switch (phydev->speed) {
352 case 10:
353 opmode |= RMII_10;
354 break;
355 case 100:
356 opmode &= ~(RMII_10);
357 break;
358 default:
359 printk(KERN_WARNING
360 "%s: Ack! Speed (%d) is not 10/100!\n",
361 DRV_NAME, phydev->speed);
362 break;
364 bfin_write_EMAC_OPMODE(opmode);
365 #endif
367 new_state = 1;
368 lp->old_speed = phydev->speed;
371 if (!lp->old_link) {
372 new_state = 1;
373 lp->old_link = 1;
374 netif_schedule(dev);
376 } else if (lp->old_link) {
377 new_state = 1;
378 lp->old_link = 0;
379 lp->old_speed = 0;
380 lp->old_duplex = -1;
383 if (new_state) {
384 u32 opmode = bfin_read_EMAC_OPMODE();
385 phy_print_status(phydev);
386 pr_debug("EMAC_OPMODE = 0x%08x\n", opmode);
389 spin_unlock_irqrestore(&lp->lock, flags);
392 /* MDC = 2.5 MHz */
393 #define MDC_CLK 2500000
395 static int mii_probe(struct net_device *dev)
397 struct bf537mac_local *lp = netdev_priv(dev);
398 struct phy_device *phydev = NULL;
399 unsigned short sysctl;
400 int i;
401 u32 sclk, mdc_div;
403 /* Enable PHY output early */
404 if (!(bfin_read_VR_CTL() & PHYCLKOE))
405 bfin_write_VR_CTL(bfin_read_VR_CTL() | PHYCLKOE);
407 sclk = get_sclk();
408 mdc_div = ((sclk / MDC_CLK) / 2) - 1;
410 sysctl = bfin_read_EMAC_SYSCTL();
411 sysctl = (sysctl & ~MDCDIV) | SET_MDCDIV(mdc_div);
412 bfin_write_EMAC_SYSCTL(sysctl);
414 /* search for connect PHY device */
415 for (i = 0; i < PHY_MAX_ADDR; i++) {
416 struct phy_device *const tmp_phydev = lp->mii_bus.phy_map[i];
418 if (!tmp_phydev)
419 continue; /* no PHY here... */
421 phydev = tmp_phydev;
422 break; /* found it */
425 /* now we are supposed to have a proper phydev, to attach to... */
426 if (!phydev) {
427 printk(KERN_INFO "%s: Don't found any phy device at all\n",
428 dev->name);
429 return -ENODEV;
432 #if defined(CONFIG_BFIN_MAC_RMII)
433 phydev = phy_connect(dev, phydev->dev.bus_id, &bf537_adjust_link, 0,
434 PHY_INTERFACE_MODE_RMII);
435 #else
436 phydev = phy_connect(dev, phydev->dev.bus_id, &bf537_adjust_link, 0,
437 PHY_INTERFACE_MODE_MII);
438 #endif
440 if (IS_ERR(phydev)) {
441 printk(KERN_ERR "%s: Could not attach to PHY\n", dev->name);
442 return PTR_ERR(phydev);
445 /* mask with MAC supported features */
446 phydev->supported &= (SUPPORTED_10baseT_Half
447 | SUPPORTED_10baseT_Full
448 | SUPPORTED_100baseT_Half
449 | SUPPORTED_100baseT_Full
450 | SUPPORTED_Autoneg
451 | SUPPORTED_Pause | SUPPORTED_Asym_Pause
452 | SUPPORTED_MII
453 | SUPPORTED_TP);
455 phydev->advertising = phydev->supported;
457 lp->old_link = 0;
458 lp->old_speed = 0;
459 lp->old_duplex = -1;
460 lp->phydev = phydev;
462 printk(KERN_INFO "%s: attached PHY driver [%s] "
463 "(mii_bus:phy_addr=%s, irq=%d, mdc_clk=%dHz(mdc_div=%d)"
464 "@sclk=%dMHz)\n",
465 DRV_NAME, phydev->drv->name, phydev->dev.bus_id, phydev->irq,
466 MDC_CLK, mdc_div, sclk/1000000);
468 return 0;
471 /**************************************************************************/
472 void setup_system_regs(struct net_device *dev)
474 unsigned short sysctl;
477 * Odd word alignment for Receive Frame DMA word
478 * Configure checksum support and rcve frame word alignment
480 sysctl = bfin_read_EMAC_SYSCTL();
481 #if defined(BFIN_MAC_CSUM_OFFLOAD)
482 sysctl |= RXDWA | RXCKS;
483 #else
484 sysctl |= RXDWA;
485 #endif
486 bfin_write_EMAC_SYSCTL(sysctl);
488 bfin_write_EMAC_MMC_CTL(RSTC | CROLL);
490 /* Initialize the TX DMA channel registers */
491 bfin_write_DMA2_X_COUNT(0);
492 bfin_write_DMA2_X_MODIFY(4);
493 bfin_write_DMA2_Y_COUNT(0);
494 bfin_write_DMA2_Y_MODIFY(0);
496 /* Initialize the RX DMA channel registers */
497 bfin_write_DMA1_X_COUNT(0);
498 bfin_write_DMA1_X_MODIFY(4);
499 bfin_write_DMA1_Y_COUNT(0);
500 bfin_write_DMA1_Y_MODIFY(0);
503 static void setup_mac_addr(u8 *mac_addr)
505 u32 addr_low = le32_to_cpu(*(__le32 *) & mac_addr[0]);
506 u16 addr_hi = le16_to_cpu(*(__le16 *) & mac_addr[4]);
508 /* this depends on a little-endian machine */
509 bfin_write_EMAC_ADDRLO(addr_low);
510 bfin_write_EMAC_ADDRHI(addr_hi);
513 static int bf537mac_set_mac_address(struct net_device *dev, void *p)
515 struct sockaddr *addr = p;
516 if (netif_running(dev))
517 return -EBUSY;
518 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
519 setup_mac_addr(dev->dev_addr);
520 return 0;
523 static void adjust_tx_list(void)
525 int timeout_cnt = MAX_TIMEOUT_CNT;
527 if (tx_list_head->status.status_word != 0
528 && current_tx_ptr != tx_list_head) {
529 goto adjust_head; /* released something, just return; */
533 * if nothing released, check wait condition
534 * current's next can not be the head,
535 * otherwise the dma will not stop as we want
537 if (current_tx_ptr->next->next == tx_list_head) {
538 while (tx_list_head->status.status_word == 0) {
539 mdelay(1);
540 if (tx_list_head->status.status_word != 0
541 || !(bfin_read_DMA2_IRQ_STATUS() & 0x08)) {
542 goto adjust_head;
544 if (timeout_cnt-- < 0) {
545 printk(KERN_ERR DRV_NAME
546 ": wait for adjust tx list head timeout\n");
547 break;
550 if (tx_list_head->status.status_word != 0) {
551 goto adjust_head;
555 return;
557 adjust_head:
558 do {
559 tx_list_head->desc_a.config &= ~DMAEN;
560 tx_list_head->status.status_word = 0;
561 if (tx_list_head->skb) {
562 dev_kfree_skb(tx_list_head->skb);
563 tx_list_head->skb = NULL;
564 } else {
565 printk(KERN_ERR DRV_NAME
566 ": no sk_buff in a transmitted frame!\n");
568 tx_list_head = tx_list_head->next;
569 } while (tx_list_head->status.status_word != 0
570 && current_tx_ptr != tx_list_head);
571 return;
575 static int bf537mac_hard_start_xmit(struct sk_buff *skb,
576 struct net_device *dev)
578 struct bf537mac_local *lp = netdev_priv(dev);
579 unsigned int data;
581 current_tx_ptr->skb = skb;
584 * Is skb->data always 16-bit aligned?
585 * Do we need to memcpy((char *)(tail->packet + 2), skb->data, len)?
587 if ((((unsigned int)(skb->data)) & 0x02) == 2) {
588 /* move skb->data to current_tx_ptr payload */
589 data = (unsigned int)(skb->data) - 2;
590 *((unsigned short *)data) = (unsigned short)(skb->len);
591 current_tx_ptr->desc_a.start_addr = (unsigned long)data;
592 /* this is important! */
593 blackfin_dcache_flush_range(data, (data + (skb->len)) + 2);
595 } else {
596 *((unsigned short *)(current_tx_ptr->packet)) =
597 (unsigned short)(skb->len);
598 memcpy((char *)(current_tx_ptr->packet + 2), skb->data,
599 (skb->len));
600 current_tx_ptr->desc_a.start_addr =
601 (unsigned long)current_tx_ptr->packet;
602 if (current_tx_ptr->status.status_word != 0)
603 current_tx_ptr->status.status_word = 0;
604 blackfin_dcache_flush_range((unsigned int)current_tx_ptr->
605 packet,
606 (unsigned int)(current_tx_ptr->
607 packet + skb->len) +
611 /* enable this packet's dma */
612 current_tx_ptr->desc_a.config |= DMAEN;
614 /* tx dma is running, just return */
615 if (bfin_read_DMA2_IRQ_STATUS() & 0x08)
616 goto out;
618 /* tx dma is not running */
619 bfin_write_DMA2_NEXT_DESC_PTR(&(current_tx_ptr->desc_a));
620 /* dma enabled, read from memory, size is 6 */
621 bfin_write_DMA2_CONFIG(current_tx_ptr->desc_a.config);
622 /* Turn on the EMAC tx */
623 bfin_write_EMAC_OPMODE(bfin_read_EMAC_OPMODE() | TE);
625 out:
626 adjust_tx_list();
627 current_tx_ptr = current_tx_ptr->next;
628 dev->trans_start = jiffies;
629 dev->stats.tx_packets++;
630 dev->stats.tx_bytes += (skb->len);
631 return 0;
634 static void bf537mac_rx(struct net_device *dev)
636 struct sk_buff *skb, *new_skb;
637 struct bf537mac_local *lp = netdev_priv(dev);
638 unsigned short len;
640 /* allocate a new skb for next time receive */
641 skb = current_rx_ptr->skb;
642 new_skb = dev_alloc_skb(PKT_BUF_SZ + 2);
643 if (!new_skb) {
644 printk(KERN_NOTICE DRV_NAME
645 ": rx: low on mem - packet dropped\n");
646 dev->stats.rx_dropped++;
647 goto out;
649 /* reserve 2 bytes for RXDWA padding */
650 skb_reserve(new_skb, 2);
651 current_rx_ptr->skb = new_skb;
652 current_rx_ptr->desc_a.start_addr = (unsigned long)new_skb->data - 2;
654 /* Invidate the data cache of skb->data range when it is write back
655 * cache. It will prevent overwritting the new data from DMA
657 blackfin_dcache_invalidate_range((unsigned long)new_skb->head,
658 (unsigned long)new_skb->end);
660 len = (unsigned short)((current_rx_ptr->status.status_word) & RX_FRLEN);
661 skb_put(skb, len);
662 blackfin_dcache_invalidate_range((unsigned long)skb->head,
663 (unsigned long)skb->tail);
665 dev->last_rx = jiffies;
666 skb->dev = dev;
667 skb->protocol = eth_type_trans(skb, dev);
668 #if defined(BFIN_MAC_CSUM_OFFLOAD)
669 skb->csum = current_rx_ptr->status.ip_payload_csum;
670 skb->ip_summed = CHECKSUM_COMPLETE;
671 #endif
673 netif_rx(skb);
674 dev->stats.rx_packets++;
675 dev->stats.rx_bytes += len;
676 current_rx_ptr->status.status_word = 0x00000000;
677 current_rx_ptr = current_rx_ptr->next;
679 out:
680 return;
683 /* interrupt routine to handle rx and error signal */
684 static irqreturn_t bf537mac_interrupt(int irq, void *dev_id)
686 struct net_device *dev = dev_id;
687 int number = 0;
689 get_one_packet:
690 if (current_rx_ptr->status.status_word == 0) {
691 /* no more new packet received */
692 if (number == 0) {
693 if (current_rx_ptr->next->status.status_word != 0) {
694 current_rx_ptr = current_rx_ptr->next;
695 goto real_rx;
698 bfin_write_DMA1_IRQ_STATUS(bfin_read_DMA1_IRQ_STATUS() |
699 DMA_DONE | DMA_ERR);
700 return IRQ_HANDLED;
703 real_rx:
704 bf537mac_rx(dev);
705 number++;
706 goto get_one_packet;
709 #ifdef CONFIG_NET_POLL_CONTROLLER
710 static void bf537mac_poll(struct net_device *dev)
712 disable_irq(IRQ_MAC_RX);
713 bf537mac_interrupt(IRQ_MAC_RX, dev);
714 enable_irq(IRQ_MAC_RX);
716 #endif /* CONFIG_NET_POLL_CONTROLLER */
718 static void bf537mac_disable(void)
720 unsigned int opmode;
722 opmode = bfin_read_EMAC_OPMODE();
723 opmode &= (~RE);
724 opmode &= (~TE);
725 /* Turn off the EMAC */
726 bfin_write_EMAC_OPMODE(opmode);
730 * Enable Interrupts, Receive, and Transmit
732 static void bf537mac_enable(void)
734 u32 opmode;
736 pr_debug("%s: %s\n", DRV_NAME, __FUNCTION__);
738 /* Set RX DMA */
739 bfin_write_DMA1_NEXT_DESC_PTR(&(rx_list_head->desc_a));
740 bfin_write_DMA1_CONFIG(rx_list_head->desc_a.config);
742 /* Wait MII done */
743 mdio_poll();
745 /* We enable only RX here */
746 /* ASTP : Enable Automatic Pad Stripping
747 PR : Promiscuous Mode for test
748 PSF : Receive frames with total length less than 64 bytes.
749 FDMODE : Full Duplex Mode
750 LB : Internal Loopback for test
751 RE : Receiver Enable */
752 opmode = bfin_read_EMAC_OPMODE();
753 if (opmode & FDMODE)
754 opmode |= PSF;
755 else
756 opmode |= DRO | DC | PSF;
757 opmode |= RE;
759 #if defined(CONFIG_BFIN_MAC_RMII)
760 opmode |= RMII; /* For Now only 100MBit are supported */
761 #if (defined(CONFIG_BF537) || defined(CONFIG_BF536)) && CONFIG_BF_REV_0_2
762 opmode |= TE;
763 #endif
764 #endif
765 /* Turn on the EMAC rx */
766 bfin_write_EMAC_OPMODE(opmode);
769 /* Our watchdog timed out. Called by the networking layer */
770 static void bf537mac_timeout(struct net_device *dev)
772 pr_debug("%s: %s\n", dev->name, __FUNCTION__);
774 bf537mac_disable();
776 /* reset tx queue */
777 tx_list_tail = tx_list_head->next;
779 bf537mac_enable();
781 /* We can accept TX packets again */
782 dev->trans_start = jiffies;
783 netif_wake_queue(dev);
786 static void bf537mac_multicast_hash(struct net_device *dev)
788 u32 emac_hashhi, emac_hashlo;
789 struct dev_mc_list *dmi = dev->mc_list;
790 char *addrs;
791 int i;
792 u32 crc;
794 emac_hashhi = emac_hashlo = 0;
796 for (i = 0; i < dev->mc_count; i++) {
797 addrs = dmi->dmi_addr;
798 dmi = dmi->next;
800 /* skip non-multicast addresses */
801 if (!(*addrs & 1))
802 continue;
804 crc = ether_crc(ETH_ALEN, addrs);
805 crc >>= 26;
807 if (crc & 0x20)
808 emac_hashhi |= 1 << (crc & 0x1f);
809 else
810 emac_hashlo |= 1 << (crc & 0x1f);
813 bfin_write_EMAC_HASHHI(emac_hashhi);
814 bfin_write_EMAC_HASHLO(emac_hashlo);
816 return;
820 * This routine will, depending on the values passed to it,
821 * either make it accept multicast packets, go into
822 * promiscuous mode (for TCPDUMP and cousins) or accept
823 * a select set of multicast packets
825 static void bf537mac_set_multicast_list(struct net_device *dev)
827 u32 sysctl;
829 if (dev->flags & IFF_PROMISC) {
830 printk(KERN_INFO "%s: set to promisc mode\n", dev->name);
831 sysctl = bfin_read_EMAC_OPMODE();
832 sysctl |= RAF;
833 bfin_write_EMAC_OPMODE(sysctl);
834 } else if (dev->flags & IFF_ALLMULTI) {
835 /* accept all multicast */
836 sysctl = bfin_read_EMAC_OPMODE();
837 sysctl |= PAM;
838 bfin_write_EMAC_OPMODE(sysctl);
839 } else if (dev->mc_count) {
840 /* set up multicast hash table */
841 sysctl = bfin_read_EMAC_OPMODE();
842 sysctl |= HM;
843 bfin_write_EMAC_OPMODE(sysctl);
844 bf537mac_multicast_hash(dev);
845 } else {
846 /* clear promisc or multicast mode */
847 sysctl = bfin_read_EMAC_OPMODE();
848 sysctl &= ~(RAF | PAM);
849 bfin_write_EMAC_OPMODE(sysctl);
854 * this puts the device in an inactive state
856 static void bf537mac_shutdown(struct net_device *dev)
858 /* Turn off the EMAC */
859 bfin_write_EMAC_OPMODE(0x00000000);
860 /* Turn off the EMAC RX DMA */
861 bfin_write_DMA1_CONFIG(0x0000);
862 bfin_write_DMA2_CONFIG(0x0000);
866 * Open and Initialize the interface
868 * Set up everything, reset the card, etc..
870 static int bf537mac_open(struct net_device *dev)
872 struct bf537mac_local *lp = netdev_priv(dev);
873 int retval;
874 pr_debug("%s: %s\n", dev->name, __FUNCTION__);
877 * Check that the address is valid. If its not, refuse
878 * to bring the device up. The user must specify an
879 * address using ifconfig eth0 hw ether xx:xx:xx:xx:xx:xx
881 if (!is_valid_ether_addr(dev->dev_addr)) {
882 printk(KERN_WARNING DRV_NAME ": no valid ethernet hw addr\n");
883 return -EINVAL;
886 /* initial rx and tx list */
887 retval = desc_list_init();
889 if (retval)
890 return retval;
892 phy_start(lp->phydev);
893 phy_write(lp->phydev, MII_BMCR, BMCR_RESET);
894 setup_system_regs(dev);
895 bf537mac_disable();
896 bf537mac_enable();
897 pr_debug("hardware init finished\n");
898 netif_start_queue(dev);
899 netif_carrier_on(dev);
901 return 0;
906 * this makes the board clean up everything that it can
907 * and not talk to the outside world. Caused by
908 * an 'ifconfig ethX down'
910 static int bf537mac_close(struct net_device *dev)
912 struct bf537mac_local *lp = netdev_priv(dev);
913 pr_debug("%s: %s\n", dev->name, __FUNCTION__);
915 netif_stop_queue(dev);
916 netif_carrier_off(dev);
918 phy_stop(lp->phydev);
919 phy_write(lp->phydev, MII_BMCR, BMCR_PDOWN);
921 /* clear everything */
922 bf537mac_shutdown(dev);
924 /* free the rx/tx buffers */
925 desc_list_free();
927 return 0;
930 static int __init bf537mac_probe(struct net_device *dev)
932 struct bf537mac_local *lp = netdev_priv(dev);
933 int retval;
934 int i;
936 /* Grab the MAC address in the MAC */
937 *(__le32 *) (&(dev->dev_addr[0])) = cpu_to_le32(bfin_read_EMAC_ADDRLO());
938 *(__le16 *) (&(dev->dev_addr[4])) = cpu_to_le16((u16) bfin_read_EMAC_ADDRHI());
940 /* probe mac */
941 /*todo: how to proble? which is revision_register */
942 bfin_write_EMAC_ADDRLO(0x12345678);
943 if (bfin_read_EMAC_ADDRLO() != 0x12345678) {
944 pr_debug("can't detect bf537 mac!\n");
945 retval = -ENODEV;
946 goto err_out;
949 /* set the GPIO pins to Ethernet mode */
950 retval = setup_pin_mux(1);
951 if (retval)
952 return retval;
954 /*Is it valid? (Did bootloader initialize it?) */
955 if (!is_valid_ether_addr(dev->dev_addr)) {
956 /* Grab the MAC from the board somehow - this is done in the
957 arch/blackfin/mach-bf537/boards/eth_mac.c */
958 bfin_get_ether_addr(dev->dev_addr);
961 /* If still not valid, get a random one */
962 if (!is_valid_ether_addr(dev->dev_addr)) {
963 random_ether_addr(dev->dev_addr);
966 setup_mac_addr(dev->dev_addr);
968 /* MDIO bus initial */
969 lp->mii_bus.priv = dev;
970 lp->mii_bus.read = mdiobus_read;
971 lp->mii_bus.write = mdiobus_write;
972 lp->mii_bus.reset = mdiobus_reset;
973 lp->mii_bus.name = "bfin_mac_mdio";
974 lp->mii_bus.id = 0;
975 lp->mii_bus.irq = kmalloc(sizeof(int)*PHY_MAX_ADDR, GFP_KERNEL);
976 for (i = 0; i < PHY_MAX_ADDR; ++i)
977 lp->mii_bus.irq[i] = PHY_POLL;
979 mdiobus_register(&lp->mii_bus);
981 retval = mii_probe(dev);
982 if (retval)
983 return retval;
985 /* Fill in the fields of the device structure with ethernet values. */
986 ether_setup(dev);
988 dev->open = bf537mac_open;
989 dev->stop = bf537mac_close;
990 dev->hard_start_xmit = bf537mac_hard_start_xmit;
991 dev->set_mac_address = bf537mac_set_mac_address;
992 dev->tx_timeout = bf537mac_timeout;
993 dev->set_multicast_list = bf537mac_set_multicast_list;
994 #ifdef CONFIG_NET_POLL_CONTROLLER
995 dev->poll_controller = bf537mac_poll;
996 #endif
998 spin_lock_init(&lp->lock);
1000 /* now, enable interrupts */
1001 /* register irq handler */
1002 if (request_irq
1003 (IRQ_MAC_RX, bf537mac_interrupt, IRQF_DISABLED | IRQF_SHARED,
1004 "EMAC_RX", dev)) {
1005 printk(KERN_WARNING DRV_NAME
1006 ": Unable to attach BlackFin MAC RX interrupt\n");
1007 return -EBUSY;
1011 retval = register_netdev(dev);
1012 if (retval == 0) {
1013 /* now, print out the card info, in a short format.. */
1014 printk(KERN_INFO "%s: Version %s, %s\n",
1015 DRV_NAME, DRV_VERSION, DRV_DESC);
1018 err_out:
1019 return retval;
1022 static int bfin_mac_probe(struct platform_device *pdev)
1024 struct net_device *ndev;
1026 ndev = alloc_etherdev(sizeof(struct bf537mac_local));
1027 if (!ndev) {
1028 printk(KERN_WARNING DRV_NAME ": could not allocate device\n");
1029 return -ENOMEM;
1032 SET_NETDEV_DEV(ndev, &pdev->dev);
1034 platform_set_drvdata(pdev, ndev);
1036 if (bf537mac_probe(ndev) != 0) {
1037 platform_set_drvdata(pdev, NULL);
1038 free_netdev(ndev);
1039 printk(KERN_WARNING DRV_NAME ": not found\n");
1040 return -ENODEV;
1043 return 0;
1046 static int bfin_mac_remove(struct platform_device *pdev)
1048 struct net_device *ndev = platform_get_drvdata(pdev);
1050 platform_set_drvdata(pdev, NULL);
1052 unregister_netdev(ndev);
1054 free_irq(IRQ_MAC_RX, ndev);
1056 free_netdev(ndev);
1058 setup_pin_mux(0);
1060 return 0;
1063 #ifdef CONFIG_PM
1064 static int bfin_mac_suspend(struct platform_device *pdev, pm_message_t mesg)
1066 struct net_device *net_dev = platform_get_drvdata(pdev);
1068 if (netif_running(net_dev))
1069 bf537mac_close(net_dev);
1071 return 0;
1074 static int bfin_mac_resume(struct platform_device *pdev)
1076 struct net_device *net_dev = platform_get_drvdata(pdev);
1078 if (netif_running(net_dev))
1079 bf537mac_open(net_dev);
1081 return 0;
1083 #else
1084 #define bfin_mac_suspend NULL
1085 #define bfin_mac_resume NULL
1086 #endif /* CONFIG_PM */
1088 static struct platform_driver bfin_mac_driver = {
1089 .probe = bfin_mac_probe,
1090 .remove = bfin_mac_remove,
1091 .resume = bfin_mac_resume,
1092 .suspend = bfin_mac_suspend,
1093 .driver = {
1094 .name = DRV_NAME,
1098 static int __init bfin_mac_init(void)
1100 return platform_driver_register(&bfin_mac_driver);
1103 module_init(bfin_mac_init);
1105 static void __exit bfin_mac_cleanup(void)
1107 platform_driver_unregister(&bfin_mac_driver);
1110 module_exit(bfin_mac_cleanup);