| blob | 52d67d394107f5fe57d3a29f14aada25008aec27 |
1 /* $Id: ttable.h,v 1.18 2002/02/09 19:49:32 davem Exp $ */
2 #ifndef _SPARC64_TTABLE_H
3 #define _SPARC64_TTABLE_H
5 #include <asm/utrap.h>
7 #ifdef __ASSEMBLY__
8 #include <asm/thread_info.h>
9 #endif
11 #define BOOT_KERNEL b sparc64_boot; nop; nop; nop; nop; nop; nop; nop;
13 /* We need a "cleaned" instruction... */
14 #define CLEAN_WINDOW \
15 rdpr %cleanwin, %l0; add %l0, 1, %l0; \
16 wrpr %l0, 0x0, %cleanwin; \
17 clr %o0; clr %o1; clr %o2; clr %o3; \
18 clr %o4; clr %o5; clr %o6; clr %o7; \
19 clr %l0; clr %l1; clr %l2; clr %l3; \
20 clr %l4; clr %l5; clr %l6; clr %l7; \
21 retry; \
22 nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;
24 #define TRAP(routine) \
25 sethi %hi(109f), %g7; \
26 ba,pt %xcc, etrap; \
27 109: or %g7, %lo(109b), %g7; \
28 call routine; \
29 add %sp, PTREGS_OFF, %o0; \
30 ba,pt %xcc, rtrap; \
31 nop; \
32 nop;
34 #define TRAP_7INSNS(routine) \
35 sethi %hi(109f), %g7; \
36 ba,pt %xcc, etrap; \
37 109: or %g7, %lo(109b), %g7; \
38 call routine; \
39 add %sp, PTREGS_OFF, %o0; \
40 ba,pt %xcc, rtrap; \
41 nop;
43 #define TRAP_SAVEFPU(routine) \
44 sethi %hi(109f), %g7; \
45 ba,pt %xcc, do_fptrap; \
46 109: or %g7, %lo(109b), %g7; \
47 call routine; \
48 add %sp, PTREGS_OFF, %o0; \
49 ba,pt %xcc, rtrap; \
50 nop; \
51 nop;
53 #define TRAP_NOSAVE(routine) \
54 ba,pt %xcc, routine; \
55 nop; \
56 nop; nop; nop; nop; nop; nop;
58 #define TRAP_NOSAVE_7INSNS(routine) \
59 ba,pt %xcc, routine; \
60 nop; \
61 nop; nop; nop; nop; nop;
63 #define TRAPTL1(routine) \
64 sethi %hi(109f), %g7; \
65 ba,pt %xcc, etraptl1; \
66 109: or %g7, %lo(109b), %g7; \
67 call routine; \
68 add %sp, PTREGS_OFF, %o0; \
69 ba,pt %xcc, rtrap; \
70 nop; \
71 nop;
73 #define TRAP_ARG(routine, arg) \
74 sethi %hi(109f), %g7; \
75 ba,pt %xcc, etrap; \
76 109: or %g7, %lo(109b), %g7; \
77 add %sp, PTREGS_OFF, %o0; \
78 call routine; \
79 mov arg, %o1; \
80 ba,pt %xcc, rtrap; \
81 nop;
83 #define TRAPTL1_ARG(routine, arg) \
84 sethi %hi(109f), %g7; \
85 ba,pt %xcc, etraptl1; \
86 109: or %g7, %lo(109b), %g7; \
87 add %sp, PTREGS_OFF, %o0; \
88 call routine; \
89 mov arg, %o1; \
90 ba,pt %xcc, rtrap; \
91 nop;
93 #define SYSCALL_TRAP(routine, systbl) \
94 rdpr %pil, %g2; \
95 mov TSTATE_SYSCALL, %g3; \
96 sethi %hi(109f), %g7; \
97 ba,pt %xcc, etrap_syscall; \
98 109: or %g7, %lo(109b), %g7; \
99 sethi %hi(systbl), %l7; \
100 ba,pt %xcc, routine; \
101 or %l7, %lo(systbl), %l7;
103 #define TRAP_UTRAP(handler,lvl) \
104 mov handler, %g3; \
105 ba,pt %xcc, utrap_trap; \
106 mov lvl, %g4; \
107 nop; \
108 nop; \
109 nop; \
110 nop; \
111 nop;
113 #ifdef CONFIG_COMPAT
114 #define LINUX_32BIT_SYSCALL_TRAP SYSCALL_TRAP(linux_sparc_syscall32, sys_call_table32)
115 #else
116 #define LINUX_32BIT_SYSCALL_TRAP BTRAP(0x110)
117 #endif
118 #define LINUX_64BIT_SYSCALL_TRAP SYSCALL_TRAP(linux_sparc_syscall, sys_call_table64)
119 #define GETCC_TRAP TRAP(getcc)
120 #define SETCC_TRAP TRAP(setcc)
121 #define BREAKPOINT_TRAP TRAP(breakpoint_trap)
123 #ifdef CONFIG_TRACE_IRQFLAGS
125 #define TRAP_IRQ(routine, level) \
126 rdpr %pil, %g2; \
127 wrpr %g0, 15, %pil; \
128 sethi %hi(1f-4), %g7; \
129 ba,pt %xcc, etrap_irq; \
130 or %g7, %lo(1f-4), %g7; \
131 nop; \
132 nop; \
133 nop; \
134 .subsection 2; \
135 1: call trace_hardirqs_off; \
136 nop; \
137 mov level, %o0; \
138 call routine; \
139 add %sp, PTREGS_OFF, %o1; \
140 ba,a,pt %xcc, rtrap_irq; \
141 .previous;
143 #else
145 #define TRAP_IRQ(routine, level) \
146 rdpr %pil, %g2; \
147 wrpr %g0, 15, %pil; \
148 ba,pt %xcc, etrap_irq; \
149 rd %pc, %g7; \
150 mov level, %o0; \
151 call routine; \
152 add %sp, PTREGS_OFF, %o1; \
153 ba,a,pt %xcc, rtrap_irq;
155 #endif
157 #define TRAP_IVEC TRAP_NOSAVE(do_ivec)
159 #define BTRAP(lvl) TRAP_ARG(bad_trap, lvl)
161 #define BTRAPTL1(lvl) TRAPTL1_ARG(bad_trap_tl1, lvl)
163 #define FLUSH_WINDOW_TRAP \
164 ba,pt %xcc, etrap; \
165 rd %pc, %g7; \
166 flushw; \
167 ldx [%sp + PTREGS_OFF + PT_V9_TNPC], %l1; \
168 add %l1, 4, %l2; \
169 stx %l1, [%sp + PTREGS_OFF + PT_V9_TPC]; \
170 ba,pt %xcc, rtrap; \
171 stx %l2, [%sp + PTREGS_OFF + PT_V9_TNPC];
173 #ifdef CONFIG_KPROBES
174 #define KPROBES_TRAP(lvl) TRAP_IRQ(kprobe_trap, lvl)
175 #else
176 #define KPROBES_TRAP(lvl) TRAP_ARG(bad_trap, lvl)
177 #endif
179 #ifdef CONFIG_KGDB
180 #define KGDB_TRAP(lvl) TRAP_IRQ(kgdb_trap, lvl)
181 #else
182 #define KGDB_TRAP(lvl) TRAP_ARG(bad_trap, lvl)
183 #endif
185 #define SUN4V_ITSB_MISS \
186 ldxa [%g0] ASI_SCRATCHPAD, %g2; \
187 ldx [%g2 + HV_FAULT_I_ADDR_OFFSET], %g4; \
188 ldx [%g2 + HV_FAULT_I_CTX_OFFSET], %g5; \
189 srlx %g4, 22, %g6; \
190 ba,pt %xcc, sun4v_itsb_miss; \
191 nop; \
192 nop; \
193 nop;
195 #define SUN4V_DTSB_MISS \
196 ldxa [%g0] ASI_SCRATCHPAD, %g2; \
197 ldx [%g2 + HV_FAULT_D_ADDR_OFFSET], %g4; \
198 ldx [%g2 + HV_FAULT_D_CTX_OFFSET], %g5; \
199 srlx %g4, 22, %g6; \
200 ba,pt %xcc, sun4v_dtsb_miss; \
201 nop; \
202 nop; \
203 nop;
205 /* Before touching these macros, you owe it to yourself to go and
206 * see how arch/sparc64/kernel/winfixup.S works... -DaveM
207 *
208 * For the user cases we used to use the %asi register, but
209 * it turns out that the "wr xxx, %asi" costs ~5 cycles, so
210 * now we use immediate ASI loads and stores instead. Kudos
211 * to Greg Onufer for pointing out this performance anomaly.
212 *
213 * Further note that we cannot use the g2, g4, g5, and g7 alternate
214 * globals in the spill routines, check out the save instruction in
215 * arch/sparc64/kernel/etrap.S to see what I mean about g2, and
216 * g4/g5 are the globals which are preserved by etrap processing
217 * for the caller of it. The g7 register is the return pc for
218 * etrap. Finally, g6 is the current thread register so we cannot
219 * us it in the spill handlers either. Most of these rules do not
220 * apply to fill processing, only g6 is not usable.
221 */
223 /* Normal kernel spill */
224 #define SPILL_0_NORMAL \
225 stx %l0, [%sp + STACK_BIAS + 0x00]; \
226 stx %l1, [%sp + STACK_BIAS + 0x08]; \
227 stx %l2, [%sp + STACK_BIAS + 0x10]; \
228 stx %l3, [%sp + STACK_BIAS + 0x18]; \
229 stx %l4, [%sp + STACK_BIAS + 0x20]; \
230 stx %l5, [%sp + STACK_BIAS + 0x28]; \
231 stx %l6, [%sp + STACK_BIAS + 0x30]; \
232 stx %l7, [%sp + STACK_BIAS + 0x38]; \
233 stx %i0, [%sp + STACK_BIAS + 0x40]; \
234 stx %i1, [%sp + STACK_BIAS + 0x48]; \
235 stx %i2, [%sp + STACK_BIAS + 0x50]; \
236 stx %i3, [%sp + STACK_BIAS + 0x58]; \
237 stx %i4, [%sp + STACK_BIAS + 0x60]; \
238 stx %i5, [%sp + STACK_BIAS + 0x68]; \
239 stx %i6, [%sp + STACK_BIAS + 0x70]; \
240 stx %i7, [%sp + STACK_BIAS + 0x78]; \
241 saved; retry; nop; nop; nop; nop; nop; nop; \
242 nop; nop; nop; nop; nop; nop; nop; nop;
244 #define SPILL_0_NORMAL_ETRAP \
245 etrap_kernel_spill: \
246 stx %l0, [%sp + STACK_BIAS + 0x00]; \
247 stx %l1, [%sp + STACK_BIAS + 0x08]; \
248 stx %l2, [%sp + STACK_BIAS + 0x10]; \
249 stx %l3, [%sp + STACK_BIAS + 0x18]; \
250 stx %l4, [%sp + STACK_BIAS + 0x20]; \
251 stx %l5, [%sp + STACK_BIAS + 0x28]; \
252 stx %l6, [%sp + STACK_BIAS + 0x30]; \
253 stx %l7, [%sp + STACK_BIAS + 0x38]; \
254 stx %i0, [%sp + STACK_BIAS + 0x40]; \
255 stx %i1, [%sp + STACK_BIAS + 0x48]; \
256 stx %i2, [%sp + STACK_BIAS + 0x50]; \
257 stx %i3, [%sp + STACK_BIAS + 0x58]; \
258 stx %i4, [%sp + STACK_BIAS + 0x60]; \
259 stx %i5, [%sp + STACK_BIAS + 0x68]; \
260 stx %i6, [%sp + STACK_BIAS + 0x70]; \
261 stx %i7, [%sp + STACK_BIAS + 0x78]; \
262 saved; \
263 sub %g1, 2, %g1; \
264 ba,pt %xcc, etrap_save; \
265 wrpr %g1, %cwp; \
266 nop; nop; nop; nop; nop; nop; nop; nop; \
267 nop; nop; nop; nop;
269 /* Normal 64bit spill */
270 #define SPILL_1_GENERIC(ASI) \
271 add %sp, STACK_BIAS + 0x00, %g1; \
272 stxa %l0, [%g1 + %g0] ASI; \
273 mov 0x08, %g3; \
274 stxa %l1, [%g1 + %g3] ASI; \
275 add %g1, 0x10, %g1; \
276 stxa %l2, [%g1 + %g0] ASI; \
277 stxa %l3, [%g1 + %g3] ASI; \
278 add %g1, 0x10, %g1; \
279 stxa %l4, [%g1 + %g0] ASI; \
280 stxa %l5, [%g1 + %g3] ASI; \
281 add %g1, 0x10, %g1; \
282 stxa %l6, [%g1 + %g0] ASI; \
283 stxa %l7, [%g1 + %g3] ASI; \
284 add %g1, 0x10, %g1; \
285 stxa %i0, [%g1 + %g0] ASI; \
286 stxa %i1, [%g1 + %g3] ASI; \
287 add %g1, 0x10, %g1; \
288 stxa %i2, [%g1 + %g0] ASI; \
289 stxa %i3, [%g1 + %g3] ASI; \
290 add %g1, 0x10, %g1; \
291 stxa %i4, [%g1 + %g0] ASI; \
292 stxa %i5, [%g1 + %g3] ASI; \
293 add %g1, 0x10, %g1; \
294 stxa %i6, [%g1 + %g0] ASI; \
295 stxa %i7, [%g1 + %g3] ASI; \
296 saved; \
297 retry; nop; nop; \
298 b,a,pt %xcc, spill_fixup_dax; \
299 b,a,pt %xcc, spill_fixup_mna; \
300 b,a,pt %xcc, spill_fixup;
302 #define SPILL_1_GENERIC_ETRAP \
303 etrap_user_spill_64bit: \
304 stxa %l0, [%sp + STACK_BIAS + 0x00] %asi; \
305 stxa %l1, [%sp + STACK_BIAS + 0x08] %asi; \
306 stxa %l2, [%sp + STACK_BIAS + 0x10] %asi; \
307 stxa %l3, [%sp + STACK_BIAS + 0x18] %asi; \
308 stxa %l4, [%sp + STACK_BIAS + 0x20] %asi; \
309 stxa %l5, [%sp + STACK_BIAS + 0x28] %asi; \
310 stxa %l6, [%sp + STACK_BIAS + 0x30] %asi; \
311 stxa %l7, [%sp + STACK_BIAS + 0x38] %asi; \
312 stxa %i0, [%sp + STACK_BIAS + 0x40] %asi; \
313 stxa %i1, [%sp + STACK_BIAS + 0x48] %asi; \
314 stxa %i2, [%sp + STACK_BIAS + 0x50] %asi; \
315 stxa %i3, [%sp + STACK_BIAS + 0x58] %asi; \
316 stxa %i4, [%sp + STACK_BIAS + 0x60] %asi; \
317 stxa %i5, [%sp + STACK_BIAS + 0x68] %asi; \
318 stxa %i6, [%sp + STACK_BIAS + 0x70] %asi; \
319 stxa %i7, [%sp + STACK_BIAS + 0x78] %asi; \
320 saved; \
321 sub %g1, 2, %g1; \
322 ba,pt %xcc, etrap_save; \
323 wrpr %g1, %cwp; \
324 nop; nop; nop; nop; nop; \
325 nop; nop; nop; nop; \
326 ba,a,pt %xcc, etrap_spill_fixup_64bit; \
327 ba,a,pt %xcc, etrap_spill_fixup_64bit; \
328 ba,a,pt %xcc, etrap_spill_fixup_64bit;
330 #define SPILL_1_GENERIC_ETRAP_FIXUP \
331 etrap_spill_fixup_64bit: \
332 ldub [%g6 + TI_WSAVED], %g1; \
333 sll %g1, 3, %g3; \
334 add %g6, %g3, %g3; \
335 stx %sp, [%g3 + TI_RWIN_SPTRS]; \
336 sll %g1, 7, %g3; \
337 add %g6, %g3, %g3; \
338 stx %l0, [%g3 + TI_REG_WINDOW + 0x00]; \
339 stx %l1, [%g3 + TI_REG_WINDOW + 0x08]; \
340 stx %l2, [%g3 + TI_REG_WINDOW + 0x10]; \
341 stx %l3, [%g3 + TI_REG_WINDOW + 0x18]; \
342 stx %l4, [%g3 + TI_REG_WINDOW + 0x20]; \
343 stx %l5, [%g3 + TI_REG_WINDOW + 0x28]; \
344 stx %l6, [%g3 + TI_REG_WINDOW + 0x30]; \
345 stx %l7, [%g3 + TI_REG_WINDOW + 0x38]; \
346 stx %i0, [%g3 + TI_REG_WINDOW + 0x40]; \
347 stx %i1, [%g3 + TI_REG_WINDOW + 0x48]; \
348 stx %i2, [%g3 + TI_REG_WINDOW + 0x50]; \
349 stx %i3, [%g3 + TI_REG_WINDOW + 0x58]; \
350 stx %i4, [%g3 + TI_REG_WINDOW + 0x60]; \
351 stx %i5, [%g3 + TI_REG_WINDOW + 0x68]; \
352 stx %i6, [%g3 + TI_REG_WINDOW + 0x70]; \
353 stx %i7, [%g3 + TI_REG_WINDOW + 0x78]; \
354 add %g1, 1, %g1; \
355 stb %g1, [%g6 + TI_WSAVED]; \
356 saved; \
357 rdpr %cwp, %g1; \
358 sub %g1, 2, %g1; \
359 ba,pt %xcc, etrap_save; \
360 wrpr %g1, %cwp; \
361 nop; nop; nop
363 /* Normal 32bit spill */
364 #define SPILL_2_GENERIC(ASI) \
365 srl %sp, 0, %sp; \
366 stwa %l0, [%sp + %g0] ASI; \
367 mov 0x04, %g3; \
368 stwa %l1, [%sp + %g3] ASI; \
369 add %sp, 0x08, %g1; \
370 stwa %l2, [%g1 + %g0] ASI; \
371 stwa %l3, [%g1 + %g3] ASI; \
372 add %g1, 0x08, %g1; \
373 stwa %l4, [%g1 + %g0] ASI; \
374 stwa %l5, [%g1 + %g3] ASI; \
375 add %g1, 0x08, %g1; \
376 stwa %l6, [%g1 + %g0] ASI; \
377 stwa %l7, [%g1 + %g3] ASI; \
378 add %g1, 0x08, %g1; \
379 stwa %i0, [%g1 + %g0] ASI; \
380 stwa %i1, [%g1 + %g3] ASI; \
381 add %g1, 0x08, %g1; \
382 stwa %i2, [%g1 + %g0] ASI; \
383 stwa %i3, [%g1 + %g3] ASI; \
384 add %g1, 0x08, %g1; \
385 stwa %i4, [%g1 + %g0] ASI; \
386 stwa %i5, [%g1 + %g3] ASI; \
387 add %g1, 0x08, %g1; \
388 stwa %i6, [%g1 + %g0] ASI; \
389 stwa %i7, [%g1 + %g3] ASI; \
390 saved; \
391 retry; nop; nop; \
392 b,a,pt %xcc, spill_fixup_dax; \
393 b,a,pt %xcc, spill_fixup_mna; \
394 b,a,pt %xcc, spill_fixup;
396 #define SPILL_2_GENERIC_ETRAP \
397 etrap_user_spill_32bit: \
398 srl %sp, 0, %sp; \
399 stwa %l0, [%sp + 0x00] %asi; \
400 stwa %l1, [%sp + 0x04] %asi; \
401 stwa %l2, [%sp + 0x08] %asi; \
402 stwa %l3, [%sp + 0x0c] %asi; \
403 stwa %l4, [%sp + 0x10] %asi; \
404 stwa %l5, [%sp + 0x14] %asi; \
405 stwa %l6, [%sp + 0x18] %asi; \
406 stwa %l7, [%sp + 0x1c] %asi; \
407 stwa %i0, [%sp + 0x20] %asi; \
408 stwa %i1, [%sp + 0x24] %asi; \
409 stwa %i2, [%sp + 0x28] %asi; \
410 stwa %i3, [%sp + 0x2c] %asi; \
411 stwa %i4, [%sp + 0x30] %asi; \
412 stwa %i5, [%sp + 0x34] %asi; \
413 stwa %i6, [%sp + 0x38] %asi; \
414 stwa %i7, [%sp + 0x3c] %asi; \
415 saved; \
416 sub %g1, 2, %g1; \
417 ba,pt %xcc, etrap_save; \
418 wrpr %g1, %cwp; \
419 nop; nop; nop; nop; \
420 nop; nop; nop; nop; \
421 ba,a,pt %xcc, etrap_spill_fixup_32bit; \
422 ba,a,pt %xcc, etrap_spill_fixup_32bit; \
423 ba,a,pt %xcc, etrap_spill_fixup_32bit;
425 #define SPILL_2_GENERIC_ETRAP_FIXUP \
426 etrap_spill_fixup_32bit: \
427 ldub [%g6 + TI_WSAVED], %g1; \
428 sll %g1, 3, %g3; \
429 add %g6, %g3, %g3; \
430 stx %sp, [%g3 + TI_RWIN_SPTRS]; \
431 sll %g1, 7, %g3; \
432 add %g6, %g3, %g3; \
433 stw %l0, [%g3 + TI_REG_WINDOW + 0x00]; \
434 stw %l1, [%g3 + TI_REG_WINDOW + 0x04]; \
435 stw %l2, [%g3 + TI_REG_WINDOW + 0x08]; \
436 stw %l3, [%g3 + TI_REG_WINDOW + 0x0c]; \
437 stw %l4, [%g3 + TI_REG_WINDOW + 0x10]; \
438 stw %l5, [%g3 + TI_REG_WINDOW + 0x14]; \
439 stw %l6, [%g3 + TI_REG_WINDOW + 0x18]; \
440 stw %l7, [%g3 + TI_REG_WINDOW + 0x1c]; \
441 stw %i0, [%g3 + TI_REG_WINDOW + 0x20]; \
442 stw %i1, [%g3 + TI_REG_WINDOW + 0x24]; \
443 stw %i2, [%g3 + TI_REG_WINDOW + 0x28]; \
444 stw %i3, [%g3 + TI_REG_WINDOW + 0x2c]; \
445 stw %i4, [%g3 + TI_REG_WINDOW + 0x30]; \
446 stw %i5, [%g3 + TI_REG_WINDOW + 0x34]; \
447 stw %i6, [%g3 + TI_REG_WINDOW + 0x38]; \
448 stw %i7, [%g3 + TI_REG_WINDOW + 0x3c]; \
449 add %g1, 1, %g1; \
450 stb %g1, [%g6 + TI_WSAVED]; \
451 saved; \
452 rdpr %cwp, %g1; \
453 sub %g1, 2, %g1; \
454 ba,pt %xcc, etrap_save; \
455 wrpr %g1, %cwp; \
456 nop; nop; nop
458 #define SPILL_1_NORMAL SPILL_1_GENERIC(ASI_AIUP)
459 #define SPILL_2_NORMAL SPILL_2_GENERIC(ASI_AIUP)
460 #define SPILL_3_NORMAL SPILL_0_NORMAL
461 #define SPILL_4_NORMAL SPILL_0_NORMAL
462 #define SPILL_5_NORMAL SPILL_0_NORMAL
463 #define SPILL_6_NORMAL SPILL_0_NORMAL
464 #define SPILL_7_NORMAL SPILL_0_NORMAL
466 #define SPILL_0_OTHER SPILL_0_NORMAL
467 #define SPILL_1_OTHER SPILL_1_GENERIC(ASI_AIUS)
468 #define SPILL_2_OTHER SPILL_2_GENERIC(ASI_AIUS)
469 #define SPILL_3_OTHER SPILL_3_NORMAL
470 #define SPILL_4_OTHER SPILL_4_NORMAL
471 #define SPILL_5_OTHER SPILL_5_NORMAL
472 #define SPILL_6_OTHER SPILL_6_NORMAL
473 #define SPILL_7_OTHER SPILL_7_NORMAL
475 /* Normal kernel fill */
476 #define FILL_0_NORMAL \
477 ldx [%sp + STACK_BIAS + 0x00], %l0; \
478 ldx [%sp + STACK_BIAS + 0x08], %l1; \
479 ldx [%sp + STACK_BIAS + 0x10], %l2; \
480 ldx [%sp + STACK_BIAS + 0x18], %l3; \
481 ldx [%sp + STACK_BIAS + 0x20], %l4; \
482 ldx [%sp + STACK_BIAS + 0x28], %l5; \
483 ldx [%sp + STACK_BIAS + 0x30], %l6; \
484 ldx [%sp + STACK_BIAS + 0x38], %l7; \
485 ldx [%sp + STACK_BIAS + 0x40], %i0; \
486 ldx [%sp + STACK_BIAS + 0x48], %i1; \
487 ldx [%sp + STACK_BIAS + 0x50], %i2; \
488 ldx [%sp + STACK_BIAS + 0x58], %i3; \
489 ldx [%sp + STACK_BIAS + 0x60], %i4; \
490 ldx [%sp + STACK_BIAS + 0x68], %i5; \
491 ldx [%sp + STACK_BIAS + 0x70], %i6; \
492 ldx [%sp + STACK_BIAS + 0x78], %i7; \
493 restored; retry; nop; nop; nop; nop; nop; nop; \
494 nop; nop; nop; nop; nop; nop; nop; nop;
496 #define FILL_0_NORMAL_RTRAP \
497 kern_rtt_fill: \
498 rdpr %cwp, %g1; \
499 sub %g1, 1, %g1; \
500 wrpr %g1, %cwp; \
501 ldx [%sp + STACK_BIAS + 0x00], %l0; \
502 ldx [%sp + STACK_BIAS + 0x08], %l1; \
503 ldx [%sp + STACK_BIAS + 0x10], %l2; \
504 ldx [%sp + STACK_BIAS + 0x18], %l3; \
505 ldx [%sp + STACK_BIAS + 0x20], %l4; \
506 ldx [%sp + STACK_BIAS + 0x28], %l5; \
507 ldx [%sp + STACK_BIAS + 0x30], %l6; \
508 ldx [%sp + STACK_BIAS + 0x38], %l7; \
509 ldx [%sp + STACK_BIAS + 0x40], %i0; \
510 ldx [%sp + STACK_BIAS + 0x48], %i1; \
511 ldx [%sp + STACK_BIAS + 0x50], %i2; \
512 ldx [%sp + STACK_BIAS + 0x58], %i3; \
513 ldx [%sp + STACK_BIAS + 0x60], %i4; \
514 ldx [%sp + STACK_BIAS + 0x68], %i5; \
515 ldx [%sp + STACK_BIAS + 0x70], %i6; \
516 ldx [%sp + STACK_BIAS + 0x78], %i7; \
517 restored; \
518 add %g1, 1, %g1; \
519 ba,pt %xcc, kern_rtt_restore; \
520 wrpr %g1, %cwp; \
521 nop; nop; nop; nop; nop; \
522 nop; nop; nop; nop;
525 /* Normal 64bit fill */
526 #define FILL_1_GENERIC(ASI) \
527 add %sp, STACK_BIAS + 0x00, %g1; \
528 ldxa [%g1 + %g0] ASI, %l0; \
529 mov 0x08, %g2; \
530 mov 0x10, %g3; \
531 ldxa [%g1 + %g2] ASI, %l1; \
532 mov 0x18, %g5; \
533 ldxa [%g1 + %g3] ASI, %l2; \
534 ldxa [%g1 + %g5] ASI, %l3; \
535 add %g1, 0x20, %g1; \
536 ldxa [%g1 + %g0] ASI, %l4; \
537 ldxa [%g1 + %g2] ASI, %l5; \
538 ldxa [%g1 + %g3] ASI, %l6; \
539 ldxa [%g1 + %g5] ASI, %l7; \
540 add %g1, 0x20, %g1; \
541 ldxa [%g1 + %g0] ASI, %i0; \
542 ldxa [%g1 + %g2] ASI, %i1; \
543 ldxa [%g1 + %g3] ASI, %i2; \
544 ldxa [%g1 + %g5] ASI, %i3; \
545 add %g1, 0x20, %g1; \
546 ldxa [%g1 + %g0] ASI, %i4; \
547 ldxa [%g1 + %g2] ASI, %i5; \
548 ldxa [%g1 + %g3] ASI, %i6; \
549 ldxa [%g1 + %g5] ASI, %i7; \
550 restored; \
551 retry; nop; nop; nop; nop; \
552 b,a,pt %xcc, fill_fixup_dax; \
553 b,a,pt %xcc, fill_fixup_mna; \
554 b,a,pt %xcc, fill_fixup;
556 #define FILL_1_GENERIC_RTRAP \
557 user_rtt_fill_64bit: \
558 ldxa [%sp + STACK_BIAS + 0x00] %asi, %l0; \
559 ldxa [%sp + STACK_BIAS + 0x08] %asi, %l1; \
560 ldxa [%sp + STACK_BIAS + 0x10] %asi, %l2; \
561 ldxa [%sp + STACK_BIAS + 0x18] %asi, %l3; \
562 ldxa [%sp + STACK_BIAS + 0x20] %asi, %l4; \
563 ldxa [%sp + STACK_BIAS + 0x28] %asi, %l5; \
564 ldxa [%sp + STACK_BIAS + 0x30] %asi, %l6; \
565 ldxa [%sp + STACK_BIAS + 0x38] %asi, %l7; \
566 ldxa [%sp + STACK_BIAS + 0x40] %asi, %i0; \
567 ldxa [%sp + STACK_BIAS + 0x48] %asi, %i1; \
568 ldxa [%sp + STACK_BIAS + 0x50] %asi, %i2; \
569 ldxa [%sp + STACK_BIAS + 0x58] %asi, %i3; \
570 ldxa [%sp + STACK_BIAS + 0x60] %asi, %i4; \
571 ldxa [%sp + STACK_BIAS + 0x68] %asi, %i5; \
572 ldxa [%sp + STACK_BIAS + 0x70] %asi, %i6; \
573 ldxa [%sp + STACK_BIAS + 0x78] %asi, %i7; \
574 ba,pt %xcc, user_rtt_pre_restore; \
575 restored; \
576 nop; nop; nop; nop; nop; nop; \
577 nop; nop; nop; nop; nop; \
578 ba,a,pt %xcc, user_rtt_fill_fixup; \
579 ba,a,pt %xcc, user_rtt_fill_fixup; \
580 ba,a,pt %xcc, user_rtt_fill_fixup;
583 /* Normal 32bit fill */
584 #define FILL_2_GENERIC(ASI) \
585 srl %sp, 0, %sp; \
586 lduwa [%sp + %g0] ASI, %l0; \
587 mov 0x04, %g2; \
588 mov 0x08, %g3; \
589 lduwa [%sp + %g2] ASI, %l1; \
590 mov 0x0c, %g5; \
591 lduwa [%sp + %g3] ASI, %l2; \
592 lduwa [%sp + %g5] ASI, %l3; \
593 add %sp, 0x10, %g1; \
594 lduwa [%g1 + %g0] ASI, %l4; \
595 lduwa [%g1 + %g2] ASI, %l5; \
596 lduwa [%g1 + %g3] ASI, %l6; \
597 lduwa [%g1 + %g5] ASI, %l7; \
598 add %g1, 0x10, %g1; \
599 lduwa [%g1 + %g0] ASI, %i0; \
600 lduwa [%g1 + %g2] ASI, %i1; \
601 lduwa [%g1 + %g3] ASI, %i2; \
602 lduwa [%g1 + %g5] ASI, %i3; \
603 add %g1, 0x10, %g1; \
604 lduwa [%g1 + %g0] ASI, %i4; \
605 lduwa [%g1 + %g2] ASI, %i5; \
606 lduwa [%g1 + %g3] ASI, %i6; \
607 lduwa [%g1 + %g5] ASI, %i7; \
608 restored; \
609 retry; nop; nop; nop; nop; \
610 b,a,pt %xcc, fill_fixup_dax; \
611 b,a,pt %xcc, fill_fixup_mna; \
612 b,a,pt %xcc, fill_fixup;
614 #define FILL_2_GENERIC_RTRAP \
615 user_rtt_fill_32bit: \
616 srl %sp, 0, %sp; \
617 lduwa [%sp + 0x00] %asi, %l0; \
618 lduwa [%sp + 0x04] %asi, %l1; \
619 lduwa [%sp + 0x08] %asi, %l2; \
620 lduwa [%sp + 0x0c] %asi, %l3; \
621 lduwa [%sp + 0x10] %asi, %l4; \
622 lduwa [%sp + 0x14] %asi, %l5; \
623 lduwa [%sp + 0x18] %asi, %l6; \
624 lduwa [%sp + 0x1c] %asi, %l7; \
625 lduwa [%sp + 0x20] %asi, %i0; \
626 lduwa [%sp + 0x24] %asi, %i1; \
627 lduwa [%sp + 0x28] %asi, %i2; \
628 lduwa [%sp + 0x2c] %asi, %i3; \
629 lduwa [%sp + 0x30] %asi, %i4; \
630 lduwa [%sp + 0x34] %asi, %i5; \
631 lduwa [%sp + 0x38] %asi, %i6; \
632 lduwa [%sp + 0x3c] %asi, %i7; \
633 ba,pt %xcc, user_rtt_pre_restore; \
634 restored; \
635 nop; nop; nop; nop; nop; \
636 nop; nop; nop; nop; nop; \
637 ba,a,pt %xcc, user_rtt_fill_fixup; \
638 ba,a,pt %xcc, user_rtt_fill_fixup; \
639 ba,a,pt %xcc, user_rtt_fill_fixup;
642 #define FILL_1_NORMAL FILL_1_GENERIC(ASI_AIUP)
643 #define FILL_2_NORMAL FILL_2_GENERIC(ASI_AIUP)
644 #define FILL_3_NORMAL FILL_0_NORMAL
645 #define FILL_4_NORMAL FILL_0_NORMAL
646 #define FILL_5_NORMAL FILL_0_NORMAL
647 #define FILL_6_NORMAL FILL_0_NORMAL
648 #define FILL_7_NORMAL FILL_0_NORMAL
650 #define FILL_0_OTHER FILL_0_NORMAL
651 #define FILL_1_OTHER FILL_1_GENERIC(ASI_AIUS)
652 #define FILL_2_OTHER FILL_2_GENERIC(ASI_AIUS)
653 #define FILL_3_OTHER FILL_3_NORMAL
654 #define FILL_4_OTHER FILL_4_NORMAL
655 #define FILL_5_OTHER FILL_5_NORMAL
656 #define FILL_6_OTHER FILL_6_NORMAL
657 #define FILL_7_OTHER FILL_7_NORMAL