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Linux 2.6.28-rc7
[linux-2.6/zen-sources.git] / drivers / staging / slicoss / slicoss.c
blob8fa9490b3e2ca707320e3ccafc28d21089a07b26
1 /**************************************************************************
2 *
3 * Copyright 2000-2006 Alacritech, Inc. All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above
12 * copyright notice, this list of conditions and the following
13 * disclaimer in the documentation and/or other materials provided
14 * with the distribution.
15 *
16 * Alternatively, this software may be distributed under the terms of the
17 * GNU General Public License ("GPL") version 2 as published by the Free
18 * Software Foundation.
19 *
20 * THIS SOFTWARE IS PROVIDED BY ALACRITECH, INC. ``AS IS'' AND ANY
21 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL ALACRITECH, INC. OR
24 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
25 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
26 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
27 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
28 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
29 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
30 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31 * SUCH DAMAGE.
32 *
33 * The views and conclusions contained in the software and documentation
34 * are those of the authors and should not be interpreted as representing
35 * official policies, either expressed or implied, of Alacritech, Inc.
36 *
37 **************************************************************************/
38
39 /*
40 * FILENAME: slicoss.c
41 *
42 * The SLICOSS driver for Alacritech's IS-NIC products.
43 *
44 * This driver is supposed to support:
45 *
46 * Mojave cards (single port PCI Gigabit) both copper and fiber
47 * Oasis cards (single and dual port PCI-x Gigabit) copper and fiber
48 * Kalahari cards (dual and quad port PCI-e Gigabit) copper and fiber
49 *
50 * The driver was acutally tested on Oasis and Kalahari cards.
51 *
52 *
53 * NOTE: This is the standard, non-accelerated version of Alacritech's
54 * IS-NIC driver.
55 */
56
57
58 #define SLIC_DUMP_ENABLED 0
59 #define KLUDGE_FOR_4GB_BOUNDARY 1
60 #define DEBUG_MICROCODE 1
61 #define SLIC_PRODUCTION_BUILD 1
62 #define SLIC_FAILURE_RESET 1
63 #define DBG 1
64 #define SLIC_ASSERT_ENABLED 1
65 #define SLIC_GET_STATS_ENABLED 1
66 #define SLIC_GET_STATS_TIMER_ENABLED 0
67 #define SLIC_PING_TIMER_ENABLED 1
68 #define SLIC_POWER_MANAGEMENT_ENABLED 0
69 #define SLIC_INTERRUPT_PROCESS_LIMIT 1
70 #define LINUX_FREES_ADAPTER_RESOURCES 1
71 #define SLIC_OFFLOAD_IP_CHECKSUM 1
72 #define STATS_TIMER_INTERVAL 2
73 #define PING_TIMER_INTERVAL 1
74
75 #include <linux/kernel.h>
76 #include <linux/string.h>
77 #include <linux/errno.h>
78 #include <linux/ioport.h>
79 #include <linux/slab.h>
80 #include <linux/interrupt.h>
81 #include <linux/timer.h>
82 #include <linux/pci.h>
83 #include <linux/spinlock.h>
84 #include <linux/init.h>
85 #include <linux/bitops.h>
86 #include <linux/io.h>
87 #include <linux/netdevice.h>
88 #include <linux/etherdevice.h>
89 #include <linux/skbuff.h>
90 #include <linux/delay.h>
91 #include <linux/debugfs.h>
92 #include <linux/seq_file.h>
93 #include <linux/kthread.h>
94 #include <linux/module.h>
95 #include <linux/moduleparam.h>
96
97 #include <linux/types.h>
98 #include <linux/dma-mapping.h>
99 #include <linux/mii.h>
100 #include <linux/if_vlan.h>
101 #include <asm/unaligned.h>
102
103 #include <linux/ethtool.h>
104 #define SLIC_ETHTOOL_SUPPORT 1
105
106 #include <linux/uaccess.h>
107 #include "slicinc.h"
108 #include "gbdownload.h"
109 #include "gbrcvucode.h"
110 #include "oasisrcvucode.h"
111
112 #ifdef DEBUG_MICROCODE
113 #include "oasisdbgdownload.h"
114 #else
115 #include "oasisdownload.h"
116 #endif
117
118 #if SLIC_DUMP_ENABLED
119 #include "slicdump.h"
120 #endif
121
122 #define SLIC_POWER_MANAGEMENT 0
123
124 static uint slic_first_init = 1;
125 static char *slic_banner = "Alacritech SLIC Technology(tm) Server "\
126 "and Storage Accelerator (Non-Accelerated)\n";
127
128 static char *slic_proc_version = "2.0.351 2006/07/14 12:26:00";
129 static char *slic_product_name = "SLIC Technology(tm) Server "\
130 "and Storage Accelerator (Non-Accelerated)";
131 static char *slic_vendor = "Alacritech, Inc.";
132
133 static int slic_debug = 1;
134 static int debug = -1;
135 static struct net_device *head_netdevice;
136
137 static struct base_driver slic_global = { {}, 0, 0, 0, 1, NULL, NULL };
138 static int intagg_delay = 100;
139 static u32 dynamic_intagg;
140 static int errormsg;
141 static int goodmsg;
142 static unsigned int rcv_count;
143 static struct dentry *slic_debugfs;
144
145 #define DRV_NAME "slicoss"
146 #define DRV_VERSION "2.0.1"
147 #define DRV_AUTHOR "Alacritech, Inc. Engineering"
148 #define DRV_DESCRIPTION "Alacritech SLIC Techonology(tm) "\
149 "Non-Accelerated Driver"
150 #define DRV_COPYRIGHT "Copyright 2000-2006 Alacritech, Inc. "\
151 "All rights reserved."
152 #define PFX DRV_NAME " "
153
154 MODULE_AUTHOR(DRV_AUTHOR);
155 MODULE_DESCRIPTION(DRV_DESCRIPTION);
156 MODULE_LICENSE("Dual BSD/GPL");
157
158 module_param(dynamic_intagg, int, 0);
159 MODULE_PARM_DESC(dynamic_intagg, "Dynamic Interrupt Aggregation Setting");
160 module_param(intagg_delay, int, 0);
161 MODULE_PARM_DESC(intagg_delay, "uSec Interrupt Aggregation Delay");
162
163 static struct pci_device_id slic_pci_tbl[] __devinitdata = {
164 {PCI_VENDOR_ID_ALACRITECH,
165 SLIC_1GB_DEVICE_ID,
166 PCI_ANY_ID, PCI_ANY_ID,},
167 {PCI_VENDOR_ID_ALACRITECH,
168 SLIC_2GB_DEVICE_ID,
169 PCI_ANY_ID, PCI_ANY_ID,},
170 {0,}
171 };
172
173 MODULE_DEVICE_TABLE(pci, slic_pci_tbl);
174
175 #define SLIC_GET_SLIC_HANDLE(_adapter, _pslic_handle) \
176 { \
177 spin_lock_irqsave(&_adapter->handle_lock.lock, \
178 _adapter->handle_lock.flags); \
179 _pslic_handle = _adapter->pfree_slic_handles; \
180 if (_pslic_handle) { \
181 ASSERT(_pslic_handle->type == SLIC_HANDLE_FREE); \
182 _adapter->pfree_slic_handles = _pslic_handle->next; \
183 } \
184 spin_unlock_irqrestore(&_adapter->handle_lock.lock, \
185 _adapter->handle_lock.flags); \
186 }
187
188 #define SLIC_FREE_SLIC_HANDLE(_adapter, _pslic_handle) \
189 { \
190 _pslic_handle->type = SLIC_HANDLE_FREE; \
191 spin_lock_irqsave(&_adapter->handle_lock.lock, \
192 _adapter->handle_lock.flags); \
193 _pslic_handle->next = _adapter->pfree_slic_handles; \
194 _adapter->pfree_slic_handles = _pslic_handle; \
195 spin_unlock_irqrestore(&_adapter->handle_lock.lock, \
196 _adapter->handle_lock.flags); \
197 }
198
199 static void slic_debug_init(void);
200 static void slic_debug_cleanup(void);
201 static void slic_debug_adapter_create(struct adapter *adapter);
202 static void slic_debug_adapter_destroy(struct adapter *adapter);
203 static void slic_debug_card_create(struct sliccard *card);
204 static void slic_debug_card_destroy(struct sliccard *card);
205
206 static inline void slic_reg32_write(void __iomem *reg, u32 value, uint flush)
207 {
208 writel(value, reg);
209 if (flush)
210 mb();
211 }
212
213 static inline void slic_reg64_write(struct adapter *adapter,
214 void __iomem *reg,
215 u32 value,
216 void __iomem *regh, u32 paddrh, uint flush)
217 {
218 spin_lock_irqsave(&adapter->bit64reglock.lock,
219 adapter->bit64reglock.flags);
220 if (paddrh != adapter->curaddrupper) {
221 adapter->curaddrupper = paddrh;
222 writel(paddrh, regh);
223 }
224 writel(value, reg);
225 if (flush)
226 mb();
227 spin_unlock_irqrestore(&adapter->bit64reglock.lock,
228 adapter->bit64reglock.flags);
229 }
230
231 static void slic_init_driver(void)
232 {
233 if (slic_first_init) {
234 DBG_MSG("slicoss: %s slic_first_init set jiffies[%lx]\n",
235 __func__, jiffies);
236 slic_first_init = 0;
237 spin_lock_init(&slic_global.driver_lock.lock);
238 slic_debug_init();
239 }
240 }
241
242 static void slic_dbg_macaddrs(struct adapter *adapter)
243 {
244 DBG_MSG(" (%s) curr %2.2X:%2.2X:%2.2X:%2.2X:%2.2X:%2.2X\n",
245 adapter->netdev->name, adapter->currmacaddr[0],
246 adapter->currmacaddr[1], adapter->currmacaddr[2],
247 adapter->currmacaddr[3], adapter->currmacaddr[4],
248 adapter->currmacaddr[5]);
249 DBG_MSG(" (%s) mac %2.2X:%2.2X:%2.2X:%2.2X:%2.2X:%2.2X\n",
250 adapter->netdev->name, adapter->macaddr[0],
251 adapter->macaddr[1], adapter->macaddr[2],
252 adapter->macaddr[3], adapter->macaddr[4], adapter->macaddr[5]);
253 return;
254 }
255
256 #ifdef DEBUG_REGISTER_TRACE
257 static void slic_dbg_register_trace(struct adapter *adapter,
258 struct sliccard *card)
259 {
260 uint i;
261
262 DBG_ERROR("Dump Register Write Trace: curr_ix == %d\n", card->debug_ix);
263 for (i = 0; i < 32; i++) {
264 DBG_ERROR("%2d %d %4x %x %x\n",
265 i, card->reg_type[i], card->reg_offset[i],
266 card->reg_value[i], card->reg_valueh[i]);
267 }
268 }
269 #endif
270
271 static void slic_init_adapter(struct net_device *netdev,
272 struct pci_dev *pcidev,
273 const struct pci_device_id *pci_tbl_entry,
274 void __iomem *memaddr, int chip_idx)
275 {
276 ushort index;
277 struct slic_handle *pslic_handle;
278 struct adapter *adapter = (struct adapter *)netdev_priv(netdev);
279 /*
280 DBG_MSG("slicoss: %s (%s)\n netdev [%p]\n adapter[%p]\n "
281 "pcidev [%p]\n", __func__, netdev->name, netdev, adapter, pcidev);*/
282 /* adapter->pcidev = pcidev;*/
283 adapter->vendid = pci_tbl_entry->vendor;
284 adapter->devid = pci_tbl_entry->device;
285 adapter->subsysid = pci_tbl_entry->subdevice;
286 adapter->busnumber = pcidev->bus->number;
287 adapter->slotnumber = ((pcidev->devfn >> 3) & 0x1F);
288 adapter->functionnumber = (pcidev->devfn & 0x7);
289 adapter->memorylength = pci_resource_len(pcidev, 0);
290 adapter->slic_regs = (__iomem struct slic_regs *)memaddr;
291 adapter->irq = pcidev->irq;
292 /* adapter->netdev = netdev;*/
293 adapter->next_netdevice = head_netdevice;
294 head_netdevice = netdev;
295 adapter->chipid = chip_idx;
296 adapter->port = 0; /*adapter->functionnumber;*/
297 adapter->cardindex = adapter->port;
298 adapter->memorybase = memaddr;
299 spin_lock_init(&adapter->upr_lock.lock);
300 spin_lock_init(&adapter->bit64reglock.lock);
301 spin_lock_init(&adapter->adapter_lock.lock);
302 spin_lock_init(&adapter->reset_lock.lock);
303 spin_lock_init(&adapter->handle_lock.lock);
304
305 adapter->card_size = 1;
306 /*
307 Initialize slic_handle array
308 */
309 ASSERT(SLIC_CMDQ_MAXCMDS <= 0xFFFF);
310 /*
311 Start with 1. 0 is an invalid host handle.
312 */
313 for (index = 1, pslic_handle = &adapter->slic_handles[1];
314 index < SLIC_CMDQ_MAXCMDS; index++, pslic_handle++) {
315
316 pslic_handle->token.handle_index = index;
317 pslic_handle->type = SLIC_HANDLE_FREE;
318 pslic_handle->next = adapter->pfree_slic_handles;
319 adapter->pfree_slic_handles = pslic_handle;
320 }
321 /*
322 DBG_MSG(".........\nix[%d] phandle[%p] pfree[%p] next[%p]\n",
323 index, pslic_handle, adapter->pfree_slic_handles, pslic_handle->next);*/
324 adapter->pshmem = (struct slic_shmem *)
325 pci_alloc_consistent(adapter->pcidev,
326 sizeof(struct slic_shmem *),
327 &adapter->
328 phys_shmem);
329 /*
330 DBG_MSG("slicoss: %s (%s)\n pshmem [%p]\n phys_shmem[%p]\n"\
331 "slic_regs [%p]\n", __func__, netdev->name, adapter->pshmem,
332 (void *)adapter->phys_shmem, adapter->slic_regs);
333 */
334 ASSERT(adapter->pshmem);
335
336 memset(adapter->pshmem, 0, sizeof(struct slic_shmem));
337
338 return;
339 }
340
341 static int __devinit slic_entry_probe(struct pci_dev *pcidev,
342 const struct pci_device_id *pci_tbl_entry)
343 {
344 static int cards_found;
345 static int did_version;
346 int err;
347 struct net_device *netdev;
348 struct adapter *adapter;
349 void __iomem *memmapped_ioaddr = NULL;
350 u32 status = 0;
351 ulong mmio_start = 0;
352 ulong mmio_len = 0;
353 struct sliccard *card = NULL;
354
355 DBG_MSG("slicoss: %s 2.6 VERSION ENTER jiffies[%lx] cpu %d\n",
356 __func__, jiffies, smp_processor_id());
357
358 slic_global.dynamic_intagg = dynamic_intagg;
359
360 err = pci_enable_device(pcidev);
361
362 DBG_MSG("Call pci_enable_device(%p) status[%x]\n", pcidev, err);
363 if (err)
364 return err;
365
366 if (slic_debug > 0 && did_version++ == 0) {
367 printk(slic_banner);
368 printk(slic_proc_version);
369 }
370
371 err = pci_set_dma_mask(pcidev, DMA_64BIT_MASK);
372 if (!err) {
373 DBG_MSG("pci_set_dma_mask(DMA_64BIT_MASK) successful\n");
374 } else {
375 err = pci_set_dma_mask(pcidev, DMA_32BIT_MASK);
376 if (err) {
377 DBG_MSG
378 ("No usable DMA configuration, aborting err[%x]\n",
379 err);
380 return err;
381 }
382 DBG_MSG("pci_set_dma_mask(DMA_32BIT_MASK) successful\n");
383 }
384
385 DBG_MSG("Call pci_request_regions\n");
386
387 err = pci_request_regions(pcidev, DRV_NAME);
388 if (err) {
389 DBG_MSG("pci_request_regions FAILED err[%x]\n", err);
390 return err;
391 }
392
393 DBG_MSG("call pci_set_master\n");
394 pci_set_master(pcidev);
395
396 DBG_MSG("call alloc_etherdev\n");
397 netdev = alloc_etherdev(sizeof(struct adapter));
398 if (!netdev) {
399 err = -ENOMEM;
400 goto err_out_exit_slic_probe;
401 }
402 DBG_MSG("alloc_etherdev for slic netdev[%p]\n", netdev);
403
404 SET_NETDEV_DEV(netdev, &pcidev->dev);
405
406 pci_set_drvdata(pcidev, netdev);
407 adapter = netdev_priv(netdev);
408 adapter->netdev = netdev;
409 adapter->pcidev = pcidev;
410
411 mmio_start = pci_resource_start(pcidev, 0);
412 mmio_len = pci_resource_len(pcidev, 0);
413
414 DBG_MSG("slicoss: call ioremap(mmio_start[%lx], mmio_len[%lx])\n",
415 mmio_start, mmio_len);
416
417 /* memmapped_ioaddr = (u32)ioremap_nocache(mmio_start, mmio_len);*/
418 memmapped_ioaddr = ioremap(mmio_start, mmio_len);
419 DBG_MSG("slicoss: %s MEMMAPPED_IOADDR [%p]\n", __func__,
420 memmapped_ioaddr);
421 if (!memmapped_ioaddr) {
422 DBG_ERROR("%s cannot remap MMIO region %lx @ %lx\n",
423 __func__, mmio_len, mmio_start);
424 goto err_out_free_mmio_region;
425 }
426
427 DBG_MSG
428 ("slicoss: %s found Alacritech SLICOSS PCI, MMIO at %p, "\
429 "start[%lx] len[%lx], IRQ %d.\n",
430 __func__, memmapped_ioaddr, mmio_start, mmio_len, pcidev->irq);
431
432 slic_config_pci(pcidev);
433
434 slic_init_driver();
435
436 slic_init_adapter(netdev,
437 pcidev, pci_tbl_entry, memmapped_ioaddr, cards_found);
438
439 status = slic_card_locate(adapter);
440 if (status) {
441 DBG_ERROR("%s cannot locate card\n", __func__);
442 goto err_out_free_mmio_region;
443 }
444
445 card = adapter->card;
446
447 if (!adapter->allocated) {
448 card->adapters_allocated++;
449 adapter->allocated = 1;
450 }
451
452 DBG_MSG("slicoss: %s card: %p\n", __func__,
453 adapter->card);
454 DBG_MSG("slicoss: %s card->adapter[%d] == [%p]\n", __func__,
455 (uint) adapter->port, adapter);
456 DBG_MSG("slicoss: %s card->adapters_allocated [%d]\n", __func__,
457 card->adapters_allocated);
458 DBG_MSG("slicoss: %s card->adapters_activated [%d]\n", __func__,
459 card->adapters_activated);
460
461 status = slic_card_init(card, adapter);
462
463 if (status != STATUS_SUCCESS) {
464 card->state = CARD_FAIL;
465 adapter->state = ADAPT_FAIL;
466 adapter->linkstate = LINK_DOWN;
467 DBG_ERROR("slic_card_init FAILED status[%x]\n", status);
468 } else {
469 slic_adapter_set_hwaddr(adapter);
470 }
471
472 netdev->base_addr = (unsigned long)adapter->memorybase;
473 netdev->irq = adapter->irq;
474 netdev->open = slic_entry_open;
475 netdev->stop = slic_entry_halt;
476 netdev->hard_start_xmit = slic_xmit_start;
477 netdev->do_ioctl = slic_ioctl;
478 netdev->set_mac_address = slic_mac_set_address;
479 #if SLIC_GET_STATS_ENABLED
480 netdev->get_stats = slic_get_stats;
481 #endif
482 netdev->set_multicast_list = slic_mcast_set_list;
483
484 slic_debug_adapter_create(adapter);
485
486 strcpy(netdev->name, "eth%d");
487 err = register_netdev(netdev);
488 if (err) {
489 DBG_ERROR("Cannot register net device, aborting.\n");
490 goto err_out_unmap;
491 }
492
493 DBG_MSG
494 ("slicoss: addr 0x%lx, irq %d, MAC addr "\
495 "%02X:%02X:%02X:%02X:%02X:%02X\n",
496 mmio_start, /*pci_resource_start(pcidev, 0), */ pcidev->irq,
497 netdev->dev_addr[0], netdev->dev_addr[1], netdev->dev_addr[2],
498 netdev->dev_addr[3], netdev->dev_addr[4], netdev->dev_addr[5]);
499
500 cards_found++;
501 DBG_MSG("slicoss: %s EXIT status[%x] jiffies[%lx] cpu %d\n",
502 __func__, status, jiffies, smp_processor_id());
503
504 return status;
505
506 err_out_unmap:
507 iounmap(memmapped_ioaddr);
508
509 err_out_free_mmio_region:
510 release_mem_region(mmio_start, mmio_len);
511
512 err_out_exit_slic_probe:
513 pci_release_regions(pcidev);
514 DBG_ERROR("%s EXIT jiffies[%lx] cpu %d\n", __func__, jiffies,
515 smp_processor_id());
516
517 return -ENODEV;
518 }
519
520 static int slic_entry_open(struct net_device *dev)
521 {
522 struct adapter *adapter = (struct adapter *) netdev_priv(dev);
523 struct sliccard *card = adapter->card;
524 u32 locked = 0;
525 int status;
526
527 ASSERT(adapter);
528 ASSERT(card);
529 DBG_MSG
530 ("slicoss: %s adapter->activated[%d] card->adapters[%x] "\
531 "allocd[%x]\n", __func__, adapter->activated,
532 card->adapters_activated,
533 card->adapters_allocated);
534 DBG_MSG
535 ("slicoss: %s (%s): [jiffies[%lx] cpu %d] dev[%p] adapt[%p] "\
536 "port[%d] card[%p]\n",
537 __func__, adapter->netdev->name, jiffies, smp_processor_id(),
538 adapter->netdev, adapter, adapter->port, card);
539
540 netif_stop_queue(adapter->netdev);
541
542 spin_lock_irqsave(&slic_global.driver_lock.lock,
543 slic_global.driver_lock.flags);
544 locked = 1;
545 if (!adapter->activated) {
546 card->adapters_activated++;
547 slic_global.num_slic_ports_active++;
548 adapter->activated = 1;
549 }
550 status = slic_if_init(adapter);
551
552 if (status != STATUS_SUCCESS) {
553 if (adapter->activated) {
554 card->adapters_activated--;
555 slic_global.num_slic_ports_active--;
556 adapter->activated = 0;
557 }
558 if (locked) {
559 spin_unlock_irqrestore(&slic_global.driver_lock.lock,
560 slic_global.driver_lock.flags);
561 locked = 0;
562 }
563 return status;
564 }
565 DBG_MSG("slicoss: %s set card->master[%p] adapter[%p]\n", __func__,
566 card->master, adapter);
567 if (!card->master)
568 card->master = adapter;
569 #if SLIC_DUMP_ENABLED
570 if (!(card->dumpthread_running))
571 init_waitqueue_head(&card->dump_wq);
572 #endif
573
574 if (locked) {
575 spin_unlock_irqrestore(&slic_global.driver_lock.lock,
576 slic_global.driver_lock.flags);
577 locked = 0;
578 }
579 #if SLIC_DUMP_ENABLED
580 if (!(card->dumpthread_running)) {
581 DBG_MSG("attempt to initialize dump thread\n");
582 status = slic_init_dump_thread(card);
583 /*
584 Even if the dump thread fails, we will continue at this point
585 */
586 }
587 #endif
588
589 return STATUS_SUCCESS;
590 }
591
592 static void __devexit slic_entry_remove(struct pci_dev *pcidev)
593 {
594 struct net_device *dev = pci_get_drvdata(pcidev);
595 u32 mmio_start = 0;
596 uint mmio_len = 0;
597 struct adapter *adapter = (struct adapter *) netdev_priv(dev);
598 struct sliccard *card;
599 struct mcast_address *mcaddr, *mlist;
600
601 ASSERT(adapter);
602 DBG_MSG("slicoss: %s ENTER dev[%p] adapter[%p]\n", __func__, dev,
603 adapter);
604 slic_adapter_freeresources(adapter);
605 slic_unmap_mmio_space(adapter);
606 DBG_MSG("slicoss: %s unregister_netdev\n", __func__);
607 unregister_netdev(dev);
608
609 mmio_start = pci_resource_start(pcidev, 0);
610 mmio_len = pci_resource_len(pcidev, 0);
611
612 DBG_MSG("slicoss: %s rel_region(0) start[%x] len[%x]\n", __func__,
613 mmio_start, mmio_len);
614 release_mem_region(mmio_start, mmio_len);
615
616 DBG_MSG("slicoss: %s iounmap dev->base_addr[%x]\n", __func__,
617 (uint) dev->base_addr);
618 iounmap((void __iomem *)dev->base_addr);
619 /* free multicast addresses */
620 mlist = adapter->mcastaddrs;
621 while (mlist) {
622 mcaddr = mlist;
623 mlist = mlist->next;
624 kfree(mcaddr);
625 }
626 ASSERT(adapter->card);
627 card = adapter->card;
628 ASSERT(card->adapters_allocated);
629 card->adapters_allocated--;
630 adapter->allocated = 0;
631 DBG_MSG
632 ("slicoss: %s init[%x] alloc[%x] card[%p] adapter[%p]\n",
633 __func__, card->adapters_activated, card->adapters_allocated,
634 card, adapter);
635 if (!card->adapters_allocated) {
636 struct sliccard *curr_card = slic_global.slic_card;
637 if (curr_card == card) {
638 slic_global.slic_card = card->next;
639 } else {
640 while (curr_card->next != card)
641 curr_card = curr_card->next;
642 ASSERT(curr_card);
643 curr_card->next = card->next;
644 }
645 ASSERT(slic_global.num_slic_cards);
646 slic_global.num_slic_cards--;
647 slic_card_cleanup(card);
648 }
649 DBG_MSG("slicoss: %s deallocate device\n", __func__);
650 kfree(dev);
651 pci_release_regions(pcidev);
652 DBG_MSG("slicoss: %s EXIT\n", __func__);
653 }
654
655 static int slic_entry_halt(struct net_device *dev)
656 {
657 struct adapter *adapter = (struct adapter *)netdev_priv(dev);
658 struct sliccard *card = adapter->card;
659 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
660
661 spin_lock_irqsave(&slic_global.driver_lock.lock,
662 slic_global.driver_lock.flags);
663 ASSERT(card);
664 DBG_MSG("slicoss: %s (%s) ENTER\n", __func__, dev->name);
665 DBG_MSG("slicoss: %s (%s) actvtd[%d] alloc[%d] state[%x] adapt[%p]\n",
666 __func__, dev->name, card->adapters_activated,
667 card->adapters_allocated, card->state, adapter);
668 slic_if_stop_queue(adapter);
669 adapter->state = ADAPT_DOWN;
670 adapter->linkstate = LINK_DOWN;
671 adapter->upr_list = NULL;
672 adapter->upr_busy = 0;
673 adapter->devflags_prev = 0;
674 DBG_MSG("slicoss: %s (%s) set adapter[%p] state to ADAPT_DOWN(%d)\n",
675 __func__, dev->name, adapter, adapter->state);
676 ASSERT(card->adapter[adapter->cardindex] == adapter);
677 WRITE_REG(slic_regs->slic_icr, ICR_INT_OFF, FLUSH);
678 adapter->all_reg_writes++;
679 adapter->icr_reg_writes++;
680 slic_config_clear(adapter);
681 DBG_MSG("slicoss: %s (%s) dev[%p] adapt[%p] card[%p]\n",
682 __func__, dev->name, dev, adapter, card);
683 if (adapter->activated) {
684 card->adapters_activated--;
685 slic_global.num_slic_ports_active--;
686 adapter->activated = 0;
687 }
688 #ifdef AUTOMATIC_RESET
689 WRITE_REG(slic_regs->slic_reset_iface, 0, FLUSH);
690 #endif
691 /*
692 * Reset the adapter's rsp, cmd, and rcv queues
693 */
694 slic_cmdq_reset(adapter);
695 slic_rspqueue_reset(adapter);
696 slic_rcvqueue_reset(adapter);
697
698 #ifdef AUTOMATIC_RESET
699 if (!card->adapters_activated) {
700
701 #if SLIC_DUMP_ENABLED
702 if (card->dumpthread_running) {
703 uint status;
704 DBG_MSG("attempt to terminate dump thread pid[%x]\n",
705 card->dump_task_id);
706 status = kill_proc(card->dump_task_id->pid, SIGKILL, 1);
707
708 if (!status) {
709 int count = 10 * 100;
710 while (card->dumpthread_running && --count) {
711 current->state = TASK_INTERRUPTIBLE;
712 schedule_timeout(1);
713 }
714
715 if (!count) {
716 DBG_MSG
717 ("slicmon thread cleanup FAILED \
718 pid[%x]\n",
719 card->dump_task_id->pid);
720 }
721 }
722 }
723 #endif
724 DBG_MSG("slicoss: %s (%s) initiate CARD_HALT\n", __func__,
725 dev->name);
726
727 slic_card_init(card, adapter);
728 }
729 #endif
730
731 DBG_MSG("slicoss: %s (%s) EXIT\n", __func__, dev->name);
732 DBG_MSG("slicoss: %s EXIT\n", __func__);
733 spin_unlock_irqrestore(&slic_global.driver_lock.lock,
734 slic_global.driver_lock.flags);
735 return STATUS_SUCCESS;
736 }
737
738 static int slic_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
739 {
740 ASSERT(rq);
741 /*
742 DBG_MSG("slicoss: %s cmd[%x] rq[%p] dev[%p]\n", __func__, cmd, rq, dev);
743 */
744 switch (cmd) {
745 case SIOCSLICSETINTAGG:
746 {
747 struct adapter *adapter = (struct adapter *)
748 netdev_priv(dev);
749 u32 data[7];
750 u32 intagg;
751
752 if (copy_from_user(data, rq->ifr_data, 28)) {
753 DBG_ERROR
754 ("copy_from_user FAILED getting initial \
755 params\n");
756 return -EFAULT;
757 }
758 intagg = data[0];
759 printk(KERN_EMERG
760 "%s: set interrupt aggregation to %d\n",
761 __func__, intagg);
762 slic_intagg_set(adapter, intagg);
763 return 0;
764 }
765 #ifdef SLIC_USER_REQUEST_DUMP_ENABLED
766 case SIOCSLICDUMPCARD:
767 {
768 struct adapter *adapter = (struct adapter *)
769 dev->priv;
770 struct sliccard *card;
771
772 ASSERT(adapter);
773 ASSERT(adapter->card)
774 card = adapter->card;
775
776 DBG_IOCTL("slic_ioctl SIOCSLIC_DUMP_CARD\n");
777
778 if (card->dump_requested == SLIC_DUMP_DONE) {
779 printk(SLICLEVEL
780 "SLIC Card dump to be overwritten\n");
781 card->dump_requested = SLIC_DUMP_REQUESTED;
782 } else if ((card->dump_requested == SLIC_DUMP_REQUESTED)
783 || (card->dump_requested ==
784 SLIC_DUMP_IN_PROGRESS)) {
785 printk(SLICLEVEL
786 "SLIC Card dump Requested but already \
787 in progress... ignore\n");
788 } else {
789 printk(SLICLEVEL
790 "SLIC Card #%d Dump Requested\n",
791 card->cardnum);
792 card->dump_requested = SLIC_DUMP_REQUESTED;
793 }
794 return 0;
795 }
796 #endif
797
798 #ifdef SLIC_TRACE_DUMP_ENABLED
799 case SIOCSLICTRACEDUMP:
800 {
801 ulong data[7];
802 ulong value;
803
804 DBG_IOCTL("slic_ioctl SIOCSLIC_TRACE_DUMP\n");
805
806 if (copy_from_user(data, rq->ifr_data, 28)) {
807 PRINT_ERROR
808 ("slic: copy_from_user FAILED getting \
809 initial simba param\n");
810 return -EFAULT;
811 }
812
813 value = data[0];
814 if (tracemon_request == SLIC_DUMP_DONE) {
815 PRINT_ERROR
816 ("ATK Diagnostic Trace Dump Requested\n");
817 tracemon_request = SLIC_DUMP_REQUESTED;
818 tracemon_request_type = value;
819 tracemon_timestamp = jiffies;
820 } else if ((tracemon_request == SLIC_DUMP_REQUESTED) ||
821 (tracemon_request ==
822 SLIC_DUMP_IN_PROGRESS)) {
823 PRINT_ERROR
824 ("ATK Diagnostic Trace Dump Requested but \
825 already in progress... ignore\n");
826 } else {
827 PRINT_ERROR
828 ("ATK Diagnostic Trace Dump Requested\n");
829 tracemon_request = SLIC_DUMP_REQUESTED;
830 tracemon_request_type = value;
831 tracemon_timestamp = jiffies;
832 }
833 return 0;
834 }
835 #endif
836 #if SLIC_ETHTOOL_SUPPORT
837 case SIOCETHTOOL:
838 {
839 struct adapter *adapter = (struct adapter *)
840 netdev_priv(dev);
841 struct ethtool_cmd data;
842 struct ethtool_cmd ecmd;
843
844 ASSERT(adapter);
845 /* DBG_MSG("slicoss: %s SIOCETHTOOL\n", __func__); */
846 if (copy_from_user(&ecmd, rq->ifr_data, sizeof(ecmd)))
847 return -EFAULT;
848
849 if (ecmd.cmd == ETHTOOL_GSET) {
850 data.supported =
851 (SUPPORTED_10baseT_Half |
852 SUPPORTED_10baseT_Full |
853 SUPPORTED_100baseT_Half |
854 SUPPORTED_100baseT_Full |
855 SUPPORTED_Autoneg | SUPPORTED_MII);
856 data.port = PORT_MII;
857 data.transceiver = XCVR_INTERNAL;
858 data.phy_address = 0;
859 if (adapter->linkspeed == LINK_100MB)
860 data.speed = SPEED_100;
861 else if (adapter->linkspeed == LINK_10MB)
862 data.speed = SPEED_10;
863 else
864 data.speed = 0;
865
866 if (adapter->linkduplex == LINK_FULLD)
867 data.duplex = DUPLEX_FULL;
868 else
869 data.duplex = DUPLEX_HALF;
870
871 data.autoneg = AUTONEG_ENABLE;
872 data.maxtxpkt = 1;
873 data.maxrxpkt = 1;
874 if (copy_to_user
875 (rq->ifr_data, &data, sizeof(data)))
876 return -EFAULT;
877
878 } else if (ecmd.cmd == ETHTOOL_SSET) {
879 if (!capable(CAP_NET_ADMIN))
880 return -EPERM;
881
882 if (adapter->linkspeed == LINK_100MB)
883 data.speed = SPEED_100;
884 else if (adapter->linkspeed == LINK_10MB)
885 data.speed = SPEED_10;
886 else
887 data.speed = 0;
888
889 if (adapter->linkduplex == LINK_FULLD)
890 data.duplex = DUPLEX_FULL;
891 else
892 data.duplex = DUPLEX_HALF;
893
894 data.autoneg = AUTONEG_ENABLE;
895 data.maxtxpkt = 1;
896 data.maxrxpkt = 1;
897 if ((ecmd.speed != data.speed) ||
898 (ecmd.duplex != data.duplex)) {
899 u32 speed;
900 u32 duplex;
901
902 if (ecmd.speed == SPEED_10) {
903 speed = 0;
904 SLIC_DISPLAY
905 ("%s: slic ETHTOOL set \
906 link speed==10MB",
907 dev->name);
908 } else {
909 speed = PCR_SPEED_100;
910 SLIC_DISPLAY
911 ("%s: slic ETHTOOL set \
912 link speed==100MB",
913 dev->name);
914 }
915 if (ecmd.duplex == DUPLEX_FULL) {
916 duplex = PCR_DUPLEX_FULL;
917 SLIC_DISPLAY
918 (": duplex==FULL\n");
919 } else {
920 duplex = 0;
921 SLIC_DISPLAY
922 (": duplex==HALF\n");
923 }
924 slic_link_config(adapter,
925 speed, duplex);
926 slic_link_event_handler(adapter);
927 }
928 }
929 return 0;
930 }
931 #endif
932 default:
933 /* DBG_MSG("slicoss: %s UNSUPPORTED[%x]\n", __func__, cmd); */
934 return -EOPNOTSUPP;
935 }
936 }
937
938 #define XMIT_FAIL_LINK_STATE 1
939 #define XMIT_FAIL_ZERO_LENGTH 2
940 #define XMIT_FAIL_HOSTCMD_FAIL 3
941
942 static void slic_xmit_build_request(struct adapter *adapter,
943 struct slic_hostcmd *hcmd, struct sk_buff *skb)
944 {
945 struct slic_host64_cmd *ihcmd;
946 ulong phys_addr;
947
948 ihcmd = &hcmd->cmd64;
949
950 ihcmd->flags = (adapter->port << IHFLG_IFSHFT);
951 ihcmd->command = IHCMD_XMT_REQ;
952 ihcmd->u.slic_buffers.totlen = skb->len;
953 phys_addr = pci_map_single(adapter->pcidev, skb->data, skb->len,
954 PCI_DMA_TODEVICE);
955 ihcmd->u.slic_buffers.bufs[0].paddrl = SLIC_GET_ADDR_LOW(phys_addr);
956 ihcmd->u.slic_buffers.bufs[0].paddrh = SLIC_GET_ADDR_HIGH(phys_addr);
957 ihcmd->u.slic_buffers.bufs[0].length = skb->len;
958 #if defined(CONFIG_X86_64)
959 hcmd->cmdsize = (u32) ((((u64)&ihcmd->u.slic_buffers.bufs[1] -
960 (u64) hcmd) + 31) >> 5);
961 #elif defined(CONFIG_X86)
962 hcmd->cmdsize = ((((u32) &ihcmd->u.slic_buffers.bufs[1] -
963 (u32) hcmd) + 31) >> 5);
964 #else
965 Stop Compilation;
966 #endif
967 }
968
969 #define NORMAL_ETHFRAME 0
970
971 static int slic_xmit_start(struct sk_buff *skb, struct net_device *dev)
972 {
973 struct sliccard *card;
974 struct adapter *adapter = (struct adapter *)netdev_priv(dev);
975 struct slic_hostcmd *hcmd = NULL;
976 u32 status = 0;
977 u32 skbtype = NORMAL_ETHFRAME;
978 void *offloadcmd = NULL;
979
980 card = adapter->card;
981 ASSERT(card);
982 /*
983 DBG_ERROR("xmit_start (%s) ENTER skb[%p] len[%d] linkstate[%x] state[%x]\n",
984 adapter->netdev->name, skb, skb->len, adapter->linkstate,
985 adapter->state);
986 */
987 if ((adapter->linkstate != LINK_UP) ||
988 (adapter->state != ADAPT_UP) || (card->state != CARD_UP)) {
989 status = XMIT_FAIL_LINK_STATE;
990 goto xmit_fail;
991
992 } else if (skb->len == 0) {
993 status = XMIT_FAIL_ZERO_LENGTH;
994 goto xmit_fail;
995 }
996
997 if (skbtype == NORMAL_ETHFRAME) {
998 hcmd = slic_cmdq_getfree(adapter);
999 if (!hcmd) {
1000 adapter->xmitq_full = 1;
1001 status = XMIT_FAIL_HOSTCMD_FAIL;
1002 goto xmit_fail;
1003 }
1004 ASSERT(hcmd->pslic_handle);
1005 ASSERT(hcmd->cmd64.hosthandle ==
1006 hcmd->pslic_handle->token.handle_token);
1007 hcmd->skb = skb;
1008 hcmd->busy = 1;
1009 hcmd->type = SLIC_CMD_DUMB;
1010 if (skbtype == NORMAL_ETHFRAME)
1011 slic_xmit_build_request(adapter, hcmd, skb);
1012 }
1013 adapter->stats.tx_packets++;
1014 adapter->stats.tx_bytes += skb->len;
1015
1016 #ifdef DEBUG_DUMP
1017 if (adapter->kill_card) {
1018 struct slic_host64_cmd ihcmd;
1019
1020 ihcmd = &hcmd->cmd64;
1021
1022 ihcmd->flags |= 0x40;
1023 adapter->kill_card = 0; /* only do this once */
1024 }
1025 #endif
1026 if (hcmd->paddrh == 0) {
1027 WRITE_REG(adapter->slic_regs->slic_cbar,
1028 (hcmd->paddrl | hcmd->cmdsize), DONT_FLUSH);
1029 } else {
1030 WRITE_REG64(adapter,
1031 adapter->slic_regs->slic_cbar64,
1032 (hcmd->paddrl | hcmd->cmdsize),
1033 adapter->slic_regs->slic_addr_upper,
1034 hcmd->paddrh, DONT_FLUSH);
1035 }
1036 xmit_done:
1037 return 0;
1038 xmit_fail:
1039 slic_xmit_fail(adapter, skb, offloadcmd, skbtype, status);
1040 goto xmit_done;
1041 }
1042
1043 static void slic_xmit_fail(struct adapter *adapter,
1044 struct sk_buff *skb,
1045 void *cmd, u32 skbtype, u32 status)
1046 {
1047 if (adapter->xmitq_full)
1048 slic_if_stop_queue(adapter);
1049 if ((cmd == NULL) && (status <= XMIT_FAIL_HOSTCMD_FAIL)) {
1050 switch (status) {
1051 case XMIT_FAIL_LINK_STATE:
1052 DBG_ERROR
1053 ("(%s) reject xmit skb[%p: %x] linkstate[%s] \
1054 adapter[%s:%d] card[%s:%d]\n",
1055 adapter->netdev->name, skb, skb->pkt_type,
1056 SLIC_LINKSTATE(adapter->linkstate),
1057 SLIC_ADAPTER_STATE(adapter->state), adapter->state,
1058 SLIC_CARD_STATE(adapter->card->state),
1059 adapter->card->state);
1060 break;
1061 case XMIT_FAIL_ZERO_LENGTH:
1062 DBG_ERROR
1063 ("xmit_start skb->len == 0 skb[%p] type[%x]!!!! \n",
1064 skb, skb->pkt_type);
1065 break;
1066 case XMIT_FAIL_HOSTCMD_FAIL:
1067 DBG_ERROR
1068 ("xmit_start skb[%p] type[%x] No host commands \
1069 available !!!! \n",
1070 skb, skb->pkt_type);
1071 break;
1072 default:
1073 ASSERT(0);
1074 }
1075 }
1076 dev_kfree_skb(skb);
1077 adapter->stats.tx_dropped++;
1078 }
1079
1080 static void slic_rcv_handle_error(struct adapter *adapter,
1081 struct slic_rcvbuf *rcvbuf)
1082 {
1083 struct slic_hddr_wds *hdr = (struct slic_hddr_wds *)rcvbuf->data;
1084
1085 if (adapter->devid != SLIC_1GB_DEVICE_ID) {
1086 if (hdr->frame_status14 & VRHSTAT_802OE)
1087 adapter->if_events.oflow802++;
1088 if (hdr->frame_status14 & VRHSTAT_TPOFLO)
1089 adapter->if_events.Tprtoflow++;
1090 if (hdr->frame_status_b14 & VRHSTATB_802UE)
1091 adapter->if_events.uflow802++;
1092 if (hdr->frame_status_b14 & VRHSTATB_RCVE) {
1093 adapter->if_events.rcvearly++;
1094 adapter->stats.rx_fifo_errors++;
1095 }
1096 if (hdr->frame_status_b14 & VRHSTATB_BUFF) {
1097 adapter->if_events.Bufov++;
1098 adapter->stats.rx_over_errors++;
1099 }
1100 if (hdr->frame_status_b14 & VRHSTATB_CARRE) {
1101 adapter->if_events.Carre++;
1102 adapter->stats.tx_carrier_errors++;
1103 }
1104 if (hdr->frame_status_b14 & VRHSTATB_LONGE)
1105 adapter->if_events.Longe++;
1106 if (hdr->frame_status_b14 & VRHSTATB_PREA)
1107 adapter->if_events.Invp++;
1108 if (hdr->frame_status_b14 & VRHSTATB_CRC) {
1109 adapter->if_events.Crc++;
1110 adapter->stats.rx_crc_errors++;
1111 }
1112 if (hdr->frame_status_b14 & VRHSTATB_DRBL)
1113 adapter->if_events.Drbl++;
1114 if (hdr->frame_status_b14 & VRHSTATB_CODE)
1115 adapter->if_events.Code++;
1116 if (hdr->frame_status_b14 & VRHSTATB_TPCSUM)
1117 adapter->if_events.TpCsum++;
1118 if (hdr->frame_status_b14 & VRHSTATB_TPHLEN)
1119 adapter->if_events.TpHlen++;
1120 if (hdr->frame_status_b14 & VRHSTATB_IPCSUM)
1121 adapter->if_events.IpCsum++;
1122 if (hdr->frame_status_b14 & VRHSTATB_IPLERR)
1123 adapter->if_events.IpLen++;
1124 if (hdr->frame_status_b14 & VRHSTATB_IPHERR)
1125 adapter->if_events.IpHlen++;
1126 } else {
1127 if (hdr->frame_statusGB & VGBSTAT_XPERR) {
1128 u32 xerr = hdr->frame_statusGB >> VGBSTAT_XERRSHFT;
1129
1130 if (xerr == VGBSTAT_XCSERR)
1131 adapter->if_events.TpCsum++;
1132 if (xerr == VGBSTAT_XUFLOW)
1133 adapter->if_events.Tprtoflow++;
1134 if (xerr == VGBSTAT_XHLEN)
1135 adapter->if_events.TpHlen++;
1136 }
1137 if (hdr->frame_statusGB & VGBSTAT_NETERR) {
1138 u32 nerr =
1139 (hdr->
1140 frame_statusGB >> VGBSTAT_NERRSHFT) &
1141 VGBSTAT_NERRMSK;
1142 if (nerr == VGBSTAT_NCSERR)
1143 adapter->if_events.IpCsum++;
1144 if (nerr == VGBSTAT_NUFLOW)
1145 adapter->if_events.IpLen++;
1146 if (nerr == VGBSTAT_NHLEN)
1147 adapter->if_events.IpHlen++;
1148 }
1149 if (hdr->frame_statusGB & VGBSTAT_LNKERR) {
1150 u32 lerr = hdr->frame_statusGB & VGBSTAT_LERRMSK;
1151
1152 if (lerr == VGBSTAT_LDEARLY)
1153 adapter->if_events.rcvearly++;
1154 if (lerr == VGBSTAT_LBOFLO)
1155 adapter->if_events.Bufov++;
1156 if (lerr == VGBSTAT_LCODERR)
1157 adapter->if_events.Code++;
1158 if (lerr == VGBSTAT_LDBLNBL)
1159 adapter->if_events.Drbl++;
1160 if (lerr == VGBSTAT_LCRCERR)
1161 adapter->if_events.Crc++;
1162 if (lerr == VGBSTAT_LOFLO)
1163 adapter->if_events.oflow802++;
1164 if (lerr == VGBSTAT_LUFLO)
1165 adapter->if_events.uflow802++;
1166 }
1167 }
1168 return;
1169 }
1170
1171 #define TCP_OFFLOAD_FRAME_PUSHFLAG 0x10000000
1172 #define M_FAST_PATH 0x0040
1173
1174 static void slic_rcv_handler(struct adapter *adapter)
1175 {
1176 struct sk_buff *skb;
1177 struct slic_rcvbuf *rcvbuf;
1178 u32 frames = 0;
1179
1180 while ((skb = slic_rcvqueue_getnext(adapter))) {
1181 u32 rx_bytes;
1182
1183 ASSERT(skb->head);
1184 rcvbuf = (struct slic_rcvbuf *)skb->head;
1185 adapter->card->events++;
1186 if (rcvbuf->status & IRHDDR_ERR) {
1187 adapter->rx_errors++;
1188 slic_rcv_handle_error(adapter, rcvbuf);
1189 slic_rcvqueue_reinsert(adapter, skb);
1190 continue;
1191 }
1192
1193 if (!slic_mac_filter(adapter, (struct ether_header *)
1194 rcvbuf->data)) {
1195 #if 0
1196 DBG_MSG
1197 ("slicoss: %s (%s) drop frame due to mac filter\n",
1198 __func__, adapter->netdev->name);
1199 #endif
1200 slic_rcvqueue_reinsert(adapter, skb);
1201 continue;
1202 }
1203 skb_pull(skb, SLIC_RCVBUF_HEADSIZE);
1204 rx_bytes = (rcvbuf->length & IRHDDR_FLEN_MSK);
1205 skb_put(skb, rx_bytes);
1206 adapter->stats.rx_packets++;
1207 adapter->stats.rx_bytes += rx_bytes;
1208 #if SLIC_OFFLOAD_IP_CHECKSUM
1209 skb->ip_summed = CHECKSUM_UNNECESSARY;
1210 #endif
1211
1212 skb->dev = adapter->netdev;
1213 skb->protocol = eth_type_trans(skb, skb->dev);
1214 netif_rx(skb);
1215
1216 ++frames;
1217 #if SLIC_INTERRUPT_PROCESS_LIMIT
1218 if (frames >= SLIC_RCVQ_MAX_PROCESS_ISR) {
1219 adapter->rcv_interrupt_yields++;
1220 break;
1221 }
1222 #endif
1223 }
1224 adapter->max_isr_rcvs = max(adapter->max_isr_rcvs, frames);
1225 }
1226
1227 static void slic_xmit_complete(struct adapter *adapter)
1228 {
1229 struct slic_hostcmd *hcmd;
1230 struct slic_rspbuf *rspbuf;
1231 u32 frames = 0;
1232 struct slic_handle_word slic_handle_word;
1233
1234 do {
1235 rspbuf = slic_rspqueue_getnext(adapter);
1236 if (!rspbuf)
1237 break;
1238 adapter->xmit_completes++;
1239 adapter->card->events++;
1240 /*
1241 Get the complete host command buffer
1242 */
1243 slic_handle_word.handle_token = rspbuf->hosthandle;
1244 ASSERT(slic_handle_word.handle_index);
1245 ASSERT(slic_handle_word.handle_index <= SLIC_CMDQ_MAXCMDS);
1246 hcmd =
1247 (struct slic_hostcmd *)
1248 adapter->slic_handles[slic_handle_word.handle_index].
1249 address;
1250 /* hcmd = (struct slic_hostcmd *) rspbuf->hosthandle; */
1251 ASSERT(hcmd);
1252 ASSERT(hcmd->pslic_handle ==
1253 &adapter->slic_handles[slic_handle_word.handle_index]);
1254 /*
1255 DBG_ERROR("xmit_complete (%s) hcmd[%p] hosthandle[%x]\n",
1256 adapter->netdev->name, hcmd, hcmd->cmd64.hosthandle);
1257 DBG_ERROR(" skb[%p] len %d hcmdtype[%x]\n", hcmd->skb,
1258 hcmd->skb->len, hcmd->type);
1259 */
1260 if (hcmd->type == SLIC_CMD_DUMB) {
1261 if (hcmd->skb)
1262 dev_kfree_skb_irq(hcmd->skb);
1263 slic_cmdq_putdone_irq(adapter, hcmd);
1264 }
1265 rspbuf->status = 0;
1266 rspbuf->hosthandle = 0;
1267 frames++;
1268 } while (1);
1269 adapter->max_isr_xmits = max(adapter->max_isr_xmits, frames);
1270 }
1271
1272 static irqreturn_t slic_interrupt(int irq, void *dev_id)
1273 {
1274 struct net_device *dev = (struct net_device *)dev_id;
1275 struct adapter *adapter = (struct adapter *)netdev_priv(dev);
1276 u32 isr;
1277
1278 if ((adapter->pshmem) && (adapter->pshmem->isr)) {
1279 WRITE_REG(adapter->slic_regs->slic_icr, ICR_INT_MASK, FLUSH);
1280 isr = adapter->isrcopy = adapter->pshmem->isr;
1281 adapter->pshmem->isr = 0;
1282 adapter->num_isrs++;
1283 switch (adapter->card->state) {
1284 case CARD_UP:
1285 if (isr & ~ISR_IO) {
1286 if (isr & ISR_ERR) {
1287 adapter->error_interrupts++;
1288 if (isr & ISR_RMISS) {
1289 int count;
1290 int pre_count;
1291 int errors;
1292
1293 struct slic_rcvqueue *rcvq =
1294 &adapter->rcvqueue;
1295
1296 adapter->
1297 error_rmiss_interrupts++;
1298 if (!rcvq->errors)
1299 rcv_count = rcvq->count;
1300 pre_count = rcvq->count;
1301 errors = rcvq->errors;
1302
1303 while (rcvq->count <
1304 SLIC_RCVQ_FILLTHRESH) {
1305 count =
1306 slic_rcvqueue_fill
1307 (adapter);
1308 if (!count)
1309 break;
1310 }
1311 DBG_MSG
1312 ("(%s): [%x] ISR_RMISS \
1313 initial[%x] pre[%x] \
1314 errors[%x] \
1315 post_count[%x]\n",
1316 adapter->netdev->name,
1317 isr, rcv_count, pre_count,
1318 errors, rcvq->count);
1319 } else if (isr & ISR_XDROP) {
1320 DBG_ERROR
1321 ("isr & ISR_ERR [%x] \
1322 ISR_XDROP \n",
1323 isr);
1324 } else {
1325 DBG_ERROR
1326 ("isr & ISR_ERR [%x]\n",
1327 isr);
1328 }
1329 }
1330
1331 if (isr & ISR_LEVENT) {
1332 /*DBG_MSG("%s (%s) ISR_LEVENT \n",
1333 __func__, adapter->netdev->name);*/
1334 adapter->linkevent_interrupts++;
1335 slic_link_event_handler(adapter);
1336 }
1337
1338 if ((isr & ISR_UPC) ||
1339 (isr & ISR_UPCERR) || (isr & ISR_UPCBSY)) {
1340 adapter->upr_interrupts++;
1341 slic_upr_request_complete(adapter, isr);
1342 }
1343 }
1344
1345 if (isr & ISR_RCV) {
1346 adapter->rcv_interrupts++;
1347 slic_rcv_handler(adapter);
1348 }
1349
1350 if (isr & ISR_CMD) {
1351 adapter->xmit_interrupts++;
1352 slic_xmit_complete(adapter);
1353 }
1354 break;
1355
1356 case CARD_DOWN:
1357 if ((isr & ISR_UPC) ||
1358 (isr & ISR_UPCERR) || (isr & ISR_UPCBSY)) {
1359 adapter->upr_interrupts++;
1360 slic_upr_request_complete(adapter, isr);
1361 }
1362 break;
1363
1364 default:
1365 break;
1366 }
1367
1368 adapter->isrcopy = 0;
1369 adapter->all_reg_writes += 2;
1370 adapter->isr_reg_writes++;
1371 WRITE_REG(adapter->slic_regs->slic_isr, 0, FLUSH);
1372 } else {
1373 adapter->false_interrupts++;
1374 }
1375 return IRQ_HANDLED;
1376 }
1377
1378 /*
1379 * slic_link_event_handler -
1380 *
1381 * Initiate a link configuration sequence. The link configuration begins
1382 * by issuing a READ_LINK_STATUS command to the Utility Processor on the
1383 * SLIC. Since the command finishes asynchronously, the slic_upr_comlete
1384 * routine will follow it up witha UP configuration write command, which
1385 * will also complete asynchronously.
1386 *
1387 */
1388 static void slic_link_event_handler(struct adapter *adapter)
1389 {
1390 int status;
1391 struct slic_shmem *pshmem;
1392
1393 if (adapter->state != ADAPT_UP) {
1394 /* Adapter is not operational. Ignore. */
1395 return;
1396 }
1397
1398 pshmem = (struct slic_shmem *)adapter->phys_shmem;
1399
1400 #if defined(CONFIG_X86_64)
1401 /*
1402 DBG_MSG("slic_event_handler pshmem->linkstatus[%x] pshmem[%p]\n \
1403 &linkstatus[%p] &isr[%p]\n", adapter->pshmem->linkstatus, pshmem,
1404 &pshmem->linkstatus, &pshmem->isr);
1405 */
1406 status = slic_upr_request(adapter,
1407 SLIC_UPR_RLSR,
1408 SLIC_GET_ADDR_LOW(&pshmem->linkstatus),
1409 SLIC_GET_ADDR_HIGH(&pshmem->linkstatus),
1410 0, 0);
1411 #elif defined(CONFIG_X86)
1412 status = slic_upr_request(adapter, SLIC_UPR_RLSR,
1413 (u32) &pshmem->linkstatus, /* no 4GB wrap guaranteed */
1414 0, 0, 0);
1415 #else
1416 Stop compilation;
1417 #endif
1418 ASSERT((status == STATUS_SUCCESS) || (status == STATUS_PENDING));
1419 }
1420
1421 static void slic_init_cleanup(struct adapter *adapter)
1422 {
1423 DBG_MSG("slicoss: %s ENTER adapter[%p] ", __func__, adapter);
1424 if (adapter->intrregistered) {
1425 DBG_MSG("FREE_IRQ ");
1426 adapter->intrregistered = 0;
1427 free_irq(adapter->netdev->irq, adapter->netdev);
1428
1429 }
1430 if (adapter->pshmem) {
1431 DBG_MSG("FREE_SHMEM ");
1432 DBG_MSG("adapter[%p] port %d pshmem[%p] FreeShmem ",
1433 adapter, adapter->port, (void *) adapter->pshmem);
1434 pci_free_consistent(adapter->pcidev,
1435 sizeof(struct slic_shmem *),
1436 adapter->pshmem, adapter->phys_shmem);
1437 adapter->pshmem = NULL;
1438 adapter->phys_shmem = (dma_addr_t) NULL;
1439 }
1440 #if SLIC_GET_STATS_TIMER_ENABLED
1441 if (adapter->statstimerset) {
1442 DBG_MSG("statstimer ");
1443 adapter->statstimerset = 0;
1444 del_timer(&adapter->statstimer);
1445 }
1446 #endif
1447 #if !SLIC_DUMP_ENABLED && SLIC_PING_TIMER_ENABLED
1448 /*#if SLIC_DUMP_ENABLED && SLIC_PING_TIMER_ENABLED*/
1449 if (adapter->pingtimerset) {
1450 DBG_MSG("pingtimer ");
1451 adapter->pingtimerset = 0;
1452 del_timer(&adapter->pingtimer);
1453 }
1454 #endif
1455 slic_rspqueue_free(adapter);
1456 slic_cmdq_free(adapter);
1457 slic_rcvqueue_free(adapter);
1458
1459 DBG_MSG("\n");
1460 }
1461
1462 #if SLIC_GET_STATS_ENABLED
1463 static struct net_device_stats *slic_get_stats(struct net_device *dev)
1464 {
1465 struct adapter *adapter = (struct adapter *)netdev_priv(dev);
1466 struct net_device_stats *stats;
1467
1468 ASSERT(adapter);
1469 stats = &adapter->stats;
1470 stats->collisions = adapter->slic_stats.iface.xmit_collisions;
1471 stats->rx_errors = adapter->slic_stats.iface.rcv_errors;
1472 stats->tx_errors = adapter->slic_stats.iface.xmt_errors;
1473 stats->rx_missed_errors = adapter->slic_stats.iface.rcv_discards;
1474 stats->tx_heartbeat_errors = 0;
1475 stats->tx_aborted_errors = 0;
1476 stats->tx_window_errors = 0;
1477 stats->tx_fifo_errors = 0;
1478 stats->rx_frame_errors = 0;
1479 stats->rx_length_errors = 0;
1480 return &adapter->stats;
1481 }
1482 #endif
1483
1484 /*
1485 * Allocate a mcast_address structure to hold the multicast address.
1486 * Link it in.
1487 */
1488 static int slic_mcast_add_list(struct adapter *adapter, char *address)
1489 {
1490 struct mcast_address *mcaddr, *mlist;
1491 bool equaladdr;
1492
1493 /* Check to see if it already exists */
1494 mlist = adapter->mcastaddrs;
1495 while (mlist) {
1496 ETHER_EQ_ADDR(mlist->address, address, equaladdr);
1497 if (equaladdr)
1498 return STATUS_SUCCESS;
1499 mlist = mlist->next;
1500 }
1501
1502 /* Doesn't already exist. Allocate a structure to hold it */
1503 mcaddr = kmalloc(sizeof(struct mcast_address), GFP_ATOMIC);
1504 if (mcaddr == NULL)
1505 return 1;
1506
1507 memcpy(mcaddr->address, address, 6);
1508
1509 mcaddr->next = adapter->mcastaddrs;
1510 adapter->mcastaddrs = mcaddr;
1511
1512 return STATUS_SUCCESS;
1513 }
1514
1515 /*
1516 * Functions to obtain the CRC corresponding to the destination mac address.
1517 * This is a standard ethernet CRC in that it is a 32-bit, reflected CRC using
1518 * the polynomial:
1519 * x^32 + x^26 + x^23 + x^22 + x^16 + x^12 + x^11 + x^10 + x^8 + x^7 + x^5 +
1520 * x^4 + x^2 + x^1.
1521 *
1522 * After the CRC for the 6 bytes is generated (but before the value is
1523 * complemented),
1524 * we must then transpose the value and return bits 30-23.
1525 *
1526 */
1527 static u32 slic_crc_table[256]; /* Table of CRCs for all possible byte values */
1528 static u32 slic_crc_init; /* Is table initialized */
1529
1530 /*
1531 * Contruct the CRC32 table
1532 */
1533 static void slic_mcast_init_crc32(void)
1534 {
1535 u32 c; /* CRC shit reg */
1536 u32 e = 0; /* Poly X-or pattern */
1537 int i; /* counter */
1538 int k; /* byte being shifted into crc */
1539
1540 static int p[] = { 0, 1, 2, 4, 5, 7, 8, 10, 11, 12, 16, 22, 23, 26 };
1541
1542 for (i = 0; i < sizeof(p) / sizeof(int); i++)
1543 e |= 1L << (31 - p[i]);
1544
1545 for (i = 1; i < 256; i++) {
1546 c = i;
1547 for (k = 8; k; k--)
1548 c = c & 1 ? (c >> 1) ^ e : c >> 1;
1549 slic_crc_table[i] = c;
1550 }
1551 }
1552
1553 /*
1554 * Return the MAC hast as described above.
1555 */
1556 static unsigned char slic_mcast_get_mac_hash(char *macaddr)
1557 {
1558 u32 crc;
1559 char *p;
1560 int i;
1561 unsigned char machash = 0;
1562
1563 if (!slic_crc_init) {
1564 slic_mcast_init_crc32();
1565 slic_crc_init = 1;
1566 }
1567
1568 crc = 0xFFFFFFFF; /* Preload shift register, per crc-32 spec */
1569 for (i = 0, p = macaddr; i < 6; ++p, ++i)
1570 crc = (crc >> 8) ^ slic_crc_table[(crc ^ *p) & 0xFF];
1571
1572 /* Return bits 1-8, transposed */
1573 for (i = 1; i < 9; i++)
1574 machash |= (((crc >> i) & 1) << (8 - i));
1575
1576 return machash;
1577 }
1578
1579 static void slic_mcast_set_bit(struct adapter *adapter, char *address)
1580 {
1581 unsigned char crcpoly;
1582
1583 /* Get the CRC polynomial for the mac address */
1584 crcpoly = slic_mcast_get_mac_hash(address);
1585
1586 /* We only have space on the SLIC for 64 entries. Lop
1587 * off the top two bits. (2^6 = 64)
1588 */
1589 crcpoly &= 0x3F;
1590
1591 /* OR in the new bit into our 64 bit mask. */
1592 adapter->mcastmask |= (u64) 1 << crcpoly;
1593 }
1594
1595 static void slic_mcast_set_list(struct net_device *dev)
1596 {
1597 struct adapter *adapter = (struct adapter *)netdev_priv(dev);
1598 int status = STATUS_SUCCESS;
1599 int i;
1600 char *addresses;
1601 struct dev_mc_list *mc_list = dev->mc_list;
1602 int mc_count = dev->mc_count;
1603
1604 ASSERT(adapter);
1605
1606 for (i = 1; i <= mc_count; i++) {
1607 addresses = (char *) &mc_list->dmi_addr;
1608 if (mc_list->dmi_addrlen == 6) {
1609 status = slic_mcast_add_list(adapter, addresses);
1610 if (status != STATUS_SUCCESS)
1611 break;
1612 } else {
1613 status = -EINVAL;
1614 break;
1615 }
1616 slic_mcast_set_bit(adapter, addresses);
1617 mc_list = mc_list->next;
1618 }
1619
1620 DBG_MSG("%s a->devflags_prev[%x] dev->flags[%x] status[%x]\n",
1621 __func__, adapter->devflags_prev, dev->flags, status);
1622 if (adapter->devflags_prev != dev->flags) {
1623 adapter->macopts = MAC_DIRECTED;
1624 if (dev->flags) {
1625 if (dev->flags & IFF_BROADCAST)
1626 adapter->macopts |= MAC_BCAST;
1627 if (dev->flags & IFF_PROMISC)
1628 adapter->macopts |= MAC_PROMISC;
1629 if (dev->flags & IFF_ALLMULTI)
1630 adapter->macopts |= MAC_ALLMCAST;
1631 if (dev->flags & IFF_MULTICAST)
1632 adapter->macopts |= MAC_MCAST;
1633 }
1634 adapter->devflags_prev = dev->flags;
1635 DBG_MSG("%s call slic_config_set adapter->macopts[%x]\n",
1636 __func__, adapter->macopts);
1637 slic_config_set(adapter, TRUE);
1638 } else {
1639 if (status == STATUS_SUCCESS)
1640 slic_mcast_set_mask(adapter);
1641 }
1642 return;
1643 }
1644
1645 static void slic_mcast_set_mask(struct adapter *adapter)
1646 {
1647 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
1648
1649 DBG_MSG("%s ENTER (%s) macopts[%x] mask[%llx]\n", __func__,
1650 adapter->netdev->name, (uint) adapter->macopts,
1651 adapter->mcastmask);
1652
1653 if (adapter->macopts & (MAC_ALLMCAST | MAC_PROMISC)) {
1654 /* Turn on all multicast addresses. We have to do this for
1655 * promiscuous mode as well as ALLMCAST mode. It saves the
1656 * Microcode from having to keep state about the MAC
1657 * configuration.
1658 */
1659 /* DBG_MSG("slicoss: %s macopts = MAC_ALLMCAST | MAC_PROMISC\n\
1660 SLUT MODE!!!\n",__func__); */
1661 WRITE_REG(slic_regs->slic_mcastlow, 0xFFFFFFFF, FLUSH);
1662 WRITE_REG(slic_regs->slic_mcasthigh, 0xFFFFFFFF, FLUSH);
1663 /* DBG_MSG("%s (%s) WRITE to slic_regs slic_mcastlow&high 0xFFFFFFFF\n",
1664 _func__, adapter->netdev->name); */
1665 } else {
1666 /* Commit our multicast mast to the SLIC by writing to the
1667 * multicast address mask registers
1668 */
1669 DBG_MSG("%s (%s) WRITE mcastlow[%x] mcasthigh[%x]\n",
1670 __func__, adapter->netdev->name,
1671 ((ulong) (adapter->mcastmask & 0xFFFFFFFF)),
1672 ((ulong) ((adapter->mcastmask >> 32) & 0xFFFFFFFF)));
1673
1674 WRITE_REG(slic_regs->slic_mcastlow,
1675 (u32) (adapter->mcastmask & 0xFFFFFFFF), FLUSH);
1676 WRITE_REG(slic_regs->slic_mcasthigh,
1677 (u32) ((adapter->mcastmask >> 32) & 0xFFFFFFFF),
1678 FLUSH);
1679 }
1680 }
1681
1682 static void slic_timer_ping(ulong dev)
1683 {
1684 struct adapter *adapter;
1685 struct sliccard *card;
1686
1687 ASSERT(dev);
1688 adapter = (struct adapter *)((struct net_device *) dev)->priv;
1689 ASSERT(adapter);
1690 card = adapter->card;
1691 ASSERT(card);
1692 #if !SLIC_DUMP_ENABLED
1693 /*#if SLIC_DUMP_ENABLED*/
1694 if ((adapter->state == ADAPT_UP) && (card->state == CARD_UP)) {
1695 int status;
1696
1697 if (card->pingstatus != ISR_PINGMASK) {
1698 if (errormsg++ < 5) {
1699 DBG_MSG
1700 ("%s (%s) CARD HAS CRASHED PING_status == \
1701 %x ERRORMSG# %d\n",
1702 __func__, adapter->netdev->name,
1703 card->pingstatus, errormsg);
1704 }
1705 /* ASSERT(card->pingstatus == ISR_PINGMASK); */
1706 } else {
1707 if (goodmsg++ < 5) {
1708 DBG_MSG
1709 ("slicoss: %s (%s) PING_status == %x \
1710 GOOD!!!!!!!! msg# %d\n",
1711 __func__, adapter->netdev->name,
1712 card->pingstatus, errormsg);
1713 }
1714 }
1715 card->pingstatus = 0;
1716 status = slic_upr_request(adapter, SLIC_UPR_PING, 0, 0, 0, 0);
1717
1718 ASSERT(status == 0);
1719 } else {
1720 DBG_MSG("slicoss %s (%s) adapter[%p] NOT UP!!!!\n",
1721 __func__, adapter->netdev->name, adapter);
1722 }
1723 #endif
1724 adapter->pingtimer.expires =
1725 jiffies + SLIC_SECS_TO_JIFFS(PING_TIMER_INTERVAL);
1726 add_timer(&adapter->pingtimer);
1727 }
1728
1729 static void slic_if_stop_queue(struct adapter *adapter)
1730 {
1731 netif_stop_queue(adapter->netdev);
1732 }
1733
1734 static void slic_if_start_queue(struct adapter *adapter)
1735 {
1736 netif_start_queue(adapter->netdev);
1737 }
1738
1739 /*
1740 * slic_if_init
1741 *
1742 * Perform initialization of our slic interface.
1743 *
1744 */
1745 static int slic_if_init(struct adapter *adapter)
1746 {
1747 struct sliccard *card = adapter->card;
1748 struct net_device *dev = adapter->netdev;
1749 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
1750 struct slic_shmem *pshmem;
1751 int status = 0;
1752
1753 ASSERT(card);
1754 DBG_MSG("slicoss: %s (%s) ENTER states[%d:%d:%d:%d] flags[%x]\n",
1755 __func__, adapter->netdev->name,
1756 adapter->queues_initialized, adapter->state, adapter->linkstate,
1757 card->state, dev->flags);
1758
1759 /* adapter should be down at this point */
1760 if (adapter->state != ADAPT_DOWN) {
1761 DBG_ERROR("slic_if_init adapter->state != ADAPT_DOWN\n");
1762 return -EIO;
1763 }
1764 ASSERT(adapter->linkstate == LINK_DOWN);
1765
1766 adapter->devflags_prev = dev->flags;
1767 adapter->macopts = MAC_DIRECTED;
1768 if (dev->flags) {
1769 DBG_MSG("slicoss: %s (%s) Set MAC options: ", __func__,
1770 adapter->netdev->name);
1771 if (dev->flags & IFF_BROADCAST) {
1772 adapter->macopts |= MAC_BCAST;
1773 DBG_MSG("BCAST ");
1774 }
1775 if (dev->flags & IFF_PROMISC) {
1776 adapter->macopts |= MAC_PROMISC;
1777 DBG_MSG("PROMISC ");
1778 }
1779 if (dev->flags & IFF_ALLMULTI) {
1780 adapter->macopts |= MAC_ALLMCAST;
1781 DBG_MSG("ALL_MCAST ");
1782 }
1783 if (dev->flags & IFF_MULTICAST) {
1784 adapter->macopts |= MAC_MCAST;
1785 DBG_MSG("MCAST ");
1786 }
1787 DBG_MSG("\n");
1788 }
1789 status = slic_adapter_allocresources(adapter);
1790 if (status != STATUS_SUCCESS) {
1791 DBG_ERROR
1792 ("slic_if_init: slic_adapter_allocresources FAILED %x\n",
1793 status);
1794 slic_adapter_freeresources(adapter);
1795 return status;
1796 }
1797
1798 if (!adapter->queues_initialized) {
1799 DBG_MSG("slicoss: %s call slic_rspqueue_init\n", __func__);
1800 if (slic_rspqueue_init(adapter))
1801 return -ENOMEM;
1802 DBG_MSG
1803 ("slicoss: %s call slic_cmdq_init adapter[%p] port %d \n",
1804 __func__, adapter, adapter->port);
1805 if (slic_cmdq_init(adapter))
1806 return -ENOMEM;
1807 DBG_MSG
1808 ("slicoss: %s call slic_rcvqueue_init adapter[%p] \
1809 port %d \n", __func__, adapter, adapter->port);
1810 if (slic_rcvqueue_init(adapter))
1811 return -ENOMEM;
1812 adapter->queues_initialized = 1;
1813 }
1814 DBG_MSG("slicoss: %s disable interrupts(slic)\n", __func__);
1815
1816 WRITE_REG(slic_regs->slic_icr, ICR_INT_OFF, FLUSH);
1817 mdelay(1);
1818
1819 if (!adapter->isp_initialized) {
1820 pshmem = (struct slic_shmem *)adapter->phys_shmem;
1821
1822 spin_lock_irqsave(&adapter->bit64reglock.lock,
1823 adapter->bit64reglock.flags);
1824
1825 #if defined(CONFIG_X86_64)
1826 WRITE_REG(slic_regs->slic_addr_upper,
1827 SLIC_GET_ADDR_HIGH(&pshmem->isr), DONT_FLUSH);
1828 WRITE_REG(slic_regs->slic_isp,
1829 SLIC_GET_ADDR_LOW(&pshmem->isr), FLUSH);
1830 #elif defined(CONFIG_X86)
1831 WRITE_REG(slic_regs->slic_addr_upper, (u32) 0, DONT_FLUSH);
1832 WRITE_REG(slic_regs->slic_isp, (u32) &pshmem->isr, FLUSH);
1833 #else
1834 Stop Compilations
1835 #endif
1836 spin_unlock_irqrestore(&adapter->bit64reglock.lock,
1837 adapter->bit64reglock.flags);
1838 adapter->isp_initialized = 1;
1839 }
1840
1841 adapter->state = ADAPT_UP;
1842 if (!card->loadtimerset) {
1843 init_timer(&card->loadtimer);
1844 card->loadtimer.expires =
1845 jiffies + SLIC_SECS_TO_JIFFS(SLIC_LOADTIMER_PERIOD);
1846 card->loadtimer.data = (ulong) card;
1847 card->loadtimer.function = &slic_timer_load_check;
1848 add_timer(&card->loadtimer);
1849
1850 card->loadtimerset = 1;
1851 }
1852 #if SLIC_GET_STATS_TIMER_ENABLED
1853 if (!adapter->statstimerset) {
1854 DBG_MSG("slicoss: %s start getstats_timer(slic)\n",
1855 __func__);
1856 init_timer(&adapter->statstimer);
1857 adapter->statstimer.expires =
1858 jiffies + SLIC_SECS_TO_JIFFS(STATS_TIMER_INTERVAL);
1859 adapter->statstimer.data = (ulong) adapter->netdev;
1860 adapter->statstimer.function = &slic_timer_get_stats;
1861 add_timer(&adapter->statstimer);
1862 adapter->statstimerset = 1;
1863 }
1864 #endif
1865 #if !SLIC_DUMP_ENABLED && SLIC_PING_TIMER_ENABLED
1866 /*#if SLIC_DUMP_ENABLED && SLIC_PING_TIMER_ENABLED*/
1867 if (!adapter->pingtimerset) {
1868 DBG_MSG("slicoss: %s start card_ping_timer(slic)\n",
1869 __func__);
1870 init_timer(&adapter->pingtimer);
1871 adapter->pingtimer.expires =
1872 jiffies + SLIC_SECS_TO_JIFFS(PING_TIMER_INTERVAL);
1873 adapter->pingtimer.data = (ulong) dev;
1874 adapter->pingtimer.function = &slic_timer_ping;
1875 add_timer(&adapter->pingtimer);
1876 adapter->pingtimerset = 1;
1877 adapter->card->pingstatus = ISR_PINGMASK;
1878 }
1879 #endif
1880
1881 /*
1882 * clear any pending events, then enable interrupts
1883 */
1884 DBG_MSG("slicoss: %s ENABLE interrupts(slic)\n", __func__);
1885 adapter->isrcopy = 0;
1886 adapter->pshmem->isr = 0;
1887 WRITE_REG(slic_regs->slic_isr, 0, FLUSH);
1888 WRITE_REG(slic_regs->slic_icr, ICR_INT_ON, FLUSH);
1889
1890 DBG_MSG("slicoss: %s call slic_link_config(slic)\n", __func__);
1891 slic_link_config(adapter, LINK_AUTOSPEED, LINK_AUTOD);
1892 slic_link_event_handler(adapter);
1893
1894 DBG_MSG("slicoss: %s EXIT\n", __func__);
1895 return STATUS_SUCCESS;
1896 }
1897
1898 static void slic_unmap_mmio_space(struct adapter *adapter)
1899 {
1900 #if LINUX_FREES_ADAPTER_RESOURCES
1901 if (adapter->slic_regs)
1902 iounmap(adapter->slic_regs);
1903 adapter->slic_regs = NULL;
1904 #endif
1905 }
1906
1907 static int slic_adapter_allocresources(struct adapter *adapter)
1908 {
1909 if (!adapter->intrregistered) {
1910 int retval;
1911
1912 DBG_MSG
1913 ("slicoss: %s AllocAdaptRsrcs adapter[%p] shmem[%p] \
1914 phys_shmem[%p] dev->irq[%x] %x\n",
1915 __func__, adapter, adapter->pshmem,
1916 (void *)adapter->phys_shmem, adapter->netdev->irq,
1917 NR_IRQS);
1918
1919 spin_unlock_irqrestore(&slic_global.driver_lock.lock,
1920 slic_global.driver_lock.flags);
1921
1922 retval = request_irq(adapter->netdev->irq,
1923 &slic_interrupt,
1924 IRQF_SHARED,
1925 adapter->netdev->name, adapter->netdev);
1926
1927 spin_lock_irqsave(&slic_global.driver_lock.lock,
1928 slic_global.driver_lock.flags);
1929
1930 if (retval) {
1931 DBG_ERROR("slicoss: request_irq (%s) FAILED [%x]\n",
1932 adapter->netdev->name, retval);
1933 return retval;
1934 }
1935 adapter->intrregistered = 1;
1936 DBG_MSG
1937 ("slicoss: %s AllocAdaptRsrcs adapter[%p] shmem[%p] \
1938 pshmem[%p] dev->irq[%x]\n",
1939 __func__, adapter, adapter->pshmem,
1940 (void *)adapter->pshmem, adapter->netdev->irq);
1941 }
1942 return STATUS_SUCCESS;
1943 }
1944
1945 static void slic_config_pci(struct pci_dev *pcidev)
1946 {
1947 u16 pci_command;
1948 u16 new_command;
1949
1950 pci_read_config_word(pcidev, PCI_COMMAND, &pci_command);
1951 DBG_MSG("slicoss: %s PCI command[%4.4x]\n", __func__, pci_command);
1952
1953 new_command = pci_command | PCI_COMMAND_MASTER
1954 | PCI_COMMAND_MEMORY
1955 | PCI_COMMAND_INVALIDATE
1956 | PCI_COMMAND_PARITY | PCI_COMMAND_SERR | PCI_COMMAND_FAST_BACK;
1957 if (pci_command != new_command) {
1958 DBG_MSG("%s -- Updating PCI COMMAND register %4.4x->%4.4x.\n",
1959 __func__, pci_command, new_command);
1960 pci_write_config_word(pcidev, PCI_COMMAND, new_command);
1961 }
1962 }
1963
1964 static void slic_adapter_freeresources(struct adapter *adapter)
1965 {
1966 DBG_MSG("slicoss: %s ENTER adapter[%p]\n", __func__, adapter);
1967 slic_init_cleanup(adapter);
1968 memset(&adapter->stats, 0, sizeof(struct net_device_stats));
1969 adapter->error_interrupts = 0;
1970 adapter->rcv_interrupts = 0;
1971 adapter->xmit_interrupts = 0;
1972 adapter->linkevent_interrupts = 0;
1973 adapter->upr_interrupts = 0;
1974 adapter->num_isrs = 0;
1975 adapter->xmit_completes = 0;
1976 adapter->rcv_broadcasts = 0;
1977 adapter->rcv_multicasts = 0;
1978 adapter->rcv_unicasts = 0;
1979 DBG_MSG("slicoss: %s EXIT\n", __func__);
1980 }
1981
1982 /*
1983 * slic_link_config
1984 *
1985 * Write phy control to configure link duplex/speed
1986 *
1987 */
1988 static void slic_link_config(struct adapter *adapter,
1989 u32 linkspeed, u32 linkduplex)
1990 {
1991 u32 speed;
1992 u32 duplex;
1993 u32 phy_config;
1994 u32 phy_advreg;
1995 u32 phy_gctlreg;
1996
1997 if (adapter->state != ADAPT_UP) {
1998 DBG_MSG
1999 ("%s (%s) ADAPT Not up yet, Return! speed[%x] duplex[%x]\n",
2000 __func__, adapter->netdev->name, linkspeed,
2001 linkduplex);
2002 return;
2003 }
2004 DBG_MSG("slicoss: %s (%s) slic_link_config: speed[%x] duplex[%x]\n",
2005 __func__, adapter->netdev->name, linkspeed, linkduplex);
2006
2007 ASSERT((adapter->devid == SLIC_1GB_DEVICE_ID)
2008 || (adapter->devid == SLIC_2GB_DEVICE_ID));
2009
2010 if (linkspeed > LINK_1000MB)
2011 linkspeed = LINK_AUTOSPEED;
2012 if (linkduplex > LINK_AUTOD)
2013 linkduplex = LINK_AUTOD;
2014
2015 if ((linkspeed == LINK_AUTOSPEED) || (linkspeed == LINK_1000MB)) {
2016 if (adapter->flags & ADAPT_FLAGS_FIBERMEDIA) {
2017 /* We've got a fiber gigabit interface, and register
2018 * 4 is different in fiber mode than in copper mode
2019 */
2020
2021 /* advertise FD only @1000 Mb */
2022 phy_advreg = (MIICR_REG_4 | (PAR_ADV1000XFD));
2023 /* enable PAUSE frames */
2024 phy_advreg |= PAR_ASYMPAUSE_FIBER;
2025 WRITE_REG(adapter->slic_regs->slic_wphy, phy_advreg,
2026 FLUSH);
2027
2028 if (linkspeed == LINK_AUTOSPEED) {
2029 /* reset phy, enable auto-neg */
2030 phy_config =
2031 (MIICR_REG_PCR |
2032 (PCR_RESET | PCR_AUTONEG |
2033 PCR_AUTONEG_RST));
2034 WRITE_REG(adapter->slic_regs->slic_wphy,
2035 phy_config, FLUSH);
2036 } else { /* forced 1000 Mb FD*/
2037 /* power down phy to break link
2038 this may not work) */
2039 phy_config = (MIICR_REG_PCR | PCR_POWERDOWN);
2040 WRITE_REG(adapter->slic_regs->slic_wphy,
2041 phy_config, FLUSH);
2042 /* wait, Marvell says 1 sec,
2043 try to get away with 10 ms */
2044 mdelay(10);
2045
2046 /* disable auto-neg, set speed/duplex,
2047 soft reset phy, powerup */
2048 phy_config =
2049 (MIICR_REG_PCR |
2050 (PCR_RESET | PCR_SPEED_1000 |
2051 PCR_DUPLEX_FULL));
2052 WRITE_REG(adapter->slic_regs->slic_wphy,
2053 phy_config, FLUSH);
2054 }
2055 } else { /* copper gigabit */
2056
2057 /* Auto-Negotiate or 1000 Mb must be auto negotiated
2058 * We've got a copper gigabit interface, and
2059 * register 4 is different in copper mode than
2060 * in fiber mode
2061 */
2062 if (linkspeed == LINK_AUTOSPEED) {
2063 /* advertise 10/100 Mb modes */
2064 phy_advreg =
2065 (MIICR_REG_4 |
2066 (PAR_ADV100FD | PAR_ADV100HD | PAR_ADV10FD
2067 | PAR_ADV10HD));
2068 } else {
2069 /* linkspeed == LINK_1000MB -
2070 don't advertise 10/100 Mb modes */
2071 phy_advreg = MIICR_REG_4;
2072 }
2073 /* enable PAUSE frames */
2074 phy_advreg |= PAR_ASYMPAUSE;
2075 /* required by the Cicada PHY */
2076 phy_advreg |= PAR_802_3;
2077 WRITE_REG(adapter->slic_regs->slic_wphy, phy_advreg,
2078 FLUSH);
2079 /* advertise FD only @1000 Mb */
2080 phy_gctlreg = (MIICR_REG_9 | (PGC_ADV1000FD));
2081 WRITE_REG(adapter->slic_regs->slic_wphy, phy_gctlreg,
2082 FLUSH);
2083
2084 if (adapter->subsysid != SLIC_1GB_CICADA_SUBSYS_ID) {
2085 /* if a Marvell PHY
2086 enable auto crossover */
2087 phy_config =
2088 (MIICR_REG_16 | (MRV_REG16_XOVERON));
2089 WRITE_REG(adapter->slic_regs->slic_wphy,
2090 phy_config, FLUSH);
2091
2092 /* reset phy, enable auto-neg */
2093 phy_config =
2094 (MIICR_REG_PCR |
2095 (PCR_RESET | PCR_AUTONEG |
2096 PCR_AUTONEG_RST));
2097 WRITE_REG(adapter->slic_regs->slic_wphy,
2098 phy_config, FLUSH);
2099 } else { /* it's a Cicada PHY */
2100 /* enable and restart auto-neg (don't reset) */
2101 phy_config =
2102 (MIICR_REG_PCR |
2103 (PCR_AUTONEG | PCR_AUTONEG_RST));
2104 WRITE_REG(adapter->slic_regs->slic_wphy,
2105 phy_config, FLUSH);
2106 }
2107 }
2108 } else {
2109 /* Forced 10/100 */
2110 if (linkspeed == LINK_10MB)
2111 speed = 0;
2112 else
2113 speed = PCR_SPEED_100;
2114 if (linkduplex == LINK_HALFD)
2115 duplex = 0;
2116 else
2117 duplex = PCR_DUPLEX_FULL;
2118
2119 if (adapter->subsysid != SLIC_1GB_CICADA_SUBSYS_ID) {
2120 /* if a Marvell PHY
2121 disable auto crossover */
2122 phy_config = (MIICR_REG_16 | (MRV_REG16_XOVEROFF));
2123 WRITE_REG(adapter->slic_regs->slic_wphy, phy_config,
2124 FLUSH);
2125 }
2126
2127 /* power down phy to break link (this may not work) */
2128 phy_config = (MIICR_REG_PCR | (PCR_POWERDOWN | speed | duplex));
2129 WRITE_REG(adapter->slic_regs->slic_wphy, phy_config, FLUSH);
2130
2131 /* wait, Marvell says 1 sec, try to get away with 10 ms */
2132 mdelay(10);
2133
2134 if (adapter->subsysid != SLIC_1GB_CICADA_SUBSYS_ID) {
2135 /* if a Marvell PHY
2136 disable auto-neg, set speed,
2137 soft reset phy, powerup */
2138 phy_config =
2139 (MIICR_REG_PCR | (PCR_RESET | speed | duplex));
2140 WRITE_REG(adapter->slic_regs->slic_wphy, phy_config,
2141 FLUSH);
2142 } else { /* it's a Cicada PHY */
2143 /* disable auto-neg, set speed, powerup */
2144 phy_config = (MIICR_REG_PCR | (speed | duplex));
2145 WRITE_REG(adapter->slic_regs->slic_wphy, phy_config,
2146 FLUSH);
2147 }
2148 }
2149
2150 DBG_MSG
2151 ("slicoss: %s (%s) EXIT slic_link_config : state[%d] \
2152 phy_config[%x]\n", __func__, adapter->netdev->name, adapter->state,
2153 phy_config);
2154 }
2155
2156 static void slic_card_cleanup(struct sliccard *card)
2157 {
2158 DBG_MSG("slicoss: %s ENTER\n", __func__);
2159
2160 #if SLIC_DUMP_ENABLED
2161 if (card->dumpbuffer) {
2162 card->dumpbuffer_phys = 0;
2163 card->dumpbuffer_physl = 0;
2164 card->dumpbuffer_physh = 0;
2165 kfree(card->dumpbuffer);
2166 card->dumpbuffer = NULL;
2167 }
2168 if (card->cmdbuffer) {
2169 card->cmdbuffer_phys = 0;
2170 card->cmdbuffer_physl = 0;
2171 card->cmdbuffer_physh = 0;
2172 kfree(card->cmdbuffer);
2173 card->cmdbuffer = NULL;
2174 }
2175 #endif
2176
2177 if (card->loadtimerset) {
2178 card->loadtimerset = 0;
2179 del_timer(&card->loadtimer);
2180 }
2181
2182 slic_debug_card_destroy(card);
2183
2184 kfree(card);
2185 DBG_MSG("slicoss: %s EXIT\n", __func__);
2186 }
2187
2188 static int slic_card_download_gbrcv(struct adapter *adapter)
2189 {
2190 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
2191 u32 codeaddr;
2192 unsigned char *instruction = NULL;
2193 u32 rcvucodelen = 0;
2194
2195 switch (adapter->devid) {
2196 case SLIC_2GB_DEVICE_ID:
2197 instruction = (unsigned char *)&OasisRcvUCode[0];
2198 rcvucodelen = OasisRcvUCodeLen;
2199 break;
2200 case SLIC_1GB_DEVICE_ID:
2201 instruction = (unsigned char *)&GBRcvUCode[0];
2202 rcvucodelen = GBRcvUCodeLen;
2203 break;
2204 default:
2205 ASSERT(0);
2206 break;
2207 }
2208
2209 /* start download */
2210 WRITE_REG(slic_regs->slic_rcv_wcs, SLIC_RCVWCS_BEGIN, FLUSH);
2211
2212 /* download the rcv sequencer ucode */
2213 for (codeaddr = 0; codeaddr < rcvucodelen; codeaddr++) {
2214 /* write out instruction address */
2215 WRITE_REG(slic_regs->slic_rcv_wcs, codeaddr, FLUSH);
2216
2217 /* write out the instruction data low addr */
2218 WRITE_REG(slic_regs->slic_rcv_wcs,
2219 (u32) *(u32 *) instruction, FLUSH);
2220 instruction += 4;
2221
2222 /* write out the instruction data high addr */
2223 WRITE_REG(slic_regs->slic_rcv_wcs, (u32) *instruction,
2224 FLUSH);
2225 instruction += 1;
2226 }
2227
2228 /* download finished */
2229 WRITE_REG(slic_regs->slic_rcv_wcs, SLIC_RCVWCS_FINISH, FLUSH);
2230
2231 return 0;
2232 }
2233
2234 static int slic_card_download(struct adapter *adapter)
2235 {
2236 u32 section;
2237 int thissectionsize;
2238 int codeaddr;
2239 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
2240 u32 *instruction = NULL;
2241 u32 *lastinstruct = NULL;
2242 u32 *startinstruct = NULL;
2243 unsigned char *nextinstruct;
2244 u32 baseaddress;
2245 u32 failure;
2246 u32 i;
2247 u32 numsects = 0;
2248 u32 sectsize[3];
2249 u32 sectstart[3];
2250
2251 /* DBG_MSG ("slicoss: %s (%s) adapter[%p] card[%p] devid[%x] \
2252 jiffies[%lx] cpu %d\n", __func__, adapter->netdev->name, adapter,
2253 adapter->card, adapter->devid,jiffies, smp_processor_id()); */
2254
2255 switch (adapter->devid) {
2256 case SLIC_2GB_DEVICE_ID:
2257 /* DBG_MSG ("slicoss: %s devid==SLIC_2GB_DEVICE_ID sections[%x]\n",
2258 __func__, (uint) ONumSections); */
2259 numsects = ONumSections;
2260 for (i = 0; i < numsects; i++) {
2261 sectsize[i] = OSectionSize[i];
2262 sectstart[i] = OSectionStart[i];
2263 }
2264 break;
2265 case SLIC_1GB_DEVICE_ID:
2266 /* DBG_MSG ("slicoss: %s devid==SLIC_1GB_DEVICE_ID sections[%x]\n",
2267 __func__, (uint) MNumSections); */
2268 numsects = MNumSections;
2269 for (i = 0; i < numsects; i++) {
2270 sectsize[i] = MSectionSize[i];
2271 sectstart[i] = MSectionStart[i];
2272 }
2273 break;
2274 default:
2275 ASSERT(0);
2276 break;
2277 }
2278
2279 ASSERT(numsects <= 3);
2280
2281 for (section = 0; section < numsects; section++) {
2282 switch (adapter->devid) {
2283 case SLIC_2GB_DEVICE_ID:
2284 instruction = (u32 *) &OasisUCode[section][0];
2285 baseaddress = sectstart[section];
2286 thissectionsize = sectsize[section] >> 3;
2287 lastinstruct =
2288 (u32 *) &OasisUCode[section][sectsize[section] -
2289 8];
2290 break;
2291 case SLIC_1GB_DEVICE_ID:
2292 instruction = (u32 *) &MojaveUCode[section][0];
2293 baseaddress = sectstart[section];
2294 thissectionsize = sectsize[section] >> 3;
2295 lastinstruct =
2296 (u32 *) &MojaveUCode[section][sectsize[section]
2297 - 8];
2298 break;
2299 default:
2300 ASSERT(0);
2301 break;
2302 }
2303
2304 baseaddress = sectstart[section];
2305 thissectionsize = sectsize[section] >> 3;
2306
2307 for (codeaddr = 0; codeaddr < thissectionsize; codeaddr++) {
2308 startinstruct = instruction;
2309 nextinstruct = ((unsigned char *)instruction) + 8;
2310 /* Write out instruction address */
2311 WRITE_REG(slic_regs->slic_wcs, baseaddress + codeaddr,
2312 FLUSH);
2313 /* Write out instruction to low addr */
2314 WRITE_REG(slic_regs->slic_wcs, *instruction, FLUSH);
2315 #ifdef CONFIG_X86_64
2316 instruction = (u32 *)((unsigned char *)instruction + 4);
2317 #else
2318 instruction++;
2319 #endif
2320 /* Write out instruction to high addr */
2321 WRITE_REG(slic_regs->slic_wcs, *instruction, FLUSH);
2322 #ifdef CONFIG_X86_64
2323 instruction = (u32 *)((unsigned char *)instruction + 4);
2324 #else
2325 instruction++;
2326 #endif
2327 }
2328 }
2329
2330 for (section = 0; section < numsects; section++) {
2331 switch (adapter->devid) {
2332 case SLIC_2GB_DEVICE_ID:
2333 instruction = (u32 *)&OasisUCode[section][0];
2334 break;
2335 case SLIC_1GB_DEVICE_ID:
2336 instruction = (u32 *)&MojaveUCode[section][0];
2337 break;
2338 default:
2339 ASSERT(0);
2340 break;
2341 }
2342
2343 baseaddress = sectstart[section];
2344 if (baseaddress < 0x8000)
2345 continue;
2346 thissectionsize = sectsize[section] >> 3;
2347
2348 /* DBG_MSG ("slicoss: COMPARE secton[%x] baseaddr[%x] sectnsize[%x]\n",
2349 (uint)section,baseaddress,thissectionsize);*/
2350
2351 for (codeaddr = 0; codeaddr < thissectionsize; codeaddr++) {
2352 /* Write out instruction address */
2353 WRITE_REG(slic_regs->slic_wcs,
2354 SLIC_WCS_COMPARE | (baseaddress + codeaddr),
2355 FLUSH);
2356 /* Write out instruction to low addr */
2357 WRITE_REG(slic_regs->slic_wcs, *instruction, FLUSH);
2358 #ifdef CONFIG_X86_64
2359 instruction = (u32 *)((unsigned char *)instruction + 4);
2360 #else
2361 instruction++;
2362 #endif
2363 /* Write out instruction to high addr */
2364 WRITE_REG(slic_regs->slic_wcs, *instruction, FLUSH);
2365 #ifdef CONFIG_X86_64
2366 instruction = (u32 *)((unsigned char *)instruction + 4);
2367 #else
2368 instruction++;
2369 #endif
2370 /* Check SRAM location zero. If it is non-zero. Abort.*/
2371 failure = readl((u32 __iomem *)&slic_regs->slic_reset);
2372 if (failure) {
2373 DBG_MSG
2374 ("slicoss: %s FAILURE EXIT codeaddr[%x] \
2375 thissectionsize[%x] failure[%x]\n",
2376 __func__, codeaddr, thissectionsize,
2377 failure);
2378
2379 return -EIO;
2380 }
2381 }
2382 }
2383 /* DBG_MSG ("slicoss: Compare done\n");*/
2384
2385 /* Everything OK, kick off the card */
2386 mdelay(10);
2387 WRITE_REG(slic_regs->slic_wcs, SLIC_WCS_START, FLUSH);
2388
2389 /* stall for 20 ms, long enough for ucode to init card
2390 and reach mainloop */
2391 mdelay(20);
2392
2393 DBG_MSG("slicoss: %s (%s) EXIT adapter[%p] card[%p]\n",
2394 __func__, adapter->netdev->name, adapter, adapter->card);
2395
2396 return STATUS_SUCCESS;
2397 }
2398
2399 static void slic_adapter_set_hwaddr(struct adapter *adapter)
2400 {
2401 struct sliccard *card = adapter->card;
2402
2403 /* DBG_MSG ("%s ENTER card->config_set[%x] port[%d] physport[%d] funct#[%d]\n",
2404 __func__, card->config_set, adapter->port, adapter->physport,
2405 adapter->functionnumber);
2406
2407 slic_dbg_macaddrs(adapter); */
2408
2409 if ((adapter->card) && (card->config_set)) {
2410 memcpy(adapter->macaddr,
2411 card->config.MacInfo[adapter->functionnumber].macaddrA,
2412 sizeof(struct slic_config_mac));
2413 /* DBG_MSG ("%s AFTER copying from config.macinfo into currmacaddr\n",
2414 __func__);
2415 slic_dbg_macaddrs(adapter);*/
2416 if (!(adapter->currmacaddr[0] || adapter->currmacaddr[1] ||
2417 adapter->currmacaddr[2] || adapter->currmacaddr[3] ||
2418 adapter->currmacaddr[4] || adapter->currmacaddr[5])) {
2419 memcpy(adapter->currmacaddr, adapter->macaddr, 6);
2420 }
2421 if (adapter->netdev) {
2422 memcpy(adapter->netdev->dev_addr, adapter->currmacaddr,
2423 6);
2424 }
2425 }
2426 /* DBG_MSG ("%s EXIT port %d\n", __func__, adapter->port);
2427 slic_dbg_macaddrs(adapter); */
2428 }
2429
2430 static void slic_intagg_set(struct adapter *adapter, u32 value)
2431 {
2432 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
2433
2434 WRITE_REG(slic_regs->slic_intagg, value, FLUSH);
2435 adapter->card->loadlevel_current = value;
2436 }
2437
2438 static int slic_card_init(struct sliccard *card, struct adapter *adapter)
2439 {
2440 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
2441 struct slic_eeprom *peeprom;
2442 struct oslic_eeprom *pOeeprom;
2443 dma_addr_t phys_config;
2444 u32 phys_configh;
2445 u32 phys_configl;
2446 u32 i = 0;
2447 struct slic_shmem *pshmem;
2448 int status;
2449 uint macaddrs = card->card_size;
2450 ushort eecodesize;
2451 ushort dramsize;
2452 ushort ee_chksum;
2453 ushort calc_chksum;
2454 struct slic_config_mac *pmac;
2455 unsigned char fruformat;
2456 unsigned char oemfruformat;
2457 struct atk_fru *patkfru;
2458 union oemfru *poemfru;
2459
2460 DBG_MSG
2461 ("slicoss: %s ENTER card[%p] adapter[%p] card->state[%x] \
2462 size[%d]\n", __func__, card, adapter, card->state, card->card_size);
2463
2464 /* Reset everything except PCI configuration space */
2465 slic_soft_reset(adapter);
2466
2467 /* Download the microcode */
2468 status = slic_card_download(adapter);
2469
2470 if (status != STATUS_SUCCESS) {
2471 DBG_ERROR("SLIC download failed bus %d slot %d\n",
2472 (uint) adapter->busnumber,
2473 (uint) adapter->slotnumber);
2474 return status;
2475 }
2476
2477 if (!card->config_set) {
2478 peeprom = pci_alloc_consistent(adapter->pcidev,
2479 sizeof(struct slic_eeprom),
2480 &phys_config);
2481
2482 phys_configl = SLIC_GET_ADDR_LOW(phys_config);
2483 phys_configh = SLIC_GET_ADDR_HIGH(phys_config);
2484
2485 DBG_MSG("slicoss: %s Eeprom info adapter [%p]\n "
2486 "size [%x]\n peeprom [%p]\n "
2487 "phys_config [%p]\n phys_configl[%x]\n "
2488 "phys_configh[%x]\n",
2489 __func__, adapter,
2490 (u32)sizeof(struct slic_eeprom),
2491 peeprom, (void *) phys_config, phys_configl,
2492 phys_configh);
2493 if (!peeprom) {
2494 DBG_ERROR
2495 ("SLIC eeprom read failed to get memory bus %d \
2496 slot %d\n",
2497 (uint) adapter->busnumber,
2498 (uint) adapter->slotnumber);
2499 return -ENOMEM;
2500 } else {
2501 memset(peeprom, 0, sizeof(struct slic_eeprom));
2502 }
2503 WRITE_REG(slic_regs->slic_icr, ICR_INT_OFF, FLUSH);
2504 mdelay(1);
2505 pshmem = (struct slic_shmem *)adapter->phys_shmem;
2506
2507 spin_lock_irqsave(&adapter->bit64reglock.lock,
2508 adapter->bit64reglock.flags);
2509 WRITE_REG(slic_regs->slic_addr_upper, 0, DONT_FLUSH);
2510 WRITE_REG(slic_regs->slic_isp,
2511 SLIC_GET_ADDR_LOW(&pshmem->isr), FLUSH);
2512 spin_unlock_irqrestore(&adapter->bit64reglock.lock,
2513 adapter->bit64reglock.flags);
2514
2515 slic_config_get(adapter, phys_configl, phys_configh);
2516
2517 for (;;) {
2518 if (adapter->pshmem->isr) {
2519 DBG_MSG("%s shmem[%p] shmem->isr[%x]\n",
2520 __func__, adapter->pshmem,
2521 adapter->pshmem->isr);
2522
2523 if (adapter->pshmem->isr & ISR_UPC) {
2524 adapter->pshmem->isr = 0;
2525 WRITE_REG64(adapter,
2526 slic_regs->slic_isp,
2527 0,
2528 slic_regs->slic_addr_upper,
2529 0, FLUSH);
2530 WRITE_REG(slic_regs->slic_isr, 0,
2531 FLUSH);
2532
2533 slic_upr_request_complete(adapter, 0);
2534 break;
2535 } else {
2536 adapter->pshmem->isr = 0;
2537 WRITE_REG(slic_regs->slic_isr, 0,
2538 FLUSH);
2539 }
2540 } else {
2541 mdelay(1);
2542 i++;
2543 if (i > 5000) {
2544 DBG_ERROR
2545 ("SLIC: %d config data fetch timed\
2546 out!\n", adapter->port);
2547 DBG_MSG("%s shmem[%p] shmem->isr[%x]\n",
2548 __func__, adapter->pshmem,
2549 adapter->pshmem->isr);
2550 WRITE_REG64(adapter,
2551 slic_regs->slic_isp, 0,
2552 slic_regs->slic_addr_upper,
2553 0, FLUSH);
2554 return -EINVAL;
2555 }
2556 }
2557 }
2558
2559 switch (adapter->devid) {
2560 /* Oasis card */
2561 case SLIC_2GB_DEVICE_ID:
2562 /* extract EEPROM data and pointers to EEPROM data */
2563 pOeeprom = (struct oslic_eeprom *) peeprom;
2564 eecodesize = pOeeprom->EecodeSize;
2565 dramsize = pOeeprom->DramSize;
2566 pmac = pOeeprom->MacInfo;
2567 fruformat = pOeeprom->FruFormat;
2568 patkfru = &pOeeprom->AtkFru;
2569 oemfruformat = pOeeprom->OemFruFormat;
2570 poemfru = &pOeeprom->OemFru;
2571 macaddrs = 2;
2572 /* Minor kludge for Oasis card
2573 get 2 MAC addresses from the
2574 EEPROM to ensure that function 1
2575 gets the Port 1 MAC address */
2576 break;
2577 default:
2578 /* extract EEPROM data and pointers to EEPROM data */
2579 eecodesize = peeprom->EecodeSize;
2580 dramsize = peeprom->DramSize;
2581 pmac = peeprom->u2.mac.MacInfo;
2582 fruformat = peeprom->FruFormat;
2583 patkfru = &peeprom->AtkFru;
2584 oemfruformat = peeprom->OemFruFormat;
2585 poemfru = &peeprom->OemFru;
2586 break;
2587 }
2588
2589 card->config.EepromValid = FALSE;
2590
2591 /* see if the EEPROM is valid by checking it's checksum */
2592 if ((eecodesize <= MAX_EECODE_SIZE) &&
2593 (eecodesize >= MIN_EECODE_SIZE)) {
2594
2595 ee_chksum =
2596 *(u16 *) ((char *) peeprom + (eecodesize - 2));
2597 /*
2598 calculate the EEPROM checksum
2599 */
2600 calc_chksum =
2601 ~slic_eeprom_cksum((char *) peeprom,
2602 (eecodesize - 2));
2603 /*
2604 if the ucdoe chksum flag bit worked,
2605 we wouldn't need this shit
2606 */
2607 if (ee_chksum == calc_chksum)
2608 card->config.EepromValid = TRUE;
2609 }
2610 /* copy in the DRAM size */
2611 card->config.DramSize = dramsize;
2612
2613 /* copy in the MAC address(es) */
2614 for (i = 0; i < macaddrs; i++) {
2615 memcpy(&card->config.MacInfo[i],
2616 &pmac[i], sizeof(struct slic_config_mac));
2617 }
2618 /* DBG_MSG ("%s EEPROM Checksum Good? %d MacAddress\n",__func__,
2619 card->config.EepromValid); */
2620
2621 /* copy the Alacritech FRU information */
2622 card->config.FruFormat = fruformat;
2623 memcpy(&card->config.AtkFru, patkfru,
2624 sizeof(struct atk_fru));
2625
2626 pci_free_consistent(adapter->pcidev,
2627 sizeof(struct slic_eeprom),
2628 peeprom, phys_config);
2629 DBG_MSG
2630 ("slicoss: %s adapter%d [%p] size[%x] FREE peeprom[%p] \
2631 phys_config[%p]\n",
2632 __func__, adapter->port, adapter,
2633 (u32) sizeof(struct slic_eeprom), peeprom,
2634 (void *) phys_config);
2635
2636 if ((!card->config.EepromValid) &&
2637 (adapter->reg_params.fail_on_bad_eeprom)) {
2638 WRITE_REG64(adapter,
2639 slic_regs->slic_isp,
2640 0, slic_regs->slic_addr_upper, 0, FLUSH);
2641 DBG_ERROR
2642 ("unsupported CONFIGURATION EEPROM invalid\n");
2643 return -EINVAL;
2644 }
2645
2646 card->config_set = 1;
2647 }
2648
2649 if (slic_card_download_gbrcv(adapter)) {
2650 DBG_ERROR("%s unable to download GB receive microcode\n",
2651 __func__);
2652 return -EINVAL;
2653 }
2654
2655 if (slic_global.dynamic_intagg) {
2656 DBG_MSG
2657 ("Dynamic Interrupt Aggregation[ENABLED]: slic%d \
2658 SET intagg to %d\n",
2659 card->cardnum, 0);
2660 slic_intagg_set(adapter, 0);
2661 } else {
2662 slic_intagg_set(adapter, intagg_delay);
2663 DBG_MSG
2664 ("Dynamic Interrupt Aggregation[DISABLED]: slic%d \
2665 SET intagg to %d\n",
2666 card->cardnum, intagg_delay);
2667 }
2668
2669 /*
2670 * Initialize ping status to "ok"
2671 */
2672 card->pingstatus = ISR_PINGMASK;
2673
2674 #if SLIC_DUMP_ENABLED
2675 if (!card->dumpbuffer) {
2676 card->dumpbuffer = kmalloc(DUMP_PAGE_SIZE, GFP_ATOMIC);
2677
2678 ASSERT(card->dumpbuffer);
2679 if (card->dumpbuffer == NULL)
2680 return -ENOMEM;
2681 }
2682 /*
2683 * Smear the shared memory structure and then obtain
2684 * the PHYSICAL address of this structure
2685 */
2686 memset(card->dumpbuffer, 0, DUMP_PAGE_SIZE);
2687 card->dumpbuffer_phys = virt_to_bus(card->dumpbuffer);
2688 card->dumpbuffer_physh = SLIC_GET_ADDR_HIGH(card->dumpbuffer_phys);
2689 card->dumpbuffer_physl = SLIC_GET_ADDR_LOW(card->dumpbuffer_phys);
2690
2691 /*
2692 * Allocate COMMAND BUFFER
2693 */
2694 if (!card->cmdbuffer) {
2695 card->cmdbuffer = kmalloc(sizeof(struct dump_cmd), GFP_ATOMIC);
2696
2697 ASSERT(card->cmdbuffer);
2698 if (card->cmdbuffer == NULL)
2699 return -ENOMEM;
2700 }
2701 /*
2702 * Smear the shared memory structure and then obtain
2703 * the PHYSICAL address of this structure
2704 */
2705 memset(card->cmdbuffer, 0, sizeof(struct dump_cmd));
2706 card->cmdbuffer_phys = virt_to_bus(card->cmdbuffer);
2707 card->cmdbuffer_physh = SLIC_GET_ADDR_HIGH(card->cmdbuffer_phys);
2708 card->cmdbuffer_physl = SLIC_GET_ADDR_LOW(card->cmdbuffer_phys);
2709 #endif
2710
2711 /*
2712 * Lastly, mark our card state as up and return success
2713 */
2714 card->state = CARD_UP;
2715 card->reset_in_progress = 0;
2716 DBG_MSG("slicoss: %s EXIT card[%p] adapter[%p] card->state[%x]\n",
2717 __func__, card, adapter, card->state);
2718
2719 return STATUS_SUCCESS;
2720 }
2721
2722 static u32 slic_card_locate(struct adapter *adapter)
2723 {
2724 struct sliccard *card = slic_global.slic_card;
2725 struct physcard *physcard = slic_global.phys_card;
2726 ushort card_hostid;
2727 u16 __iomem *hostid_reg;
2728 uint i;
2729 uint rdhostid_offset = 0;
2730
2731 DBG_MSG("slicoss: %s adapter[%p] slot[%x] bus[%x] port[%x]\n",
2732 __func__, adapter, adapter->slotnumber, adapter->busnumber,
2733 adapter->port);
2734
2735 switch (adapter->devid) {
2736 case SLIC_2GB_DEVICE_ID:
2737 rdhostid_offset = SLIC_RDHOSTID_2GB;
2738 break;
2739 case SLIC_1GB_DEVICE_ID:
2740 rdhostid_offset = SLIC_RDHOSTID_1GB;
2741 break;
2742 default:
2743 ASSERT(0);
2744 break;
2745 }
2746
2747 hostid_reg =
2748 (u16 __iomem *) (((u8 __iomem *) (adapter->slic_regs)) +
2749 rdhostid_offset);
2750 DBG_MSG("slicoss: %s *hostid_reg[%p] == ", __func__, hostid_reg);
2751
2752 /* read the 16 bit hostid from SRAM */
2753 card_hostid = (ushort) readw(hostid_reg);
2754 DBG_MSG(" card_hostid[%x]\n", card_hostid);
2755
2756 /* Initialize a new card structure if need be */
2757 if (card_hostid == SLIC_HOSTID_DEFAULT) {
2758 card = kzalloc(sizeof(struct sliccard), GFP_KERNEL);
2759 if (card == NULL)
2760 return -ENOMEM;
2761
2762 card->next = slic_global.slic_card;
2763 slic_global.slic_card = card;
2764 #if DBG
2765 if (adapter->devid == SLIC_2GB_DEVICE_ID) {
2766 DBG_MSG
2767 ("SLICOSS ==> Initialize 2 Port Gigabit Server \
2768 and Storage Accelerator\n");
2769 } else {
2770 DBG_MSG
2771 ("SLICOSS ==> Initialize 1 Port Gigabit Server \
2772 and Storage Accelerator\n");
2773 }
2774 #endif
2775 card->busnumber = adapter->busnumber;
2776 card->slotnumber = adapter->slotnumber;
2777
2778 /* Find an available cardnum */
2779 for (i = 0; i < SLIC_MAX_CARDS; i++) {
2780 if (slic_global.cardnuminuse[i] == 0) {
2781 slic_global.cardnuminuse[i] = 1;
2782 card->cardnum = i;
2783 break;
2784 }
2785 }
2786 slic_global.num_slic_cards++;
2787 DBG_MSG("\nCARDNUM == %d Total %d Card[%p]\n\n",
2788 card->cardnum, slic_global.num_slic_cards, card);
2789
2790 slic_debug_card_create(card);
2791 } else {
2792 DBG_MSG
2793 ("slicoss: %s CARD already allocated, find the \
2794 correct card\n", __func__);
2795 /* Card exists, find the card this adapter belongs to */
2796 while (card) {
2797 DBG_MSG
2798 ("slicoss: %s card[%p] slot[%x] bus[%x] \
2799 adaptport[%p] hostid[%x] cardnum[%x]\n",
2800 __func__, card, card->slotnumber,
2801 card->busnumber, card->adapter[adapter->port],
2802 card_hostid, card->cardnum);
2803
2804 if (card->cardnum == card_hostid)
2805 break;
2806 card = card->next;
2807 }
2808 }
2809
2810 ASSERT(card);
2811 if (!card)
2812 return STATUS_FAILURE;
2813 /* Put the adapter in the card's adapter list */
2814 ASSERT(card->adapter[adapter->port] == NULL);
2815 if (!card->adapter[adapter->port]) {
2816 card->adapter[adapter->port] = adapter;
2817 adapter->card = card;
2818 }
2819
2820 card->card_size = 1; /* one port per *logical* card */
2821
2822 while (physcard) {
2823 for (i = 0; i < SLIC_MAX_PORTS; i++) {
2824 if (!physcard->adapter[i])
2825 continue;
2826 else
2827 break;
2828 }
2829 ASSERT(i != SLIC_MAX_PORTS);
2830 if (physcard->adapter[i]->slotnumber == adapter->slotnumber)
2831 break;
2832 physcard = physcard->next;
2833 }
2834 if (!physcard) {
2835 /* no structure allocated for this physical card yet */
2836 physcard = kmalloc(sizeof(struct physcard *), GFP_ATOMIC);
2837 ASSERT(physcard);
2838 memset(physcard, 0, sizeof(struct physcard *));
2839
2840 DBG_MSG
2841 ("\n%s Allocate a PHYSICALcard:\n PHYSICAL_Card[%p]\n\
2842 LogicalCard [%p]\n adapter [%p]\n",
2843 __func__, physcard, card, adapter);
2844
2845 physcard->next = slic_global.phys_card;
2846 slic_global.phys_card = physcard;
2847 physcard->adapters_allocd = 1;
2848 } else {
2849 physcard->adapters_allocd++;
2850 }
2851 /* Note - this is ZERO relative */
2852 adapter->physport = physcard->adapters_allocd - 1;
2853
2854 ASSERT(physcard->adapter[adapter->physport] == NULL);
2855 physcard->adapter[adapter->physport] = adapter;
2856 adapter->physcard = physcard;
2857 DBG_MSG(" PHYSICAL_Port %d Logical_Port %d\n", adapter->physport,
2858 adapter->port);
2859
2860 return 0;
2861 }
2862
2863 static void slic_soft_reset(struct adapter *adapter)
2864 {
2865 if (adapter->card->state == CARD_UP) {
2866 DBG_MSG("slicoss: %s QUIESCE adapter[%p] card[%p] devid[%x]\n",
2867 __func__, adapter, adapter->card, adapter->devid);
2868 WRITE_REG(adapter->slic_regs->slic_quiesce, 0, FLUSH);
2869 mdelay(1);
2870 }
2871 /* DBG_MSG ("slicoss: %s (%s) adapter[%p] card[%p] devid[%x]\n",
2872 __func__, adapter->netdev->name, adapter, adapter->card,
2873 adapter->devid); */
2874
2875 WRITE_REG(adapter->slic_regs->slic_reset, SLIC_RESET_MAGIC, FLUSH);
2876 mdelay(1);
2877 }
2878
2879 static void slic_config_set(struct adapter *adapter, bool linkchange)
2880 {
2881 u32 value;
2882 u32 RcrReset;
2883 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
2884
2885 DBG_MSG("slicoss: %s (%s) slic_interface_enable[%p](%d)\n",
2886 __func__, adapter->netdev->name, adapter,
2887 adapter->cardindex);
2888
2889 if (linkchange) {
2890 /* Setup MAC */
2891 slic_mac_config(adapter);
2892 RcrReset = GRCR_RESET;
2893 } else {
2894 slic_mac_address_config(adapter);
2895 RcrReset = 0;
2896 }
2897
2898 if (adapter->linkduplex == LINK_FULLD) {
2899 /* setup xmtcfg */
2900 value = (GXCR_RESET | /* Always reset */
2901 GXCR_XMTEN | /* Enable transmit */
2902 GXCR_PAUSEEN); /* Enable pause */
2903
2904 DBG_MSG("slicoss: FDX adapt[%p] set xmtcfg to [%x]\n", adapter,
2905 value);
2906 WRITE_REG(slic_regs->slic_wxcfg, value, FLUSH);
2907
2908 /* Setup rcvcfg last */
2909 value = (RcrReset | /* Reset, if linkchange */
2910 GRCR_CTLEN | /* Enable CTL frames */
2911 GRCR_ADDRAEN | /* Address A enable */
2912 GRCR_RCVBAD | /* Rcv bad frames */
2913 (GRCR_HASHSIZE << GRCR_HASHSIZE_SHIFT));
2914 } else {
2915 /* setup xmtcfg */
2916 value = (GXCR_RESET | /* Always reset */
2917 GXCR_XMTEN); /* Enable transmit */
2918
2919 DBG_MSG("slicoss: HDX adapt[%p] set xmtcfg to [%x]\n", adapter,
2920 value);
2921 WRITE_REG(slic_regs->slic_wxcfg, value, FLUSH);
2922
2923 /* Setup rcvcfg last */
2924 value = (RcrReset | /* Reset, if linkchange */
2925 GRCR_ADDRAEN | /* Address A enable */
2926 GRCR_RCVBAD | /* Rcv bad frames */
2927 (GRCR_HASHSIZE << GRCR_HASHSIZE_SHIFT));
2928 }
2929
2930 if (adapter->state != ADAPT_DOWN) {
2931 /* Only enable receive if we are restarting or running */
2932 value |= GRCR_RCVEN;
2933 }
2934
2935 if (adapter->macopts & MAC_PROMISC)
2936 value |= GRCR_RCVALL;
2937
2938 DBG_MSG("slicoss: adapt[%p] set rcvcfg to [%x]\n", adapter, value);
2939 WRITE_REG(slic_regs->slic_wrcfg, value, FLUSH);
2940 }
2941
2942 /*
2943 * Turn off RCV and XMT, power down PHY
2944 */
2945 static void slic_config_clear(struct adapter *adapter)
2946 {
2947 u32 value;
2948 u32 phy_config;
2949 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
2950
2951 /* Setup xmtcfg */
2952 value = (GXCR_RESET | /* Always reset */
2953 GXCR_PAUSEEN); /* Enable pause */
2954
2955 WRITE_REG(slic_regs->slic_wxcfg, value, FLUSH);
2956
2957 value = (GRCR_RESET | /* Always reset */
2958 GRCR_CTLEN | /* Enable CTL frames */
2959 GRCR_ADDRAEN | /* Address A enable */
2960 (GRCR_HASHSIZE << GRCR_HASHSIZE_SHIFT));
2961
2962 WRITE_REG(slic_regs->slic_wrcfg, value, FLUSH);
2963
2964 /* power down phy */
2965 phy_config = (MIICR_REG_PCR | (PCR_POWERDOWN));
2966 WRITE_REG(slic_regs->slic_wphy, phy_config, FLUSH);
2967 }
2968
2969 static void slic_config_get(struct adapter *adapter, u32 config,
2970 u32 config_h)
2971 {
2972 int status;
2973
2974 status = slic_upr_request(adapter,
2975 SLIC_UPR_RCONFIG,
2976 (u32) config, (u32) config_h, 0, 0);
2977 ASSERT(status == 0);
2978 }
2979
2980 static void slic_mac_address_config(struct adapter *adapter)
2981 {
2982 u32 value;
2983 u32 value2;
2984 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
2985
2986 value = *(u32 *) &adapter->currmacaddr[2];
2987 value = ntohl(value);
2988 WRITE_REG(slic_regs->slic_wraddral, value, FLUSH);
2989 WRITE_REG(slic_regs->slic_wraddrbl, value, FLUSH);
2990
2991 value2 = (u32) ((adapter->currmacaddr[0] << 8 |
2992 adapter->currmacaddr[1]) & 0xFFFF);
2993
2994 WRITE_REG(slic_regs->slic_wraddrah, value2, FLUSH);
2995 WRITE_REG(slic_regs->slic_wraddrbh, value2, FLUSH);
2996
2997 DBG_MSG("%s value1[%x] value2[%x] Call slic_mcast_set_mask\n",
2998 __func__, value, value2);
2999 slic_dbg_macaddrs(adapter);
3000
3001 /* Write our multicast mask out to the card. This is done */
3002 /* here in addition to the slic_mcast_addr_set routine */
3003 /* because ALL_MCAST may have been enabled or disabled */
3004 slic_mcast_set_mask(adapter);
3005 }
3006
3007 static void slic_mac_config(struct adapter *adapter)
3008 {
3009 u32 value;
3010 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
3011
3012 /* Setup GMAC gaps */
3013 if (adapter->linkspeed == LINK_1000MB) {
3014 value = ((GMCR_GAPBB_1000 << GMCR_GAPBB_SHIFT) |
3015 (GMCR_GAPR1_1000 << GMCR_GAPR1_SHIFT) |
3016 (GMCR_GAPR2_1000 << GMCR_GAPR2_SHIFT));
3017 } else {
3018 value = ((GMCR_GAPBB_100 << GMCR_GAPBB_SHIFT) |
3019 (GMCR_GAPR1_100 << GMCR_GAPR1_SHIFT) |
3020 (GMCR_GAPR2_100 << GMCR_GAPR2_SHIFT));
3021 }
3022
3023 /* enable GMII */
3024 if (adapter->linkspeed == LINK_1000MB)
3025 value |= GMCR_GBIT;
3026
3027 /* enable fullduplex */
3028 if ((adapter->linkduplex == LINK_FULLD)
3029 || (adapter->macopts & MAC_LOOPBACK)) {
3030 value |= GMCR_FULLD;
3031 }
3032
3033 /* write mac config */
3034 WRITE_REG(slic_regs->slic_wmcfg, value, FLUSH);
3035
3036 /* setup mac addresses */
3037 slic_mac_address_config(adapter);
3038 }
3039
3040 static bool slic_mac_filter(struct adapter *adapter,
3041 struct ether_header *ether_frame)
3042 {
3043 u32 opts = adapter->macopts;
3044 u32 *dhost4 = (u32 *)&ether_frame->ether_dhost[0];
3045 u16 *dhost2 = (u16 *)&ether_frame->ether_dhost[4];
3046 bool equaladdr;
3047
3048 if (opts & MAC_PROMISC) {
3049 DBG_MSG("slicoss: %s (%s) PROMISCUOUS. Accept frame\n",
3050 __func__, adapter->netdev->name);
3051 return TRUE;
3052 }
3053
3054 if ((*dhost4 == 0xFFFFFFFF) && (*dhost2 == 0xFFFF)) {
3055 if (opts & MAC_BCAST) {
3056 adapter->rcv_broadcasts++;
3057 return TRUE;
3058 } else {
3059 return FALSE;
3060 }
3061 }
3062
3063 if (ether_frame->ether_dhost[0] & 0x01) {
3064 if (opts & MAC_ALLMCAST) {
3065 adapter->rcv_multicasts++;
3066 adapter->stats.multicast++;
3067 return TRUE;
3068 }
3069 if (opts & MAC_MCAST) {
3070 struct mcast_address *mcaddr = adapter->mcastaddrs;
3071
3072 while (mcaddr) {
3073 ETHER_EQ_ADDR(mcaddr->address,
3074 ether_frame->ether_dhost,
3075 equaladdr);
3076 if (equaladdr) {
3077 adapter->rcv_multicasts++;
3078 adapter->stats.multicast++;
3079 return TRUE;
3080 }
3081 mcaddr = mcaddr->next;
3082 }
3083 return FALSE;
3084 } else {
3085 return FALSE;
3086 }
3087 }
3088 if (opts & MAC_DIRECTED) {
3089 adapter->rcv_unicasts++;
3090 return TRUE;
3091 }
3092 return FALSE;
3093
3094 }
3095
3096 static int slic_mac_set_address(struct net_device *dev, void *ptr)
3097 {
3098 struct adapter *adapter = (struct adapter *)netdev_priv(dev);
3099 struct sockaddr *addr = ptr;
3100
3101 DBG_MSG("%s ENTER (%s)\n", __func__, adapter->netdev->name);
3102
3103 if (netif_running(dev))
3104 return -EBUSY;
3105 if (!adapter)
3106 return -EBUSY;
3107 DBG_MSG("slicoss: %s (%s) curr %2.2X:%2.2X:%2.2X:%2.2X:%2.2X:%2.2X\n",
3108 __func__, adapter->netdev->name, adapter->currmacaddr[0],
3109 adapter->currmacaddr[1], adapter->currmacaddr[2],
3110 adapter->currmacaddr[3], adapter->currmacaddr[4],
3111 adapter->currmacaddr[5]);
3112 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
3113 memcpy(adapter->currmacaddr, addr->sa_data, dev->addr_len);
3114 DBG_MSG("slicoss: %s (%s) new %2.2X:%2.2X:%2.2X:%2.2X:%2.2X:%2.2X\n",
3115 __func__, adapter->netdev->name, adapter->currmacaddr[0],
3116 adapter->currmacaddr[1], adapter->currmacaddr[2],
3117 adapter->currmacaddr[3], adapter->currmacaddr[4],
3118 adapter->currmacaddr[5]);
3119
3120 slic_config_set(adapter, TRUE);
3121 return 0;
3122 }
3123
3124 /*
3125 * slic_timer_get_stats
3126 *
3127 * Timer function used to suck the statistics out of the card every
3128 * 50 seconds or whatever STATS_TIMER_INTERVAL is set to.
3129 *
3130 */
3131 #if SLIC_GET_STATS_TIMER_ENABLED
3132 static void slic_timer_get_stats(ulong dev)
3133 {
3134 struct adapter *adapter;
3135 struct sliccard *card;
3136 struct slic_shmem *pshmem;
3137
3138 ASSERT(dev);
3139 adapter = (struct adapter *)((struct net_device *)dev)->priv;
3140 ASSERT(adapter);
3141 card = adapter->card;
3142 ASSERT(card);
3143
3144 if ((card->state == CARD_UP) &&
3145 (adapter->state == ADAPT_UP) && (adapter->linkstate == LINK_UP)) {
3146 pshmem = (struct slic_shmem *)adapter->phys_shmem;
3147 #ifdef CONFIG_X86_64
3148 slic_upr_request(adapter,
3149 SLIC_UPR_STATS,
3150 SLIC_GET_ADDR_LOW(&pshmem->inicstats),
3151 SLIC_GET_ADDR_HIGH(&pshmem->inicstats), 0, 0);
3152 #elif defined(CONFIG_X86)
3153 slic_upr_request(adapter,
3154 SLIC_UPR_STATS,
3155 (u32) &pshmem->inicstats, 0, 0, 0);
3156 #else
3157 Stop compilation;
3158 #endif
3159 } else {
3160 /* DBG_MSG ("slicoss: %s adapter[%p] linkstate[%x] NOT UP!\n",
3161 __func__, adapter, adapter->linkstate); */
3162 }
3163 adapter->statstimer.expires = jiffies +
3164 SLIC_SECS_TO_JIFFS(STATS_TIMER_INTERVAL);
3165 add_timer(&adapter->statstimer);
3166 }
3167 #endif
3168 static void slic_timer_load_check(ulong cardaddr)
3169 {
3170 struct sliccard *card = (struct sliccard *)cardaddr;
3171 struct adapter *adapter = card->master;
3172 u32 load = card->events;
3173 u32 level = 0;
3174
3175 if ((adapter) && (adapter->state == ADAPT_UP) &&
3176 (card->state == CARD_UP) && (slic_global.dynamic_intagg)) {
3177 if (adapter->devid == SLIC_1GB_DEVICE_ID) {
3178 if (adapter->linkspeed == LINK_1000MB)
3179 level = 100;
3180 else {
3181 if (load > SLIC_LOAD_5)
3182 level = SLIC_INTAGG_5;
3183 else if (load > SLIC_LOAD_4)
3184 level = SLIC_INTAGG_4;
3185 else if (load > SLIC_LOAD_3)
3186 level = SLIC_INTAGG_3;
3187 else if (load > SLIC_LOAD_2)
3188 level = SLIC_INTAGG_2;
3189 else if (load > SLIC_LOAD_1)
3190 level = SLIC_INTAGG_1;
3191 else
3192 level = SLIC_INTAGG_0;
3193 }
3194 if (card->loadlevel_current != level) {
3195 card->loadlevel_current = level;
3196 WRITE_REG(adapter->slic_regs->slic_intagg,
3197 level, FLUSH);
3198 }
3199 } else {
3200 if (load > SLIC_LOAD_5)
3201 level = SLIC_INTAGG_5;
3202 else if (load > SLIC_LOAD_4)
3203 level = SLIC_INTAGG_4;
3204 else if (load > SLIC_LOAD_3)
3205 level = SLIC_INTAGG_3;
3206 else if (load > SLIC_LOAD_2)
3207 level = SLIC_INTAGG_2;
3208 else if (load > SLIC_LOAD_1)
3209 level = SLIC_INTAGG_1;
3210 else
3211 level = SLIC_INTAGG_0;
3212 if (card->loadlevel_current != level) {
3213 card->loadlevel_current = level;
3214 WRITE_REG(adapter->slic_regs->slic_intagg,
3215 level, FLUSH);
3216 }
3217 }
3218 }
3219 card->events = 0;
3220 card->loadtimer.expires =
3221 jiffies + SLIC_SECS_TO_JIFFS(SLIC_LOADTIMER_PERIOD);
3222 add_timer(&card->loadtimer);
3223 }
3224
3225 static void slic_assert_fail(void)
3226 {
3227 u32 cpuid;
3228 u32 curr_pid;
3229 cpuid = smp_processor_id();
3230 curr_pid = current->pid;
3231
3232 DBG_ERROR("%s CPU # %d ---- PID # %d\n", __func__, cpuid, curr_pid);
3233 }
3234
3235 static int slic_upr_queue_request(struct adapter *adapter,
3236 u32 upr_request,
3237 u32 upr_data,
3238 u32 upr_data_h,
3239 u32 upr_buffer, u32 upr_buffer_h)
3240 {
3241 struct slic_upr *upr;
3242 struct slic_upr *uprqueue;
3243
3244 upr = kmalloc(sizeof(struct slic_upr), GFP_ATOMIC);
3245 if (!upr) {
3246 DBG_MSG("%s COULD NOT ALLOCATE UPR MEM\n", __func__);
3247
3248 return -ENOMEM;
3249 }
3250 upr->adapter = adapter->port;
3251 upr->upr_request = upr_request;
3252 upr->upr_data = upr_data;
3253 upr->upr_buffer = upr_buffer;
3254 upr->upr_data_h = upr_data_h;
3255 upr->upr_buffer_h = upr_buffer_h;
3256 upr->next = NULL;
3257 if (adapter->upr_list) {
3258 uprqueue = adapter->upr_list;
3259
3260 while (uprqueue->next)
3261 uprqueue = uprqueue->next;
3262 uprqueue->next = upr;
3263 } else {
3264 adapter->upr_list = upr;
3265 }
3266 return STATUS_SUCCESS;
3267 }
3268
3269 static int slic_upr_request(struct adapter *adapter,
3270 u32 upr_request,
3271 u32 upr_data,
3272 u32 upr_data_h,
3273 u32 upr_buffer, u32 upr_buffer_h)
3274 {
3275 int status;
3276
3277 spin_lock_irqsave(&adapter->upr_lock.lock, adapter->upr_lock.flags);
3278 status = slic_upr_queue_request(adapter,
3279 upr_request,
3280 upr_data,
3281 upr_data_h, upr_buffer, upr_buffer_h);
3282 if (status != STATUS_SUCCESS) {
3283 spin_unlock_irqrestore(&adapter->upr_lock.lock,
3284 adapter->upr_lock.flags);
3285 return status;
3286 }
3287 slic_upr_start(adapter);
3288 spin_unlock_irqrestore(&adapter->upr_lock.lock,
3289 adapter->upr_lock.flags);
3290 return STATUS_PENDING;
3291 }
3292
3293 static void slic_upr_request_complete(struct adapter *adapter, u32 isr)
3294 {
3295 struct sliccard *card = adapter->card;
3296 struct slic_upr *upr;
3297
3298 /* if (card->dump_requested) {
3299 DBG_MSG("ENTER slic_upr_request_complete Dump in progress ISR[%x]\n",
3300 isr);
3301 } */
3302 spin_lock_irqsave(&adapter->upr_lock.lock, adapter->upr_lock.flags);
3303 upr = adapter->upr_list;
3304 if (!upr) {
3305 ASSERT(0);
3306 spin_unlock_irqrestore(&adapter->upr_lock.lock,
3307 adapter->upr_lock.flags);
3308 return;
3309 }
3310 adapter->upr_list = upr->next;
3311 upr->next = NULL;
3312 adapter->upr_busy = 0;
3313 ASSERT(adapter->port == upr->adapter);
3314 switch (upr->upr_request) {
3315 case SLIC_UPR_STATS:
3316 {
3317 #if SLIC_GET_STATS_ENABLED
3318 struct slic_stats *slicstats =
3319 (struct slic_stats *) &adapter->pshmem->inicstats;
3320 struct slic_stats *newstats = slicstats;
3321 struct slic_stats *old = &adapter->inicstats_prev;
3322 struct slicnet_stats *stst = &adapter->slic_stats;
3323 #endif
3324 if (isr & ISR_UPCERR) {
3325 DBG_ERROR
3326 ("SLIC_UPR_STATS command failed isr[%x]\n",
3327 isr);
3328
3329 break;
3330 }
3331 #if SLIC_GET_STATS_ENABLED
3332 /* DBG_MSG ("slicoss: %s rcv %lx:%lx:%lx:%lx:%lx %lx %lx "
3333 "xmt %lx:%lx:%lx:%lx:%lx %lx %lx\n",
3334 __func__,
3335 slicstats->rcv_unicasts100,
3336 slicstats->rcv_bytes100,
3337 slicstats->rcv_bytes100,
3338 slicstats->rcv_tcp_bytes100,
3339 slicstats->rcv_tcp_segs100,
3340 slicstats->rcv_other_error100,
3341 slicstats->rcv_drops100,
3342 slicstats->xmit_unicasts100,
3343 slicstats->xmit_bytes100,
3344 slicstats->xmit_bytes100,
3345 slicstats->xmit_tcp_bytes100,
3346 slicstats->xmit_tcp_segs100,
3347 slicstats->xmit_other_error100,
3348 slicstats->xmit_collisions100);*/
3349 UPDATE_STATS_GB(stst->tcp.xmit_tcp_segs,
3350 newstats->xmit_tcp_segs_gb,
3351 old->xmit_tcp_segs_gb);
3352
3353 UPDATE_STATS_GB(stst->tcp.xmit_tcp_bytes,
3354 newstats->xmit_tcp_bytes_gb,
3355 old->xmit_tcp_bytes_gb);
3356
3357 UPDATE_STATS_GB(stst->tcp.rcv_tcp_segs,
3358 newstats->rcv_tcp_segs_gb,
3359 old->rcv_tcp_segs_gb);
3360
3361 UPDATE_STATS_GB(stst->tcp.rcv_tcp_bytes,
3362 newstats->rcv_tcp_bytes_gb,
3363 old->rcv_tcp_bytes_gb);
3364
3365 UPDATE_STATS_GB(stst->iface.xmt_bytes,
3366 newstats->xmit_bytes_gb,
3367 old->xmit_bytes_gb);
3368
3369 UPDATE_STATS_GB(stst->iface.xmt_ucast,
3370 newstats->xmit_unicasts_gb,
3371 old->xmit_unicasts_gb);
3372
3373 UPDATE_STATS_GB(stst->iface.rcv_bytes,
3374 newstats->rcv_bytes_gb,
3375 old->rcv_bytes_gb);
3376
3377 UPDATE_STATS_GB(stst->iface.rcv_ucast,
3378 newstats->rcv_unicasts_gb,
3379 old->rcv_unicasts_gb);
3380
3381 UPDATE_STATS_GB(stst->iface.xmt_errors,
3382 newstats->xmit_collisions_gb,
3383 old->xmit_collisions_gb);
3384
3385 UPDATE_STATS_GB(stst->iface.xmt_errors,
3386 newstats->xmit_excess_collisions_gb,
3387 old->xmit_excess_collisions_gb);
3388
3389 UPDATE_STATS_GB(stst->iface.xmt_errors,
3390 newstats->xmit_other_error_gb,
3391 old->xmit_other_error_gb);
3392
3393 UPDATE_STATS_GB(stst->iface.rcv_errors,
3394 newstats->rcv_other_error_gb,
3395 old->rcv_other_error_gb);
3396
3397 UPDATE_STATS_GB(stst->iface.rcv_discards,
3398 newstats->rcv_drops_gb,
3399 old->rcv_drops_gb);
3400
3401 if (newstats->rcv_drops_gb > old->rcv_drops_gb) {
3402 adapter->rcv_drops +=
3403 (newstats->rcv_drops_gb -
3404 old->rcv_drops_gb);
3405 }
3406 memcpy(old, newstats, sizeof(struct slic_stats));
3407 #endif
3408 break;
3409 }
3410 case SLIC_UPR_RLSR:
3411 slic_link_upr_complete(adapter, isr);
3412 break;
3413 case SLIC_UPR_RCONFIG:
3414 break;
3415 case SLIC_UPR_RPHY:
3416 ASSERT(0);
3417 break;
3418 case SLIC_UPR_ENLB:
3419 ASSERT(0);
3420 break;
3421 case SLIC_UPR_ENCT:
3422 ASSERT(0);
3423 break;
3424 case SLIC_UPR_PDWN:
3425 ASSERT(0);
3426 break;
3427 case SLIC_UPR_PING:
3428 card->pingstatus |= (isr & ISR_PINGDSMASK);
3429 break;
3430 #if SLIC_DUMP_ENABLED
3431 case SLIC_UPR_DUMP:
3432 card->dumpstatus |= (isr & ISR_UPCMASK);
3433 break;
3434 #endif
3435 default:
3436 ASSERT(0);
3437 }
3438 kfree(upr);
3439 slic_upr_start(adapter);
3440 spin_unlock_irqrestore(&adapter->upr_lock.lock,
3441 adapter->upr_lock.flags);
3442 }
3443
3444 static void slic_upr_start(struct adapter *adapter)
3445 {
3446 struct slic_upr *upr;
3447 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
3448 /*
3449 char * ptr1;
3450 char * ptr2;
3451 uint cmdoffset;
3452 */
3453 upr = adapter->upr_list;
3454 if (!upr)
3455 return;
3456 if (adapter->upr_busy)
3457 return;
3458 adapter->upr_busy = 1;
3459
3460 switch (upr->upr_request) {
3461 case SLIC_UPR_STATS:
3462 if (upr->upr_data_h == 0) {
3463 WRITE_REG(slic_regs->slic_stats, upr->upr_data, FLUSH);
3464 } else {
3465 WRITE_REG64(adapter,
3466 slic_regs->slic_stats64,
3467 upr->upr_data,
3468 slic_regs->slic_addr_upper,
3469 upr->upr_data_h, FLUSH);
3470 }
3471 break;
3472
3473 case SLIC_UPR_RLSR:
3474 WRITE_REG64(adapter,
3475 slic_regs->slic_rlsr,
3476 upr->upr_data,
3477 slic_regs->slic_addr_upper, upr->upr_data_h, FLUSH);
3478 break;
3479
3480 case SLIC_UPR_RCONFIG:
3481 DBG_MSG("%s SLIC_UPR_RCONFIG!!!!\n", __func__);
3482 DBG_MSG("WRITE_REG64 adapter[%p]\n"
3483 " a->slic_regs[%p] slic_regs[%p]\n"
3484 " &slic_rconfig[%p] &slic_addr_upper[%p]\n"
3485 " upr[%p]\n"
3486 " uprdata[%x] uprdatah[%x]\n",
3487 adapter, adapter->slic_regs, slic_regs,
3488 &slic_regs->slic_rconfig, &slic_regs->slic_addr_upper,
3489 upr, upr->upr_data, upr->upr_data_h);
3490 WRITE_REG64(adapter,
3491 slic_regs->slic_rconfig,
3492 upr->upr_data,
3493 slic_regs->slic_addr_upper, upr->upr_data_h, FLUSH);
3494 break;
3495 #if SLIC_DUMP_ENABLED
3496 case SLIC_UPR_DUMP:
3497 #if 0
3498 DBG_MSG("%s SLIC_UPR_DUMP!!!!\n", __func__);
3499 DBG_MSG("WRITE_REG64 adapter[%p]\n"
3500 " upr_buffer[%x] upr_bufferh[%x]\n"
3501 " upr_data[%x] upr_datah[%x]\n"
3502 " cmdbuff[%p] cmdbuffP[%p]\n"
3503 " dumpbuff[%p] dumpbuffP[%p]\n",
3504 adapter, upr->upr_buffer, upr->upr_buffer_h,
3505 upr->upr_data, upr->upr_data_h,
3506 adapter->card->cmdbuffer,
3507 (void *)adapter->card->cmdbuffer_phys,
3508 adapter->card->dumpbuffer, (
3509 void *)adapter->card->dumpbuffer_phys);
3510
3511 ptr1 = (char *)slic_regs;
3512 ptr2 = (char *)(&slic_regs->slic_dump_cmd);
3513 cmdoffset = ptr2 - ptr1;
3514 DBG_MSG("slic_dump_cmd register offset [%x]\n", cmdoffset);
3515 #endif
3516 if (upr->upr_buffer || upr->upr_buffer_h) {
3517 WRITE_REG64(adapter,
3518 slic_regs->slic_dump_data,
3519 upr->upr_buffer,
3520 slic_regs->slic_addr_upper,
3521 upr->upr_buffer_h, FLUSH);
3522 }
3523 WRITE_REG64(adapter,
3524 slic_regs->slic_dump_cmd,
3525 upr->upr_data,
3526 slic_regs->slic_addr_upper, upr->upr_data_h, FLUSH);
3527 break;
3528 #endif
3529 case SLIC_UPR_PING:
3530 WRITE_REG(slic_regs->slic_ping, 1, FLUSH);
3531 break;
3532 default:
3533 ASSERT(0);
3534 }
3535 }
3536
3537 static void slic_link_upr_complete(struct adapter *adapter, u32 isr)
3538 {
3539 u32 linkstatus = adapter->pshmem->linkstatus;
3540 uint linkup;
3541 unsigned char linkspeed;
3542 unsigned char linkduplex;
3543
3544 DBG_MSG("%s: %s ISR[%x] linkstatus[%x]\n adapter[%p](%d)\n",
3545 __func__, adapter->netdev->name, isr, linkstatus, adapter,
3546 adapter->cardindex);
3547
3548 if ((isr & ISR_UPCERR) || (isr & ISR_UPCBSY)) {
3549 struct slic_shmem *pshmem;
3550
3551 pshmem = (struct slic_shmem *)adapter->phys_shmem;
3552 #if defined(CONFIG_X86_64)
3553 slic_upr_queue_request(adapter,
3554 SLIC_UPR_RLSR,
3555 SLIC_GET_ADDR_LOW(&pshmem->linkstatus),
3556 SLIC_GET_ADDR_HIGH(&pshmem->linkstatus),
3557 0, 0);
3558 #elif defined(CONFIG_X86)
3559 slic_upr_queue_request(adapter,
3560 SLIC_UPR_RLSR,
3561 (u32) &pshmem->linkstatus,
3562 SLIC_GET_ADDR_HIGH(pshmem), 0, 0);
3563 #else
3564 Stop Compilation;
3565 #endif
3566 return;
3567 }
3568 if (adapter->state != ADAPT_UP)
3569 return;
3570
3571 ASSERT((adapter->devid == SLIC_1GB_DEVICE_ID)
3572 || (adapter->devid == SLIC_2GB_DEVICE_ID));
3573
3574 linkup = linkstatus & GIG_LINKUP ? LINK_UP : LINK_DOWN;
3575 if (linkstatus & GIG_SPEED_1000) {
3576 linkspeed = LINK_1000MB;
3577 DBG_MSG("slicoss: %s (%s) GIGABIT Speed==1000MB ",
3578 __func__, adapter->netdev->name);
3579 } else if (linkstatus & GIG_SPEED_100) {
3580 linkspeed = LINK_100MB;
3581 DBG_MSG("slicoss: %s (%s) GIGABIT Speed==100MB ", __func__,
3582 adapter->netdev->name);
3583 } else {
3584 linkspeed = LINK_10MB;
3585 DBG_MSG("slicoss: %s (%s) GIGABIT Speed==10MB ", __func__,
3586 adapter->netdev->name);
3587 }
3588 if (linkstatus & GIG_FULLDUPLEX) {
3589 linkduplex = LINK_FULLD;
3590 DBG_MSG(" Duplex == FULL\n");
3591 } else {
3592 linkduplex = LINK_HALFD;
3593 DBG_MSG(" Duplex == HALF\n");
3594 }
3595
3596 if ((adapter->linkstate == LINK_DOWN) && (linkup == LINK_DOWN)) {
3597 DBG_MSG("slicoss: %s (%s) physport(%d) link still down\n",
3598 __func__, adapter->netdev->name, adapter->physport);
3599 return;
3600 }
3601
3602 /* link up event, but nothing has changed */
3603 if ((adapter->linkstate == LINK_UP) &&
3604 (linkup == LINK_UP) &&
3605 (adapter->linkspeed == linkspeed) &&
3606 (adapter->linkduplex == linkduplex)) {
3607 DBG_MSG("slicoss: %s (%s) port(%d) link still up\n",
3608 __func__, adapter->netdev->name, adapter->physport);
3609 return;
3610 }
3611
3612 /* link has changed at this point */
3613
3614 /* link has gone from up to down */
3615 if (linkup == LINK_DOWN) {
3616 adapter->linkstate = LINK_DOWN;
3617 DBG_MSG("slicoss: %s %d LinkDown!\n", __func__,
3618 adapter->physport);
3619 return;
3620 }
3621
3622 /* link has gone from down to up */
3623 adapter->linkspeed = linkspeed;
3624 adapter->linkduplex = linkduplex;
3625
3626 if (adapter->linkstate != LINK_UP) {
3627 /* setup the mac */
3628 DBG_MSG("%s call slic_config_set\n", __func__);
3629 slic_config_set(adapter, TRUE);
3630 adapter->linkstate = LINK_UP;
3631 DBG_MSG("\n(%s) Link UP: CALL slic_if_start_queue",
3632 adapter->netdev->name);
3633 slic_if_start_queue(adapter);
3634 }
3635 #if 1
3636 switch (linkspeed) {
3637 case LINK_1000MB:
3638 DBG_MSG
3639 ("\n(%s) LINK UP!: GIGABIT SPEED == 1000MB duplex[%x]\n",
3640 adapter->netdev->name, adapter->linkduplex);
3641 break;
3642 case LINK_100MB:
3643 DBG_MSG("\n(%s) LINK UP!: SPEED == 100MB duplex[%x]\n",
3644 adapter->netdev->name, adapter->linkduplex);
3645 break;
3646 default:
3647 DBG_MSG("\n(%s) LINK UP!: SPEED == 10MB duplex[%x]\n",
3648 adapter->netdev->name, adapter->linkduplex);
3649 break;
3650 }
3651 #endif
3652 }
3653
3654 /*
3655 * this is here to checksum the eeprom, there is some ucode bug
3656 * which prevens us from using the ucode result.
3657 * remove this once ucode is fixed.
3658 */
3659 static ushort slic_eeprom_cksum(char *m, int len)
3660 {
3661 #define ADDCARRY(x) (x > 65535 ? x -= 65535 : x)
3662 #define REDUCE {l_util.l = sum; sum = l_util.s[0] + l_util.s[1]; ADDCARRY(sum);\
3663 }
3664
3665 u16 *w;
3666 u32 sum = 0;
3667 u32 byte_swapped = 0;
3668 u32 w_int;
3669
3670 union {
3671 char c[2];
3672 ushort s;
3673 } s_util;
3674
3675 union {
3676 ushort s[2];
3677 int l;
3678 } l_util;
3679
3680 l_util.l = 0;
3681 s_util.s = 0;
3682
3683 w = (u16 *)m;
3684 #ifdef CONFIG_X86_64
3685 w_int = (u32) ((ulong) w & 0x00000000FFFFFFFF);
3686 #else
3687 w_int = (u32) (w);
3688 #endif
3689 if ((1 & w_int) && (len > 0)) {
3690 REDUCE;
3691 sum <<= 8;
3692 s_util.c[0] = *(unsigned char *)w;
3693 w = (u16 *)((char *)w + 1);
3694 len--;
3695 byte_swapped = 1;
3696 }
3697
3698 /* Unroll the loop to make overhead from branches &c small. */
3699 while ((len -= 32) >= 0) {
3700 sum += w[0];
3701 sum += w[1];
3702 sum += w[2];
3703 sum += w[3];
3704 sum += w[4];
3705 sum += w[5];
3706 sum += w[6];
3707 sum += w[7];
3708 sum += w[8];
3709 sum += w[9];
3710 sum += w[10];
3711 sum += w[11];
3712 sum += w[12];
3713 sum += w[13];
3714 sum += w[14];
3715 sum += w[15];
3716 w = (u16 *)((ulong) w + 16); /* verify */
3717 }
3718 len += 32;
3719 while ((len -= 8) >= 0) {
3720 sum += w[0];
3721 sum += w[1];
3722 sum += w[2];
3723 sum += w[3];
3724 w = (u16 *)((ulong) w + 4); /* verify */
3725 }
3726 len += 8;
3727 if (len != 0 || byte_swapped != 0) {
3728 REDUCE;
3729 while ((len -= 2) >= 0)
3730 sum += *w++; /* verify */
3731 if (byte_swapped) {
3732 REDUCE;
3733 sum <<= 8;
3734 byte_swapped = 0;
3735 if (len == -1) {
3736 s_util.c[1] = *(char *) w;
3737 sum += s_util.s;
3738 len = 0;
3739 } else {
3740 len = -1;
3741 }
3742
3743 } else if (len == -1) {
3744 s_util.c[0] = *(char *) w;
3745 }
3746
3747 if (len == -1) {
3748 s_util.c[1] = 0;
3749 sum += s_util.s;
3750 }
3751 }
3752 REDUCE;
3753 return (ushort) sum;
3754 }
3755
3756 static int slic_rspqueue_init(struct adapter *adapter)
3757 {
3758 int i;
3759 struct slic_rspqueue *rspq = &adapter->rspqueue;
3760 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
3761 u32 paddrh = 0;
3762
3763 DBG_MSG("slicoss: %s (%s) ENTER adapter[%p]\n", __func__,
3764 adapter->netdev->name, adapter);
3765 ASSERT(adapter->state == ADAPT_DOWN);
3766 memset(rspq, 0, sizeof(struct slic_rspqueue));
3767
3768 rspq->num_pages = SLIC_RSPQ_PAGES_GB;
3769
3770 for (i = 0; i < rspq->num_pages; i++) {
3771 rspq->vaddr[i] =
3772 pci_alloc_consistent(adapter->pcidev, PAGE_SIZE,
3773 &rspq->paddr[i]);
3774 if (!rspq->vaddr[i]) {
3775 DBG_ERROR
3776 ("rspqueue_init_failed pci_alloc_consistent\n");
3777 slic_rspqueue_free(adapter);
3778 return STATUS_FAILURE;
3779 }
3780 #ifndef CONFIG_X86_64
3781 ASSERT(((u32) rspq->vaddr[i] & 0xFFFFF000) ==
3782 (u32) rspq->vaddr[i]);
3783 ASSERT(((u32) rspq->paddr[i] & 0xFFFFF000) ==
3784 (u32) rspq->paddr[i]);
3785 #endif
3786 memset(rspq->vaddr[i], 0, PAGE_SIZE);
3787 /* DBG_MSG("slicoss: %s UPLOAD RSPBUFF Page pageix[%x] paddr[%p] "
3788 "vaddr[%p]\n",
3789 __func__, i, (void *)rspq->paddr[i], rspq->vaddr[i]); */
3790
3791 if (paddrh == 0) {
3792 WRITE_REG(slic_regs->slic_rbar,
3793 (rspq->paddr[i] | SLIC_RSPQ_BUFSINPAGE),
3794 DONT_FLUSH);
3795 } else {
3796 WRITE_REG64(adapter,
3797 slic_regs->slic_rbar64,
3798 (rspq->paddr[i] | SLIC_RSPQ_BUFSINPAGE),
3799 slic_regs->slic_addr_upper,
3800 paddrh, DONT_FLUSH);
3801 }
3802 }
3803 rspq->offset = 0;
3804 rspq->pageindex = 0;
3805 rspq->rspbuf = (struct slic_rspbuf *)rspq->vaddr[0];
3806 DBG_MSG("slicoss: %s (%s) EXIT adapter[%p]\n", __func__,
3807 adapter->netdev->name, adapter);
3808 return STATUS_SUCCESS;
3809 }
3810
3811 static int slic_rspqueue_reset(struct adapter *adapter)
3812 {
3813 struct slic_rspqueue *rspq = &adapter->rspqueue;
3814
3815 DBG_MSG("slicoss: %s (%s) ENTER adapter[%p]\n", __func__,
3816 adapter->netdev->name, adapter);
3817 ASSERT(adapter->state == ADAPT_DOWN);
3818 ASSERT(rspq);
3819
3820 DBG_MSG("slicoss: Nothing to do. rspq[%p]\n"
3821 " offset[%x]\n"
3822 " pageix[%x]\n"
3823 " rspbuf[%p]\n",
3824 rspq, rspq->offset, rspq->pageindex, rspq->rspbuf);
3825
3826 DBG_MSG("slicoss: %s (%s) EXIT adapter[%p]\n", __func__,
3827 adapter->netdev->name, adapter);
3828 return STATUS_SUCCESS;
3829 }
3830
3831 static void slic_rspqueue_free(struct adapter *adapter)
3832 {
3833 int i;
3834 struct slic_rspqueue *rspq = &adapter->rspqueue;
3835
3836 DBG_MSG("slicoss: %s adapter[%p] port %d rspq[%p] FreeRSPQ\n",
3837 __func__, adapter, adapter->physport, rspq);
3838 for (i = 0; i < rspq->num_pages; i++) {
3839 if (rspq->vaddr[i]) {
3840 DBG_MSG
3841 ("slicoss: pci_free_consistent rspq->vaddr[%p] \
3842 paddr[%p]\n",
3843 rspq->vaddr[i], (void *) rspq->paddr[i]);
3844 pci_free_consistent(adapter->pcidev, PAGE_SIZE,
3845 rspq->vaddr[i], rspq->paddr[i]);
3846 }
3847 rspq->vaddr[i] = NULL;
3848 rspq->paddr[i] = 0;
3849 }
3850 rspq->offset = 0;
3851 rspq->pageindex = 0;
3852 rspq->rspbuf = NULL;
3853 }
3854
3855 static struct slic_rspbuf *slic_rspqueue_getnext(struct adapter *adapter)
3856 {
3857 struct slic_rspqueue *rspq = &adapter->rspqueue;
3858 struct slic_rspbuf *buf;
3859
3860 if (!(rspq->rspbuf->status))
3861 return NULL;
3862
3863 buf = rspq->rspbuf;
3864 #ifndef CONFIG_X86_64
3865 ASSERT((buf->status & 0xFFFFFFE0) == 0);
3866 #endif
3867 ASSERT(buf->hosthandle);
3868 if (++rspq->offset < SLIC_RSPQ_BUFSINPAGE) {
3869 rspq->rspbuf++;
3870 #ifndef CONFIG_X86_64
3871 ASSERT(((u32) rspq->rspbuf & 0xFFFFFFE0) ==
3872 (u32) rspq->rspbuf);
3873 #endif
3874 } else {
3875 ASSERT(rspq->offset == SLIC_RSPQ_BUFSINPAGE);
3876 WRITE_REG64(adapter,
3877 adapter->slic_regs->slic_rbar64,
3878 (rspq->
3879 paddr[rspq->pageindex] | SLIC_RSPQ_BUFSINPAGE),
3880 adapter->slic_regs->slic_addr_upper, 0, DONT_FLUSH);
3881 rspq->pageindex = (++rspq->pageindex) % rspq->num_pages;
3882 rspq->offset = 0;
3883 rspq->rspbuf = (struct slic_rspbuf *)
3884 rspq->vaddr[rspq->pageindex];
3885 #ifndef CONFIG_X86_64
3886 ASSERT(((u32) rspq->rspbuf & 0xFFFFF000) ==
3887 (u32) rspq->rspbuf);
3888 #endif
3889 }
3890 #ifndef CONFIG_X86_64
3891 ASSERT(((u32) buf & 0xFFFFFFE0) == (u32) buf);
3892 #endif
3893 return buf;
3894 }
3895
3896 static void slic_cmdqmem_init(struct adapter *adapter)
3897 {
3898 struct slic_cmdqmem *cmdqmem = &adapter->cmdqmem;
3899
3900 memset(cmdqmem, 0, sizeof(struct slic_cmdqmem));
3901 }
3902
3903 static void slic_cmdqmem_free(struct adapter *adapter)
3904 {
3905 struct slic_cmdqmem *cmdqmem = &adapter->cmdqmem;
3906 int i;
3907
3908 DBG_MSG("slicoss: (%s) adapter[%p] port %d rspq[%p] Free CMDQ Memory\n",
3909 __func__, adapter, adapter->physport, cmdqmem);
3910 for (i = 0; i < SLIC_CMDQ_MAXPAGES; i++) {
3911 if (cmdqmem->pages[i]) {
3912 DBG_MSG("slicoss: %s Deallocate page CmdQPage[%p]\n",
3913 __func__, (void *) cmdqmem->pages[i]);
3914 pci_free_consistent(adapter->pcidev,
3915 PAGE_SIZE,
3916 (void *) cmdqmem->pages[i],
3917 cmdqmem->dma_pages[i]);
3918 }
3919 }
3920 memset(cmdqmem, 0, sizeof(struct slic_cmdqmem));
3921 }
3922
3923 static u32 *slic_cmdqmem_addpage(struct adapter *adapter)
3924 {
3925 struct slic_cmdqmem *cmdqmem = &adapter->cmdqmem;
3926 u32 *pageaddr;
3927
3928 if (cmdqmem->pagecnt >= SLIC_CMDQ_MAXPAGES)
3929 return NULL;
3930 pageaddr = pci_alloc_consistent(adapter->pcidev,
3931 PAGE_SIZE,
3932 &cmdqmem->dma_pages[cmdqmem->pagecnt]);
3933 if (!pageaddr)
3934 return NULL;
3935 #ifndef CONFIG_X86_64
3936 ASSERT(((u32) pageaddr & 0xFFFFF000) == (u32) pageaddr);
3937 #endif
3938 cmdqmem->pages[cmdqmem->pagecnt] = pageaddr;
3939 cmdqmem->pagecnt++;
3940 return pageaddr;
3941 }
3942
3943 static int slic_cmdq_init(struct adapter *adapter)
3944 {
3945 int i;
3946 u32 *pageaddr;
3947
3948 DBG_MSG("slicoss: %s ENTER adapter[%p]\n", __func__, adapter);
3949 ASSERT(adapter->state == ADAPT_DOWN);
3950 memset(&adapter->cmdq_all, 0, sizeof(struct slic_cmdqueue));
3951 memset(&adapter->cmdq_free, 0, sizeof(struct slic_cmdqueue));
3952 memset(&adapter->cmdq_done, 0, sizeof(struct slic_cmdqueue));
3953 spin_lock_init(&adapter->cmdq_all.lock.lock);
3954 spin_lock_init(&adapter->cmdq_free.lock.lock);
3955 spin_lock_init(&adapter->cmdq_done.lock.lock);
3956 slic_cmdqmem_init(adapter);
3957 adapter->slic_handle_ix = 1;
3958 for (i = 0; i < SLIC_CMDQ_INITPAGES; i++) {
3959 pageaddr = slic_cmdqmem_addpage(adapter);
3960 #ifndef CONFIG_X86_64
3961 ASSERT(((u32) pageaddr & 0xFFFFF000) == (u32) pageaddr);
3962 #endif
3963 if (!pageaddr) {
3964 slic_cmdq_free(adapter);
3965 return STATUS_FAILURE;
3966 }
3967 slic_cmdq_addcmdpage(adapter, pageaddr);
3968 }
3969 adapter->slic_handle_ix = 1;
3970 DBG_MSG("slicoss: %s reset slic_handle_ix to ONE\n", __func__);
3971
3972 return STATUS_SUCCESS;
3973 }
3974
3975 static void slic_cmdq_free(struct adapter *adapter)
3976 {
3977 struct slic_hostcmd *cmd;
3978
3979 DBG_MSG("slicoss: %s adapter[%p] port %d FreeCommandsFrom CMDQ\n",
3980 __func__, adapter, adapter->physport);
3981 cmd = adapter->cmdq_all.head;
3982 while (cmd) {
3983 if (cmd->busy) {
3984 struct sk_buff *tempskb;
3985
3986 tempskb = cmd->skb;
3987 if (tempskb) {
3988 cmd->skb = NULL;
3989 dev_kfree_skb_irq(tempskb);
3990 }
3991 }
3992 cmd = cmd->next_all;
3993 }
3994 memset(&adapter->cmdq_all, 0, sizeof(struct slic_cmdqueue));
3995 memset(&adapter->cmdq_free, 0, sizeof(struct slic_cmdqueue));
3996 memset(&adapter->cmdq_done, 0, sizeof(struct slic_cmdqueue));
3997 slic_cmdqmem_free(adapter);
3998 }
3999
4000 static void slic_cmdq_reset(struct adapter *adapter)
4001 {
4002 struct slic_hostcmd *hcmd;
4003 struct sk_buff *skb;
4004 u32 outstanding;
4005
4006 DBG_MSG("%s ENTER adapter[%p]\n", __func__, adapter);
4007 spin_lock_irqsave(&adapter->cmdq_free.lock.lock,
4008 adapter->cmdq_free.lock.flags);
4009 spin_lock_irqsave(&adapter->cmdq_done.lock.lock,
4010 adapter->cmdq_done.lock.flags);
4011 outstanding = adapter->cmdq_all.count - adapter->cmdq_done.count;
4012 outstanding -= adapter->cmdq_free.count;
4013 hcmd = adapter->cmdq_all.head;
4014 while (hcmd) {
4015 if (hcmd->busy) {
4016 skb = hcmd->skb;
4017 ASSERT(skb);
4018 DBG_MSG("slicoss: %s hcmd[%p] skb[%p] ", __func__,
4019 hcmd, skb);
4020 hcmd->busy = 0;
4021 hcmd->skb = NULL;
4022 DBG_MSG(" Free SKB\n");
4023 dev_kfree_skb_irq(skb);
4024 }
4025 hcmd = hcmd->next_all;
4026 }
4027 adapter->cmdq_free.count = 0;
4028 adapter->cmdq_free.head = NULL;
4029 adapter->cmdq_free.tail = NULL;
4030 adapter->cmdq_done.count = 0;
4031 adapter->cmdq_done.head = NULL;
4032 adapter->cmdq_done.tail = NULL;
4033 adapter->cmdq_free.head = adapter->cmdq_all.head;
4034 hcmd = adapter->cmdq_all.head;
4035 while (hcmd) {
4036 adapter->cmdq_free.count++;
4037 hcmd->next = hcmd->next_all;
4038 hcmd = hcmd->next_all;
4039 }
4040 if (adapter->cmdq_free.count != adapter->cmdq_all.count) {
4041 DBG_ERROR("%s free_count %d != all count %d\n", __func__,
4042 adapter->cmdq_free.count, adapter->cmdq_all.count);
4043 }
4044 spin_unlock_irqrestore(&adapter->cmdq_done.lock.lock,
4045 adapter->cmdq_done.lock.flags);
4046 spin_unlock_irqrestore(&adapter->cmdq_free.lock.lock,
4047 adapter->cmdq_free.lock.flags);
4048 DBG_MSG("%s EXIT adapter[%p]\n", __func__, adapter);
4049 }
4050
4051 static void slic_cmdq_addcmdpage(struct adapter *adapter, u32 *page)
4052 {
4053 struct slic_hostcmd *cmd;
4054 struct slic_hostcmd *prev;
4055 struct slic_hostcmd *tail;
4056 struct slic_cmdqueue *cmdq;
4057 int cmdcnt;
4058 void *cmdaddr;
4059 ulong phys_addr;
4060 u32 phys_addrl;
4061 u32 phys_addrh;
4062 struct slic_handle *pslic_handle;
4063
4064 cmdaddr = page;
4065 cmd = (struct slic_hostcmd *)cmdaddr;
4066 /* DBG_MSG("CMDQ Page addr[%p] ix[%d] pfree[%p]\n", cmdaddr, slic_handle_ix,
4067 adapter->pfree_slic_handles); */
4068 cmdcnt = 0;
4069
4070 phys_addr = virt_to_bus((void *)page);
4071 phys_addrl = SLIC_GET_ADDR_LOW(phys_addr);
4072 phys_addrh = SLIC_GET_ADDR_HIGH(phys_addr);
4073
4074 prev = NULL;
4075 tail = cmd;
4076 while ((cmdcnt < SLIC_CMDQ_CMDSINPAGE) &&
4077 (adapter->slic_handle_ix < 256)) {
4078 /* Allocate and initialize a SLIC_HANDLE for this command */
4079 SLIC_GET_SLIC_HANDLE(adapter, pslic_handle);
4080 if (pslic_handle == NULL)
4081 ASSERT(0);
4082 ASSERT(pslic_handle ==
4083 &adapter->slic_handles[pslic_handle->token.
4084 handle_index]);
4085 pslic_handle->type = SLIC_HANDLE_CMD;
4086 pslic_handle->address = (void *) cmd;
4087 pslic_handle->offset = (ushort) adapter->slic_handle_ix++;
4088 pslic_handle->other_handle = NULL;
4089 pslic_handle->next = NULL;
4090
4091 cmd->pslic_handle = pslic_handle;
4092 cmd->cmd64.hosthandle = pslic_handle->token.handle_token;
4093 cmd->busy = FALSE;
4094 cmd->paddrl = phys_addrl;
4095 cmd->paddrh = phys_addrh;
4096 cmd->next_all = prev;
4097 cmd->next = prev;
4098 prev = cmd;
4099 phys_addrl += SLIC_HOSTCMD_SIZE;
4100 cmdaddr += SLIC_HOSTCMD_SIZE;
4101
4102 cmd = (struct slic_hostcmd *)cmdaddr;
4103 cmdcnt++;
4104 }
4105
4106 cmdq = &adapter->cmdq_all;
4107 cmdq->count += cmdcnt; /* SLIC_CMDQ_CMDSINPAGE; mooktodo */
4108 tail->next_all = cmdq->head;
4109 ASSERT(VALID_ADDRESS(prev));
4110 cmdq->head = prev;
4111 cmdq = &adapter->cmdq_free;
4112 spin_lock_irqsave(&cmdq->lock.lock, cmdq->lock.flags);
4113 cmdq->count += cmdcnt; /* SLIC_CMDQ_CMDSINPAGE; mooktodo */
4114 tail->next = cmdq->head;
4115 ASSERT(VALID_ADDRESS(prev));
4116 cmdq->head = prev;
4117 spin_unlock_irqrestore(&cmdq->lock.lock, cmdq->lock.flags);
4118 }
4119
4120 static struct slic_hostcmd *slic_cmdq_getfree(struct adapter *adapter)
4121 {
4122 struct slic_cmdqueue *cmdq = &adapter->cmdq_free;
4123 struct slic_hostcmd *cmd = NULL;
4124
4125 lock_and_retry:
4126 spin_lock_irqsave(&cmdq->lock.lock, cmdq->lock.flags);
4127 retry:
4128 cmd = cmdq->head;
4129 if (cmd) {
4130 cmdq->head = cmd->next;
4131 cmdq->count--;
4132 spin_unlock_irqrestore(&cmdq->lock.lock, cmdq->lock.flags);
4133 } else {
4134 slic_cmdq_getdone(adapter);
4135 cmd = cmdq->head;
4136 if (cmd) {
4137 goto retry;
4138 } else {
4139 u32 *pageaddr;
4140
4141 spin_unlock_irqrestore(&cmdq->lock.lock,
4142 cmdq->lock.flags);
4143 pageaddr = slic_cmdqmem_addpage(adapter);
4144 if (pageaddr) {
4145 slic_cmdq_addcmdpage(adapter, pageaddr);
4146 goto lock_and_retry;
4147 }
4148 }
4149 }
4150 return cmd;
4151 }
4152
4153 static void slic_cmdq_getdone(struct adapter *adapter)
4154 {
4155 struct slic_cmdqueue *done_cmdq = &adapter->cmdq_done;
4156 struct slic_cmdqueue *free_cmdq = &adapter->cmdq_free;
4157
4158 ASSERT(free_cmdq->head == NULL);
4159 spin_lock_irqsave(&done_cmdq->lock.lock, done_cmdq->lock.flags);
4160 ASSERT(VALID_ADDRESS(done_cmdq->head));
4161
4162 free_cmdq->head = done_cmdq->head;
4163 free_cmdq->count = done_cmdq->count;
4164 done_cmdq->head = NULL;
4165 done_cmdq->tail = NULL;
4166 done_cmdq->count = 0;
4167 spin_unlock_irqrestore(&done_cmdq->lock.lock, done_cmdq->lock.flags);
4168 }
4169
4170 static void slic_cmdq_putdone_irq(struct adapter *adapter,
4171 struct slic_hostcmd *cmd)
4172 {
4173 struct slic_cmdqueue *cmdq = &adapter->cmdq_done;
4174
4175 spin_lock(&cmdq->lock.lock);
4176 cmd->busy = 0;
4177 ASSERT(VALID_ADDRESS(cmdq->head));
4178 cmd->next = cmdq->head;
4179 ASSERT(VALID_ADDRESS(cmd));
4180 cmdq->head = cmd;
4181 cmdq->count++;
4182 if ((adapter->xmitq_full) && (cmdq->count > 10))
4183 netif_wake_queue(adapter->netdev);
4184 spin_unlock(&cmdq->lock.lock);
4185 }
4186
4187 static int slic_rcvqueue_init(struct adapter *adapter)
4188 {
4189 int i, count;
4190 struct slic_rcvqueue *rcvq = &adapter->rcvqueue;
4191
4192 DBG_MSG("slicoss: %s ENTER adapter[%p]\n", __func__, adapter);
4193 ASSERT(adapter->state == ADAPT_DOWN);
4194 rcvq->tail = NULL;
4195 rcvq->head = NULL;
4196 rcvq->size = SLIC_RCVQ_ENTRIES;
4197 rcvq->errors = 0;
4198 rcvq->count = 0;
4199 i = (SLIC_RCVQ_ENTRIES / SLIC_RCVQ_FILLENTRIES);
4200 count = 0;
4201 while (i) {
4202 count += slic_rcvqueue_fill(adapter);
4203 i--;
4204 }
4205 if (rcvq->count < SLIC_RCVQ_MINENTRIES) {
4206 slic_rcvqueue_free(adapter);
4207 return STATUS_FAILURE;
4208 }
4209 DBG_MSG("slicoss: %s EXIT adapter[%p]\n", __func__, adapter);
4210 return STATUS_SUCCESS;
4211 }
4212
4213 static int slic_rcvqueue_reset(struct adapter *adapter)
4214 {
4215 struct slic_rcvqueue *rcvq = &adapter->rcvqueue;
4216
4217 DBG_MSG("slicoss: %s ENTER adapter[%p]\n", __func__, adapter);
4218 ASSERT(adapter->state == ADAPT_DOWN);
4219 ASSERT(rcvq);
4220
4221 DBG_MSG("slicoss: Nothing to do. rcvq[%p]\n"
4222 " count[%x]\n"
4223 " head[%p]\n"
4224 " tail[%p]\n",
4225 rcvq, rcvq->count, rcvq->head, rcvq->tail);
4226
4227 DBG_MSG("slicoss: %s EXIT adapter[%p]\n", __func__, adapter);
4228 return STATUS_SUCCESS;
4229 }
4230
4231 static void slic_rcvqueue_free(struct adapter *adapter)
4232 {
4233 struct slic_rcvqueue *rcvq = &adapter->rcvqueue;
4234 struct sk_buff *skb;
4235
4236 while (rcvq->head) {
4237 skb = rcvq->head;
4238 rcvq->head = rcvq->head->next;
4239 dev_kfree_skb(skb);
4240 }
4241 rcvq->tail = NULL;
4242 rcvq->head = NULL;
4243 rcvq->count = 0;
4244 }
4245
4246 static struct sk_buff *slic_rcvqueue_getnext(struct adapter *adapter)
4247 {
4248 struct slic_rcvqueue *rcvq = &adapter->rcvqueue;
4249 struct sk_buff *skb;
4250 struct slic_rcvbuf *rcvbuf;
4251 int count;
4252
4253 if (rcvq->count) {
4254 skb = rcvq->head;
4255 rcvbuf = (struct slic_rcvbuf *)skb->head;
4256 ASSERT(rcvbuf);
4257
4258 if (rcvbuf->status & IRHDDR_SVALID) {
4259 rcvq->head = rcvq->head->next;
4260 skb->next = NULL;
4261 rcvq->count--;
4262 } else {
4263 skb = NULL;
4264 }
4265 } else {
4266 DBG_ERROR("RcvQ Empty!! adapter[%p] rcvq[%p] count[%x]\n",
4267 adapter, rcvq, rcvq->count);
4268 skb = NULL;
4269 }
4270 while (rcvq->count < SLIC_RCVQ_FILLTHRESH) {
4271 count = slic_rcvqueue_fill(adapter);
4272 if (!count)
4273 break;
4274 }
4275 if (skb)
4276 rcvq->errors = 0;
4277 return skb;
4278 }
4279
4280 static int slic_rcvqueue_fill(struct adapter *adapter)
4281 {
4282 void *paddr;
4283 u32 paddrl;
4284 u32 paddrh;
4285 struct slic_rcvqueue *rcvq = &adapter->rcvqueue;
4286 int i = 0;
4287
4288 while (i < SLIC_RCVQ_FILLENTRIES) {
4289 struct slic_rcvbuf *rcvbuf;
4290 struct sk_buff *skb;
4291 #ifdef KLUDGE_FOR_4GB_BOUNDARY
4292 retry_rcvqfill:
4293 #endif
4294 skb = alloc_skb(SLIC_RCVQ_RCVBUFSIZE, GFP_ATOMIC);
4295 if (skb) {
4296 paddr = (void *)pci_map_single(adapter->pcidev,
4297 skb->data,
4298 SLIC_RCVQ_RCVBUFSIZE,
4299 PCI_DMA_FROMDEVICE);
4300 paddrl = SLIC_GET_ADDR_LOW(paddr);
4301 paddrh = SLIC_GET_ADDR_HIGH(paddr);
4302
4303 skb->len = SLIC_RCVBUF_HEADSIZE;
4304 rcvbuf = (struct slic_rcvbuf *)skb->head;
4305 rcvbuf->status = 0;
4306 skb->next = NULL;
4307 #ifdef KLUDGE_FOR_4GB_BOUNDARY
4308 if (paddrl == 0) {
4309 DBG_ERROR
4310 ("%s: LOW 32bits PHYSICAL ADDRESS == 0 "
4311 "skb[%p] PROBLEM\n"
4312 " skbdata[%p]\n"
4313 " skblen[%x]\n"
4314 " paddr[%p]\n"
4315 " paddrl[%x]\n"
4316 " paddrh[%x]\n", __func__, skb,
4317 skb->data, skb->len, paddr, paddrl,
4318 paddrh);
4319 DBG_ERROR(" rcvq->head[%p]\n"
4320 " rcvq->tail[%p]\n"
4321 " rcvq->count[%x]\n",
4322 rcvq->head, rcvq->tail, rcvq->count);
4323 DBG_ERROR("SKIP THIS SKB!!!!!!!!\n");
4324 goto retry_rcvqfill;
4325 }
4326 #else
4327 if (paddrl == 0) {
4328 DBG_ERROR
4329 ("\n\n%s: LOW 32bits PHYSICAL ADDRESS == 0 "
4330 "skb[%p] GIVE TO CARD ANYWAY\n"
4331 " skbdata[%p]\n"
4332 " paddr[%p]\n"
4333 " paddrl[%x]\n"
4334 " paddrh[%x]\n", __func__, skb,
4335 skb->data, paddr, paddrl, paddrh);
4336 }
4337 #endif
4338 if (paddrh == 0) {
4339 WRITE_REG(adapter->slic_regs->slic_hbar,
4340 (u32) paddrl, DONT_FLUSH);
4341 } else {
4342 WRITE_REG64(adapter,
4343 adapter->slic_regs->slic_hbar64,
4344 (u32) paddrl,
4345 adapter->slic_regs->slic_addr_upper,
4346 (u32) paddrh, DONT_FLUSH);
4347 }
4348 if (rcvq->head)
4349 rcvq->tail->next = skb;
4350 else
4351 rcvq->head = skb;
4352 rcvq->tail = skb;
4353 rcvq->count++;
4354 i++;
4355 } else {
4356 DBG_ERROR
4357 ("%s slic_rcvqueue_fill could only get [%d] "
4358 "skbuffs\n",
4359 adapter->netdev->name, i);
4360 break;
4361 }
4362 }
4363 return i;
4364 }
4365
4366 static u32 slic_rcvqueue_reinsert(struct adapter *adapter, struct sk_buff *skb)
4367 {
4368 struct slic_rcvqueue *rcvq = &adapter->rcvqueue;
4369 void *paddr;
4370 u32 paddrl;
4371 u32 paddrh;
4372 struct slic_rcvbuf *rcvbuf = (struct slic_rcvbuf *)skb->head;
4373
4374 ASSERT(skb->len == SLIC_RCVBUF_HEADSIZE);
4375
4376 paddr = (void *)pci_map_single(adapter->pcidev, skb->head,
4377 SLIC_RCVQ_RCVBUFSIZE, PCI_DMA_FROMDEVICE);
4378 rcvbuf->status = 0;
4379 skb->next = NULL;
4380
4381 paddrl = SLIC_GET_ADDR_LOW(paddr);
4382 paddrh = SLIC_GET_ADDR_HIGH(paddr);
4383
4384 if (paddrl == 0) {
4385 DBG_ERROR
4386 ("%s: LOW 32bits PHYSICAL ADDRESS == 0 skb[%p] PROBLEM\n"
4387 " skbdata[%p]\n" " skblen[%x]\n"
4388 " paddr[%p]\n" " paddrl[%x]\n"
4389 " paddrh[%x]\n", __func__, skb, skb->data,
4390 skb->len, paddr, paddrl, paddrh);
4391 DBG_ERROR(" rcvq->head[%p]\n"
4392 " rcvq->tail[%p]\n"
4393 " rcvq->count[%x]\n", rcvq->head, rcvq->tail,
4394 rcvq->count);
4395 }
4396 if (paddrh == 0) {
4397 WRITE_REG(adapter->slic_regs->slic_hbar, (u32) paddrl,
4398 DONT_FLUSH);
4399 } else {
4400 WRITE_REG64(adapter,
4401 adapter->slic_regs->slic_hbar64,
4402 paddrl,
4403 adapter->slic_regs->slic_addr_upper,
4404 paddrh, DONT_FLUSH);
4405 }
4406 if (rcvq->head)
4407 rcvq->tail->next = skb;
4408 else
4409 rcvq->head = skb;
4410 rcvq->tail = skb;
4411 rcvq->count++;
4412 return rcvq->count;
4413 }
4414
4415 static int slic_debug_card_show(struct seq_file *seq, void *v)
4416 {
4417 #ifdef MOOKTODO
4418 int i;
4419 struct sliccard *card = seq->private;
4420 struct slic_config *config = &card->config;
4421 unsigned char *fru = (unsigned char *)(&card->config.atk_fru);
4422 unsigned char *oemfru = (unsigned char *)(&card->config.OemFru);
4423 #endif
4424
4425 seq_printf(seq, "driver_version : %s", slic_proc_version);
4426 seq_printf(seq, "Microcode versions: \n");
4427 seq_printf(seq, " Gigabit (gb) : %s %s\n",
4428 MOJAVE_UCODE_VERS_STRING, MOJAVE_UCODE_VERS_DATE);
4429 seq_printf(seq, " Gigabit Receiver : %s %s\n",
4430 GB_RCVUCODE_VERS_STRING, GB_RCVUCODE_VERS_DATE);
4431 seq_printf(seq, "Vendor : %s\n", slic_vendor);
4432 seq_printf(seq, "Product Name : %s\n", slic_product_name);
4433 #ifdef MOOKTODO
4434 seq_printf(seq, "VendorId : %4.4X\n",
4435 config->VendorId);
4436 seq_printf(seq, "DeviceId : %4.4X\n",
4437 config->DeviceId);
4438 seq_printf(seq, "RevisionId : %2.2x\n",
4439 config->RevisionId);
4440 seq_printf(seq, "Bus # : %d\n", card->busnumber);
4441 seq_printf(seq, "Device # : %d\n", card->slotnumber);
4442 seq_printf(seq, "Interfaces : %d\n", card->card_size);
4443 seq_printf(seq, " Initialized : %d\n",
4444 card->adapters_activated);
4445 seq_printf(seq, " Allocated : %d\n",
4446 card->adapters_allocated);
4447 ASSERT(card->card_size <= SLIC_NBR_MACS);
4448 for (i = 0; i < card->card_size; i++) {
4449 seq_printf(seq,
4450 " MAC%d : %2.2X %2.2X %2.2X %2.2X %2.2X %2.2X\n",
4451 i, config->macinfo[i].macaddrA[0],
4452 config->macinfo[i].macaddrA[1],
4453 config->macinfo[i].macaddrA[2],
4454 config->macinfo[i].macaddrA[3],
4455 config->macinfo[i].macaddrA[4],
4456 config->macinfo[i].macaddrA[5]);
4457 }
4458 seq_printf(seq, " IF Init State Duplex/Speed irq\n");
4459 seq_printf(seq, " -------------------------------\n");
4460 for (i = 0; i < card->adapters_allocated; i++) {
4461 struct adapter *adapter;
4462
4463 adapter = card->adapter[i];
4464 if (adapter) {
4465 seq_printf(seq,
4466 " %d %d %s %s %s 0x%X\n",
4467 adapter->physport, adapter->state,
4468 SLIC_LINKSTATE(adapter->linkstate),
4469 SLIC_DUPLEX(adapter->linkduplex),
4470 SLIC_SPEED(adapter->linkspeed),
4471 (uint) adapter->irq);
4472 }
4473 }
4474 seq_printf(seq, "Generation # : %4.4X\n", card->gennumber);
4475 seq_printf(seq, "RcvQ max entries : %4.4X\n",
4476 SLIC_RCVQ_ENTRIES);
4477 seq_printf(seq, "Ping Status : %8.8X\n",
4478 card->pingstatus);
4479 seq_printf(seq, "Minimum grant : %2.2x\n",
4480 config->MinGrant);
4481 seq_printf(seq, "Maximum Latency : %2.2x\n", config->MaxLat);
4482 seq_printf(seq, "PciStatus : %4.4x\n",
4483 config->Pcistatus);
4484 seq_printf(seq, "Debug Device Id : %4.4x\n",
4485 config->DbgDevId);
4486 seq_printf(seq, "DRAM ROM Function : %4.4x\n",
4487 config->DramRomFn);
4488 seq_printf(seq, "Network interface Pin 1 : %2.2x\n",
4489 config->NetIntPin1);
4490 seq_printf(seq, "Network interface Pin 2 : %2.2x\n",
4491 config->NetIntPin1);
4492 seq_printf(seq, "Network interface Pin 3 : %2.2x\n",
4493 config->NetIntPin1);
4494 seq_printf(seq, "PM capabilities : %4.4X\n",
4495 config->PMECapab);
4496 seq_printf(seq, "Network Clock Controls : %4.4X\n",
4497 config->NwClkCtrls);
4498
4499 switch (config->FruFormat) {
4500 case ATK_FRU_FORMAT:
4501 {
4502 seq_printf(seq,
4503 "Vendor : Alacritech, Inc.\n");
4504 seq_printf(seq,
4505 "Assembly # : %c%c%c%c%c%c\n",
4506 fru[0], fru[1], fru[2], fru[3], fru[4],
4507 fru[5]);
4508 seq_printf(seq,
4509 "Revision # : %c%c\n",
4510 fru[6], fru[7]);
4511
4512 if (config->OEMFruFormat == VENDOR4_FRU_FORMAT) {
4513 seq_printf(seq,
4514 "Serial # : "
4515 "%c%c%c%c%c%c%c%c%c%c%c%c\n",
4516 fru[8], fru[9], fru[10],
4517 fru[11], fru[12], fru[13],
4518 fru[16], fru[17], fru[18],
4519 fru[19], fru[20], fru[21]);
4520 } else {
4521 seq_printf(seq,
4522 "Serial # : "
4523 "%c%c%c%c%c%c%c%c%c%c%c%c%c%c\n",
4524 fru[8], fru[9], fru[10],
4525 fru[11], fru[12], fru[13],
4526 fru[14], fru[15], fru[16],
4527 fru[17], fru[18], fru[19],
4528 fru[20], fru[21]);
4529 }
4530 break;
4531 }
4532
4533 default:
4534 {
4535 seq_printf(seq,
4536 "Vendor : Alacritech, Inc.\n");
4537 seq_printf(seq,
4538 "Serial # : Empty FRU\n");
4539 break;
4540 }
4541 }
4542
4543 switch (config->OEMFruFormat) {
4544 case VENDOR1_FRU_FORMAT:
4545 {
4546 seq_printf(seq, "FRU Information:\n");
4547 seq_printf(seq, " Commodity # : %c\n",
4548 oemfru[0]);
4549 seq_printf(seq,
4550 " Assembly # : %c%c%c%c\n",
4551 oemfru[1], oemfru[2], oemfru[3], oemfru[4]);
4552 seq_printf(seq,
4553 " Revision # : %c%c\n",
4554 oemfru[5], oemfru[6]);
4555 seq_printf(seq,
4556 " Supplier # : %c%c\n",
4557 oemfru[7], oemfru[8]);
4558 seq_printf(seq,
4559 " Date : %c%c\n",
4560 oemfru[9], oemfru[10]);
4561 seq_sprintf(seq,
4562 " Sequence # : %c%c%c\n",
4563 oemfru[11], oemfru[12], oemfru[13]);
4564 break;
4565 }
4566
4567 case VENDOR2_FRU_FORMAT:
4568 {
4569 seq_printf(seq, "FRU Information:\n");
4570 seq_printf(seq,
4571 " Part # : "
4572 "%c%c%c%c%c%c%c%c\n",
4573 oemfru[0], oemfru[1], oemfru[2],
4574 oemfru[3], oemfru[4], oemfru[5],
4575 oemfru[6], oemfru[7]);
4576 seq_printf(seq,
4577 " Supplier # : %c%c%c%c%c\n",
4578 oemfru[8], oemfru[9], oemfru[10],
4579 oemfru[11], oemfru[12]);
4580 seq_printf(seq,
4581 " Date : %c%c%c\n",
4582 oemfru[13], oemfru[14], oemfru[15]);
4583 seq_sprintf(seq,
4584 " Sequence # : %c%c%c%c\n",
4585 oemfru[16], oemfru[17], oemfru[18],
4586 oemfru[19]);
4587 break;
4588 }
4589
4590 case VENDOR3_FRU_FORMAT:
4591 {
4592 seq_printf(seq, "FRU Information:\n");
4593 }
4594
4595 case VENDOR4_FRU_FORMAT:
4596 {
4597 seq_printf(seq, "FRU Information:\n");
4598 seq_printf(seq,
4599 " FRU Number : "
4600 "%c%c%c%c%c%c%c%c\n",
4601 oemfru[0], oemfru[1], oemfru[2],
4602 oemfru[3], oemfru[4], oemfru[5],
4603 oemfru[6], oemfru[7]);
4604 seq_sprintf(seq,
4605 " Part Number : "
4606 "%c%c%c%c%c%c%c%c\n",
4607 oemfru[8], oemfru[9], oemfru[10],
4608 oemfru[11], oemfru[12], oemfru[13],
4609 oemfru[14], oemfru[15]);
4610 seq_printf(seq,
4611 " EC Level : "
4612 "%c%c%c%c%c%c%c%c\n",
4613 oemfru[16], oemfru[17], oemfru[18],
4614 oemfru[19], oemfru[20], oemfru[21],
4615 oemfru[22], oemfru[23]);
4616 break;
4617 }
4618
4619 default:
4620 break;
4621 }
4622 #endif
4623
4624 return 0;
4625 }
4626
4627 static int slic_debug_adapter_show(struct seq_file *seq, void *v)
4628 {
4629 struct adapter *adapter = seq->private;
4630
4631 if ((adapter->netdev) && (adapter->netdev->name)) {
4632 seq_printf(seq, "info: interface : %s\n",
4633 adapter->netdev->name);
4634 }
4635 seq_printf(seq, "info: status : %s\n",
4636 SLIC_LINKSTATE(adapter->linkstate));
4637 seq_printf(seq, "info: port : %d\n",
4638 adapter->physport);
4639 seq_printf(seq, "info: speed : %s\n",
4640 SLIC_SPEED(adapter->linkspeed));
4641 seq_printf(seq, "info: duplex : %s\n",
4642 SLIC_DUPLEX(adapter->linkduplex));
4643 seq_printf(seq, "info: irq : 0x%X\n",
4644 (uint) adapter->irq);
4645 seq_printf(seq, "info: Interrupt Agg Delay: %d usec\n",
4646 adapter->card->loadlevel_current);
4647 seq_printf(seq, "info: RcvQ max entries : %4.4X\n",
4648 SLIC_RCVQ_ENTRIES);
4649 seq_printf(seq, "info: RcvQ current : %4.4X\n",
4650 adapter->rcvqueue.count);
4651 seq_printf(seq, "rx stats: packets : %8.8lX\n",
4652 adapter->stats.rx_packets);
4653 seq_printf(seq, "rx stats: bytes : %8.8lX\n",
4654 adapter->stats.rx_bytes);
4655 seq_printf(seq, "rx stats: broadcasts : %8.8X\n",
4656 adapter->rcv_broadcasts);
4657 seq_printf(seq, "rx stats: multicasts : %8.8X\n",
4658 adapter->rcv_multicasts);
4659 seq_printf(seq, "rx stats: unicasts : %8.8X\n",
4660 adapter->rcv_unicasts);
4661 seq_printf(seq, "rx stats: errors : %8.8X\n",
4662 (u32) adapter->slic_stats.iface.rcv_errors);
4663 seq_printf(seq, "rx stats: Missed errors : %8.8X\n",
4664 (u32) adapter->slic_stats.iface.rcv_discards);
4665 seq_printf(seq, "rx stats: drops : %8.8X\n",
4666 (u32) adapter->rcv_drops);
4667 seq_printf(seq, "tx stats: packets : %8.8lX\n",
4668 adapter->stats.tx_packets);
4669 seq_printf(seq, "tx stats: bytes : %8.8lX\n",
4670 adapter->stats.tx_bytes);
4671 seq_printf(seq, "tx stats: errors : %8.8X\n",
4672 (u32) adapter->slic_stats.iface.xmt_errors);
4673 seq_printf(seq, "rx stats: multicasts : %8.8lX\n",
4674 adapter->stats.multicast);
4675 seq_printf(seq, "tx stats: collision errors : %8.8X\n",
4676 (u32) adapter->slic_stats.iface.xmit_collisions);
4677 seq_printf(seq, "perf: Max rcv frames/isr : %8.8X\n",
4678 adapter->max_isr_rcvs);
4679 seq_printf(seq, "perf: Rcv interrupt yields : %8.8X\n",
4680 adapter->rcv_interrupt_yields);
4681 seq_printf(seq, "perf: Max xmit complete/isr : %8.8X\n",
4682 adapter->max_isr_xmits);
4683 seq_printf(seq, "perf: error interrupts : %8.8X\n",
4684 adapter->error_interrupts);
4685 seq_printf(seq, "perf: error rmiss interrupts : %8.8X\n",
4686 adapter->error_rmiss_interrupts);
4687 seq_printf(seq, "perf: rcv interrupts : %8.8X\n",
4688 adapter->rcv_interrupts);
4689 seq_printf(seq, "perf: xmit interrupts : %8.8X\n",
4690 adapter->xmit_interrupts);
4691 seq_printf(seq, "perf: link event interrupts : %8.8X\n",
4692 adapter->linkevent_interrupts);
4693 seq_printf(seq, "perf: UPR interrupts : %8.8X\n",
4694 adapter->upr_interrupts);
4695 seq_printf(seq, "perf: interrupt count : %8.8X\n",
4696 adapter->num_isrs);
4697 seq_printf(seq, "perf: false interrupts : %8.8X\n",
4698 adapter->false_interrupts);
4699 seq_printf(seq, "perf: All register writes : %8.8X\n",
4700 adapter->all_reg_writes);
4701 seq_printf(seq, "perf: ICR register writes : %8.8X\n",
4702 adapter->icr_reg_writes);
4703 seq_printf(seq, "perf: ISR register writes : %8.8X\n",
4704 adapter->isr_reg_writes);
4705 seq_printf(seq, "ifevents: overflow 802 errors : %8.8X\n",
4706 adapter->if_events.oflow802);
4707 seq_printf(seq, "ifevents: transport overflow errors: %8.8X\n",
4708 adapter->if_events.Tprtoflow);
4709 seq_printf(seq, "ifevents: underflow errors : %8.8X\n",
4710 adapter->if_events.uflow802);
4711 seq_printf(seq, "ifevents: receive early : %8.8X\n",
4712 adapter->if_events.rcvearly);
4713 seq_printf(seq, "ifevents: buffer overflows : %8.8X\n",
4714 adapter->if_events.Bufov);
4715 seq_printf(seq, "ifevents: carrier errors : %8.8X\n",
4716 adapter->if_events.Carre);
4717 seq_printf(seq, "ifevents: Long : %8.8X\n",
4718 adapter->if_events.Longe);
4719 seq_printf(seq, "ifevents: invalid preambles : %8.8X\n",
4720 adapter->if_events.Invp);
4721 seq_printf(seq, "ifevents: CRC errors : %8.8X\n",
4722 adapter->if_events.Crc);
4723 seq_printf(seq, "ifevents: dribble nibbles : %8.8X\n",
4724 adapter->if_events.Drbl);
4725 seq_printf(seq, "ifevents: Code violations : %8.8X\n",
4726 adapter->if_events.Code);
4727 seq_printf(seq, "ifevents: TCP checksum errors : %8.8X\n",
4728 adapter->if_events.TpCsum);
4729 seq_printf(seq, "ifevents: TCP header short errors : %8.8X\n",
4730 adapter->if_events.TpHlen);
4731 seq_printf(seq, "ifevents: IP checksum errors : %8.8X\n",
4732 adapter->if_events.IpCsum);
4733 seq_printf(seq, "ifevents: IP frame incompletes : %8.8X\n",
4734 adapter->if_events.IpLen);
4735 seq_printf(seq, "ifevents: IP headers shorts : %8.8X\n",
4736 adapter->if_events.IpHlen);
4737
4738 return 0;
4739 }
4740 static int slic_debug_adapter_open(struct inode *inode, struct file *file)
4741 {
4742 return single_open(file, slic_debug_adapter_show, inode->i_private);
4743 }
4744
4745 static int slic_debug_card_open(struct inode *inode, struct file *file)
4746 {
4747 return single_open(file, slic_debug_card_show, inode->i_private);
4748 }
4749
4750 static const struct file_operations slic_debug_adapter_fops = {
4751 .owner = THIS_MODULE,
4752 .open = slic_debug_adapter_open,
4753 .read = seq_read,
4754 .llseek = seq_lseek,
4755 .release = single_release,
4756 };
4757
4758 static const struct file_operations slic_debug_card_fops = {
4759 .owner = THIS_MODULE,
4760 .open = slic_debug_card_open,
4761 .read = seq_read,
4762 .llseek = seq_lseek,
4763 .release = single_release,
4764 };
4765
4766 static void slic_debug_adapter_create(struct adapter *adapter)
4767 {
4768 struct dentry *d;
4769 char name[7];
4770 struct sliccard *card = adapter->card;
4771
4772 if (!card->debugfs_dir)
4773 return;
4774
4775 sprintf(name, "port%d", adapter->port);
4776 d = debugfs_create_file(name, S_IRUGO,
4777 card->debugfs_dir, adapter,
4778 &slic_debug_adapter_fops);
4779 if (!d || IS_ERR(d))
4780 pr_info(PFX "%s: debugfs create failed\n", name);
4781 else
4782 adapter->debugfs_entry = d;
4783 }
4784
4785 static void slic_debug_adapter_destroy(struct adapter *adapter)
4786 {
4787 if (adapter->debugfs_entry) {
4788 debugfs_remove(adapter->debugfs_entry);
4789 adapter->debugfs_entry = NULL;
4790 }
4791 }
4792
4793 static void slic_debug_card_create(struct sliccard *card)
4794 {
4795 struct dentry *d;
4796 char name[IFNAMSIZ];
4797
4798 snprintf(name, sizeof(name), "slic%d", card->cardnum);
4799 d = debugfs_create_dir(name, slic_debugfs);
4800 if (!d || IS_ERR(d))
4801 pr_info(PFX "%s: debugfs create dir failed\n",
4802 name);
4803 else {
4804 card->debugfs_dir = d;
4805 d = debugfs_create_file("cardinfo", S_IRUGO,
4806 slic_debugfs, card,
4807 &slic_debug_card_fops);
4808 if (!d || IS_ERR(d))
4809 pr_info(PFX "%s: debugfs create failed\n",
4810 name);
4811 else
4812 card->debugfs_cardinfo = d;
4813 }
4814 }
4815
4816 static void slic_debug_card_destroy(struct sliccard *card)
4817 {
4818 int i;
4819
4820 for (i = 0; i < card->card_size; i++) {
4821 struct adapter *adapter;
4822
4823 adapter = card->adapter[i];
4824 if (adapter)
4825 slic_debug_adapter_destroy(adapter);
4826 }
4827 if (card->debugfs_cardinfo) {
4828 debugfs_remove(card->debugfs_cardinfo);
4829 card->debugfs_cardinfo = NULL;
4830 }
4831 if (card->debugfs_dir) {
4832 debugfs_remove(card->debugfs_dir);
4833 card->debugfs_dir = NULL;
4834 }
4835 }
4836
4837 static void slic_debug_init(void)
4838 {
4839 struct dentry *ent;
4840
4841 ent = debugfs_create_dir("slic", NULL);
4842 if (!ent || IS_ERR(ent)) {
4843 pr_info(PFX "debugfs create directory failed\n");
4844 return;
4845 }
4846
4847 slic_debugfs = ent;
4848 }
4849
4850 static void slic_debug_cleanup(void)
4851 {
4852 if (slic_debugfs) {
4853 debugfs_remove(slic_debugfs);
4854 slic_debugfs = NULL;
4855 }
4856 }
4857
4858 /*=============================================================================
4859 =============================================================================
4860 === ===
4861 === SLIC DUMP MANAGEMENT SECTION ===
4862 === ===
4863 === ===
4864 === Dump routines ===
4865 === ===
4866 === ===
4867 =============================================================================
4868 ============================================================================*/
4869
4870 #if SLIC_DUMP_ENABLED
4871
4872 #include <stdarg.h>
4873
4874 void *slic_dump_handle; /* thread handle */
4875
4876 /*
4877 * These are the only things you should do on a core-file: use only these
4878 * functions to write out all the necessary info.
4879 */
4880 static int slic_dump_seek(struct file *SLIChandle, u32 file_offset)
4881 {
4882 if (SLIChandle->f_pos != file_offset) {
4883 /*DBG_MSG("slic_dump_seek now needed [%x : %x]\n",
4884 (u32)SLIChandle->f_pos, (u32)file_offset); */
4885 if (SLIChandle->f_op->llseek) {
4886 if (SLIChandle->f_op->
4887 llseek(SLIChandle, file_offset, 0) != file_offset)
4888 return 0;
4889 } else {
4890 SLIChandle->f_pos = file_offset;
4891 }
4892 }
4893 return 1;
4894 }
4895
4896 static int slic_dump_write(struct sliccard *card,
4897 const void *addr, int size, u32 file_offset)
4898 {
4899 int r = 1;
4900 u32 result = 0;
4901 struct file *SLIChandle = card->dumphandle;
4902
4903 #ifdef HISTORICAL /* legacy */
4904 down(&SLIChandle->f_dentry->d_inode->i_sem);
4905 #endif
4906 if (size) {
4907 slic_dump_seek(SLIChandle, file_offset);
4908
4909 result =
4910 SLIChandle->f_op->write(SLIChandle, addr, size,
4911 &SLIChandle->f_pos);
4912
4913 r = result == size;
4914 }
4915
4916 card->dumptime_complete = jiffies;
4917 card->dumptime_delta = card->dumptime_complete - card->dumptime_start;
4918 card->dumptime_start = jiffies;
4919
4920 #ifdef HISTORICAL
4921 up(&SLIChandle->f_dentry->d_inode->i_sem);
4922 #endif
4923 if (!r) {
4924 DBG_ERROR("%s: addr[%p] size[%x] result[%x] file_offset[%x]\n",
4925 __func__, addr, size, result, file_offset);
4926 }
4927 return r;
4928 }
4929
4930 static uint slic_init_dump_thread(struct sliccard *card)
4931 {
4932 card->dump_task_id = kthread_run(slic_dump_thread, (void *)card, 0);
4933
4934 /* DBG_MSG("create slic_dump_thread dump_pid[%x]\n", card->dump_pid); */
4935 if (IS_ERR(card->dump_task_id)) {
4936 DBG_MSG("create slic_dump_thread FAILED \n");
4937 return STATUS_FAILURE;
4938 }
4939
4940 return STATUS_SUCCESS;
4941 }
4942
4943 static int slic_dump_thread(void *context)
4944 {
4945 struct sliccard *card = (struct sliccard *)context;
4946 struct adapter *adapter;
4947 struct adapter *dump_adapter = NULL;
4948 u32 dump_complete = 0;
4949 u32 delay = SLIC_SECS_TO_JIFFS(PING_TIMER_INTERVAL);
4950 struct slic_regs *pregs;
4951 u32 i;
4952 struct slic_upr *upr, *uprnext;
4953 u32 dump_card;
4954
4955 ASSERT(card);
4956
4957 card->dumpthread_running = 1;
4958
4959 #ifdef HISTORICAL
4960 lock_kernel();
4961 /*
4962 * This thread doesn't need any user-level access,
4963 * so get rid of all our resources
4964 */
4965 exit_files(current); /* daemonize doesn't do exit_files */
4966 current->files = init_task.files;
4967 atomic_inc(&current->files->count);
4968 #endif
4969
4970 daemonize("%s", "slicmon");
4971
4972 /* Setup a nice name */
4973 strcpy(current->comm, "slicmon");
4974 DBG_ERROR
4975 ("slic_dump_thread[slicmon] daemon is alive card[%p] pid[%x]\n",
4976 card, card->dump_task_id->pid);
4977
4978 /*
4979 * Send me a signal to get me to die (for debugging)
4980 */
4981 do {
4982 /*
4983 * If card state is not set to up, skip
4984 */
4985 if (card->state != CARD_UP) {
4986 if (card->adapters_activated)
4987 goto wait;
4988 else
4989 goto end_thread;
4990 }
4991 /*
4992 * Check the results of our last ping.
4993 */
4994 dump_card = 0;
4995 #ifdef SLIC_FAILURE_DUMP
4996 if (card->pingstatus != ISR_PINGMASK) {
4997 DBG_MSG
4998 ("\n[slicmon] CARD #%d TIMED OUT - status "
4999 "%x: DUMP THE CARD!\n",
5000 card->cardnum, card->pingstatus);
5001 dump_card = 1;
5002 }
5003 #else
5004 /*
5005 * Cause a card RESET instead?
5006 */
5007 if (card->pingstatus != ISR_PINGMASK) {
5008 /* todo. do we want to reset the card in production */
5009 /* DBG_MSG("\n[slicmon] CARD #%d TIMED OUT - "
5010 status %x: RESET THE CARD!\n", card->cardnum,
5011 card->pingstatus); */
5012 DBG_ERROR
5013 ("\n[slicmon] CARD #%d TIMED OUT - status %x: "
5014 "DUMP THE CARD!\n",
5015 card->cardnum, card->pingstatus);
5016 dump_card = 1;
5017 }
5018 #endif
5019 if ((dump_card)
5020 || (card->dump_requested == SLIC_DUMP_REQUESTED)) {
5021 if (card->dump_requested == SLIC_DUMP_REQUESTED) {
5022 DBG_ERROR
5023 ("[slicmon]: Dump card Requested: Card %x\n",
5024 card->cardnum);
5025 }
5026 if (card->pingstatus != ISR_PINGMASK) {
5027 ushort cpuid = 0;
5028 ushort crashpc = 0;
5029
5030 if (card->adapter[0]) {
5031 if ((card->adapter[0])->memorylength >=
5032 CRASH_INFO_OFFSET +
5033 sizeof(slic_crash_info)) {
5034 char *crashptr;
5035 p_slic_crash_info crashinfo;
5036
5037 crashptr =
5038 ((char *)card->adapter[0]->
5039 slic_regs) +
5040 CRASH_INFO_OFFSET;
5041 crashinfo =
5042 (p_slic_crash_info)
5043 crashptr;
5044 cpuid = crashinfo->cpu_id;
5045 crashpc = crashinfo->crash_pc;
5046 }
5047 }
5048 DBG_ERROR
5049 ("[slicmon]: Dump card: Card %x crashed "
5050 "and failed to answer PING. "
5051 "CPUID[%x] PC[%x]\n ",
5052 card->cardnum, cpuid, crashpc);
5053 }
5054
5055 card->dump_requested = SLIC_DUMP_IN_PROGRESS;
5056
5057 /*
5058 * Set the card state to DOWN and the adapter states
5059 * to RESET.They will check this in SimbaCheckForHang
5060 * and initiate interface reset (which in turn will
5061 * reinitialize the card).
5062 */
5063 card->state = CARD_DOWN;
5064
5065 for (i = 0; i < card->card_size; i++) {
5066 adapter = card->adapter[i];
5067 if (adapter) {
5068 slic_if_stop_queue(adapter);
5069
5070 if (adapter->state == ADAPT_UP) {
5071 adapter->state = ADAPT_RESET;
5072 adapter->linkstate = LINK_DOWN;
5073 DBG_ERROR
5074 ("[slicmon]: SLIC Card[%d] "
5075 "Port[%d] adapter[%p] "
5076 "down\n",
5077 (uint) card->cardnum,
5078 (uint) i, adapter);
5079 }
5080 #if SLIC_GET_STATS_TIMER_ENABLED
5081 /* free stats timer */
5082 if (adapter->statstimerset) {
5083 adapter->statstimerset = 0;
5084 del_timer(&adapter->statstimer);
5085 }
5086 #endif
5087 }
5088 }
5089
5090 for (i = 0; i < card->card_size; i++) {
5091 adapter = card->adapter[i];
5092 if ((adapter) && (adapter->activated)) {
5093 pregs = adapter->slic_regs;
5094 dump_adapter = adapter;
5095
5096 /*
5097 * If the dump status is zero, then
5098 * the utility processor has crashed.
5099 * If this is the case, any pending
5100 * utilityprocessor requests will not
5101 * complete and our dump commands will
5102 * not be issued.
5103 *
5104 * To avoid this we will clear any
5105 * pending utility processor requests
5106 * now.
5107 */
5108 if (!card->pingstatus) {
5109 spin_lock_irqsave(
5110 &adapter->upr_lock.lock,
5111 adapter->upr_lock.flags);
5112 upr = adapter->upr_list;
5113 while (upr) {
5114 uprnext = upr->next;
5115 kfree(upr);
5116 upr = uprnext;
5117 }
5118 adapter->upr_list = 0;
5119 adapter->upr_busy = 0;
5120 spin_unlock_irqrestore(
5121 &adapter->upr_lock.lock,
5122 adapter->upr_lock.flags);
5123 }
5124
5125 slic_dump_card(card, FALSE);
5126 dump_complete = 1;
5127 }
5128
5129 if (dump_complete) {
5130 DBG_ERROR("SLIC Dump Complete\n");
5131 /* Only dump the card one time */
5132 break;
5133 }
5134 }
5135
5136 if (dump_adapter) {
5137 DBG_ERROR
5138 ("slic dump completed. "
5139 "Reenable interfaces\n");
5140 slic_card_init(card, dump_adapter);
5141
5142 /*
5143 * Reenable the adapters that were reset
5144 */
5145 for (i = 0; i < card->card_size; i++) {
5146 adapter = card->adapter[i];
5147 if (adapter) {
5148 if (adapter->state ==
5149 ADAPT_RESET) {
5150 DBG_ERROR
5151 ("slicdump: SLIC "
5152 "Card[%d] Port[%d] adapter[%p] "
5153 "bring UP\n",
5154 (uint) card->
5155 cardnum, (uint) i,
5156 adapter);
5157 adapter->state =
5158 ADAPT_DOWN;
5159 adapter->linkstate =
5160 LINK_DOWN;
5161 slic_entry_open
5162 (adapter->netdev);
5163 }
5164 }
5165 }
5166
5167 card->dump_requested = SLIC_DUMP_DONE;
5168 }
5169 } else {
5170 /* if pingstatus != ISR_PINGMASK) || dump_requested...ELSE
5171 * We received a valid ping response.
5172 * Clear the Pingstatus field, find a valid adapter
5173 * structure and send another ping.
5174 */
5175 for (i = 0; i < card->card_size; i++) {
5176 adapter = card->adapter[i];
5177 if (adapter && (adapter->state == ADAPT_UP)) {
5178 card->pingstatus = 0;
5179 slic_upr_request(adapter, SLIC_UPR_PING,
5180 0, 0, 0, 0);
5181 break; /* Only issue one per card */
5182 }
5183 }
5184 }
5185 wait:
5186 SLIC_INTERRUPTIBLE_SLEEP_ON_TIMEOUT(card->dump_wq, delay);
5187 } while (!signal_pending(current));
5188
5189 end_thread:
5190 /* DBG_MSG("[slicmon] slic_dump_thread card[%p] pid[%x] ENDING\n",
5191 card, card->dump_pid); */
5192 card->dumpthread_running = 0;
5193
5194 return 0;
5195 }
5196
5197 /*
5198 * Read a single byte from our dump index file. This
5199 * value is used as our suffix for our dump path. The
5200 * value is incremented and written back to the file
5201 */
5202 static unsigned char slic_get_dump_index(char *path)
5203 {
5204 unsigned char index = 0;
5205 #ifdef SLIC_DUMP_INDEX_SUPPORT
5206 u32 status;
5207 void *FileHandle;
5208 u32 offset;
5209
5210 offset = 0;
5211
5212 /*
5213 * Open the index file. If one doesn't exist, create it
5214 */
5215 status = create_file(&FileHandle);
5216
5217 if (status != STATUS_SUCCESS)
5218 return (unsigned char) 0;
5219
5220 status = read_file(FileHandle, &index, 1, &offset);
5221
5222 index++;
5223
5224 status = write_file(FileHandle, &index, 1, &offset);
5225
5226 close_file(FileHandle);
5227 #else
5228 index = 0;
5229 #endif
5230 return index;
5231 }
5232
5233 static struct file *slic_dump_open_file(struct sliccard *card)
5234 {
5235 struct file *SLIChandle = NULL;
5236 struct dentry *dentry = NULL;
5237 struct inode *inode = NULL;
5238 char SLICfile[50];
5239
5240 card->dumpfile_fs = get_fs();
5241
5242 set_fs(KERNEL_DS);
5243
5244 memset(SLICfile, 0, sizeof(SLICfile));
5245 sprintf(SLICfile, "/var/tmp/slic%d-dump-%d", card->cardnum,
5246 (uint) card->dump_count);
5247 card->dump_count++;
5248
5249 SLIChandle =
5250 filp_open(SLICfile, O_CREAT | O_RDWR | O_SYNC | O_LARGEFILE, 0666);
5251
5252 DBG_MSG("[slicmon]: Dump Card #%d to file: %s \n", card->cardnum,
5253 SLICfile);
5254
5255 /* DBG_MSG("[slicmon] filp_open %s SLIChandle[%p]\n", SLICfile, SLIChandle);*/
5256
5257 if (IS_ERR(SLIChandle))
5258 goto end_slicdump;
5259
5260 dentry = SLIChandle->f_dentry;
5261 inode = dentry->d_inode;
5262
5263 /* DBG_MSG("[slicmon] inode[%p] i_nlink[%x] i_mode[%x] i_op[%p] i_fop[%p]\n"
5264 "f_op->write[%p]\n",
5265 inode, inode->i_nlink, inode->i_mode, inode->i_op,
5266 inode->i_fop, SLIChandle->f_op->write); */
5267 if (inode->i_nlink > 1)
5268 goto close_slicdump; /* multiple links - don't dump */
5269 #ifdef HISTORICAL
5270 if (!S_ISREG(inode->i_mode))
5271 goto close_slicdump;
5272 #endif
5273 if (!inode->i_op || !inode->i_fop)
5274 goto close_slicdump;
5275
5276 if (!SLIChandle->f_op->write)
5277 goto close_slicdump;
5278
5279 /*
5280 * If we got here we have SUCCESSFULLY OPENED the dump file
5281 */
5282 /* DBG_MSG("opened %s SLIChandle[%p]\n", SLICfile, SLIChandle); */
5283 return SLIChandle;
5284
5285 close_slicdump:
5286 DBG_MSG("[slicmon] slic_dump_open_file failed close SLIChandle[%p]\n",
5287 SLIChandle);
5288 filp_close(SLIChandle, NULL);
5289
5290 end_slicdump:
5291 set_fs(card->dumpfile_fs);
5292
5293 return NULL;
5294 }
5295
5296 static void slic_dump_close_file(struct sliccard *card)
5297 {
5298
5299 /* DBG_MSG("[slicmon] slic_dump_CLOSE_file close SLIChandle[%p]\n",
5300 card->dumphandle); */
5301
5302 filp_close(card->dumphandle, NULL);
5303
5304 set_fs(card->dumpfile_fs);
5305 }
5306
5307 static u32 slic_dump_card(struct sliccard *card, bool resume)
5308 {
5309 struct adapter *adapter = card->master;
5310 u32 status;
5311 u32 queue;
5312 u32 len, offset;
5313 u32 sram_size, dram_size, regs;
5314 struct sliccore_hdr corehdr;
5315 u32 file_offset;
5316 char *namestr;
5317 u32 i;
5318 u32 max_queues = 0;
5319 u32 result;
5320
5321 card->dumphandle = slic_dump_open_file(card);
5322
5323 if (card->dumphandle == NULL) {
5324 DBG_MSG("[slicmon] Cant create Dump file - dump failed\n");
5325 return -ENOMEM;
5326 }
5327 if (!card->dumpbuffer) {
5328 DBG_MSG("[slicmon] Insufficient memory for dump\n");
5329 return -ENOMEM;
5330 }
5331 if (!card->cmdbuffer) {
5332 DBG_MSG("[slicmon] Insufficient cmd memory for dump\n");
5333 return -ENOMEM;
5334 }
5335
5336 /*
5337 * Write the file version to the core header.
5338 */
5339 namestr = slic_proc_version;
5340 for (i = 0; i < (DRIVER_NAME_SIZE - 1); i++, namestr++) {
5341 if (!namestr)
5342 break;
5343 corehdr.driver_version[i] = *namestr;
5344 }
5345 corehdr.driver_version[i] = 0;
5346
5347 file_offset = sizeof(struct sliccore_hdr);
5348
5349 /*
5350 * Issue the following debug commands to the SLIC:
5351 * - Halt both receive and transmit
5352 * - Dump receive registers
5353 * - Dump transmit registers
5354 * - Dump sram
5355 * - Dump dram
5356 * - Dump queues
5357 */
5358 DBG_MSG("slicDump HALT Receive Processor\n");
5359 card->dumptime_start = jiffies;
5360
5361 status = slic_dump_halt(card, PROC_RECEIVE);
5362 if (status != STATUS_SUCCESS) {
5363 DBG_ERROR
5364 ("Cant halt receive sequencer - dump failed status[%x]\n",
5365 status);
5366 goto done;
5367 }
5368
5369 DBG_MSG("slicDump HALT Transmit Processor\n");
5370 status = slic_dump_halt(card, PROC_TRANSMIT);
5371 if (status != STATUS_SUCCESS) {
5372 DBG_ERROR("Cant halt transmit sequencer - dump failed\n");
5373 goto done;
5374 }
5375
5376 /* Dump receive regs */
5377 status = slic_dump_reg(card, PROC_RECEIVE);
5378 if (status != STATUS_SUCCESS) {
5379 DBG_ERROR("Cant dump receive registers - dump failed\n");
5380 goto done;
5381 }
5382
5383 DBG_MSG("slicDump Write Receive REGS len[%x] offset[%x]\n",
5384 (SLIC_NUM_REG * 4), file_offset);
5385
5386 result =
5387 slic_dump_write(card, card->dumpbuffer, SLIC_NUM_REG * 4,
5388 file_offset);
5389 if (!result) {
5390 DBG_ERROR
5391 ("Cant write rcv registers to dump file - dump failed\n");
5392 goto done;
5393 }
5394
5395 corehdr.RcvRegOff = file_offset;
5396 corehdr.RcvRegsize = SLIC_NUM_REG * 4;
5397 file_offset += SLIC_NUM_REG * 4;
5398
5399 /* Dump transmit regs */
5400 status = slic_dump_reg(card, PROC_TRANSMIT);
5401 if (status != STATUS_SUCCESS) {
5402 DBG_ERROR("Cant dump transmit registers - dump failed\n");
5403 goto done;
5404 }
5405
5406 DBG_MSG("slicDump Write XMIT REGS len[%x] offset[%x]\n",
5407 (SLIC_NUM_REG * 4), file_offset);
5408
5409 result =
5410 slic_dump_write(card, card->dumpbuffer, SLIC_NUM_REG * 4,
5411 file_offset);
5412 if (!result) {
5413 DBG_ERROR
5414 ("Cant write xmt registers to dump file - dump failed\n");
5415 goto done;
5416 }
5417
5418 corehdr.XmtRegOff = file_offset;
5419 corehdr.XmtRegsize = SLIC_NUM_REG * 4;
5420 file_offset += SLIC_NUM_REG * 4;
5421
5422 regs = SLIC_GBMAX_REG;
5423
5424 corehdr.FileRegOff = file_offset;
5425 corehdr.FileRegsize = regs * 4;
5426
5427 for (offset = 0; regs;) {
5428 len = MIN(regs, 16); /* Can only xfr 16 regs at a time */
5429
5430 status = slic_dump_data(card, offset, (ushort) len, DESC_RFILE);
5431
5432 if (status != STATUS_SUCCESS) {
5433 DBG_ERROR("Cant dump register file - dump failed\n");
5434 goto done;
5435 }
5436
5437 DBG_MSG("slicDump Write RegisterFile len[%x] offset[%x]\n",
5438 (len * 4), file_offset);
5439
5440 result =
5441 slic_dump_write(card, card->dumpbuffer, len * 4,
5442 file_offset);
5443 if (!result) {
5444 DBG_ERROR
5445 ("Cant write register file to dump file - "
5446 "dump failed\n");
5447 goto done;
5448 }
5449
5450 file_offset += len * 4;
5451 offset += len;
5452 regs -= len;
5453 }
5454
5455 dram_size = card->config.DramSize * 0x10000;
5456
5457 switch (adapter->devid) {
5458 case SLIC_2GB_DEVICE_ID:
5459 sram_size = SLIC_SRAM_SIZE2GB;
5460 break;
5461 case SLIC_1GB_DEVICE_ID:
5462 sram_size = SLIC_SRAM_SIZE1GB;
5463 break;
5464 default:
5465 sram_size = 0;
5466 ASSERT(0);
5467 break;
5468 }
5469
5470 corehdr.SramOff = file_offset;
5471 corehdr.Sramsize = sram_size;
5472
5473 for (offset = 0; sram_size;) {
5474 len = MIN(sram_size, DUMP_BUF_SIZE);
5475 status = slic_dump_data(card, offset, (ushort) len, DESC_SRAM);
5476 if (status != STATUS_SUCCESS) {
5477 DBG_ERROR
5478 ("[slicmon] Cant dump SRAM at offset %x - "
5479 "dump failed\n", (uint) offset);
5480 goto done;
5481 }
5482
5483 DBG_MSG("[slicmon] slicDump Write SRAM len[%x] offset[%x]\n",
5484 len, file_offset);
5485
5486 result =
5487 slic_dump_write(card, card->dumpbuffer, len, file_offset);
5488 if (!result) {
5489 DBG_ERROR
5490 ("[slicmon] Cant write SRAM to dump file - "
5491 "dump failed\n");
5492 goto done;
5493 }
5494
5495 file_offset += len;
5496 offset += len;
5497 sram_size -= len;
5498 }
5499
5500 corehdr.DramOff = file_offset;
5501 corehdr.Dramsize = dram_size;
5502
5503 for (offset = 0; dram_size;) {
5504 len = MIN(dram_size, DUMP_BUF_SIZE);
5505
5506 status = slic_dump_data(card, offset, (ushort) len, DESC_DRAM);
5507 if (status != STATUS_SUCCESS) {
5508 DBG_ERROR
5509 ("[slicmon] Cant dump dram at offset %x - "
5510 "dump failed\n", (uint) offset);
5511 goto done;
5512 }
5513
5514 DBG_MSG("slicDump Write DRAM len[%x] offset[%x]\n", len,
5515 file_offset);
5516
5517 result =
5518 slic_dump_write(card, card->dumpbuffer, len, file_offset);
5519 if (!result) {
5520 DBG_ERROR
5521 ("[slicmon] Cant write DRAM to dump file - "
5522 "dump failed\n");
5523 goto done;
5524 }
5525
5526 file_offset += len;
5527 offset += len;
5528 dram_size -= len;
5529 }
5530
5531 max_queues = SLIC_MAX_QUEUE;
5532
5533 for (queue = 0; queue < max_queues; queue++) {
5534 u32 *qarray = (u32 *) card->dumpbuffer;
5535 u32 qarray_physl = card->dumpbuffer_physl;
5536 u32 qarray_physh = card->dumpbuffer_physh;
5537 u32 qstart;
5538 u32 qdelta;
5539 u32 qtotal = 0;
5540
5541 DBG_MSG("[slicmon] Start Dump of QUEUE #0x%x\n", (uint) queue);
5542
5543 for (offset = 0; offset < (DUMP_BUF_SIZE >> 2); offset++) {
5544 qstart = jiffies;
5545 qdelta = 0;
5546
5547 status = slic_dump_queue(card,
5548 qarray_physl,
5549 qarray_physh, queue);
5550 qarray_physl += 4;
5551
5552 if (status != STATUS_SUCCESS)
5553 break;
5554
5555 if (jiffies > qstart) {
5556 qdelta = jiffies - qstart;
5557 qtotal += qdelta;
5558 }
5559 }
5560
5561 if (offset)
5562 qdelta = qtotal / offset;
5563 else
5564 qdelta = 0;
5565
5566 /* DBG_MSG(" slicDump Write QUEUE #0x%x len[%x] offset[%x] "
5567 "avgjiffs[%x]\n", queue, (offset*4), file_offset, qdelta); */
5568
5569 result =
5570 slic_dump_write(card, card->dumpbuffer, offset * 4,
5571 file_offset);
5572
5573 if (!result) {
5574 DBG_ERROR
5575 ("[slicmon] Cant write QUEUES to dump file - "
5576 "dump failed\n");
5577 goto done;
5578 }
5579
5580 corehdr.queues[queue].queueOff = file_offset;
5581 corehdr.queues[queue].queuesize = offset * 4;
5582 file_offset += offset * 4;
5583
5584 /* DBG_MSG(" Reload QUEUE #0x%x elements[%x]\n", (uint)queue, offset);*/
5585 /*
5586 * Fill the queue back up
5587 */
5588 for (i = 0; i < offset; i++) {
5589 qstart = jiffies;
5590 qdelta = 0;
5591
5592 status = slic_dump_load_queue(card, qarray[i], queue);
5593 if (status != STATUS_SUCCESS)
5594 break;
5595
5596 if (jiffies > qstart) {
5597 qdelta = jiffies - qstart;
5598 qtotal += qdelta;
5599 }
5600 }
5601
5602 if (offset)
5603 qdelta = qtotal / offset;
5604 else
5605 qdelta = 0;
5606
5607 /* DBG_MSG(" Reload DONE avgjiffs[%x]\n", qdelta); */
5608
5609 resume = 1;
5610 }
5611
5612 len = SLIC_GB_CAMAB_SZE * 4;
5613 status = slic_dump_cam(card, 0, len, DUMP_CAM_A);
5614 if (status != STATUS_SUCCESS) {
5615 DBG_ERROR("[slicmon] Can't dump CAM_A - dump failed\n");
5616 goto done;
5617 }
5618
5619 result = slic_dump_write(card, card->dumpbuffer, len, file_offset);
5620 if (result) {
5621 DBG_ERROR
5622 ("[slicmon] Can't write CAM_A data to dump file - "
5623 "dump failed\n");
5624 goto done;
5625 }
5626 corehdr.CamAMOff = file_offset;
5627 corehdr.CamASize = len;
5628 file_offset += len;
5629
5630 len = SLIC_GB_CAMCD_SZE * 4;
5631 status = slic_dump_cam(card, 0, len, DUMP_CAM_C);
5632 if (status) {
5633 DBG_ERROR("[slicmon] Can't dump CAM_C - dump failed\n");
5634 goto done;
5635 }
5636
5637 result = slic_dump_write(card, card->dumpbuffer, len, file_offset);
5638 if (result) {
5639 DBG_ERROR
5640 ("[slicmon] Can't write CAM_C data to dump file - "
5641 "dump failed\n");
5642 goto done;
5643 }
5644 corehdr.CamCMOff = file_offset;
5645 corehdr.CamCSize = len;
5646 file_offset += len;
5647
5648 done:
5649 /*
5650 * Write out the core header
5651 */
5652 file_offset = 0;
5653 DBG_MSG("[slicmon] Write CoreHeader len[%x] offset[%x]\n",
5654 (uint) sizeof(struct sliccore_hdr), file_offset);
5655
5656 result =
5657 slic_dump_write(card, &corehdr, sizeof(struct sliccore_hdr),
5658 file_offset);
5659 DBG_MSG("[slicmon] corehdr xoff[%x] xsz[%x]\n"
5660 " roff[%x] rsz[%x] fileoff[%x] filesz[%x]\n"
5661 " sramoff[%x] sramsz[%x], dramoff[%x] dramsz[%x]\n"
5662 " corehdr_offset[%x]\n", corehdr.XmtRegOff,
5663 corehdr.XmtRegsize, corehdr.RcvRegOff, corehdr.RcvRegsize,
5664 corehdr.FileRegOff, corehdr.FileRegsize, corehdr.SramOff,
5665 corehdr.Sramsize, corehdr.DramOff, corehdr.Dramsize,
5666 (uint) sizeof(struct sliccore_hdr));
5667 for (i = 0; i < max_queues; i++) {
5668 DBG_MSG("[slicmon] QUEUE 0x%x offset[%x] size[%x]\n",
5669 (uint) i, corehdr.queues[i].queueOff,
5670 corehdr.queues[i].queuesize);
5671
5672 }
5673
5674 slic_dump_close_file(card);
5675
5676 if (resume) {
5677 DBG_MSG("slicDump RESTART RECEIVE and XMIT PROCESSORS\n\n");
5678 slic_dump_resume(card, PROC_RECEIVE);
5679 slic_dump_resume(card, PROC_TRANSMIT);
5680 }
5681
5682 return status;
5683 }
5684
5685 static u32 slic_dump_halt(struct sliccard *card, unsigned char proc)
5686 {
5687 unsigned char *cmd = card->cmdbuffer;
5688
5689 *cmd = COMMAND_BYTE(CMD_HALT, 0, proc);
5690
5691 return slic_dump_send_cmd(card,
5692 card->cmdbuffer_physl,
5693 card->cmdbuffer_physh, 0, 0);
5694 }
5695
5696 static u32 slic_dump_resume(struct sliccard *card, unsigned char proc)
5697 {
5698 unsigned char *cmd = card->cmdbuffer;
5699
5700 *cmd = COMMAND_BYTE(CMD_RUN, 0, proc);
5701
5702 return slic_dump_send_cmd(card,
5703 card->cmdbuffer_physl,
5704 card->cmdbuffer_physh, 0, 0);
5705 }
5706
5707 static u32 slic_dump_reg(struct sliccard *card, unsigned char proc)
5708 {
5709 struct dump_cmd *dump = (struct dump_cmd *)card->cmdbuffer;
5710
5711 dump->cmd = COMMAND_BYTE(CMD_DUMP, 0, proc);
5712 dump->desc = DESC_REG;
5713 dump->count = 0;
5714 dump->addr = 0;
5715
5716 return slic_dump_send_cmd(card,
5717 card->cmdbuffer_physl,
5718 card->cmdbuffer_physh,
5719 card->dumpbuffer_physl,
5720 card->dumpbuffer_physh);
5721 }
5722
5723 static u32 slic_dump_data(struct sliccard *card,
5724 u32 addr, ushort count, unsigned char desc)
5725 {
5726 struct dump_cmd *dump = (struct dump_cmd *)card->cmdbuffer;
5727
5728 dump->cmd = COMMAND_BYTE(CMD_DUMP, 0, PROC_RECEIVE);
5729 dump->desc = desc;
5730 dump->count = count;
5731 dump->addr = addr;
5732
5733 return slic_dump_send_cmd(card,
5734 card->cmdbuffer_physl,
5735 card->cmdbuffer_physh,
5736 card->dumpbuffer_physl,
5737 card->dumpbuffer_physh);
5738 }
5739
5740 static u32 slic_dump_queue(struct sliccard *card,
5741 u32 addr, u32 buf_physh, u32 queue)
5742 {
5743 struct dump_cmd *dump = (struct dump_cmd *)card->cmdbuffer;
5744
5745 dump->cmd = COMMAND_BYTE(CMD_DUMP, 0, PROC_RECEIVE);
5746 dump->desc = DESC_QUEUE;
5747 dump->count = 1;
5748 dump->addr = queue;
5749
5750 return slic_dump_send_cmd(card,
5751 card->cmdbuffer_physl,
5752 card->cmdbuffer_physh,
5753 addr, card->dumpbuffer_physh);
5754 }
5755
5756 static u32 slic_dump_load_queue(struct sliccard *card, u32 data,
5757 u32 queue)
5758 {
5759 struct dump_cmd *load = (struct dump_cmd *) card->cmdbuffer;
5760
5761 load->cmd = COMMAND_BYTE(CMD_LOAD, 0, PROC_RECEIVE);
5762 load->desc = DESC_QUEUE;
5763 load->count = (ushort) queue;
5764 load->addr = data;
5765
5766 return slic_dump_send_cmd(card,
5767 card->cmdbuffer_physl,
5768 card->cmdbuffer_physh, 0, 0);
5769 }
5770
5771 static u32 slic_dump_cam(struct sliccard *card,
5772 u32 addr, u32 count, unsigned char desc)
5773 {
5774 struct dump_cmd *dump = (struct dump_cmd *)card->cmdbuffer;
5775
5776 dump->cmd = COMMAND_BYTE(CMD_CAM_OPS, 0, PROC_NONE);
5777 dump->desc = desc;
5778 dump->count = count;
5779 dump->addr = 0;
5780
5781 return slic_dump_send_cmd(card,
5782 card->cmdbuffer_physl,
5783 card->cmdbuffer_physh,
5784 addr, card->dumpbuffer_physh);
5785 }
5786
5787 static u32 slic_dump_send_cmd(struct sliccard *card,
5788 u32 cmd_physl,
5789 u32 cmd_physh,
5790 u32 buf_physl, u32 buf_physh)
5791 {
5792 ulong timeout = SLIC_MS_TO_JIFFIES(500); /* 500 msec */
5793 u32 attempts = 5;
5794 u32 delay = SLIC_MS_TO_JIFFIES(10); /* 10 msec */
5795 struct adapter *adapter = card->master;
5796
5797 ASSERT(adapter);
5798 do {
5799 /*
5800 * Zero the Dumpstatus field of the adapter structure
5801 */
5802 card->dumpstatus = 0;
5803 /*
5804 * Issue the dump command via a utility processor request.
5805 *
5806 * Kludge: We use the Informationbuffer parameter to hold
5807 * the buffer address
5808 */
5809 slic_upr_request(adapter, SLIC_UPR_DUMP, cmd_physl, cmd_physh,
5810 buf_physl, buf_physh);
5811
5812 timeout += jiffies;
5813 /*
5814 * Spin until completion or timeout.
5815 */
5816 while (!card->dumpstatus) {
5817 int num_sleeps = 0;
5818
5819 if (jiffies > timeout) {
5820 /*
5821 * Complete the timed-out DUMP UPR request.
5822 */
5823 slic_upr_request_complete(adapter, 0);
5824 DBG_ERROR
5825 ("%s: TIMED OUT num_sleeps[%x] "
5826 "status[%x]\n",
5827 __func__, num_sleeps, STATUS_FAILURE);
5828
5829 return STATUS_FAILURE;
5830 }
5831 num_sleeps++;
5832 SLIC_INTERRUPTIBLE_SLEEP_ON_TIMEOUT(card->dump_wq,
5833 delay);
5834 }
5835
5836 if (card->dumpstatus & ISR_UPCERR) {
5837 /*
5838 * Error (or queue empty)
5839 */
5840 /* DBG_ERROR("[slicmon] %s: DUMP_STATUS & ISR_UPCERR status[%x]\n",
5841 __func__, STATUS_FAILURE); */
5842
5843 return STATUS_FAILURE;
5844 } else if (card->dumpstatus & ISR_UPCBSY) {
5845 /*
5846 * Retry
5847 */
5848 DBG_ERROR("%s: ISR_UPCBUSY attempt[%x]\n", __func__,
5849 attempts);
5850
5851 attempts--;
5852 } else {
5853 /*
5854 * success
5855 */
5856 return STATUS_SUCCESS;
5857 }
5858
5859 } while (attempts);
5860
5861 DBG_ERROR("%s: GAVE UP AFTER SEVERAL ATTEMPTS status[%x]\n",
5862 __func__, STATUS_FAILURE);
5863
5864 /*
5865 * Gave up after several attempts
5866 */
5867 return STATUS_FAILURE;
5868 }
5869
5870 #endif
5871 /*=============================================================================
5872 =============================================================================
5873 === ===
5874 === *** END **** END **** END **** END *** ===
5875 === SLIC DUMP MANAGEMENT SECTION ===
5876 === ===
5877 === ===
5878 === ===
5879 =============================================================================
5880 ============================================================================*/
5881
5882 /******************************************************************************/
5883 /**************** MODULE INITIATION / TERMINATION FUNCTIONS ***************/
5884 /******************************************************************************/
5885
5886 static struct pci_driver slic_driver = {
5887 .name = DRV_NAME,
5888 .id_table = slic_pci_tbl,
5889 .probe = slic_entry_probe,
5890 .remove = slic_entry_remove,
5891 #if SLIC_POWER_MANAGEMENT_ENABLED
5892 .suspend = slicpm_suspend,
5893 .resume = slicpm_resume,
5894 #endif
5895 /* .shutdown = slic_shutdown, MOOK_INVESTIGATE */
5896 };
5897
5898 static int __init slic_module_init(void)
5899 {
5900 struct pci_device_id *pcidev;
5901 int ret;
5902
5903 /* DBG_MSG("slicoss: %s ENTER cpu %d\n", __func__, smp_processor_id()); */
5904
5905 slic_init_driver();
5906
5907 if (debug >= 0 && slic_debug != debug)
5908 printk(SLICLEVEL "slicoss: debug level is %d.\n", debug);
5909 if (debug >= 0)
5910 slic_debug = debug;
5911
5912 pcidev = (struct pci_device_id *)slic_driver.id_table;
5913 /* DBG_MSG("slicoss: %s call pci_module_init jiffies[%lx] cpu #%d\n",
5914 __func__, jiffies, smp_processor_id()); */
5915
5916 ret = pci_register_driver(&slic_driver);
5917
5918 /* DBG_MSG("slicoss: %s EXIT after call pci_module_init jiffies[%lx] "
5919 "cpu #%d status[%x]\n",__func__, jiffies,
5920 smp_processor_id(), ret); */
5921
5922 return ret;
5923 }
5924
5925 static void __exit slic_module_cleanup(void)
5926 {
5927 /* DBG_MSG("slicoss: %s ENTER\n", __func__); */
5928 pci_unregister_driver(&slic_driver);
5929 slic_debug_cleanup();
5930 /* DBG_MSG("slicoss: %s EXIT\n", __func__); */
5931 }
5932
5933 module_init(slic_module_init);
5934 module_exit(slic_module_cleanup);
Stable & featurefull patchset based on Linus's git branch