2 * Carsten Langgaard, carstenl@mips.com
3 * Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved.
5 * This program is free software; you can distribute it and/or modify it
6 * under the terms of the GNU General Public License (Version 2) as
7 * published by the Free Software Foundation.
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 * You should have received a copy of the GNU General Public License along
15 * with this program; if not, write to the Free Software Foundation, Inc.,
16 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
18 #include <linux/init.h>
19 #include <linux/sched.h>
20 #include <linux/ioport.h>
21 #include <linux/pci.h>
22 #include <linux/screen_info.h>
25 #include <asm/bootinfo.h>
27 #include <asm/mips-boards/generic.h>
28 #include <asm/mips-boards/prom.h>
29 #include <asm/mips-boards/malta.h>
30 #include <asm/mips-boards/maltaint.h>
33 #include <asm/traps.h>
35 #include <linux/console.h>
38 extern void mips_reboot_setup(void);
39 extern unsigned long mips_rtc_get_time(void);
42 extern void kgdb_config(void);
45 struct resource standard_io_resources
[] = {
50 .flags
= IORESOURCE_BUSY
56 .flags
= IORESOURCE_BUSY
62 .flags
= IORESOURCE_BUSY
65 .name
= "dma page reg",
68 .flags
= IORESOURCE_BUSY
74 .flags
= IORESOURCE_BUSY
78 const char *get_system_type(void)
83 #if defined(CONFIG_MIPS_MT_SMTC)
84 const char display_string
[] = " SMTC LINUX ON MALTA ";
86 const char display_string
[] = " LINUX ON MALTA ";
87 #endif /* CONFIG_MIPS_MT_SMTC */
89 #ifdef CONFIG_BLK_DEV_FD
90 void __init
fd_activate(void)
93 * Activate Floppy Controller in the SMSC FDC37M817 Super I/O
95 * Done by YAMON 2.00 onwards
97 /* Entering config state. */
98 SMSC_WRITE(SMSC_CONFIG_ENTER
, SMSC_CONFIG_REG
);
100 /* Activate floppy controller. */
101 SMSC_WRITE(SMSC_CONFIG_DEVNUM
, SMSC_CONFIG_REG
);
102 SMSC_WRITE(SMSC_CONFIG_DEVNUM_FLOPPY
, SMSC_DATA_REG
);
103 SMSC_WRITE(SMSC_CONFIG_ACTIVATE
, SMSC_CONFIG_REG
);
104 SMSC_WRITE(SMSC_CONFIG_ACTIVATE_ENABLE
, SMSC_DATA_REG
);
106 /* Exit config state. */
107 SMSC_WRITE(SMSC_CONFIG_EXIT
, SMSC_CONFIG_REG
);
111 #ifdef CONFIG_BLK_DEV_IDE
112 static void __init
pci_clock_check(void)
114 unsigned int __iomem
*jmpr_p
=
115 (unsigned int *) ioremap(MALTA_JMPRS_REG
, sizeof(unsigned int));
116 int jmpr
= (__raw_readl(jmpr_p
) >> 2) & 0x07;
117 static const int pciclocks
[] __initdata
= {
118 33, 20, 25, 30, 12, 16, 37, 10
120 int pciclock
= pciclocks
[jmpr
];
121 char *argptr
= prom_getcmdline();
123 if (pciclock
!= 33 && !strstr(argptr
, "idebus=")) {
124 printk(KERN_WARNING
"WARNING: PCI clock is %dMHz, "
125 "setting idebus\n", pciclock
);
126 argptr
+= strlen(argptr
);
127 sprintf(argptr
, " idebus=%d", pciclock
);
128 if (pciclock
< 20 || pciclock
> 66)
129 printk(KERN_WARNING
"WARNING: IDE timing "
130 "calculations will be incorrect\n");
135 void __init
plat_mem_setup(void)
141 /* Request I/O space for devices used on the Malta board. */
142 for (i
= 0; i
< ARRAY_SIZE(standard_io_resources
); i
++)
143 request_resource(&ioport_resource
, standard_io_resources
+i
);
146 * Enable DMA channel 4 (cascade channel) in the PIIX4 south bridge.
154 if (mips_revision_sconid
== MIPS_REVISION_SCON_BONITO
) {
157 argptr
= prom_getcmdline();
158 if (strstr(argptr
, "debug")) {
159 BONITO_BONGENCFG
|= BONITO_BONGENCFG_DEBUGMODE
;
160 printk("Enabled Bonito debug mode\n");
163 BONITO_BONGENCFG
&= ~BONITO_BONGENCFG_DEBUGMODE
;
165 #ifdef CONFIG_DMA_COHERENT
166 if (BONITO_PCICACHECTRL
& BONITO_PCICACHECTRL_CPUCOH_PRES
) {
167 BONITO_PCICACHECTRL
|= BONITO_PCICACHECTRL_CPUCOH_EN
;
168 printk("Enabled Bonito CPU coherency\n");
170 argptr
= prom_getcmdline();
171 if (strstr(argptr
, "iobcuncached")) {
172 BONITO_PCICACHECTRL
&= ~BONITO_PCICACHECTRL_IOBCCOH_EN
;
173 BONITO_PCIMEMBASECFG
= BONITO_PCIMEMBASECFG
&
174 ~(BONITO_PCIMEMBASECFG_MEMBASE0_CACHED
|
175 BONITO_PCIMEMBASECFG_MEMBASE1_CACHED
);
176 printk("Disabled Bonito IOBC coherency\n");
179 BONITO_PCICACHECTRL
|= BONITO_PCICACHECTRL_IOBCCOH_EN
;
180 BONITO_PCIMEMBASECFG
|=
181 (BONITO_PCIMEMBASECFG_MEMBASE0_CACHED
|
182 BONITO_PCIMEMBASECFG_MEMBASE1_CACHED
);
183 printk("Enabled Bonito IOBC coherency\n");
187 panic("Hardware DMA cache coherency not supported");
191 #ifdef CONFIG_DMA_COHERENT
193 panic("Hardware DMA cache coherency not supported");
197 #ifdef CONFIG_BLK_DEV_IDE
200 #ifdef CONFIG_BLK_DEV_FD
204 #if defined(CONFIG_VGA_CONSOLE)
205 screen_info
= (struct screen_info
) {
209 .orig_video_page
= 0,
210 .orig_video_mode
= 0,
211 .orig_video_cols
= 80,
213 .orig_video_ega_bx
= 0,
215 .orig_video_lines
= 25,
216 .orig_video_isVGA
= VIDEO_TYPE_VGAC
,
217 .orig_video_points
= 16