2 * arch/arm/mach-ixp2000/ixdp2x00.c
4 * Code common to IXDP2400 and IXDP2800 platforms.
6 * Original Author: Naeem Afzal <naeem.m.afzal@intel.com>
7 * Maintainer: Deepak Saxena <dsaxena@plexity.net>
9 * Copyright (C) 2002 Intel Corp.
10 * Copyright (C) 2003-2004 MontaVista Software, Inc.
12 * This program is free software; you can redistribute it and/or modify it
13 * under the terms of the GNU General Public License as published by the
14 * Free Software Foundation; either version 2 of the License, or (at your
15 * option) any later version.
17 #include <linux/kernel.h>
18 #include <linux/init.h>
20 #include <linux/sched.h>
21 #include <linux/interrupt.h>
22 #include <linux/platform_device.h>
23 #include <linux/bitops.h>
24 #include <linux/pci.h>
25 #include <linux/ioport.h>
26 #include <linux/delay.h>
30 #include <asm/pgtable.h>
32 #include <asm/system.h>
33 #include <mach/hardware.h>
34 #include <asm/mach-types.h>
36 #include <asm/mach/pci.h>
37 #include <asm/mach/map.h>
38 #include <asm/mach/irq.h>
39 #include <asm/mach/time.h>
40 #include <asm/mach/flash.h>
41 #include <asm/mach/arch.h>
43 #include <mach/gpio.h>
46 /*************************************************************************
47 * IXDP2x00 IRQ Initialization
48 *************************************************************************/
49 static volatile unsigned long *board_irq_mask
;
50 static volatile unsigned long *board_irq_stat
;
51 static unsigned long board_irq_count
;
53 #ifdef CONFIG_ARCH_IXDP2400
55 * Slowport configuration for accessing CPLD registers on IXDP2x00
57 static struct slowport_cfg slowport_cpld_cfg
= {
58 .CCR
= SLOWPORT_CCR_DIV_2
,
61 .PCR
= SLOWPORT_MODE_FLASH
,
62 .ADC
= SLOWPORT_ADDR_WIDTH_24
| SLOWPORT_DATA_WIDTH_8
66 static void ixdp2x00_irq_mask(struct irq_data
*d
)
69 static struct slowport_cfg old_cfg
;
72 * This is ugly in common code but really don't know
73 * of a better way to handle it. :(
75 #ifdef CONFIG_ARCH_IXDP2400
76 if (machine_is_ixdp2400())
77 ixp2000_acquire_slowport(&slowport_cpld_cfg
, &old_cfg
);
80 dummy
= *board_irq_mask
;
81 dummy
|= IXP2000_BOARD_IRQ_MASK(d
->irq
);
82 ixp2000_reg_wrb(board_irq_mask
, dummy
);
84 #ifdef CONFIG_ARCH_IXDP2400
85 if (machine_is_ixdp2400())
86 ixp2000_release_slowport(&old_cfg
);
90 static void ixdp2x00_irq_unmask(struct irq_data
*d
)
93 static struct slowport_cfg old_cfg
;
95 #ifdef CONFIG_ARCH_IXDP2400
96 if (machine_is_ixdp2400())
97 ixp2000_acquire_slowport(&slowport_cpld_cfg
, &old_cfg
);
100 dummy
= *board_irq_mask
;
101 dummy
&= ~IXP2000_BOARD_IRQ_MASK(d
->irq
);
102 ixp2000_reg_wrb(board_irq_mask
, dummy
);
104 if (machine_is_ixdp2400())
105 ixp2000_release_slowport(&old_cfg
);
108 static void ixdp2x00_irq_handler(unsigned int irq
, struct irq_desc
*desc
)
110 volatile u32 ex_interrupt
= 0;
111 static struct slowport_cfg old_cfg
;
114 desc
->irq_data
.chip
->irq_mask(&desc
->irq_data
);
116 #ifdef CONFIG_ARCH_IXDP2400
117 if (machine_is_ixdp2400())
118 ixp2000_acquire_slowport(&slowport_cpld_cfg
, &old_cfg
);
120 ex_interrupt
= *board_irq_stat
& 0xff;
121 if (machine_is_ixdp2400())
122 ixp2000_release_slowport(&old_cfg
);
125 printk(KERN_ERR
"Spurious IXDP2x00 CPLD interrupt!\n");
129 for(i
= 0; i
< board_irq_count
; i
++) {
130 if(ex_interrupt
& (1 << i
)) {
131 int cpld_irq
= IXP2000_BOARD_IRQ(0) + i
;
132 generic_handle_irq(cpld_irq
);
136 desc
->irq_data
.chip
->irq_unmask(&desc
->irq_data
);
139 static struct irq_chip ixdp2x00_cpld_irq_chip
= {
140 .irq_ack
= ixdp2x00_irq_mask
,
141 .irq_mask
= ixdp2x00_irq_mask
,
142 .irq_unmask
= ixdp2x00_irq_unmask
145 void __init
ixdp2x00_init_irq(volatile unsigned long *stat_reg
, volatile unsigned long *mask_reg
, unsigned long nr_of_irqs
)
151 if (!ixdp2x00_master_npu())
154 board_irq_stat
= stat_reg
;
155 board_irq_mask
= mask_reg
;
156 board_irq_count
= nr_of_irqs
;
158 *board_irq_mask
= 0xffffffff;
160 for(irq
= IXP2000_BOARD_IRQ(0); irq
< IXP2000_BOARD_IRQ(board_irq_count
); irq
++) {
161 irq_set_chip_and_handler(irq
, &ixdp2x00_cpld_irq_chip
,
163 set_irq_flags(irq
, IRQF_VALID
);
166 /* Hook into PCI interrupt */
167 irq_set_chained_handler(IRQ_IXP2000_PCIB
, ixdp2x00_irq_handler
);
170 /*************************************************************************
171 * IXDP2x00 memory map
172 *************************************************************************/
173 static struct map_desc ixdp2x00_io_desc __initdata
= {
174 .virtual = IXDP2X00_VIRT_CPLD_BASE
,
175 .pfn
= __phys_to_pfn(IXDP2X00_PHYS_CPLD_BASE
),
176 .length
= IXDP2X00_CPLD_SIZE
,
180 void __init
ixdp2x00_map_io(void)
184 iotable_init(&ixdp2x00_io_desc
, 1);
187 /*************************************************************************
188 * IXDP2x00-common PCI init
190 * The IXDP2[48]00 has a horrid PCI bus layout. Basically the board
191 * contains two NPUs (ingress and egress) connected over PCI, both running
192 * instances of the kernel. So far so good. Peers on the PCI bus running
193 * Linux is a common design in telecom systems. The problem is that instead
194 * of all the devices being controlled by a single host, different
195 * devices are controlled by different NPUs on the same bus, leading to
196 * multiple hosts on the bus. The exact bus layout looks like:
199 * Master NPU <-------------------+-------------------> Slave NPU
206 * <--+------+---------+---------+------+-->
209 * ... Dev PMC Media Eth0 Eth1 ...
211 * The master controls all but Eth1, which is controlled by the
212 * slave. What this means is that the both the master and the slave
213 * have to scan the bus, but only one of them can enumerate the bus.
214 * In addition, after the bus is scanned, each kernel must remove
215 * the device(s) it does not control from the PCI dev list otherwise
216 * a driver on each NPU will try to manage it and we will have horrible
217 * conflicts. Oh..and the slave NPU needs to see the master NPU
218 * for Intel's drivers to work properly. Closed source drivers...
220 * The way we deal with this is fairly simple but ugly:
222 * 1) Let master scan and enumerate the bus completely.
223 * 2) Master deletes Eth1 from device list.
224 * 3) Slave scans bus and then deletes all but Eth1 (Eth0 on slave)
226 * 4) Find HW designers and LART them.
228 * The boards also do not do normal PCI IRQ routing, or any sort of
229 * sensical swizzling, so we just need to check where on the bus a
230 * device sits and figure out to which CPLD pin the interrupt is routed.
231 * See ixdp2[48]00.c files.
233 *************************************************************************/
234 void ixdp2x00_slave_pci_postinit(void)
239 * Remove PMC device is there is one
241 if((dev
= pci_get_bus_and_slot(1, IXDP2X00_PMC_DEVFN
))) {
242 pci_remove_bus_device(dev
);
246 dev
= pci_get_bus_and_slot(0, IXDP2X00_21555_DEVFN
);
247 pci_remove_bus_device(dev
);
251 /**************************************************************************
252 * IXDP2x00 Machine Setup
253 *************************************************************************/
254 static struct flash_platform_data ixdp2x00_platform_data
= {
255 .map_name
= "cfi_probe",
259 static struct ixp2000_flash_data ixdp2x00_flash_data
= {
260 .platform_data
= &ixdp2x00_platform_data
,
264 static struct resource ixdp2x00_flash_resource
= {
266 .end
= 0xc4000000 + 0x00ffffff,
267 .flags
= IORESOURCE_MEM
,
270 static struct platform_device ixdp2x00_flash
= {
271 .name
= "IXP2000-Flash",
274 .platform_data
= &ixdp2x00_flash_data
,
277 .resource
= &ixdp2x00_flash_resource
,
280 static struct ixp2000_i2c_pins ixdp2x00_i2c_gpio_pins
= {
281 .sda_pin
= IXDP2X00_GPIO_SDA
,
282 .scl_pin
= IXDP2X00_GPIO_SCL
,
285 static struct platform_device ixdp2x00_i2c_controller
= {
286 .name
= "IXP2000-I2C",
289 .platform_data
= &ixdp2x00_i2c_gpio_pins
,
294 static struct platform_device
*ixdp2x00_devices
[] __initdata
= {
296 &ixdp2x00_i2c_controller
299 void __init
ixdp2x00_init_machine(void)
301 gpio_line_set(IXDP2X00_GPIO_I2C_ENABLE
, 1);
302 gpio_line_config(IXDP2X00_GPIO_I2C_ENABLE
, GPIO_OUT
);
304 platform_add_devices(ixdp2x00_devices
, ARRAY_SIZE(ixdp2x00_devices
));