arch/blackfin/mach-bf533/boards/stamp.c

   1 /*
   2  * Copyright 2004-2009 Analog Devices Inc.
   3  *                2005 National ICT Australia (NICTA)
   4  *                      Aidan Williams <aidan@nicta.com.au>
   5  *
   6  * Licensed under the GPL-2 or later.
   7  */
   8
   9 #include <linux/device.h>
  10 #include <linux/platform_device.h>
  11 #include <linux/mtd/mtd.h>
  12 #include <linux/mtd/partitions.h>
  13 #include <linux/mtd/physmap.h>
  14 #include <linux/spi/spi.h>
  15 #include <linux/spi/flash.h>
  16 #include <linux/spi/mmc_spi.h>
  17 #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  18 #include <linux/usb/isp1362.h>
  19 #endif
  20 #include <linux/irq.h>
  21 #include <linux/i2c.h>
  22 #include <asm/dma.h>
  23 #include <asm/bfin5xx_spi.h>
  24 #include <asm/reboot.h>
  25 #include <asm/portmux.h>
  26 #include <asm/dpmc.h>
  27 #include <mach/fio_flag.h>
  28
  29 /*
  30  * Name the Board for the /proc/cpuinfo
  31  */
  32 const char bfin_board_name[] = "ADI BF533-STAMP";
  33
  34 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  35 static struct platform_device rtc_device = {
  36         .name = "rtc-bfin",
  37         .id   = -1,
  38 };
  39 #endif
  40
  41 /*
  42  *  Driver needs to know address, irq and flag pin.
  43  */
  44 #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  45 #include <linux/smc91x.h>
  46
  47 static struct smc91x_platdata smc91x_info = {
  48         .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
  49         .leda = RPC_LED_100_10,
  50         .ledb = RPC_LED_TX_RX,
  51 };
  52
  53 static struct resource smc91x_resources[] = {
  54         {
  55                 .name = "smc91x-regs",
  56                 .start = 0x20300300,
  57                 .end = 0x20300300 + 16,
  58                 .flags = IORESOURCE_MEM,
  59         }, {
  60                 .start = IRQ_PF7,
  61                 .end = IRQ_PF7,
  62                 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  63         },
  64 };
  65
  66 static struct platform_device smc91x_device = {
  67         .name = "smc91x",
  68         .id = 0,
  69         .num_resources = ARRAY_SIZE(smc91x_resources),
  70         .resource = smc91x_resources,
  71         .dev    = {
  72                 .platform_data  = &smc91x_info,
  73         },
  74 };
  75 #endif
  76
  77 #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
  78 static struct resource net2272_bfin_resources[] = {
  79         {
  80                 .start = 0x20300000,
  81                 .end = 0x20300000 + 0x100,
  82                 .flags = IORESOURCE_MEM,
  83         }, {
  84                 .start = IRQ_PF10,
  85                 .end = IRQ_PF10,
  86                 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  87         },
  88 };
  89
  90 static struct platform_device net2272_bfin_device = {
  91         .name = "net2272",
  92         .id = -1,
  93         .num_resources = ARRAY_SIZE(net2272_bfin_resources),
  94         .resource = net2272_bfin_resources,
  95 };
  96 #endif
  97
  98 #if defined(CONFIG_MTD_BFIN_ASYNC) || defined(CONFIG_MTD_BFIN_ASYNC_MODULE)
  99 static struct mtd_partition stamp_partitions[] = {
 100         {
 101                 .name   = "bootloader(nor)",
 102                 .size   = 0x40000,
 103                 .offset = 0,
 104         }, {
 105                 .name   = "linux kernel(nor)",
 106                 .size   = 0x180000,
 107                 .offset = MTDPART_OFS_APPEND,
 108         }, {
 109                 .name   = "file system(nor)",
 110                 .size   = MTDPART_SIZ_FULL,
 111                 .offset = MTDPART_OFS_APPEND,
 112         }
 113 };
 114
 115 static struct physmap_flash_data stamp_flash_data = {
 116         .width    = 2,
 117         .parts    = stamp_partitions,
 118         .nr_parts = ARRAY_SIZE(stamp_partitions),
 119 };
 120
 121 static struct resource stamp_flash_resource[] = {
 122         {
 123                 .name  = "cfi_probe",
 124                 .start = 0x20000000,
 125                 .end   = 0x203fffff,
 126                 .flags = IORESOURCE_MEM,
 127         }, {
 128                 .start = 0x7BB07BB0,    /* AMBCTL0 setting when accessing flash */
 129                 .end   = 0x7BB07BB0,    /* AMBCTL1 setting when accessing flash */
 130                 .flags = IORESOURCE_MEM,
 131         }, {
 132                 .start = GPIO_PF0,
 133                 .flags = IORESOURCE_IRQ,
 134         }
 135 };
 136
 137 static struct platform_device stamp_flash_device = {
 138         .name          = "bfin-async-flash",
 139         .id            = 0,
 140         .dev = {
 141                 .platform_data = &stamp_flash_data,
 142         },
 143         .num_resources = ARRAY_SIZE(stamp_flash_resource),
 144         .resource      = stamp_flash_resource,
 145 };
 146 #endif
 147
 148 #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
 149 static struct mtd_partition bfin_spi_flash_partitions[] = {
 150         {
 151                 .name = "bootloader(spi)",
 152                 .size = 0x00040000,
 153                 .offset = 0,
 154                 .mask_flags = MTD_CAP_ROM
 155         }, {
 156                 .name = "linux kernel(spi)",
 157                 .size = 0x180000,
 158                 .offset = MTDPART_OFS_APPEND,
 159         }, {
 160                 .name = "file system(spi)",
 161                 .size = MTDPART_SIZ_FULL,
 162                 .offset = MTDPART_OFS_APPEND,
 163         }
 164 };
 165
 166 static struct flash_platform_data bfin_spi_flash_data = {
 167         .name = "m25p80",
 168         .parts = bfin_spi_flash_partitions,
 169         .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
 170         .type = "m25p64",
 171 };
 172
 173 /* SPI flash chip (m25p64) */
 174 static struct bfin5xx_spi_chip spi_flash_chip_info = {
 175         .enable_dma = 0,         /* use dma transfer with this chip*/
 176         .bits_per_word = 8,
 177 };
 178 #endif
 179
 180 #if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE)
 181 /* SPI ADC chip */
 182 static struct bfin5xx_spi_chip spi_adc_chip_info = {
 183         .enable_dma = 1,         /* use dma transfer with this chip*/
 184         .bits_per_word = 16,
 185 };
 186 #endif
 187
 188 #if defined(CONFIG_SND_BLACKFIN_AD183X) || defined(CONFIG_SND_BLACKFIN_AD183X_MODULE)
 189 static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
 190         .enable_dma = 0,
 191         .bits_per_word = 16,
 192 };
 193 #endif
 194
 195 #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
 196 static struct bfin5xx_spi_chip spidev_chip_info = {
 197         .enable_dma = 0,
 198         .bits_per_word = 8,
 199 };
 200 #endif
 201
 202 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
 203 #define MMC_SPI_CARD_DETECT_INT IRQ_PF5
 204 static int bfin_mmc_spi_init(struct device *dev,
 205         irqreturn_t (*detect_int)(int, void *), void *data)
 206 {
 207         return request_irq(MMC_SPI_CARD_DETECT_INT, detect_int,
 208                 IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING,
 209                 "mmc-spi-detect", data);
 210 }
 211
 212 static void bfin_mmc_spi_exit(struct device *dev, void *data)
 213 {
 214         free_irq(MMC_SPI_CARD_DETECT_INT, data);
 215 }
 216
 217 static struct mmc_spi_platform_data bfin_mmc_spi_pdata = {
 218         .init = bfin_mmc_spi_init,
 219         .exit = bfin_mmc_spi_exit,
 220         .detect_delay = 100, /* msecs */
 221 };
 222
 223 static struct bfin5xx_spi_chip  mmc_spi_chip_info = {
 224         .enable_dma = 0,
 225         .bits_per_word = 8,
 226         .pio_interrupt = 0,
 227 };
 228 #endif
 229
 230 static struct spi_board_info bfin_spi_board_info[] __initdata = {
 231 #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
 232         {
 233                 /* the modalias must be the same as spi device driver name */
 234                 .modalias = "m25p80", /* Name of spi_driver for this device */
 235                 .max_speed_hz = 25000000,     /* max spi clock (SCK) speed in HZ */
 236                 .bus_num = 0, /* Framework bus number */
 237                 .chip_select = 2, /* Framework chip select. On STAMP537 it is SPISSEL2*/
 238                 .platform_data = &bfin_spi_flash_data,
 239                 .controller_data = &spi_flash_chip_info,
 240                 .mode = SPI_MODE_3,
 241         },
 242 #endif
 243
 244 #if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE)
 245         {
 246                 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
 247                 .max_speed_hz = 6250000,     /* max spi clock (SCK) speed in HZ */
 248                 .bus_num = 0, /* Framework bus number */
 249                 .chip_select = 1, /* Framework chip select. */
 250                 .platform_data = NULL, /* No spi_driver specific config */
 251                 .controller_data = &spi_adc_chip_info,
 252         },
 253 #endif
 254
 255 #if defined(CONFIG_SND_BLACKFIN_AD183X) || defined(CONFIG_SND_BLACKFIN_AD183X_MODULE)
 256         {
 257                 .modalias = "ad1836",
 258                 .max_speed_hz = 3125000,     /* max spi clock (SCK) speed in HZ */
 259                 .bus_num = 0,
 260                 .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
 261                 .controller_data = &ad1836_spi_chip_info,
 262         },
 263 #endif
 264
 265 #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
 266         {
 267                 .modalias = "spidev",
 268                 .max_speed_hz = 3125000,     /* max spi clock (SCK) speed in HZ */
 269                 .bus_num = 0,
 270                 .chip_select = 1,
 271                 .controller_data = &spidev_chip_info,
 272         },
 273 #endif
 274 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
 275         {
 276                 .modalias = "mmc_spi",
 277                 .max_speed_hz = 20000000,     /* max spi clock (SCK) speed in HZ */
 278                 .bus_num = 0,
 279                 .chip_select = 4,
 280                 .platform_data = &bfin_mmc_spi_pdata,
 281                 .controller_data = &mmc_spi_chip_info,
 282                 .mode = SPI_MODE_3,
 283         },
 284 #endif
 285 };
 286
 287 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
 288 /* SPI (0) */
 289 static struct resource bfin_spi0_resource[] = {
 290         [0] = {
 291                 .start = SPI0_REGBASE,
 292                 .end   = SPI0_REGBASE + 0xFF,
 293                 .flags = IORESOURCE_MEM,
 294         },
 295         [1] = {
 296                 .start = CH_SPI,
 297                 .end   = CH_SPI,
 298                 .flags = IORESOURCE_DMA,
 299         },
 300         [2] = {
 301                 .start = IRQ_SPI,
 302                 .end   = IRQ_SPI,
 303                 .flags = IORESOURCE_IRQ,
 304         }
 305 };
 306
 307 /* SPI controller data */
 308 static struct bfin5xx_spi_master bfin_spi0_info = {
 309         .num_chipselect = 8,
 310         .enable_dma = 1,  /* master has the ability to do dma transfer */
 311         .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
 312 };
 313
 314 static struct platform_device bfin_spi0_device = {
 315         .name = "bfin-spi",
 316         .id = 0, /* Bus number */
 317         .num_resources = ARRAY_SIZE(bfin_spi0_resource),
 318         .resource = bfin_spi0_resource,
 319         .dev = {
 320                 .platform_data = &bfin_spi0_info, /* Passed to driver */
 321         },
 322 };
 323 #endif  /* spi master and devices */
 324
 325 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
 326 #ifdef CONFIG_SERIAL_BFIN_UART0
 327 static struct resource bfin_uart0_resources[] = {
 328         {
 329                 .start = BFIN_UART_THR,
 330                 .end = BFIN_UART_GCTL+2,
 331                 .flags = IORESOURCE_MEM,
 332         },
 333         {
 334                 .start = IRQ_UART0_RX,
 335                 .end = IRQ_UART0_RX + 1,
 336                 .flags = IORESOURCE_IRQ,
 337         },
 338         {
 339                 .start = IRQ_UART0_ERROR,
 340                 .end = IRQ_UART0_ERROR,
 341                 .flags = IORESOURCE_IRQ,
 342         },
 343         {
 344                 .start = CH_UART0_TX,
 345                 .end = CH_UART0_TX,
 346                 .flags = IORESOURCE_DMA,
 347         },
 348         {
 349                 .start = CH_UART0_RX,
 350                 .end = CH_UART0_RX,
 351                 .flags = IORESOURCE_DMA,
 352         },
 353 };
 354
 355 unsigned short bfin_uart0_peripherals[] = {
 356         P_UART0_TX, P_UART0_RX, 0
 357 };
 358
 359 static struct platform_device bfin_uart0_device = {
 360         .name = "bfin-uart",
 361         .id = 0,
 362         .num_resources = ARRAY_SIZE(bfin_uart0_resources),
 363         .resource = bfin_uart0_resources,
 364         .dev = {
 365                 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
 366         },
 367 };
 368 #endif
 369 #endif
 370
 371 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
 372 #ifdef CONFIG_BFIN_SIR0
 373 static struct resource bfin_sir0_resources[] = {
 374         {
 375                 .start = 0xFFC00400,
 376                 .end = 0xFFC004FF,
 377                 .flags = IORESOURCE_MEM,
 378         },
 379         {
 380                 .start = IRQ_UART0_RX,
 381                 .end = IRQ_UART0_RX+1,
 382                 .flags = IORESOURCE_IRQ,
 383         },
 384         {
 385                 .start = CH_UART0_RX,
 386                 .end = CH_UART0_RX+1,
 387                 .flags = IORESOURCE_DMA,
 388         },
 389 };
 390
 391 static struct platform_device bfin_sir0_device = {
 392         .name = "bfin_sir",
 393         .id = 0,
 394         .num_resources = ARRAY_SIZE(bfin_sir0_resources),
 395         .resource = bfin_sir0_resources,
 396 };
 397 #endif
 398 #endif
 399
 400 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
 401 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
 402 static struct resource bfin_sport0_uart_resources[] = {
 403         {
 404                 .start = SPORT0_TCR1,
 405                 .end = SPORT0_MRCS3+4,
 406                 .flags = IORESOURCE_MEM,
 407         },
 408         {
 409                 .start = IRQ_SPORT0_RX,
 410                 .end = IRQ_SPORT0_RX+1,
 411                 .flags = IORESOURCE_IRQ,
 412         },
 413         {
 414                 .start = IRQ_SPORT0_ERROR,
 415                 .end = IRQ_SPORT0_ERROR,
 416                 .flags = IORESOURCE_IRQ,
 417         },
 418 };
 419
 420 unsigned short bfin_sport0_peripherals[] = {
 421         P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
 422         P_SPORT0_DRPRI, P_SPORT0_RSCLK, P_SPORT0_DRSEC, P_SPORT0_DTSEC, 0
 423 };
 424
 425 static struct platform_device bfin_sport0_uart_device = {
 426         .name = "bfin-sport-uart",
 427         .id = 0,
 428         .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
 429         .resource = bfin_sport0_uart_resources,
 430         .dev = {
 431                 .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
 432         },
 433 };
 434 #endif
 435 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
 436 static struct resource bfin_sport1_uart_resources[] = {
 437         {
 438                 .start = SPORT1_TCR1,
 439                 .end = SPORT1_MRCS3+4,
 440                 .flags = IORESOURCE_MEM,
 441         },
 442         {
 443                 .start = IRQ_SPORT1_RX,
 444                 .end = IRQ_SPORT1_RX+1,
 445                 .flags = IORESOURCE_IRQ,
 446         },
 447         {
 448                 .start = IRQ_SPORT1_ERROR,
 449                 .end = IRQ_SPORT1_ERROR,
 450                 .flags = IORESOURCE_IRQ,
 451         },
 452 };
 453
 454 unsigned short bfin_sport1_peripherals[] = {
 455         P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
 456         P_SPORT1_DRPRI, P_SPORT1_RSCLK, P_SPORT1_DRSEC, P_SPORT1_DTSEC, 0
 457 };
 458
 459 static struct platform_device bfin_sport1_uart_device = {
 460         .name = "bfin-sport-uart",
 461         .id = 1,
 462         .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
 463         .resource = bfin_sport1_uart_resources,
 464         .dev = {
 465                 .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
 466         },
 467 };
 468 #endif
 469 #endif
 470
 471 #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
 472 #include <linux/input.h>
 473 #include <linux/gpio_keys.h>
 474
 475 static struct gpio_keys_button bfin_gpio_keys_table[] = {
 476         {BTN_0, GPIO_PF5, 0, "gpio-keys: BTN0"},
 477         {BTN_1, GPIO_PF6, 0, "gpio-keys: BTN1"},
 478         {BTN_2, GPIO_PF8, 0, "gpio-keys: BTN2"},
 479 };
 480
 481 static struct gpio_keys_platform_data bfin_gpio_keys_data = {
 482         .buttons        = bfin_gpio_keys_table,
 483         .nbuttons       = ARRAY_SIZE(bfin_gpio_keys_table),
 484 };
 485
 486 static struct platform_device bfin_device_gpiokeys = {
 487         .name      = "gpio-keys",
 488         .dev = {
 489                 .platform_data = &bfin_gpio_keys_data,
 490         },
 491 };
 492 #endif
 493
 494 #if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE)
 495 #include <linux/i2c-gpio.h>
 496
 497 static struct i2c_gpio_platform_data i2c_gpio_data = {
 498         .sda_pin                = 2,
 499         .scl_pin                = 3,
 500         .sda_is_open_drain      = 0,
 501         .scl_is_open_drain      = 0,
 502         .udelay                 = 40,
 503 };
 504
 505 static struct platform_device i2c_gpio_device = {
 506         .name           = "i2c-gpio",
 507         .id             = 0,
 508         .dev            = {
 509                 .platform_data  = &i2c_gpio_data,
 510         },
 511 };
 512 #endif
 513
 514 static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
 515 #if defined(CONFIG_JOYSTICK_AD7142) || defined(CONFIG_JOYSTICK_AD7142_MODULE)
 516         {
 517                 I2C_BOARD_INFO("ad7142_joystick", 0x2C),
 518                 .irq = 39,
 519         },
 520 #endif
 521 #if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
 522         {
 523                 I2C_BOARD_INFO("pcf8574_lcd", 0x22),
 524         },
 525 #endif
 526 #if defined(CONFIG_INPUT_PCF8574) || defined(CONFIG_INPUT_PCF8574_MODULE)
 527         {
 528                 I2C_BOARD_INFO("pcf8574_keypad", 0x27),
 529                 .irq = 39,
 530         },
 531 #endif
 532 #if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE)
 533         {
 534                 I2C_BOARD_INFO("bfin-adv7393", 0x2B),
 535         },
 536 #endif
 537 };
 538
 539 static const unsigned int cclk_vlev_datasheet[] =
 540 {
 541         VRPAIR(VLEV_085, 250000000),
 542         VRPAIR(VLEV_090, 376000000),
 543         VRPAIR(VLEV_095, 426000000),
 544         VRPAIR(VLEV_100, 426000000),
 545         VRPAIR(VLEV_105, 476000000),
 546         VRPAIR(VLEV_110, 476000000),
 547         VRPAIR(VLEV_115, 476000000),
 548         VRPAIR(VLEV_120, 600000000),
 549         VRPAIR(VLEV_125, 600000000),
 550         VRPAIR(VLEV_130, 600000000),
 551 };
 552
 553 static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
 554         .tuple_tab = cclk_vlev_datasheet,
 555         .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
 556         .vr_settling_time = 25 /* us */,
 557 };
 558
 559 static struct platform_device bfin_dpmc = {
 560         .name = "bfin dpmc",
 561         .dev = {
 562                 .platform_data = &bfin_dmpc_vreg_data,
 563         },
 564 };
 565
 566 #if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
 567 static struct platform_device bfin_i2s = {
 568         .name = "bfin-i2s",
 569         .id = CONFIG_SND_BF5XX_SPORT_NUM,
 570         /* TODO: add platform data here */
 571 };
 572 #endif
 573
 574 #if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
 575 static struct platform_device bfin_tdm = {
 576         .name = "bfin-tdm",
 577         .id = CONFIG_SND_BF5XX_SPORT_NUM,
 578         /* TODO: add platform data here */
 579 };
 580 #endif
 581
 582 #if defined(CONFIG_SND_BF5XX_AC97) || defined(CONFIG_SND_BF5XX_AC97_MODULE)
 583 static struct platform_device bfin_ac97 = {
 584         .name = "bfin-ac97",
 585         .id = CONFIG_SND_BF5XX_SPORT_NUM,
 586         /* TODO: add platform data here */
 587 };
 588 #endif
 589
 590 static struct platform_device *stamp_devices[] __initdata = {
 591
 592         &bfin_dpmc,
 593
 594 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
 595         &rtc_device,
 596 #endif
 597
 598 #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
 599         &smc91x_device,
 600 #endif
 601
 602 #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
 603         &net2272_bfin_device,
 604 #endif
 605
 606 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
 607         &bfin_spi0_device,
 608 #endif
 609
 610 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
 611 #ifdef CONFIG_SERIAL_BFIN_UART0
 612         &bfin_uart0_device,
 613 #endif
 614 #endif
 615
 616 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
 617 #ifdef CONFIG_BFIN_SIR0
 618         &bfin_sir0_device,
 619 #endif
 620 #endif
 621
 622 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
 623 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
 624         &bfin_sport0_uart_device,
 625 #endif
 626 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
 627         &bfin_sport1_uart_device,
 628 #endif
 629 #endif
 630
 631 #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
 632         &bfin_device_gpiokeys,
 633 #endif
 634
 635 #if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE)
 636         &i2c_gpio_device,
 637 #endif
 638
 639 #if defined(CONFIG_MTD_BFIN_ASYNC) || defined(CONFIG_MTD_BFIN_ASYNC_MODULE)
 640         &stamp_flash_device,
 641 #endif
 642
 643 #if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
 644         &bfin_i2s,
 645 #endif
 646
 647 #if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
 648         &bfin_tdm,
 649 #endif
 650
 651 #if defined(CONFIG_SND_BF5XX_AC97) || defined(CONFIG_SND_BF5XX_AC97_MODULE)
 652         &bfin_ac97,
 653 #endif
 654 };
 655
 656 static int __init stamp_init(void)
 657 {
 658         int ret;
 659
 660         printk(KERN_INFO "%s(): registering device resources\n", __func__);
 661
 662         i2c_register_board_info(0, bfin_i2c_board_info,
 663                                 ARRAY_SIZE(bfin_i2c_board_info));
 664
 665         ret = platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
 666         if (ret < 0)
 667                 return ret;
 668
 669 #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
 670         /* setup BF533_STAMP CPLD to route AMS3 to Ethernet MAC */
 671         bfin_write_FIO_DIR(bfin_read_FIO_DIR() | PF0);
 672         bfin_write_FIO_FLAG_S(PF0);
 673         SSYNC();
 674 #endif
 675
 676         spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
 677         return 0;
 678 }
 679
 680 arch_initcall(stamp_init);
 681
 682 static struct platform_device *stamp_early_devices[] __initdata = {
 683 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
 684 #ifdef CONFIG_SERIAL_BFIN_UART0
 685         &bfin_uart0_device,
 686 #endif
 687 #endif
 688
 689 #if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
 690 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
 691         &bfin_sport0_uart_device,
 692 #endif
 693 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
 694         &bfin_sport1_uart_device,
 695 #endif
 696 #endif
 697 };
 698
 699 void __init native_machine_early_platform_add_devices(void)
 700 {
 701         printk(KERN_INFO "register early platform devices\n");
 702         early_platform_add_devices(stamp_early_devices,
 703                 ARRAY_SIZE(stamp_early_devices));
 704 }
 705
 706 void native_machine_restart(char *cmd)
 707 {
 708         /* workaround pull up on cpld / flash pin not being strong enough */
 709         bfin_write_FIO_INEN(~PF0);
 710         bfin_write_FIO_DIR(PF0);
 711         bfin_write_FIO_FLAG_C(PF0);
 712 }