Blackfin: Split the BF532 BFIN_*_FIO_FLAG() functions to their own header
[linux-2.6/x86.git] / arch / blackfin / mach-bf533 / boards / ip0x.c
blobb8474cac6b03f3470b144629d0e2067ef054044b
1 /*
2 * Copyright 2004-2009 Analog Devices Inc.
3 * 2007 David Rowe
4 * 2006 Intratrade Ltd.
5 * Ivan Danov <idanov@gmail.com>
6 * 2005 National ICT Australia (NICTA)
7 * Aidan Williams <aidan@nicta.com.au>
9 * Licensed under the GPL-2 or later.
12 #include <linux/device.h>
13 #include <linux/platform_device.h>
14 #include <linux/mtd/mtd.h>
15 #include <linux/mtd/partitions.h>
16 #include <linux/spi/spi.h>
17 #include <linux/spi/flash.h>
18 #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
19 #include <linux/usb/isp1362.h>
20 #endif
21 #include <asm/irq.h>
22 #include <asm/dma.h>
23 #include <asm/bfin5xx_spi.h>
24 #include <asm/portmux.h>
25 #include <mach/fio_flag.h>
28 * Name the Board for the /proc/cpuinfo
30 const char bfin_board_name[] = "IP04/IP08";
33 * Driver needs to know address, irq and flag pin.
35 #if defined(CONFIG_BFIN532_IP0X)
36 #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
38 #include <linux/dm9000.h>
40 static struct resource dm9000_resource1[] = {
42 .start = 0x20100000,
43 .end = 0x20100000 + 1,
44 .flags = IORESOURCE_MEM
45 },{
46 .start = 0x20100000 + 2,
47 .end = 0x20100000 + 3,
48 .flags = IORESOURCE_MEM
49 },{
50 .start = IRQ_PF15,
51 .end = IRQ_PF15,
52 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE
56 static struct resource dm9000_resource2[] = {
58 .start = 0x20200000,
59 .end = 0x20200000 + 1,
60 .flags = IORESOURCE_MEM
61 },{
62 .start = 0x20200000 + 2,
63 .end = 0x20200000 + 3,
64 .flags = IORESOURCE_MEM
65 },{
66 .start = IRQ_PF14,
67 .end = IRQ_PF14,
68 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE
73 * for the moment we limit ourselves to 16bit IO until some
74 * better IO routines can be written and tested
76 static struct dm9000_plat_data dm9000_platdata1 = {
77 .flags = DM9000_PLATF_16BITONLY,
80 static struct platform_device dm9000_device1 = {
81 .name = "dm9000",
82 .id = 0,
83 .num_resources = ARRAY_SIZE(dm9000_resource1),
84 .resource = dm9000_resource1,
85 .dev = {
86 .platform_data = &dm9000_platdata1,
90 static struct dm9000_plat_data dm9000_platdata2 = {
91 .flags = DM9000_PLATF_16BITONLY,
94 static struct platform_device dm9000_device2 = {
95 .name = "dm9000",
96 .id = 1,
97 .num_resources = ARRAY_SIZE(dm9000_resource2),
98 .resource = dm9000_resource2,
99 .dev = {
100 .platform_data = &dm9000_platdata2,
104 #endif
105 #endif
108 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
109 /* all SPI peripherals info goes here */
111 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
112 static struct bfin5xx_spi_chip mmc_spi_chip_info = {
113 .enable_dma = 0, /* if 1 - block!!! */
114 .bits_per_word = 8,
116 #endif
118 /* Notice: for blackfin, the speed_hz is the value of register
119 * SPI_BAUD, not the real baudrate */
120 static struct spi_board_info bfin_spi_board_info[] __initdata = {
121 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
123 .modalias = "mmc_spi",
124 .max_speed_hz = 2,
125 .bus_num = 1,
126 .chip_select = 5,
127 .controller_data = &mmc_spi_chip_info,
129 #endif
132 /* SPI controller data */
133 static struct bfin5xx_spi_master spi_bfin_master_info = {
134 .num_chipselect = 8,
135 .enable_dma = 1, /* master has the ability to do dma transfer */
138 static struct platform_device spi_bfin_master_device = {
139 .name = "bfin-spi-master",
140 .id = 1, /* Bus number */
141 .dev = {
142 .platform_data = &spi_bfin_master_info, /* Passed to driver */
145 #endif /* spi master and devices */
147 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
148 #ifdef CONFIG_SERIAL_BFIN_UART0
149 static struct resource bfin_uart0_resources[] = {
151 .start = BFIN_UART_THR,
152 .end = BFIN_UART_GCTL+2,
153 .flags = IORESOURCE_MEM,
156 .start = IRQ_UART0_RX,
157 .end = IRQ_UART0_RX + 1,
158 .flags = IORESOURCE_IRQ,
161 .start = IRQ_UART0_ERROR,
162 .end = IRQ_UART0_ERROR,
163 .flags = IORESOURCE_IRQ,
166 .start = CH_UART0_TX,
167 .end = CH_UART0_TX,
168 .flags = IORESOURCE_DMA,
171 .start = CH_UART0_RX,
172 .end = CH_UART0_RX,
173 .flags = IORESOURCE_DMA,
177 unsigned short bfin_uart0_peripherals[] = {
178 P_UART0_TX, P_UART0_RX, 0
181 static struct platform_device bfin_uart0_device = {
182 .name = "bfin-uart",
183 .id = 0,
184 .num_resources = ARRAY_SIZE(bfin_uart0_resources),
185 .resource = bfin_uart0_resources,
186 .dev = {
187 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
190 #endif
191 #endif
193 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
194 #ifdef CONFIG_BFIN_SIR0
195 static struct resource bfin_sir0_resources[] = {
197 .start = 0xFFC00400,
198 .end = 0xFFC004FF,
199 .flags = IORESOURCE_MEM,
202 .start = IRQ_UART0_RX,
203 .end = IRQ_UART0_RX+1,
204 .flags = IORESOURCE_IRQ,
207 .start = CH_UART0_RX,
208 .end = CH_UART0_RX+1,
209 .flags = IORESOURCE_DMA,
213 static struct platform_device bfin_sir0_device = {
214 .name = "bfin_sir",
215 .id = 0,
216 .num_resources = ARRAY_SIZE(bfin_sir0_resources),
217 .resource = bfin_sir0_resources,
219 #endif
220 #endif
222 #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
223 static struct resource isp1362_hcd_resources[] = {
225 .start = 0x20300000,
226 .end = 0x20300000 + 1,
227 .flags = IORESOURCE_MEM,
229 .start = 0x20300000 + 2,
230 .end = 0x20300000 + 3,
231 .flags = IORESOURCE_MEM,
233 .start = IRQ_PF11,
234 .end = IRQ_PF11,
235 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
239 static struct isp1362_platform_data isp1362_priv = {
240 .sel15Kres = 1,
241 .clknotstop = 0,
242 .oc_enable = 0, /* external OC */
243 .int_act_high = 0,
244 .int_edge_triggered = 0,
245 .remote_wakeup_connected = 0,
246 .no_power_switching = 1,
247 .power_switching_mode = 0,
250 static struct platform_device isp1362_hcd_device = {
251 .name = "isp1362-hcd",
252 .id = 0,
253 .dev = {
254 .platform_data = &isp1362_priv,
256 .num_resources = ARRAY_SIZE(isp1362_hcd_resources),
257 .resource = isp1362_hcd_resources,
259 #endif
262 static struct platform_device *ip0x_devices[] __initdata = {
263 #if defined(CONFIG_BFIN532_IP0X)
264 #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
265 &dm9000_device1,
266 &dm9000_device2,
267 #endif
268 #endif
270 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
271 &spi_bfin_master_device,
272 #endif
274 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
275 #ifdef CONFIG_SERIAL_BFIN_UART0
276 &bfin_uart0_device,
277 #endif
278 #endif
280 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
281 #ifdef CONFIG_BFIN_SIR0
282 &bfin_sir0_device,
283 #endif
284 #endif
286 #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
287 &isp1362_hcd_device,
288 #endif
291 static int __init ip0x_init(void)
293 int i;
295 printk(KERN_INFO "%s(): registering device resources\n", __func__);
296 platform_add_devices(ip0x_devices, ARRAY_SIZE(ip0x_devices));
298 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
299 for (i = 0; i < ARRAY_SIZE(bfin_spi_board_info); ++i) {
300 int j = 1 << bfin_spi_board_info[i].chip_select;
301 /* set spi cs to 1 */
302 bfin_write_FIO_DIR(bfin_read_FIO_DIR() | j);
303 bfin_write_FIO_FLAG_S(j);
305 spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
306 #endif
308 return 0;
311 arch_initcall(ip0x_init);
313 static struct platform_device *ip0x_early_devices[] __initdata = {
314 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
315 #ifdef CONFIG_SERIAL_BFIN_UART0
316 &bfin_uart0_device,
317 #endif
318 #endif
321 void __init native_machine_early_platform_add_devices(void)
323 printk(KERN_INFO "register early platform devices\n");
324 early_platform_add_devices(ip0x_early_devices,
325 ARRAY_SIZE(ip0x_early_devices));