2 * SMP support for power macintosh.
4 * We support both the old "powersurge" SMP architecture
5 * and the current Core99 (G4 PowerMac) machines.
7 * Note that we don't support the very first rev. of
8 * Apple/DayStar 2 CPUs board, the one with the funky
9 * watchdog. Hopefully, none of these should be there except
10 * maybe internally to Apple. I should probably still add some
11 * code to detect this card though and disable SMP. --BenH.
13 * Support Macintosh G4 SMP by Troy Benjegerdes (hozer@drgw.net)
14 * and Ben Herrenschmidt <benh@kernel.crashing.org>.
16 * Support for DayStar quad CPU cards
17 * Copyright (C) XLR8, Inc. 1994-2000
19 * This program is free software; you can redistribute it and/or
20 * modify it under the terms of the GNU General Public License
21 * as published by the Free Software Foundation; either version
22 * 2 of the License, or (at your option) any later version.
27 #include <linux/config.h>
28 #include <linux/kernel.h>
29 #include <linux/sched.h>
30 #include <linux/smp.h>
31 #include <linux/smp_lock.h>
32 #include <linux/interrupt.h>
33 #include <linux/kernel_stat.h>
34 #include <linux/init.h>
35 #include <linux/spinlock.h>
36 #include <linux/errno.h>
37 #include <linux/irq.h>
39 #include <asm/ptrace.h>
40 #include <asm/atomic.h>
43 #include <asm/pgtable.h>
44 #include <asm/sections.h>
48 #include <asm/machdep.h>
49 #include <asm/pmac_feature.h>
51 #include <asm/cacheflush.h>
52 #include <asm/keylargo.h>
53 #include <asm/pmac_low_i2c.h>
57 #define DBG(fmt...) udbg_printf(fmt)
62 extern void __secondary_start_pmac_0(void);
64 extern struct smp_ops_t
*smp_ops
;
66 static void (*pmac_tb_freeze
)(int freeze
);
67 static struct device_node
*pmac_tb_clock_chip_host
;
68 static u8 pmac_tb_pulsar_addr
;
69 static DEFINE_SPINLOCK(timebase_lock
);
70 static unsigned long timebase
;
72 static void smp_core99_cypress_tb_freeze(int freeze
)
77 /* Strangely, the device-tree says address is 0xd2, but darwin
80 pmac_low_i2c_setmode(pmac_tb_clock_chip_host
, pmac_low_i2c_mode_combined
);
81 rc
= pmac_low_i2c_xfer(pmac_tb_clock_chip_host
,
82 0xd0 | pmac_low_i2c_read
,
87 data
= (data
& 0xf3) | (freeze
? 0x00 : 0x0c);
89 pmac_low_i2c_setmode(pmac_tb_clock_chip_host
, pmac_low_i2c_mode_stdsub
);
90 rc
= pmac_low_i2c_xfer(pmac_tb_clock_chip_host
,
91 0xd0 | pmac_low_i2c_write
,
96 printk("Cypress Timebase %s rc: %d\n",
97 freeze
? "freeze" : "unfreeze", rc
);
98 panic("Timebase freeze failed !\n");
102 static void smp_core99_pulsar_tb_freeze(int freeze
)
107 pmac_low_i2c_setmode(pmac_tb_clock_chip_host
, pmac_low_i2c_mode_combined
);
108 rc
= pmac_low_i2c_xfer(pmac_tb_clock_chip_host
,
109 pmac_tb_pulsar_addr
| pmac_low_i2c_read
,
114 data
= (data
& 0x88) | (freeze
? 0x11 : 0x22);
116 pmac_low_i2c_setmode(pmac_tb_clock_chip_host
, pmac_low_i2c_mode_stdsub
);
117 rc
= pmac_low_i2c_xfer(pmac_tb_clock_chip_host
,
118 pmac_tb_pulsar_addr
| pmac_low_i2c_write
,
122 printk(KERN_ERR
"Pulsar Timebase %s rc: %d\n",
123 freeze
? "freeze" : "unfreeze", rc
);
124 panic("Timebase freeze failed !\n");
129 static void smp_core99_give_timebase(void)
131 /* Open i2c bus for synchronous access */
132 if (pmac_low_i2c_open(pmac_tb_clock_chip_host
, 0))
133 panic("Can't open i2c for TB sync !\n");
135 spin_lock(&timebase_lock
);
136 (*pmac_tb_freeze
)(1);
139 spin_unlock(&timebase_lock
);
144 spin_lock(&timebase_lock
);
145 (*pmac_tb_freeze
)(0);
146 spin_unlock(&timebase_lock
);
149 pmac_low_i2c_close(pmac_tb_clock_chip_host
);
153 static void __devinit
smp_core99_take_timebase(void)
157 spin_lock(&timebase_lock
);
158 set_tb(timebase
>> 32, timebase
& 0xffffffff);
160 spin_unlock(&timebase_lock
);
164 static int __init
smp_core99_probe(void)
166 struct device_node
*cpus
;
167 struct device_node
*cc
;
170 /* Maybe use systemconfiguration here ? */
171 if (ppc_md
.progress
) ppc_md
.progress("smp_core99_probe", 0x345);
173 /* Count CPUs in the device-tree */
174 for (cpus
= NULL
; (cpus
= of_find_node_by_type(cpus
, "cpu")) != NULL
;)
177 printk(KERN_INFO
"PowerMac SMP probe found %d cpus\n", ncpus
);
179 /* Nothing more to do if less than 2 of them */
183 /* HW sync only on these platforms */
184 if (!machine_is_compatible("PowerMac7,2") &&
185 !machine_is_compatible("PowerMac7,3") &&
186 !machine_is_compatible("RackMac3,1"))
189 /* Look for the clock chip */
190 for (cc
= NULL
; (cc
= of_find_node_by_name(cc
, "i2c-hwclock")) != NULL
;) {
191 struct device_node
*p
= of_get_parent(cc
);
194 ok
= p
&& device_is_compatible(p
, "uni-n-i2c");
197 reg
= (u32
*)get_property(cc
, "reg", NULL
);
202 if (device_is_compatible(cc
, "pulsar-legacy-slewing")) {
203 pmac_tb_freeze
= smp_core99_pulsar_tb_freeze
;
204 pmac_tb_pulsar_addr
= 0xd2;
205 printk(KERN_INFO
"Timebase clock is Pulsar chip\n");
206 } else if (device_is_compatible(cc
, "cy28508")) {
207 pmac_tb_freeze
= smp_core99_cypress_tb_freeze
;
208 printk(KERN_INFO
"Timebase clock is Cypress chip\n");
212 pmac_tb_freeze
= smp_core99_pulsar_tb_freeze
;
213 pmac_tb_pulsar_addr
= 0xd4;
214 printk(KERN_INFO
"Timebase clock is Pulsar chip\n");
217 if (pmac_tb_freeze
!= NULL
) {
218 pmac_tb_clock_chip_host
= p
;
219 smp_ops
->give_timebase
= smp_core99_give_timebase
;
220 smp_ops
->take_timebase
= smp_core99_take_timebase
;
235 static void __init
smp_core99_kick_cpu(int nr
)
237 unsigned int save_vector
, j
;
238 unsigned long new_vector
;
240 volatile unsigned int *vector
241 = ((volatile unsigned int *)(KERNELBASE
+0x100));
243 if (nr
< 1 || nr
> 3)
245 if (ppc_md
.progress
) ppc_md
.progress("smp_core99_kick_cpu", 0x346);
247 local_irq_save(flags
);
250 /* Save reset vector */
251 save_vector
= *vector
;
253 /* Setup fake reset vector that does
254 * b __secondary_start_pmac_0 + nr*8 - KERNELBASE
256 new_vector
= (unsigned long) __secondary_start_pmac_0
+ nr
* 8;
257 *vector
= 0x48000002 + (new_vector
- KERNELBASE
);
259 /* flush data cache and inval instruction cache */
260 flush_icache_range((unsigned long) vector
, (unsigned long) vector
+ 4);
262 /* Put some life in our friend */
263 pmac_call_feature(PMAC_FTR_RESET_CPU
, NULL
, nr
, 0);
264 paca
[nr
].cpu_start
= 1;
266 /* FIXME: We wait a bit for the CPU to take the exception, I should
267 * instead wait for the entry code to set something for me. Well,
268 * ideally, all that crap will be done in prom.c and the CPU left
269 * in a RAM-based wait loop like CHRP.
271 for (j
= 1; j
< 1000000; j
++)
274 /* Restore our exception vector */
275 *vector
= save_vector
;
276 flush_icache_range((unsigned long) vector
, (unsigned long) vector
+ 4);
278 local_irq_restore(flags
);
279 if (ppc_md
.progress
) ppc_md
.progress("smp_core99_kick_cpu done", 0x347);
282 static void __init
smp_core99_setup_cpu(int cpu_nr
)
285 mpic_setup_this_cpu();
288 extern void g5_phy_disable_cpu1(void);
290 /* If we didn't start the second CPU, we must take
293 if (num_online_cpus() < 2)
294 g5_phy_disable_cpu1();
295 if (ppc_md
.progress
) ppc_md
.progress("smp_core99_setup_cpu 0 done", 0x349);
299 struct smp_ops_t core99_smp_ops
= {
300 .message_pass
= smp_mpic_message_pass
,
301 .probe
= smp_core99_probe
,
302 .kick_cpu
= smp_core99_kick_cpu
,
303 .setup_cpu
= smp_core99_setup_cpu
,
304 .give_timebase
= smp_generic_give_timebase
,
305 .take_timebase
= smp_generic_take_timebase
,
308 void __init
pmac_setup_smp(void)
310 smp_ops
= &core99_smp_ops
;
311 #ifdef CONFIG_HOTPLUG_CPU
312 smp_ops
->cpu_enable
= generic_cpu_enable
;
313 smp_ops
->cpu_disable
= generic_cpu_disable
;
314 smp_ops
->cpu_die
= generic_cpu_die
;