drivers/net/bnx2x_link.h

   1 /* Copyright 2008 Broadcom Corporation
   2  *
   3  * Unless you and Broadcom execute a separate written software license
   4  * agreement governing use of this software, this software is licensed to you
   5  * under the terms of the GNU General Public License version 2, available
   6  * at http://www.gnu.org/licenses/old-licenses/gpl-2.0.html (the "GPL").
   7  *
   8  * Notwithstanding the above, under no circumstances may you combine this
   9  * software in any way with any other Broadcom software provided under a
  10  * license other than the GPL, without Broadcom's express prior written
  11  * consent.
  12  *
  13  * Written by Yaniv Rosner
  14  *
  15  */
  16
  17 #ifndef BNX2X_LINK_H
  18 #define BNX2X_LINK_H
  19
  20
  21
  22 /***********************************************************/
  23 /*                         Defines                         */
  24 /***********************************************************/
  25 #define DEFAULT_PHY_DEV_ADDR 3
  26
  27
  28
  29 #define FLOW_CTRL_AUTO          PORT_FEATURE_FLOW_CONTROL_AUTO
  30 #define FLOW_CTRL_TX            PORT_FEATURE_FLOW_CONTROL_TX
  31 #define FLOW_CTRL_RX            PORT_FEATURE_FLOW_CONTROL_RX
  32 #define FLOW_CTRL_BOTH          PORT_FEATURE_FLOW_CONTROL_BOTH
  33 #define FLOW_CTRL_NONE          PORT_FEATURE_FLOW_CONTROL_NONE
  34
  35 #define SPEED_AUTO_NEG      0
  36 #define SPEED_12000             12000
  37 #define SPEED_12500             12500
  38 #define SPEED_13000             13000
  39 #define SPEED_15000             15000
  40 #define SPEED_16000             16000
  41
  42
  43 /***********************************************************/
  44 /*                         Structs                         */
  45 /***********************************************************/
  46 /* Inputs parameters to the CLC */
  47 struct link_params {
  48
  49         u8 port;
  50
  51         /* Default / User Configuration */
  52         u8 loopback_mode;
  53 #define LOOPBACK_NONE   0
  54 #define LOOPBACK_EMAC   1
  55 #define LOOPBACK_BMAC   2
  56 #define LOOPBACK_XGXS_10        3
  57 #define LOOPBACK_EXT_PHY        4
  58
  59         u16 req_duplex;
  60         u16 req_flow_ctrl;
  61         u16 req_line_speed; /* Also determine AutoNeg */
  62
  63         /* Device parameters */
  64         u8 mac_addr[6];
  65         u16 mtu;
  66
  67
  68         /* shmem parameters */
  69         u32 shmem_base;
  70         u32 speed_cap_mask;
  71         u32 switch_cfg;
  72 #define SWITCH_CFG_1G           PORT_FEATURE_CON_SWITCH_1G_SWITCH
  73 #define SWITCH_CFG_10G          PORT_FEATURE_CON_SWITCH_10G_SWITCH
  74 #define SWITCH_CFG_AUTO_DETECT  PORT_FEATURE_CON_SWITCH_AUTO_DETECT
  75
  76         u16 hw_led_mode; /* part of the hw_config read from the shmem */
  77         u32 serdes_config;
  78         u32 lane_config;
  79         u32 ext_phy_config;
  80 #define XGXS_EXT_PHY_TYPE(ext_phy_config)       (ext_phy_config & \
  81                                         PORT_HW_CFG_XGXS_EXT_PHY_TYPE_MASK)
  82 #define SERDES_EXT_PHY_TYPE(ext_phy_config)     (ext_phy_config & \
  83                                         PORT_HW_CFG_SERDES_EXT_PHY_TYPE_MASK)
  84         /* Phy register parameter */
  85         u32 chip_id;
  86
  87         /* phy_addr populated by the CLC */
  88         u8 phy_addr;
  89         /* Device pointer passed to all callback functions */
  90         struct bnx2x *bp;
  91 };
  92
  93 /* Output parameters */
  94 struct link_vars {
  95         u8 phy_link_up; /* internal phy link indication */
  96         u8 link_up;
  97         u16 duplex;
  98         u16 flow_ctrl;
  99         u32 ieee_fc;
 100         u8 mac_type;
 101
 102 #define MAC_TYPE_NONE   0
 103 #define MAC_TYPE_EMAC   1
 104 #define MAC_TYPE_BMAC   2
 105         u16 line_speed;
 106         u32 autoneg;
 107 #define AUTO_NEG_DISABLED                       0x0
 108 #define AUTO_NEG_ENABLED                        0x1
 109 #define AUTO_NEG_COMPLETE                       0x2
 110 #define AUTO_NEG_PARALLEL_DETECTION_USED        0x3
 111
 112         u8 phy_flags;
 113
 114         /* The same definitions as the shmem parameter */
 115         u32 link_status;
 116 };
 117
 118 /***********************************************************/
 119 /*                         Functions                       */
 120 /***********************************************************/
 121
 122 /* Initialize the phy */
 123 u8 bnx2x_phy_init(struct link_params *input, struct link_vars *output);
 124
 125 /* Reset the link. Should be called when driver or interface goes down */
 126 u8 bnx2x_link_reset(struct link_params *params, struct link_vars *vars);
 127
 128 /* bnx2x_link_update should be called upon link interrupt */
 129 u8 bnx2x_link_update(struct link_params *input, struct link_vars *output);
 130
 131 /* use the following cl45 functions to read/write from external_phy
 132   In order to use it to read/write internal phy registers, use
 133   DEFAULT_PHY_DEV_ADDR as devad, and (_bank + (_addr & 0xf)) as
 134   Use ext_phy_type of 0 in case of cl22 over cl45
 135   the register */
 136 u8 bnx2x_cl45_read(struct bnx2x *bp, u8 port, u32 ext_phy_type,
 137                  u8 phy_addr, u8 devad, u16 reg, u16 *ret_val);
 138
 139 u8 bnx2x_cl45_write(struct bnx2x *bp, u8 port, u32 ext_phy_type,
 140                   u8 phy_addr, u8 devad, u16 reg, u16 val);
 141
 142 /* Reads the link_status from the shmem,
 143    and update the link vars accordinaly */
 144 void bnx2x_link_status_update(struct link_params *input,
 145                             struct link_vars *output);
 146 /* returns string representing the fw_version of the external phy */
 147 u8 bnx2x_get_ext_phy_fw_version(struct link_params *params, u8 driver_loaded,
 148                               u8 *version, u16 len);
 149
 150 /* Set/Unset the led
 151    Basically, the CLC takes care of the led for the link, but in case one needs
 152    to set/unset the led unnatually, set the "mode" to LED_MODE_OPER to
 153    blink the led, and LED_MODE_OFF to set the led off.*/
 154 u8 bnx2x_set_led(struct bnx2x *bp, u8 port, u8 mode, u32 speed,
 155                u16 hw_led_mode, u32 chip_id);
 156 #define LED_MODE_OFF    0
 157 #define LED_MODE_OPER   2
 158
 159 u8 bnx2x_override_led_value(struct bnx2x *bp, u8 port, u32 led_idx, u32 value);
 160
 161 u8 bnx2x_flash_download(struct bnx2x *bp, u8 port, u32 ext_phy_config,
 162                       u8 driver_loaded, char data[], u32 size);
 163 /* Get the actual link status. In case it returns 0, link is up,
 164         otherwise link is down*/
 165 u8 bnx2x_test_link(struct link_params *input, struct link_vars *vars);
 166
 167
 168 #endif /* BNX2X_LINK_H */