1 /****************************************************************************
2 * Driver for Solarflare Solarstorm network controllers and boards
3 * Copyright 2007-2008 Solarflare Communications Inc.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 as published
7 * by the Free Software Foundation, incorporated herein by reference.
10 #include <linux/delay.h>
11 #include <linux/rtnetlink.h>
12 #include <linux/seq_file.h>
18 #include "workarounds.h"
21 /* We expect these MMDs to be in the package. SFT9001 also has a
22 * clause 22 extension MMD, but since it doesn't have all the generic
23 * MMD registers it is pointless to include it here.
25 #define TENXPRESS_REQUIRED_DEVS (MDIO_DEVS_PMAPMD | \
30 #define SFX7101_LOOPBACKS ((1 << LOOPBACK_PHYXS) | \
31 (1 << LOOPBACK_PCS) | \
32 (1 << LOOPBACK_PMAPMD) | \
33 (1 << LOOPBACK_PHYXS_WS))
35 #define SFT9001_LOOPBACKS ((1 << LOOPBACK_GPHY) | \
36 (1 << LOOPBACK_PHYXS) | \
37 (1 << LOOPBACK_PCS) | \
38 (1 << LOOPBACK_PMAPMD) | \
39 (1 << LOOPBACK_PHYXS_WS))
41 /* We complain if we fail to see the link partner as 10G capable this many
42 * times in a row (must be > 1 as sampling the autoneg. registers is racy)
44 #define MAX_BAD_LP_TRIES (5)
46 /* Extended control register */
47 #define PMA_PMD_XCONTROL_REG 49152
48 #define PMA_PMD_EXT_GMII_EN_LBN 1
49 #define PMA_PMD_EXT_GMII_EN_WIDTH 1
50 #define PMA_PMD_EXT_CLK_OUT_LBN 2
51 #define PMA_PMD_EXT_CLK_OUT_WIDTH 1
52 #define PMA_PMD_LNPGA_POWERDOWN_LBN 8 /* SFX7101 only */
53 #define PMA_PMD_LNPGA_POWERDOWN_WIDTH 1
54 #define PMA_PMD_EXT_CLK312_LBN 8 /* SFT9001 only */
55 #define PMA_PMD_EXT_CLK312_WIDTH 1
56 #define PMA_PMD_EXT_LPOWER_LBN 12
57 #define PMA_PMD_EXT_LPOWER_WIDTH 1
58 #define PMA_PMD_EXT_ROBUST_LBN 14
59 #define PMA_PMD_EXT_ROBUST_WIDTH 1
60 #define PMA_PMD_EXT_SSR_LBN 15
61 #define PMA_PMD_EXT_SSR_WIDTH 1
63 /* extended status register */
64 #define PMA_PMD_XSTATUS_REG 49153
65 #define PMA_PMD_XSTAT_MDIX_LBN 14
66 #define PMA_PMD_XSTAT_FLP_LBN (12)
68 /* LED control register */
69 #define PMA_PMD_LED_CTRL_REG 49159
70 #define PMA_PMA_LED_ACTIVITY_LBN (3)
72 /* LED function override register */
73 #define PMA_PMD_LED_OVERR_REG 49161
74 /* Bit positions for different LEDs (there are more but not wired on SFE4001)*/
75 #define PMA_PMD_LED_LINK_LBN (0)
76 #define PMA_PMD_LED_SPEED_LBN (2)
77 #define PMA_PMD_LED_TX_LBN (4)
78 #define PMA_PMD_LED_RX_LBN (6)
79 /* Override settings */
80 #define PMA_PMD_LED_AUTO (0) /* H/W control */
81 #define PMA_PMD_LED_ON (1)
82 #define PMA_PMD_LED_OFF (2)
83 #define PMA_PMD_LED_FLASH (3)
84 #define PMA_PMD_LED_MASK 3
85 /* All LEDs under hardware control */
86 #define SFT9001_PMA_PMD_LED_DEFAULT 0
87 /* Green and Amber under hardware control, Red off */
88 #define SFX7101_PMA_PMD_LED_DEFAULT (PMA_PMD_LED_OFF << PMA_PMD_LED_RX_LBN)
90 #define PMA_PMD_SPEED_ENABLE_REG 49192
91 #define PMA_PMD_100TX_ADV_LBN 1
92 #define PMA_PMD_100TX_ADV_WIDTH 1
93 #define PMA_PMD_1000T_ADV_LBN 2
94 #define PMA_PMD_1000T_ADV_WIDTH 1
95 #define PMA_PMD_10000T_ADV_LBN 3
96 #define PMA_PMD_10000T_ADV_WIDTH 1
97 #define PMA_PMD_SPEED_LBN 4
98 #define PMA_PMD_SPEED_WIDTH 4
100 /* Cable diagnostics - SFT9001 only */
101 #define PMA_PMD_CDIAG_CTRL_REG 49213
102 #define CDIAG_CTRL_IMMED_LBN 15
103 #define CDIAG_CTRL_BRK_LINK_LBN 12
104 #define CDIAG_CTRL_IN_PROG_LBN 11
105 #define CDIAG_CTRL_LEN_UNIT_LBN 10
106 #define CDIAG_CTRL_LEN_METRES 1
107 #define PMA_PMD_CDIAG_RES_REG 49174
108 #define CDIAG_RES_A_LBN 12
109 #define CDIAG_RES_B_LBN 8
110 #define CDIAG_RES_C_LBN 4
111 #define CDIAG_RES_D_LBN 0
112 #define CDIAG_RES_WIDTH 4
113 #define CDIAG_RES_OPEN 2
114 #define CDIAG_RES_OK 1
115 #define CDIAG_RES_INVALID 0
116 /* Set of 4 registers for pairs A-D */
117 #define PMA_PMD_CDIAG_LEN_REG 49175
119 /* Serdes control registers - SFT9001 only */
120 #define PMA_PMD_CSERDES_CTRL_REG 64258
121 /* Set the 156.25 MHz output to 312.5 MHz to drive Falcon's XMAC */
122 #define PMA_PMD_CSERDES_DEFAULT 0x000f
124 /* Misc register defines - SFX7101 only */
125 #define PCS_CLOCK_CTRL_REG 55297
126 #define PLL312_RST_N_LBN 2
128 #define PCS_SOFT_RST2_REG 55302
129 #define SERDES_RST_N_LBN 13
130 #define XGXS_RST_N_LBN 12
132 #define PCS_TEST_SELECT_REG 55303 /* PRM 10.5.8 */
133 #define CLK312_EN_LBN 3
135 /* PHYXS registers */
136 #define PHYXS_XCONTROL_REG 49152
137 #define PHYXS_RESET_LBN 15
138 #define PHYXS_RESET_WIDTH 1
140 #define PHYXS_TEST1 (49162)
141 #define LOOPBACK_NEAR_LBN (8)
142 #define LOOPBACK_NEAR_WIDTH (1)
144 /* Boot status register */
145 #define PCS_BOOT_STATUS_REG 53248
146 #define PCS_BOOT_FATAL_ERROR_LBN 0
147 #define PCS_BOOT_PROGRESS_LBN 1
148 #define PCS_BOOT_PROGRESS_WIDTH 2
149 #define PCS_BOOT_PROGRESS_INIT 0
150 #define PCS_BOOT_PROGRESS_WAIT_MDIO 1
151 #define PCS_BOOT_PROGRESS_CHECKSUM 2
152 #define PCS_BOOT_PROGRESS_JUMP 3
153 #define PCS_BOOT_DOWNLOAD_WAIT_LBN 3
154 #define PCS_BOOT_CODE_STARTED_LBN 4
156 /* 100M/1G PHY registers */
157 #define GPHY_XCONTROL_REG 49152
158 #define GPHY_ISOLATE_LBN 10
159 #define GPHY_ISOLATE_WIDTH 1
160 #define GPHY_DUPLEX_LBN 8
161 #define GPHY_DUPLEX_WIDTH 1
162 #define GPHY_LOOPBACK_NEAR_LBN 14
163 #define GPHY_LOOPBACK_NEAR_WIDTH 1
165 #define C22EXT_STATUS_REG 49153
166 #define C22EXT_STATUS_LINK_LBN 2
167 #define C22EXT_STATUS_LINK_WIDTH 1
169 #define C22EXT_MSTSLV_CTRL 49161
170 #define C22EXT_MSTSLV_CTRL_ADV_1000_HD_LBN 8
171 #define C22EXT_MSTSLV_CTRL_ADV_1000_FD_LBN 9
173 #define C22EXT_MSTSLV_STATUS 49162
174 #define C22EXT_MSTSLV_STATUS_LP_1000_HD_LBN 10
175 #define C22EXT_MSTSLV_STATUS_LP_1000_FD_LBN 11
177 /* Time to wait between powering down the LNPGA and turning off the power
179 #define LNPGA_PDOWN_WAIT (HZ / 5)
181 struct tenxpress_phy_data
{
182 enum efx_loopback_mode loopback_mode
;
183 enum efx_phy_mode phy_mode
;
187 static ssize_t
show_phy_short_reach(struct device
*dev
,
188 struct device_attribute
*attr
, char *buf
)
190 struct efx_nic
*efx
= pci_get_drvdata(to_pci_dev(dev
));
193 reg
= efx_mdio_read(efx
, MDIO_MMD_PMAPMD
, MDIO_PMA_10GBT_TXPWR
);
194 return sprintf(buf
, "%d\n", !!(reg
& MDIO_PMA_10GBT_TXPWR_SHORT
));
197 static ssize_t
set_phy_short_reach(struct device
*dev
,
198 struct device_attribute
*attr
,
199 const char *buf
, size_t count
)
201 struct efx_nic
*efx
= pci_get_drvdata(to_pci_dev(dev
));
205 efx_mdio_set_flag(efx
, MDIO_MMD_PMAPMD
, MDIO_PMA_10GBT_TXPWR
,
206 MDIO_PMA_10GBT_TXPWR_SHORT
,
207 count
!= 0 && *buf
!= '0');
208 rc
= efx_reconfigure_port(efx
);
211 return rc
< 0 ? rc
: (ssize_t
)count
;
214 static DEVICE_ATTR(phy_short_reach
, 0644, show_phy_short_reach
,
215 set_phy_short_reach
);
217 int sft9001_wait_boot(struct efx_nic
*efx
)
219 unsigned long timeout
= jiffies
+ HZ
+ 1;
223 boot_stat
= efx_mdio_read(efx
, MDIO_MMD_PCS
,
224 PCS_BOOT_STATUS_REG
);
225 if (boot_stat
>= 0) {
226 EFX_LOG(efx
, "PHY boot status = %#x\n", boot_stat
);
228 ((1 << PCS_BOOT_FATAL_ERROR_LBN
) |
229 (3 << PCS_BOOT_PROGRESS_LBN
) |
230 (1 << PCS_BOOT_DOWNLOAD_WAIT_LBN
) |
231 (1 << PCS_BOOT_CODE_STARTED_LBN
))) {
232 case ((1 << PCS_BOOT_FATAL_ERROR_LBN
) |
233 (PCS_BOOT_PROGRESS_CHECKSUM
<<
234 PCS_BOOT_PROGRESS_LBN
)):
235 case ((1 << PCS_BOOT_FATAL_ERROR_LBN
) |
236 (PCS_BOOT_PROGRESS_INIT
<<
237 PCS_BOOT_PROGRESS_LBN
) |
238 (1 << PCS_BOOT_DOWNLOAD_WAIT_LBN
)):
240 case ((PCS_BOOT_PROGRESS_WAIT_MDIO
<<
241 PCS_BOOT_PROGRESS_LBN
) |
242 (1 << PCS_BOOT_DOWNLOAD_WAIT_LBN
)):
243 return (efx
->phy_mode
& PHY_MODE_SPECIAL
) ?
245 case ((PCS_BOOT_PROGRESS_JUMP
<<
246 PCS_BOOT_PROGRESS_LBN
) |
247 (1 << PCS_BOOT_CODE_STARTED_LBN
)):
248 case ((PCS_BOOT_PROGRESS_JUMP
<<
249 PCS_BOOT_PROGRESS_LBN
) |
250 (1 << PCS_BOOT_DOWNLOAD_WAIT_LBN
) |
251 (1 << PCS_BOOT_CODE_STARTED_LBN
)):
252 return (efx
->phy_mode
& PHY_MODE_SPECIAL
) ?
255 if (boot_stat
& (1 << PCS_BOOT_FATAL_ERROR_LBN
))
261 if (time_after_eq(jiffies
, timeout
))
268 static int tenxpress_init(struct efx_nic
*efx
)
272 if (efx
->phy_type
== PHY_TYPE_SFX7101
) {
273 /* Enable 312.5 MHz clock */
274 efx_mdio_write(efx
, MDIO_MMD_PCS
, PCS_TEST_SELECT_REG
,
277 /* Enable 312.5 MHz clock and GMII */
278 reg
= efx_mdio_read(efx
, MDIO_MMD_PMAPMD
, PMA_PMD_XCONTROL_REG
);
279 reg
|= ((1 << PMA_PMD_EXT_GMII_EN_LBN
) |
280 (1 << PMA_PMD_EXT_CLK_OUT_LBN
) |
281 (1 << PMA_PMD_EXT_CLK312_LBN
) |
282 (1 << PMA_PMD_EXT_ROBUST_LBN
));
284 efx_mdio_write(efx
, MDIO_MMD_PMAPMD
, PMA_PMD_XCONTROL_REG
, reg
);
285 efx_mdio_set_flag(efx
, MDIO_MMD_C22EXT
,
286 GPHY_XCONTROL_REG
, 1 << GPHY_ISOLATE_LBN
,
290 /* Set the LEDs up as: Green = Link, Amber = Link/Act, Red = Off */
291 if (efx
->phy_type
== PHY_TYPE_SFX7101
) {
292 efx_mdio_set_flag(efx
, MDIO_MMD_PMAPMD
, PMA_PMD_LED_CTRL_REG
,
293 1 << PMA_PMA_LED_ACTIVITY_LBN
, true);
294 efx_mdio_write(efx
, MDIO_MMD_PMAPMD
, PMA_PMD_LED_OVERR_REG
,
295 SFX7101_PMA_PMD_LED_DEFAULT
);
301 static int tenxpress_phy_init(struct efx_nic
*efx
)
303 struct tenxpress_phy_data
*phy_data
;
306 falcon_board(efx
)->type
->init_phy(efx
);
308 phy_data
= kzalloc(sizeof(*phy_data
), GFP_KERNEL
);
311 efx
->phy_data
= phy_data
;
312 phy_data
->phy_mode
= efx
->phy_mode
;
314 if (!(efx
->phy_mode
& PHY_MODE_SPECIAL
)) {
315 if (efx
->phy_type
== PHY_TYPE_SFT9001A
) {
317 reg
= efx_mdio_read(efx
, MDIO_MMD_PMAPMD
,
318 PMA_PMD_XCONTROL_REG
);
319 reg
|= (1 << PMA_PMD_EXT_SSR_LBN
);
320 efx_mdio_write(efx
, MDIO_MMD_PMAPMD
,
321 PMA_PMD_XCONTROL_REG
, reg
);
325 rc
= efx_mdio_wait_reset_mmds(efx
, TENXPRESS_REQUIRED_DEVS
);
329 rc
= efx_mdio_check_mmds(efx
, TENXPRESS_REQUIRED_DEVS
, 0);
334 rc
= tenxpress_init(efx
);
338 /* Initialise advertising flags */
339 efx
->link_advertising
= (ADVERTISED_TP
| ADVERTISED_Autoneg
|
340 ADVERTISED_10000baseT_Full
);
341 if (efx
->phy_type
!= PHY_TYPE_SFX7101
)
342 efx
->link_advertising
|= (ADVERTISED_1000baseT_Full
|
343 ADVERTISED_100baseT_Full
);
344 efx_link_set_wanted_fc(efx
, efx
->wanted_fc
);
345 efx_mdio_an_reconfigure(efx
);
347 if (efx
->phy_type
== PHY_TYPE_SFT9001B
) {
348 rc
= device_create_file(&efx
->pci_dev
->dev
,
349 &dev_attr_phy_short_reach
);
354 schedule_timeout_uninterruptible(HZ
/ 5); /* 200ms */
356 /* Let XGXS and SerDes out of reset */
357 falcon_reset_xaui(efx
);
362 kfree(efx
->phy_data
);
363 efx
->phy_data
= NULL
;
367 /* Perform a "special software reset" on the PHY. The caller is
368 * responsible for saving and restoring the PHY hardware registers
369 * properly, and masking/unmasking LASI */
370 static int tenxpress_special_reset(struct efx_nic
*efx
)
374 /* The XGMAC clock is driven from the SFC7101/SFT9001 312MHz clock, so
375 * a special software reset can glitch the XGMAC sufficiently for stats
376 * requests to fail. */
377 falcon_stop_nic_stats(efx
);
380 reg
= efx_mdio_read(efx
, MDIO_MMD_PMAPMD
, PMA_PMD_XCONTROL_REG
);
381 reg
|= (1 << PMA_PMD_EXT_SSR_LBN
);
382 efx_mdio_write(efx
, MDIO_MMD_PMAPMD
, PMA_PMD_XCONTROL_REG
, reg
);
386 /* Wait for the blocks to come out of reset */
387 rc
= efx_mdio_wait_reset_mmds(efx
, TENXPRESS_REQUIRED_DEVS
);
391 /* Try and reconfigure the device */
392 rc
= tenxpress_init(efx
);
396 /* Wait for the XGXS state machine to churn */
399 falcon_start_nic_stats(efx
);
403 static void sfx7101_check_bad_lp(struct efx_nic
*efx
, bool link_ok
)
405 struct tenxpress_phy_data
*pd
= efx
->phy_data
;
412 /* Check that AN has started but not completed. */
413 reg
= efx_mdio_read(efx
, MDIO_MMD_AN
, MDIO_STAT1
);
414 if (!(reg
& MDIO_AN_STAT1_LPABLE
))
415 return; /* LP status is unknown */
416 bad_lp
= !(reg
& MDIO_AN_STAT1_COMPLETE
);
421 /* Nothing to do if all is well and was previously so. */
422 if (!pd
->bad_lp_tries
)
425 /* Use the RX (red) LED as an error indicator once we've seen AN
426 * failure several times in a row, and also log a message. */
427 if (!bad_lp
|| pd
->bad_lp_tries
== MAX_BAD_LP_TRIES
) {
428 reg
= efx_mdio_read(efx
, MDIO_MMD_PMAPMD
,
429 PMA_PMD_LED_OVERR_REG
);
430 reg
&= ~(PMA_PMD_LED_MASK
<< PMA_PMD_LED_RX_LBN
);
432 reg
|= PMA_PMD_LED_OFF
<< PMA_PMD_LED_RX_LBN
;
434 reg
|= PMA_PMD_LED_FLASH
<< PMA_PMD_LED_RX_LBN
;
435 EFX_ERR(efx
, "appears to be plugged into a port"
436 " that is not 10GBASE-T capable. The PHY"
437 " supports 10GBASE-T ONLY, so no link can"
438 " be established\n");
440 efx_mdio_write(efx
, MDIO_MMD_PMAPMD
,
441 PMA_PMD_LED_OVERR_REG
, reg
);
442 pd
->bad_lp_tries
= bad_lp
;
446 static bool sfx7101_link_ok(struct efx_nic
*efx
)
448 return efx_mdio_links_ok(efx
,
454 static bool sft9001_link_ok(struct efx_nic
*efx
, struct ethtool_cmd
*ecmd
)
458 if (efx_phy_mode_disabled(efx
->phy_mode
))
460 else if (efx
->loopback_mode
== LOOPBACK_GPHY
)
462 else if (efx
->loopback_mode
)
463 return efx_mdio_links_ok(efx
,
467 /* We must use the same definition of link state as LASI,
468 * otherwise we can miss a link state transition
470 if (ecmd
->speed
== 10000) {
471 reg
= efx_mdio_read(efx
, MDIO_MMD_PCS
, MDIO_PCS_10GBRT_STAT1
);
472 return reg
& MDIO_PCS_10GBRT_STAT1_BLKLK
;
474 reg
= efx_mdio_read(efx
, MDIO_MMD_C22EXT
, C22EXT_STATUS_REG
);
475 return reg
& (1 << C22EXT_STATUS_LINK_LBN
);
479 static void tenxpress_ext_loopback(struct efx_nic
*efx
)
481 efx_mdio_set_flag(efx
, MDIO_MMD_PHYXS
, PHYXS_TEST1
,
482 1 << LOOPBACK_NEAR_LBN
,
483 efx
->loopback_mode
== LOOPBACK_PHYXS
);
484 if (efx
->phy_type
!= PHY_TYPE_SFX7101
)
485 efx_mdio_set_flag(efx
, MDIO_MMD_C22EXT
, GPHY_XCONTROL_REG
,
486 1 << GPHY_LOOPBACK_NEAR_LBN
,
487 efx
->loopback_mode
== LOOPBACK_GPHY
);
490 static void tenxpress_low_power(struct efx_nic
*efx
)
492 if (efx
->phy_type
== PHY_TYPE_SFX7101
)
493 efx_mdio_set_mmds_lpower(
494 efx
, !!(efx
->phy_mode
& PHY_MODE_LOW_POWER
),
495 TENXPRESS_REQUIRED_DEVS
);
498 efx
, MDIO_MMD_PMAPMD
, PMA_PMD_XCONTROL_REG
,
499 1 << PMA_PMD_EXT_LPOWER_LBN
,
500 !!(efx
->phy_mode
& PHY_MODE_LOW_POWER
));
503 static int tenxpress_phy_reconfigure(struct efx_nic
*efx
)
505 struct tenxpress_phy_data
*phy_data
= efx
->phy_data
;
506 bool phy_mode_change
, loop_reset
;
508 if (efx
->phy_mode
& (PHY_MODE_OFF
| PHY_MODE_SPECIAL
)) {
509 phy_data
->phy_mode
= efx
->phy_mode
;
513 phy_mode_change
= (efx
->phy_mode
== PHY_MODE_NORMAL
&&
514 phy_data
->phy_mode
!= PHY_MODE_NORMAL
);
515 loop_reset
= (LOOPBACK_OUT_OF(phy_data
, efx
, efx
->phy_op
->loopbacks
) ||
516 LOOPBACK_CHANGED(phy_data
, efx
, 1 << LOOPBACK_GPHY
));
518 if (loop_reset
|| phy_mode_change
) {
519 tenxpress_special_reset(efx
);
521 /* Reset XAUI if we were in 10G, and are staying
522 * in 10G. If we're moving into and out of 10G
523 * then xaui will be reset anyway */
525 falcon_reset_xaui(efx
);
528 tenxpress_low_power(efx
);
529 efx_mdio_transmit_disable(efx
);
530 efx_mdio_phy_reconfigure(efx
);
531 tenxpress_ext_loopback(efx
);
532 efx_mdio_an_reconfigure(efx
);
534 phy_data
->loopback_mode
= efx
->loopback_mode
;
535 phy_data
->phy_mode
= efx
->phy_mode
;
541 tenxpress_get_settings(struct efx_nic
*efx
, struct ethtool_cmd
*ecmd
);
543 /* Poll for link state changes */
544 static bool tenxpress_phy_poll(struct efx_nic
*efx
)
546 struct efx_link_state old_state
= efx
->link_state
;
548 if (efx
->phy_type
== PHY_TYPE_SFX7101
) {
549 efx
->link_state
.up
= sfx7101_link_ok(efx
);
550 efx
->link_state
.speed
= 10000;
551 efx
->link_state
.fd
= true;
552 efx
->link_state
.fc
= efx_mdio_get_pause(efx
);
554 sfx7101_check_bad_lp(efx
, efx
->link_state
.up
);
556 struct ethtool_cmd ecmd
;
558 /* Check the LASI alarm first */
559 if (efx
->loopback_mode
== LOOPBACK_NONE
&&
560 !(efx_mdio_read(efx
, MDIO_MMD_PMAPMD
, MDIO_PMA_LASI_STAT
) &
561 MDIO_PMA_LASI_LSALARM
))
564 tenxpress_get_settings(efx
, &ecmd
);
566 efx
->link_state
.up
= sft9001_link_ok(efx
, &ecmd
);
567 efx
->link_state
.speed
= ecmd
.speed
;
568 efx
->link_state
.fd
= (ecmd
.duplex
== DUPLEX_FULL
);
569 efx
->link_state
.fc
= efx_mdio_get_pause(efx
);
572 return !efx_link_state_equal(&efx
->link_state
, &old_state
);
575 static void tenxpress_phy_fini(struct efx_nic
*efx
)
579 if (efx
->phy_type
== PHY_TYPE_SFT9001B
)
580 device_remove_file(&efx
->pci_dev
->dev
,
581 &dev_attr_phy_short_reach
);
583 if (efx
->phy_type
== PHY_TYPE_SFX7101
) {
584 /* Power down the LNPGA */
585 reg
= (1 << PMA_PMD_LNPGA_POWERDOWN_LBN
);
586 efx_mdio_write(efx
, MDIO_MMD_PMAPMD
, PMA_PMD_XCONTROL_REG
, reg
);
588 /* Waiting here ensures that the board fini, which can turn
589 * off the power to the PHY, won't get run until the LNPGA
590 * powerdown has been given long enough to complete. */
591 schedule_timeout_uninterruptible(LNPGA_PDOWN_WAIT
); /* 200 ms */
594 kfree(efx
->phy_data
);
595 efx
->phy_data
= NULL
;
599 /* Override the RX, TX and link LEDs */
600 void tenxpress_set_id_led(struct efx_nic
*efx
, enum efx_led_mode mode
)
606 reg
= (PMA_PMD_LED_OFF
<< PMA_PMD_LED_TX_LBN
) |
607 (PMA_PMD_LED_OFF
<< PMA_PMD_LED_RX_LBN
) |
608 (PMA_PMD_LED_OFF
<< PMA_PMD_LED_LINK_LBN
);
611 reg
= (PMA_PMD_LED_ON
<< PMA_PMD_LED_TX_LBN
) |
612 (PMA_PMD_LED_ON
<< PMA_PMD_LED_RX_LBN
) |
613 (PMA_PMD_LED_ON
<< PMA_PMD_LED_LINK_LBN
);
616 if (efx
->phy_type
== PHY_TYPE_SFX7101
)
617 reg
= SFX7101_PMA_PMD_LED_DEFAULT
;
619 reg
= SFT9001_PMA_PMD_LED_DEFAULT
;
623 efx_mdio_write(efx
, MDIO_MMD_PMAPMD
, PMA_PMD_LED_OVERR_REG
, reg
);
626 static const char *const sfx7101_test_names
[] = {
631 sfx7101_run_tests(struct efx_nic
*efx
, int *results
, unsigned flags
)
635 if (!(flags
& ETH_TEST_FL_OFFLINE
))
638 /* BIST is automatically run after a special software reset */
639 rc
= tenxpress_special_reset(efx
);
640 results
[0] = rc
? -1 : 1;
642 efx_mdio_an_reconfigure(efx
);
647 static const char *const sft9001_test_names
[] = {
649 "cable.pairA.status",
650 "cable.pairB.status",
651 "cable.pairC.status",
652 "cable.pairD.status",
653 "cable.pairA.length",
654 "cable.pairB.length",
655 "cable.pairC.length",
656 "cable.pairD.length",
659 static int sft9001_run_tests(struct efx_nic
*efx
, int *results
, unsigned flags
)
661 int rc
= 0, rc2
, i
, ctrl_reg
, res_reg
;
663 /* Initialise cable diagnostic results to unknown failure */
664 for (i
= 1; i
< 9; ++i
)
667 /* Run cable diagnostics; wait up to 5 seconds for them to complete.
668 * A cable fault is not a self-test failure, but a timeout is. */
669 ctrl_reg
= ((1 << CDIAG_CTRL_IMMED_LBN
) |
670 (CDIAG_CTRL_LEN_METRES
<< CDIAG_CTRL_LEN_UNIT_LBN
));
671 if (flags
& ETH_TEST_FL_OFFLINE
) {
672 /* Break the link in order to run full diagnostics. We
673 * must reset the PHY to resume normal service. */
674 ctrl_reg
|= (1 << CDIAG_CTRL_BRK_LINK_LBN
);
676 efx_mdio_write(efx
, MDIO_MMD_PMAPMD
, PMA_PMD_CDIAG_CTRL_REG
,
679 while (efx_mdio_read(efx
, MDIO_MMD_PMAPMD
, PMA_PMD_CDIAG_CTRL_REG
) &
680 (1 << CDIAG_CTRL_IN_PROG_LBN
)) {
687 res_reg
= efx_mdio_read(efx
, MDIO_MMD_PMAPMD
, PMA_PMD_CDIAG_RES_REG
);
688 for (i
= 0; i
< 4; i
++) {
690 (res_reg
>> (CDIAG_RES_A_LBN
- i
* CDIAG_RES_WIDTH
))
691 & ((1 << CDIAG_RES_WIDTH
) - 1);
692 int len_reg
= efx_mdio_read(efx
, MDIO_MMD_PMAPMD
,
693 PMA_PMD_CDIAG_LEN_REG
+ i
);
694 if (pair_res
== CDIAG_RES_OK
)
696 else if (pair_res
== CDIAG_RES_INVALID
)
699 results
[1 + i
] = -pair_res
;
700 if (pair_res
!= CDIAG_RES_INVALID
&&
701 pair_res
!= CDIAG_RES_OPEN
&&
703 results
[5 + i
] = len_reg
;
707 if (flags
& ETH_TEST_FL_OFFLINE
) {
708 /* Reset, running the BIST and then resuming normal service. */
709 rc2
= tenxpress_special_reset(efx
);
710 results
[0] = rc2
? -1 : 1;
714 efx_mdio_an_reconfigure(efx
);
721 tenxpress_get_settings(struct efx_nic
*efx
, struct ethtool_cmd
*ecmd
)
723 u32 adv
= 0, lpa
= 0;
726 if (efx
->phy_type
!= PHY_TYPE_SFX7101
) {
727 reg
= efx_mdio_read(efx
, MDIO_MMD_C22EXT
, C22EXT_MSTSLV_CTRL
);
728 if (reg
& (1 << C22EXT_MSTSLV_CTRL_ADV_1000_FD_LBN
))
729 adv
|= ADVERTISED_1000baseT_Full
;
730 reg
= efx_mdio_read(efx
, MDIO_MMD_C22EXT
, C22EXT_MSTSLV_STATUS
);
731 if (reg
& (1 << C22EXT_MSTSLV_STATUS_LP_1000_HD_LBN
))
732 lpa
|= ADVERTISED_1000baseT_Half
;
733 if (reg
& (1 << C22EXT_MSTSLV_STATUS_LP_1000_FD_LBN
))
734 lpa
|= ADVERTISED_1000baseT_Full
;
736 reg
= efx_mdio_read(efx
, MDIO_MMD_AN
, MDIO_AN_10GBT_CTRL
);
737 if (reg
& MDIO_AN_10GBT_CTRL_ADV10G
)
738 adv
|= ADVERTISED_10000baseT_Full
;
739 reg
= efx_mdio_read(efx
, MDIO_MMD_AN
, MDIO_AN_10GBT_STAT
);
740 if (reg
& MDIO_AN_10GBT_STAT_LP10G
)
741 lpa
|= ADVERTISED_10000baseT_Full
;
743 mdio45_ethtool_gset_npage(&efx
->mdio
, ecmd
, adv
, lpa
);
745 if (efx
->phy_type
!= PHY_TYPE_SFX7101
) {
746 ecmd
->supported
|= (SUPPORTED_100baseT_Full
|
747 SUPPORTED_1000baseT_Full
);
748 if (ecmd
->speed
!= SPEED_10000
) {
750 (efx_mdio_read(efx
, MDIO_MMD_PMAPMD
,
751 PMA_PMD_XSTATUS_REG
) &
752 (1 << PMA_PMD_XSTAT_MDIX_LBN
))
753 ? ETH_TP_MDI_X
: ETH_TP_MDI
;
757 /* In loopback, the PHY automatically brings up the correct interface,
758 * but doesn't advertise the correct speed. So override it */
759 if (efx
->loopback_mode
== LOOPBACK_GPHY
)
760 ecmd
->speed
= SPEED_1000
;
761 else if (LOOPBACK_MASK(efx
) & efx
->phy_op
->loopbacks
)
762 ecmd
->speed
= SPEED_10000
;
765 static int tenxpress_set_settings(struct efx_nic
*efx
, struct ethtool_cmd
*ecmd
)
770 return efx_mdio_set_settings(efx
, ecmd
);
773 static void sfx7101_set_npage_adv(struct efx_nic
*efx
, u32 advertising
)
775 efx_mdio_set_flag(efx
, MDIO_MMD_AN
, MDIO_AN_10GBT_CTRL
,
776 MDIO_AN_10GBT_CTRL_ADV10G
,
777 advertising
& ADVERTISED_10000baseT_Full
);
780 static void sft9001_set_npage_adv(struct efx_nic
*efx
, u32 advertising
)
782 efx_mdio_set_flag(efx
, MDIO_MMD_C22EXT
, C22EXT_MSTSLV_CTRL
,
783 1 << C22EXT_MSTSLV_CTRL_ADV_1000_FD_LBN
,
784 advertising
& ADVERTISED_1000baseT_Full
);
785 efx_mdio_set_flag(efx
, MDIO_MMD_AN
, MDIO_AN_10GBT_CTRL
,
786 MDIO_AN_10GBT_CTRL_ADV10G
,
787 advertising
& ADVERTISED_10000baseT_Full
);
790 struct efx_phy_operations falcon_sfx7101_phy_ops
= {
792 .init
= tenxpress_phy_init
,
793 .reconfigure
= tenxpress_phy_reconfigure
,
794 .poll
= tenxpress_phy_poll
,
795 .fini
= tenxpress_phy_fini
,
796 .get_settings
= tenxpress_get_settings
,
797 .set_settings
= tenxpress_set_settings
,
798 .set_npage_adv
= sfx7101_set_npage_adv
,
799 .num_tests
= ARRAY_SIZE(sfx7101_test_names
),
800 .test_names
= sfx7101_test_names
,
801 .run_tests
= sfx7101_run_tests
,
802 .mmds
= TENXPRESS_REQUIRED_DEVS
,
803 .loopbacks
= SFX7101_LOOPBACKS
,
806 struct efx_phy_operations falcon_sft9001_phy_ops
= {
807 .macs
= EFX_GMAC
| EFX_XMAC
,
808 .init
= tenxpress_phy_init
,
809 .reconfigure
= tenxpress_phy_reconfigure
,
810 .poll
= tenxpress_phy_poll
,
811 .fini
= tenxpress_phy_fini
,
812 .get_settings
= tenxpress_get_settings
,
813 .set_settings
= tenxpress_set_settings
,
814 .set_npage_adv
= sft9001_set_npage_adv
,
815 .num_tests
= ARRAY_SIZE(sft9001_test_names
),
816 .test_names
= sft9001_test_names
,
817 .run_tests
= sft9001_run_tests
,
818 .mmds
= TENXPRESS_REQUIRED_DEVS
,
819 .loopbacks
= SFT9001_LOOPBACKS
,