[IA64] hooks to wait for mmio writes to drain when migrating processes
[linux-2.6/x86.git] / arch / ia64 / sn / kernel / setup.c
blobf1c1338b10b4db005cc37aeb44e45525224b85c9
1 /*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
6 * Copyright (C) 1999,2001-2006 Silicon Graphics, Inc. All rights reserved.
7 */
9 #include <linux/config.h>
10 #include <linux/module.h>
11 #include <linux/init.h>
12 #include <linux/delay.h>
13 #include <linux/kernel.h>
14 #include <linux/kdev_t.h>
15 #include <linux/string.h>
16 #include <linux/tty.h>
17 #include <linux/console.h>
18 #include <linux/timex.h>
19 #include <linux/sched.h>
20 #include <linux/ioport.h>
21 #include <linux/mm.h>
22 #include <linux/serial.h>
23 #include <linux/irq.h>
24 #include <linux/bootmem.h>
25 #include <linux/mmzone.h>
26 #include <linux/interrupt.h>
27 #include <linux/acpi.h>
28 #include <linux/compiler.h>
29 #include <linux/sched.h>
30 #include <linux/root_dev.h>
31 #include <linux/nodemask.h>
32 #include <linux/pm.h>
33 #include <linux/efi.h>
35 #include <asm/io.h>
36 #include <asm/sal.h>
37 #include <asm/machvec.h>
38 #include <asm/system.h>
39 #include <asm/processor.h>
40 #include <asm/vga.h>
41 #include <asm/sn/arch.h>
42 #include <asm/sn/addrs.h>
43 #include <asm/sn/pda.h>
44 #include <asm/sn/nodepda.h>
45 #include <asm/sn/sn_cpuid.h>
46 #include <asm/sn/simulator.h>
47 #include <asm/sn/leds.h>
48 #include <asm/sn/bte.h>
49 #include <asm/sn/shub_mmr.h>
50 #include <asm/sn/clksupport.h>
51 #include <asm/sn/sn_sal.h>
52 #include <asm/sn/geo.h>
53 #include <asm/sn/sn_feature_sets.h>
54 #include "xtalk/xwidgetdev.h"
55 #include "xtalk/hubdev.h"
56 #include <asm/sn/klconfig.h>
59 DEFINE_PER_CPU(struct pda_s, pda_percpu);
61 #define MAX_PHYS_MEMORY (1UL << IA64_MAX_PHYS_BITS) /* Max physical address supported */
63 extern void bte_init_node(nodepda_t *, cnodeid_t);
65 extern void sn_timer_init(void);
66 extern unsigned long last_time_offset;
67 extern void (*ia64_mark_idle) (int);
68 extern void snidle(int);
69 extern unsigned char acpi_kbd_controller_present;
71 unsigned long sn_rtc_cycles_per_second;
72 EXPORT_SYMBOL(sn_rtc_cycles_per_second);
74 DEFINE_PER_CPU(struct sn_hub_info_s, __sn_hub_info);
75 EXPORT_PER_CPU_SYMBOL(__sn_hub_info);
77 DEFINE_PER_CPU(short, __sn_cnodeid_to_nasid[MAX_NUMNODES]);
78 EXPORT_PER_CPU_SYMBOL(__sn_cnodeid_to_nasid);
80 DEFINE_PER_CPU(struct nodepda_s *, __sn_nodepda);
81 EXPORT_PER_CPU_SYMBOL(__sn_nodepda);
83 char sn_system_serial_number_string[128];
84 EXPORT_SYMBOL(sn_system_serial_number_string);
85 u64 sn_partition_serial_number;
86 EXPORT_SYMBOL(sn_partition_serial_number);
87 u8 sn_partition_id;
88 EXPORT_SYMBOL(sn_partition_id);
89 u8 sn_system_size;
90 EXPORT_SYMBOL(sn_system_size);
91 u8 sn_sharing_domain_size;
92 EXPORT_SYMBOL(sn_sharing_domain_size);
93 u8 sn_coherency_id;
94 EXPORT_SYMBOL(sn_coherency_id);
95 u8 sn_region_size;
96 EXPORT_SYMBOL(sn_region_size);
97 int sn_prom_type; /* 0=hardware, 1=medusa/realprom, 2=medusa/fakeprom */
99 short physical_node_map[MAX_NUMALINK_NODES];
100 static unsigned long sn_prom_features[MAX_PROM_FEATURE_SETS];
102 EXPORT_SYMBOL(physical_node_map);
104 int num_cnodes;
106 static void sn_init_pdas(char **);
107 static void build_cnode_tables(void);
109 static nodepda_t *nodepdaindr[MAX_COMPACT_NODES];
112 * The format of "screen_info" is strange, and due to early i386-setup
113 * code. This is just enough to make the console code think we're on a
114 * VGA color display.
116 struct screen_info sn_screen_info = {
117 .orig_x = 0,
118 .orig_y = 0,
119 .orig_video_mode = 3,
120 .orig_video_cols = 80,
121 .orig_video_ega_bx = 3,
122 .orig_video_lines = 25,
123 .orig_video_isVGA = 1,
124 .orig_video_points = 16
128 * This is here so we can use the CMOS detection in ide-probe.c to
129 * determine what drives are present. In theory, we don't need this
130 * as the auto-detection could be done via ide-probe.c:do_probe() but
131 * in practice that would be much slower, which is painful when
132 * running in the simulator. Note that passing zeroes in DRIVE_INFO
133 * is sufficient (the IDE driver will autodetect the drive geometry).
135 #ifdef CONFIG_IA64_GENERIC
136 extern char drive_info[4 * 16];
137 #else
138 char drive_info[4 * 16];
139 #endif
142 * This routine can only be used during init, since
143 * smp_boot_data is an init data structure.
144 * We have to use smp_boot_data.cpu_phys_id to find
145 * the physical id of the processor because the normal
146 * cpu_physical_id() relies on data structures that
147 * may not be initialized yet.
150 static int __init pxm_to_nasid(int pxm)
152 int i;
153 int nid;
155 nid = pxm_to_nid_map[pxm];
156 for (i = 0; i < num_node_memblks; i++) {
157 if (node_memblk[i].nid == nid) {
158 return NASID_GET(node_memblk[i].start_paddr);
161 return -1;
165 * early_sn_setup - early setup routine for SN platforms
167 * Sets up an initial console to aid debugging. Intended primarily
168 * for bringup. See start_kernel() in init/main.c.
171 void __init early_sn_setup(void)
173 efi_system_table_t *efi_systab;
174 efi_config_table_t *config_tables;
175 struct ia64_sal_systab *sal_systab;
176 struct ia64_sal_desc_entry_point *ep;
177 char *p;
178 int i, j;
181 * Parse enough of the SAL tables to locate the SAL entry point. Since, console
182 * IO on SN2 is done via SAL calls, early_printk won't work without this.
184 * This code duplicates some of the ACPI table parsing that is in efi.c & sal.c.
185 * Any changes to those file may have to be made hereas well.
187 efi_systab = (efi_system_table_t *) __va(ia64_boot_param->efi_systab);
188 config_tables = __va(efi_systab->tables);
189 for (i = 0; i < efi_systab->nr_tables; i++) {
190 if (efi_guidcmp(config_tables[i].guid, SAL_SYSTEM_TABLE_GUID) ==
191 0) {
192 sal_systab = __va(config_tables[i].table);
193 p = (char *)(sal_systab + 1);
194 for (j = 0; j < sal_systab->entry_count; j++) {
195 if (*p == SAL_DESC_ENTRY_POINT) {
196 ep = (struct ia64_sal_desc_entry_point
197 *)p;
198 ia64_sal_handler_init(__va
199 (ep->sal_proc),
200 __va(ep->gp));
201 return;
203 p += SAL_DESC_SIZE(*p);
207 /* Uh-oh, SAL not available?? */
208 printk(KERN_ERR "failed to find SAL entry point\n");
211 extern int platform_intr_list[];
212 static int __initdata shub_1_1_found = 0;
215 * sn_check_for_wars
217 * Set flag for enabling shub specific wars
220 static inline int __init is_shub_1_1(int nasid)
222 unsigned long id;
223 int rev;
225 if (is_shub2())
226 return 0;
227 id = REMOTE_HUB_L(nasid, SH1_SHUB_ID);
228 rev = (id & SH1_SHUB_ID_REVISION_MASK) >> SH1_SHUB_ID_REVISION_SHFT;
229 return rev <= 2;
232 static void __init sn_check_for_wars(void)
234 int cnode;
236 if (is_shub2()) {
237 /* none yet */
238 } else {
239 for_each_online_node(cnode) {
240 if (is_shub_1_1(cnodeid_to_nasid(cnode)))
241 shub_1_1_found = 1;
247 * Scan the EFI PCDP table (if it exists) for an acceptable VGA console
248 * output device. If one exists, pick it and set sn_legacy_{io,mem} to
249 * reflect the bus offsets needed to address it.
251 * Since pcdp support in SN is not supported in the 2.4 kernel (or at least
252 * the one lbs is based on) just declare the needed structs here.
254 * Reference spec http://www.dig64.org/specifications/DIG64_PCDPv20.pdf
256 * Returns 0 if no acceptable vga is found, !0 otherwise.
258 * Note: This stuff is duped here because Altix requires the PCDP to
259 * locate a usable VGA device due to lack of proper ACPI support. Structures
260 * could be used from drivers/firmware/pcdp.h, but it was decided that moving
261 * this file to a more public location just for Altix use was undesireable.
264 struct hcdp_uart_desc {
265 u8 pad[45];
268 struct pcdp {
269 u8 signature[4]; /* should be 'HCDP' */
270 u32 length;
271 u8 rev; /* should be >=3 for pcdp, <3 for hcdp */
272 u8 sum;
273 u8 oem_id[6];
274 u64 oem_tableid;
275 u32 oem_rev;
276 u32 creator_id;
277 u32 creator_rev;
278 u32 num_type0;
279 struct hcdp_uart_desc uart[0]; /* num_type0 of these */
280 /* pcdp descriptors follow */
281 } __attribute__((packed));
283 struct pcdp_device_desc {
284 u8 type;
285 u8 primary;
286 u16 length;
287 u16 index;
288 /* interconnect specific structure follows */
289 /* device specific structure follows that */
290 } __attribute__((packed));
292 struct pcdp_interface_pci {
293 u8 type; /* 1 == pci */
294 u8 reserved;
295 u16 length;
296 u8 segment;
297 u8 bus;
298 u8 dev;
299 u8 fun;
300 u16 devid;
301 u16 vendid;
302 u32 acpi_interrupt;
303 u64 mmio_tra;
304 u64 ioport_tra;
305 u8 flags;
306 u8 translation;
307 } __attribute__((packed));
309 struct pcdp_vga_device {
310 u8 num_eas_desc;
311 /* ACPI Extended Address Space Desc follows */
312 } __attribute__((packed));
314 /* from pcdp_device_desc.primary */
315 #define PCDP_PRIMARY_CONSOLE 0x01
317 /* from pcdp_device_desc.type */
318 #define PCDP_CONSOLE_INOUT 0x0
319 #define PCDP_CONSOLE_DEBUG 0x1
320 #define PCDP_CONSOLE_OUT 0x2
321 #define PCDP_CONSOLE_IN 0x3
322 #define PCDP_CONSOLE_TYPE_VGA 0x8
324 #define PCDP_CONSOLE_VGA (PCDP_CONSOLE_TYPE_VGA | PCDP_CONSOLE_OUT)
326 /* from pcdp_interface_pci.type */
327 #define PCDP_IF_PCI 1
329 /* from pcdp_interface_pci.translation */
330 #define PCDP_PCI_TRANS_IOPORT 0x02
331 #define PCDP_PCI_TRANS_MMIO 0x01
333 static void
334 sn_scan_pcdp(void)
336 u8 *bp;
337 struct pcdp *pcdp;
338 struct pcdp_device_desc device;
339 struct pcdp_interface_pci if_pci;
340 extern struct efi efi;
342 pcdp = efi.hcdp;
343 if (! pcdp)
344 return; /* no hcdp/pcdp table */
346 if (pcdp->rev < 3)
347 return; /* only support PCDP (rev >= 3) */
349 for (bp = (u8 *)&pcdp->uart[pcdp->num_type0];
350 bp < (u8 *)pcdp + pcdp->length;
351 bp += device.length) {
352 memcpy(&device, bp, sizeof(device));
353 if (! (device.primary & PCDP_PRIMARY_CONSOLE))
354 continue; /* not primary console */
356 if (device.type != PCDP_CONSOLE_VGA)
357 continue; /* not VGA descriptor */
359 memcpy(&if_pci, bp+sizeof(device), sizeof(if_pci));
360 if (if_pci.type != PCDP_IF_PCI)
361 continue; /* not PCI interconnect */
363 if (if_pci.translation & PCDP_PCI_TRANS_IOPORT)
364 vga_console_iobase =
365 if_pci.ioport_tra | __IA64_UNCACHED_OFFSET;
367 if (if_pci.translation & PCDP_PCI_TRANS_MMIO)
368 vga_console_membase =
369 if_pci.mmio_tra | __IA64_UNCACHED_OFFSET;
371 break; /* once we find the primary, we're done */
376 * sn_setup - SN platform setup routine
377 * @cmdline_p: kernel command line
379 * Handles platform setup for SN machines. This includes determining
380 * the RTC frequency (via a SAL call), initializing secondary CPUs, and
381 * setting up per-node data areas. The console is also initialized here.
383 void __init sn_setup(char **cmdline_p)
385 long status, ticks_per_sec, drift;
386 u32 version = sn_sal_rev();
387 extern void sn_cpu_init(void);
389 ia64_sn_plat_set_error_handling_features(); // obsolete
390 ia64_sn_set_os_feature(OSF_MCA_SLV_TO_OS_INIT_SLV);
391 ia64_sn_set_os_feature(OSF_FEAT_LOG_SBES);
394 #if defined(CONFIG_VT) && defined(CONFIG_VGA_CONSOLE)
396 * Handle SN vga console.
398 * SN systems do not have enough ACPI table information
399 * being passed from prom to identify VGA adapters and the legacy
400 * addresses to access them. Until that is done, SN systems rely
401 * on the PCDP table to identify the primary VGA console if one
402 * exists.
404 * However, kernel PCDP support is optional, and even if it is built
405 * into the kernel, it will not be used if the boot cmdline contains
406 * console= directives.
408 * So, to work around this mess, we duplicate some of the PCDP code
409 * here so that the primary VGA console (as defined by PCDP) will
410 * work on SN systems even if a different console (e.g. serial) is
411 * selected on the boot line (or CONFIG_EFI_PCDP is off).
414 if (! vga_console_membase)
415 sn_scan_pcdp();
417 if (vga_console_membase) {
418 /* usable vga ... make tty0 the preferred default console */
419 if (!strstr(*cmdline_p, "console="))
420 add_preferred_console("tty", 0, NULL);
421 } else {
422 printk(KERN_DEBUG "SGI: Disabling VGA console\n");
423 if (!strstr(*cmdline_p, "console="))
424 add_preferred_console("ttySG", 0, NULL);
425 #ifdef CONFIG_DUMMY_CONSOLE
426 conswitchp = &dummy_con;
427 #else
428 conswitchp = NULL;
429 #endif /* CONFIG_DUMMY_CONSOLE */
431 #endif /* def(CONFIG_VT) && def(CONFIG_VGA_CONSOLE) */
433 MAX_DMA_ADDRESS = PAGE_OFFSET + MAX_PHYS_MEMORY;
436 * Build the tables for managing cnodes.
438 build_cnode_tables();
441 * Old PROMs do not provide an ACPI FADT. Disable legacy keyboard
442 * support here so we don't have to listen to failed keyboard probe
443 * messages.
445 if (version <= 0x0209 && acpi_kbd_controller_present) {
446 printk(KERN_INFO "Disabling legacy keyboard support as prom "
447 "is too old and doesn't provide FADT\n");
448 acpi_kbd_controller_present = 0;
451 printk("SGI SAL version %x.%02x\n", version >> 8, version & 0x00FF);
453 status =
454 ia64_sal_freq_base(SAL_FREQ_BASE_REALTIME_CLOCK, &ticks_per_sec,
455 &drift);
456 if (status != 0 || ticks_per_sec < 100000) {
457 printk(KERN_WARNING
458 "unable to determine platform RTC clock frequency, guessing.\n");
459 /* PROM gives wrong value for clock freq. so guess */
460 sn_rtc_cycles_per_second = 1000000000000UL / 30000UL;
461 } else
462 sn_rtc_cycles_per_second = ticks_per_sec;
464 platform_intr_list[ACPI_INTERRUPT_CPEI] = IA64_CPE_VECTOR;
467 * we set the default root device to /dev/hda
468 * to make simulation easy
470 ROOT_DEV = Root_HDA1;
473 * Create the PDAs and NODEPDAs for all the cpus.
475 sn_init_pdas(cmdline_p);
477 ia64_mark_idle = &snidle;
480 * For the bootcpu, we do this here. All other cpus will make the
481 * call as part of cpu_init in slave cpu initialization.
483 sn_cpu_init();
485 #ifdef CONFIG_SMP
486 init_smp_config();
487 #endif
488 screen_info = sn_screen_info;
490 sn_timer_init();
493 * set pm_power_off to a SAL call to allow
494 * sn machines to power off. The SAL call can be replaced
495 * by an ACPI interface call when ACPI is fully implemented
496 * for sn.
498 pm_power_off = ia64_sn_power_down;
499 current->thread.flags |= IA64_THREAD_MIGRATION;
503 * sn_init_pdas - setup node data areas
505 * One time setup for Node Data Area. Called by sn_setup().
507 static void __init sn_init_pdas(char **cmdline_p)
509 cnodeid_t cnode;
512 * Allocate & initalize the nodepda for each node.
514 for_each_online_node(cnode) {
515 nodepdaindr[cnode] =
516 alloc_bootmem_node(NODE_DATA(cnode), sizeof(nodepda_t));
517 memset(nodepdaindr[cnode], 0, sizeof(nodepda_t));
518 memset(nodepdaindr[cnode]->phys_cpuid, -1,
519 sizeof(nodepdaindr[cnode]->phys_cpuid));
520 spin_lock_init(&nodepdaindr[cnode]->ptc_lock);
524 * Allocate & initialize nodepda for TIOs. For now, put them on node 0.
526 for (cnode = num_online_nodes(); cnode < num_cnodes; cnode++) {
527 nodepdaindr[cnode] =
528 alloc_bootmem_node(NODE_DATA(0), sizeof(nodepda_t));
529 memset(nodepdaindr[cnode], 0, sizeof(nodepda_t));
533 * Now copy the array of nodepda pointers to each nodepda.
535 for (cnode = 0; cnode < num_cnodes; cnode++)
536 memcpy(nodepdaindr[cnode]->pernode_pdaindr, nodepdaindr,
537 sizeof(nodepdaindr));
540 * Set up IO related platform-dependent nodepda fields.
541 * The following routine actually sets up the hubinfo struct
542 * in nodepda.
544 for_each_online_node(cnode) {
545 bte_init_node(nodepdaindr[cnode], cnode);
549 * Initialize the per node hubdev. This includes IO Nodes and
550 * headless/memless nodes.
552 for (cnode = 0; cnode < num_cnodes; cnode++) {
553 hubdev_init_node(nodepdaindr[cnode], cnode);
558 * sn_cpu_init - initialize per-cpu data areas
559 * @cpuid: cpuid of the caller
561 * Called during cpu initialization on each cpu as it starts.
562 * Currently, initializes the per-cpu data area for SNIA.
563 * Also sets up a few fields in the nodepda. Also known as
564 * platform_cpu_init() by the ia64 machvec code.
566 void __init sn_cpu_init(void)
568 int cpuid;
569 int cpuphyid;
570 int nasid;
571 int subnode;
572 int slice;
573 int cnode;
574 int i;
575 static int wars_have_been_checked;
577 if (smp_processor_id() == 0 && IS_MEDUSA()) {
578 if (ia64_sn_is_fake_prom())
579 sn_prom_type = 2;
580 else
581 sn_prom_type = 1;
582 printk("Running on medusa with %s PROM\n", (sn_prom_type == 1) ? "real" : "fake");
585 memset(pda, 0, sizeof(pda));
586 if (ia64_sn_get_sn_info(0, &sn_hub_info->shub2, &sn_hub_info->nasid_bitmask, &sn_hub_info->nasid_shift,
587 &sn_system_size, &sn_sharing_domain_size, &sn_partition_id,
588 &sn_coherency_id, &sn_region_size))
589 BUG();
590 sn_hub_info->as_shift = sn_hub_info->nasid_shift - 2;
593 * The boot cpu makes this call again after platform initialization is
594 * complete.
596 if (nodepdaindr[0] == NULL)
597 return;
599 for (i = 0; i < MAX_PROM_FEATURE_SETS; i++)
600 if (ia64_sn_get_prom_feature_set(i, &sn_prom_features[i]) != 0)
601 break;
603 cpuid = smp_processor_id();
604 cpuphyid = get_sapicid();
606 if (ia64_sn_get_sapic_info(cpuphyid, &nasid, &subnode, &slice))
607 BUG();
609 for (i=0; i < MAX_NUMNODES; i++) {
610 if (nodepdaindr[i]) {
611 nodepdaindr[i]->phys_cpuid[cpuid].nasid = nasid;
612 nodepdaindr[i]->phys_cpuid[cpuid].slice = slice;
613 nodepdaindr[i]->phys_cpuid[cpuid].subnode = subnode;
617 cnode = nasid_to_cnodeid(nasid);
619 sn_nodepda = nodepdaindr[cnode];
621 pda->led_address =
622 (typeof(pda->led_address)) (LED0 + (slice << LED_CPU_SHIFT));
623 pda->led_state = LED_ALWAYS_SET;
624 pda->hb_count = HZ / 2;
625 pda->hb_state = 0;
626 pda->idle_flag = 0;
628 if (cpuid != 0) {
629 /* copy cpu 0's sn_cnodeid_to_nasid table to this cpu's */
630 memcpy(sn_cnodeid_to_nasid,
631 (&per_cpu(__sn_cnodeid_to_nasid, 0)),
632 sizeof(__ia64_per_cpu_var(__sn_cnodeid_to_nasid)));
636 * Check for WARs.
637 * Only needs to be done once, on BSP.
638 * Has to be done after loop above, because it uses this cpu's
639 * sn_cnodeid_to_nasid table which was just initialized if this
640 * isn't cpu 0.
641 * Has to be done before assignment below.
643 if (!wars_have_been_checked) {
644 sn_check_for_wars();
645 wars_have_been_checked = 1;
647 sn_hub_info->shub_1_1_found = shub_1_1_found;
650 * Set up addresses of PIO/MEM write status registers.
653 u64 pio1[] = {SH1_PIO_WRITE_STATUS_0, 0, SH1_PIO_WRITE_STATUS_1, 0};
654 u64 pio2[] = {SH2_PIO_WRITE_STATUS_0, SH2_PIO_WRITE_STATUS_2,
655 SH2_PIO_WRITE_STATUS_1, SH2_PIO_WRITE_STATUS_3};
656 u64 *pio;
657 pio = is_shub1() ? pio1 : pio2;
658 pda->pio_write_status_addr =
659 (volatile unsigned long *)GLOBAL_MMR_ADDR(nasid, pio[slice]);
660 pda->pio_write_status_val = is_shub1() ? SH_PIO_WRITE_STATUS_PENDING_WRITE_COUNT_MASK : 0;
664 * WAR addresses for SHUB 1.x.
666 if (local_node_data->active_cpu_count++ == 0 && is_shub1()) {
667 int buddy_nasid;
668 buddy_nasid =
669 cnodeid_to_nasid(numa_node_id() ==
670 num_online_nodes() - 1 ? 0 : numa_node_id() + 1);
671 pda->pio_shub_war_cam_addr =
672 (volatile unsigned long *)GLOBAL_MMR_ADDR(nasid,
673 SH1_PI_CAM_CONTROL);
678 * Build tables for converting between NASIDs and cnodes.
680 static inline int __init board_needs_cnode(int type)
682 return (type == KLTYPE_SNIA || type == KLTYPE_TIO);
685 void __init build_cnode_tables(void)
687 int nasid;
688 int node;
689 lboard_t *brd;
691 memset(physical_node_map, -1, sizeof(physical_node_map));
692 memset(sn_cnodeid_to_nasid, -1,
693 sizeof(__ia64_per_cpu_var(__sn_cnodeid_to_nasid)));
696 * First populate the tables with C/M bricks. This ensures that
697 * cnode == node for all C & M bricks.
699 for_each_online_node(node) {
700 nasid = pxm_to_nasid(nid_to_pxm_map[node]);
701 sn_cnodeid_to_nasid[node] = nasid;
702 physical_node_map[nasid] = node;
706 * num_cnodes is total number of C/M/TIO bricks. Because of the 256 node
707 * limit on the number of nodes, we can't use the generic node numbers
708 * for this. Note that num_cnodes is incremented below as TIOs or
709 * headless/memoryless nodes are discovered.
711 num_cnodes = num_online_nodes();
713 /* fakeprom does not support klgraph */
714 if (IS_RUNNING_ON_FAKE_PROM())
715 return;
717 /* Find TIOs & headless/memoryless nodes and add them to the tables */
718 for_each_online_node(node) {
719 kl_config_hdr_t *klgraph_header;
720 nasid = cnodeid_to_nasid(node);
721 if ((klgraph_header = ia64_sn_get_klconfig_addr(nasid)) == NULL)
722 BUG();
723 brd = NODE_OFFSET_TO_LBOARD(nasid, klgraph_header->ch_board_info);
724 while (brd) {
725 if (board_needs_cnode(brd->brd_type) && physical_node_map[brd->brd_nasid] < 0) {
726 sn_cnodeid_to_nasid[num_cnodes] = brd->brd_nasid;
727 physical_node_map[brd->brd_nasid] = num_cnodes++;
729 brd = find_lboard_next(brd);
735 nasid_slice_to_cpuid(int nasid, int slice)
737 long cpu;
739 for (cpu=0; cpu < NR_CPUS; cpu++)
740 if (cpuid_to_nasid(cpu) == nasid &&
741 cpuid_to_slice(cpu) == slice)
742 return cpu;
744 return -1;
747 int sn_prom_feature_available(int id)
749 if (id >= BITS_PER_LONG * MAX_PROM_FEATURE_SETS)
750 return 0;
751 return test_bit(id, sn_prom_features);
753 EXPORT_SYMBOL(sn_prom_feature_available);