include/asm-sparc64/processor.h

   1 /* $Id: processor.h,v 1.83 2002/02/10 06:04:33 davem Exp $
   2  * include/asm-sparc64/processor.h
   3  *
   4  * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
   5  */
   6
   7 #ifndef __ASM_SPARC64_PROCESSOR_H
   8 #define __ASM_SPARC64_PROCESSOR_H
   9
  10 /*
  11  * Sparc64 implementation of macro that returns current
  12  * instruction pointer ("program counter").
  13  */
  14 #define current_text_addr() ({ void *pc; __asm__("rd %%pc, %0" : "=r" (pc)); pc; })
  15
  16 #include <linux/config.h>
  17 #include <asm/asi.h>
  18 #include <asm/a.out.h>
  19 #include <asm/pstate.h>
  20 #include <asm/ptrace.h>
  21 #include <asm/page.h>
  22
  23 /* The sparc has no problems with write protection */
  24 #define wp_works_ok 1
  25 #define wp_works_ok__is_a_macro /* for versions in ksyms.c */
  26
  27 /*
  28  * User lives in his very own context, and cannot reference us. Note
  29  * that TASK_SIZE is a misnomer, it really gives maximum user virtual
  30  * address that the kernel will allocate out.
  31  */
  32 #define VA_BITS         44
  33 #ifndef __ASSEMBLY__
  34 #define VPTE_SIZE       (1UL << (VA_BITS - PAGE_SHIFT + 3))
  35 #else
  36 #define VPTE_SIZE       (1 << (VA_BITS - PAGE_SHIFT + 3))
  37 #endif
  38 #define TASK_SIZE       ((unsigned long)-VPTE_SIZE)
  39
  40 /*
  41  * The vpte base must be able to hold the entire vpte, half
  42  * of which lives above, and half below, the base. And it
  43  * is placed as close to the highest address range as possible.
  44  */
  45 #define VPTE_BASE_SPITFIRE      (-(VPTE_SIZE/2))
  46 #if 1
  47 #define VPTE_BASE_CHEETAH       VPTE_BASE_SPITFIRE
  48 #else
  49 #define VPTE_BASE_CHEETAH       0xffe0000000000000
  50 #endif
  51
  52 #ifndef __ASSEMBLY__
  53
  54 typedef struct {
  55         unsigned char seg;
  56 } mm_segment_t;
  57
  58 /* The Sparc processor specific thread struct. */
  59 /* XXX This should die, everything can go into thread_info now. */
  60 struct thread_struct {
  61 #ifdef CONFIG_DEBUG_SPINLOCK
  62         /* How many spinlocks held by this thread.
  63          * Used with spin lock debugging to catch tasks
  64          * sleeping illegally with locks held.
  65          */
  66         int smp_lock_count;
  67         unsigned int smp_lock_pc;
  68 #else
  69         int dummy; /* f'in gcc bug... */
  70 #endif
  71 };
  72
  73 #endif /* !(__ASSEMBLY__) */
  74
  75 #ifndef CONFIG_DEBUG_SPINLOCK
  76 #define INIT_THREAD  {                  \
  77         0,                              \
  78 }
  79 #else /* CONFIG_DEBUG_SPINLOCK */
  80 #define INIT_THREAD  {                                  \
  81 /* smp_lock_count, smp_lock_pc, */                      \
  82    0,              0,                                   \
  83 }
  84 #endif /* !(CONFIG_DEBUG_SPINLOCK) */
  85
  86 #ifndef __ASSEMBLY__
  87
  88 #include <linux/types.h>
  89
  90 /* Return saved PC of a blocked thread. */
  91 struct task_struct;
  92 extern unsigned long thread_saved_pc(struct task_struct *);
  93
  94 /* On Uniprocessor, even in RMO processes see TSO semantics */
  95 #ifdef CONFIG_SMP
  96 #define TSTATE_INITIAL_MM       TSTATE_TSO
  97 #else
  98 #define TSTATE_INITIAL_MM       TSTATE_RMO
  99 #endif
 100
 101 /* Do necessary setup to start up a newly executed thread. */
 102 #define start_thread(regs, pc, sp) \
 103 do { \
 104         regs->tstate = (regs->tstate & (TSTATE_CWP)) | (TSTATE_INITIAL_MM|TSTATE_IE) | (ASI_PNF << 24); \
 105         regs->tpc = ((pc & (~3)) - 4); \
 106         regs->tnpc = regs->tpc + 4; \
 107         regs->y = 0; \
 108         set_thread_wstate(1 << 3); \
 109         if (current_thread_info()->utraps) { \
 110                 if (*(current_thread_info()->utraps) < 2) \
 111                         kfree(current_thread_info()->utraps); \
 112                 else \
 113                         (*(current_thread_info()->utraps))--; \
 114                 current_thread_info()->utraps = NULL; \
 115         } \
 116         __asm__ __volatile__( \
 117         "stx            %%g0, [%0 + %2 + 0x00]\n\t" \
 118         "stx            %%g0, [%0 + %2 + 0x08]\n\t" \
 119         "stx            %%g0, [%0 + %2 + 0x10]\n\t" \
 120         "stx            %%g0, [%0 + %2 + 0x18]\n\t" \
 121         "stx            %%g0, [%0 + %2 + 0x20]\n\t" \
 122         "stx            %%g0, [%0 + %2 + 0x28]\n\t" \
 123         "stx            %%g0, [%0 + %2 + 0x30]\n\t" \
 124         "stx            %%g0, [%0 + %2 + 0x38]\n\t" \
 125         "stx            %%g0, [%0 + %2 + 0x40]\n\t" \
 126         "stx            %%g0, [%0 + %2 + 0x48]\n\t" \
 127         "stx            %%g0, [%0 + %2 + 0x50]\n\t" \
 128         "stx            %%g0, [%0 + %2 + 0x58]\n\t" \
 129         "stx            %%g0, [%0 + %2 + 0x60]\n\t" \
 130         "stx            %%g0, [%0 + %2 + 0x68]\n\t" \
 131         "stx            %1,   [%0 + %2 + 0x70]\n\t" \
 132         "stx            %%g0, [%0 + %2 + 0x78]\n\t" \
 133         "wrpr           %%g0, (1 << 3), %%wstate\n\t" \
 134         : \
 135         : "r" (regs), "r" (sp - sizeof(struct reg_window) - STACK_BIAS), \
 136           "i" ((const unsigned long)(&((struct pt_regs *)0)->u_regs[0]))); \
 137 } while (0)
 138
 139 #define start_thread32(regs, pc, sp) \
 140 do { \
 141         pc &= 0x00000000ffffffffUL; \
 142         sp &= 0x00000000ffffffffUL; \
 143 \
 144         regs->tstate = (regs->tstate & (TSTATE_CWP))|(TSTATE_INITIAL_MM|TSTATE_IE|TSTATE_AM); \
 145         regs->tpc = ((pc & (~3)) - 4); \
 146         regs->tnpc = regs->tpc + 4; \
 147         regs->y = 0; \
 148         set_thread_wstate(2 << 3); \
 149         if (current_thread_info()->utraps) { \
 150                 if (*(current_thread_info()->utraps) < 2) \
 151                         kfree(current_thread_info()->utraps); \
 152                 else \
 153                         (*(current_thread_info()->utraps))--; \
 154                 current_thread_info()->utraps = NULL; \
 155         } \
 156         __asm__ __volatile__( \
 157         "stx            %%g0, [%0 + %2 + 0x00]\n\t" \
 158         "stx            %%g0, [%0 + %2 + 0x08]\n\t" \
 159         "stx            %%g0, [%0 + %2 + 0x10]\n\t" \
 160         "stx            %%g0, [%0 + %2 + 0x18]\n\t" \
 161         "stx            %%g0, [%0 + %2 + 0x20]\n\t" \
 162         "stx            %%g0, [%0 + %2 + 0x28]\n\t" \
 163         "stx            %%g0, [%0 + %2 + 0x30]\n\t" \
 164         "stx            %%g0, [%0 + %2 + 0x38]\n\t" \
 165         "stx            %%g0, [%0 + %2 + 0x40]\n\t" \
 166         "stx            %%g0, [%0 + %2 + 0x48]\n\t" \
 167         "stx            %%g0, [%0 + %2 + 0x50]\n\t" \
 168         "stx            %%g0, [%0 + %2 + 0x58]\n\t" \
 169         "stx            %%g0, [%0 + %2 + 0x60]\n\t" \
 170         "stx            %%g0, [%0 + %2 + 0x68]\n\t" \
 171         "stx            %1,   [%0 + %2 + 0x70]\n\t" \
 172         "stx            %%g0, [%0 + %2 + 0x78]\n\t" \
 173         "wrpr           %%g0, (2 << 3), %%wstate\n\t" \
 174         : \
 175         : "r" (regs), "r" (sp - sizeof(struct reg_window32)), \
 176           "i" ((const unsigned long)(&((struct pt_regs *)0)->u_regs[0]))); \
 177 } while (0)
 178
 179 /* Free all resources held by a thread. */
 180 #define release_thread(tsk)             do { } while (0)
 181
 182 /* Prepare to copy thread state - unlazy all lazy status */
 183 #define prepare_to_copy(tsk)    do { } while (0)
 184
 185 extern pid_t kernel_thread(int (*fn)(void *), void * arg, unsigned long flags);
 186
 187 extern unsigned long get_wchan(struct task_struct *task);
 188
 189 #define task_pt_regs(tsk) (task_thread_info(tsk)->kregs)
 190 #define KSTK_EIP(tsk)  (task_pt_regs(tsk)->tpc)
 191 #define KSTK_ESP(tsk)  (task_pt_regs(tsk)->u_regs[UREG_FP])
 192
 193 #define cpu_relax()     barrier()
 194
 195 /* Prefetch support.  This is tuned for UltraSPARC-III and later.
 196  * UltraSPARC-I will treat these as nops, and UltraSPARC-II has
 197  * a shallower prefetch queue than later chips.
 198  */
 199 #define ARCH_HAS_PREFETCH
 200 #define ARCH_HAS_PREFETCHW
 201 #define ARCH_HAS_SPINLOCK_PREFETCH
 202
 203 static inline void prefetch(const void *x)
 204 {
 205         /* We do not use the read prefetch mnemonic because that
 206          * prefetches into the prefetch-cache which only is accessible
 207          * by floating point operations in UltraSPARC-III and later.
 208          * By contrast, "#one_write" prefetches into the L2 cache
 209          * in shared state.
 210          */
 211         __asm__ __volatile__("prefetch [%0], #one_write"
 212                              : /* no outputs */
 213                              : "r" (x));
 214 }
 215
 216 static inline void prefetchw(const void *x)
 217 {
 218         /* The most optimal prefetch to use for writes is
 219          * "#n_writes".  This brings the cacheline into the
 220          * L2 cache in "owned" state.
 221          */
 222         __asm__ __volatile__("prefetch [%0], #n_writes"
 223                              : /* no outputs */
 224                              : "r" (x));
 225 }
 226
 227 #define spin_lock_prefetch(x)   prefetchw(x)
 228
 229 #endif /* !(__ASSEMBLY__) */
 230
 231 #endif /* !(__ASM_SPARC64_PROCESSOR_H) */