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stmmac: reorganise class operations.
[linux-2.6/x86.git] / drivers / hwmon / w83627ehf.c
blob0dcaba9b7189c26cd242a2acfb72804e083a7f70
1 /*
2 w83627ehf - Driver for the hardware monitoring functionality of
3 the Winbond W83627EHF Super-I/O chip
4 Copyright (C) 2005 Jean Delvare <khali@linux-fr.org>
5 Copyright (C) 2006 Yuan Mu (Winbond),
6 Rudolf Marek <r.marek@assembler.cz>
7 David Hubbard <david.c.hubbard@gmail.com>
8 Daniel J Blueman <daniel.blueman@gmail.com>
9
10 Shamelessly ripped from the w83627hf driver
11 Copyright (C) 2003 Mark Studebaker
12
13 Thanks to Leon Moonen, Steve Cliffe and Grant Coady for their help
14 in testing and debugging this driver.
15
16 This driver also supports the W83627EHG, which is the lead-free
17 version of the W83627EHF.
18
19 This program is free software; you can redistribute it and/or modify
20 it under the terms of the GNU General Public License as published by
21 the Free Software Foundation; either version 2 of the License, or
22 (at your option) any later version.
23
24 This program is distributed in the hope that it will be useful,
25 but WITHOUT ANY WARRANTY; without even the implied warranty of
26 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
27 GNU General Public License for more details.
28
29 You should have received a copy of the GNU General Public License
30 along with this program; if not, write to the Free Software
31 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
32
33
34 Supports the following chips:
35
36 Chip #vin #fan #pwm #temp chip IDs man ID
37 w83627ehf 10 5 4 3 0x8850 0x88 0x5ca3
38 0x8860 0xa1
39 w83627dhg 9 5 4 3 0xa020 0xc1 0x5ca3
40 w83627dhg-p 9 5 4 3 0xb070 0xc1 0x5ca3
41 w83667hg 9 5 3 3 0xa510 0xc1 0x5ca3
42 */
43
44 #include <linux/module.h>
45 #include <linux/init.h>
46 #include <linux/slab.h>
47 #include <linux/jiffies.h>
48 #include <linux/platform_device.h>
49 #include <linux/hwmon.h>
50 #include <linux/hwmon-sysfs.h>
51 #include <linux/hwmon-vid.h>
52 #include <linux/err.h>
53 #include <linux/mutex.h>
54 #include <linux/acpi.h>
55 #include <linux/io.h>
56 #include "lm75.h"
57
58 enum kinds { w83627ehf, w83627dhg, w83627dhg_p, w83667hg };
59
60 /* used to set data->name = w83627ehf_device_names[data->sio_kind] */
61 static const char * w83627ehf_device_names[] = {
62 "w83627ehf",
63 "w83627dhg",
64 "w83627dhg",
65 "w83667hg",
66 };
67
68 static unsigned short force_id;
69 module_param(force_id, ushort, 0);
70 MODULE_PARM_DESC(force_id, "Override the detected device ID");
71
72 #define DRVNAME "w83627ehf"
73
74 /*
75 * Super-I/O constants and functions
76 */
77
78 #define W83627EHF_LD_HWM 0x0b
79 #define W83667HG_LD_VID 0x0d
80
81 #define SIO_REG_LDSEL 0x07 /* Logical device select */
82 #define SIO_REG_DEVID 0x20 /* Device ID (2 bytes) */
83 #define SIO_REG_EN_VRM10 0x2C /* GPIO3, GPIO4 selection */
84 #define SIO_REG_ENABLE 0x30 /* Logical device enable */
85 #define SIO_REG_ADDR 0x60 /* Logical device address (2 bytes) */
86 #define SIO_REG_VID_CTRL 0xF0 /* VID control */
87 #define SIO_REG_VID_DATA 0xF1 /* VID data */
88
89 #define SIO_W83627EHF_ID 0x8850
90 #define SIO_W83627EHG_ID 0x8860
91 #define SIO_W83627DHG_ID 0xa020
92 #define SIO_W83627DHG_P_ID 0xb070
93 #define SIO_W83667HG_ID 0xa510
94 #define SIO_ID_MASK 0xFFF0
95
96 static inline void
97 superio_outb(int ioreg, int reg, int val)
98 {
99 outb(reg, ioreg);
100 outb(val, ioreg + 1);
101 }
102
103 static inline int
104 superio_inb(int ioreg, int reg)
105 {
106 outb(reg, ioreg);
107 return inb(ioreg + 1);
108 }
109
110 static inline void
111 superio_select(int ioreg, int ld)
112 {
113 outb(SIO_REG_LDSEL, ioreg);
114 outb(ld, ioreg + 1);
115 }
116
117 static inline void
118 superio_enter(int ioreg)
119 {
120 outb(0x87, ioreg);
121 outb(0x87, ioreg);
122 }
123
124 static inline void
125 superio_exit(int ioreg)
126 {
127 outb(0x02, ioreg);
128 outb(0x02, ioreg + 1);
129 }
130
131 /*
132 * ISA constants
133 */
134
135 #define IOREGION_ALIGNMENT ~7
136 #define IOREGION_OFFSET 5
137 #define IOREGION_LENGTH 2
138 #define ADDR_REG_OFFSET 0
139 #define DATA_REG_OFFSET 1
140
141 #define W83627EHF_REG_BANK 0x4E
142 #define W83627EHF_REG_CONFIG 0x40
143
144 /* Not currently used:
145 * REG_MAN_ID has the value 0x5ca3 for all supported chips.
146 * REG_CHIP_ID == 0x88/0xa1/0xc1 depending on chip model.
147 * REG_MAN_ID is at port 0x4f
148 * REG_CHIP_ID is at port 0x58 */
149
150 static const u16 W83627EHF_REG_FAN[] = { 0x28, 0x29, 0x2a, 0x3f, 0x553 };
151 static const u16 W83627EHF_REG_FAN_MIN[] = { 0x3b, 0x3c, 0x3d, 0x3e, 0x55c };
152
153 /* The W83627EHF registers for nr=7,8,9 are in bank 5 */
154 #define W83627EHF_REG_IN_MAX(nr) ((nr < 7) ? (0x2b + (nr) * 2) : \
155 (0x554 + (((nr) - 7) * 2)))
156 #define W83627EHF_REG_IN_MIN(nr) ((nr < 7) ? (0x2c + (nr) * 2) : \
157 (0x555 + (((nr) - 7) * 2)))
158 #define W83627EHF_REG_IN(nr) ((nr < 7) ? (0x20 + (nr)) : \
159 (0x550 + (nr) - 7))
160
161 #define W83627EHF_REG_TEMP1 0x27
162 #define W83627EHF_REG_TEMP1_HYST 0x3a
163 #define W83627EHF_REG_TEMP1_OVER 0x39
164 static const u16 W83627EHF_REG_TEMP[] = { 0x150, 0x250 };
165 static const u16 W83627EHF_REG_TEMP_HYST[] = { 0x153, 0x253 };
166 static const u16 W83627EHF_REG_TEMP_OVER[] = { 0x155, 0x255 };
167 static const u16 W83627EHF_REG_TEMP_CONFIG[] = { 0x152, 0x252 };
168
169 /* Fan clock dividers are spread over the following five registers */
170 #define W83627EHF_REG_FANDIV1 0x47
171 #define W83627EHF_REG_FANDIV2 0x4B
172 #define W83627EHF_REG_VBAT 0x5D
173 #define W83627EHF_REG_DIODE 0x59
174 #define W83627EHF_REG_SMI_OVT 0x4C
175
176 #define W83627EHF_REG_ALARM1 0x459
177 #define W83627EHF_REG_ALARM2 0x45A
178 #define W83627EHF_REG_ALARM3 0x45B
179
180 /* SmartFan registers */
181 #define W83627EHF_REG_FAN_STEPUP_TIME 0x0f
182 #define W83627EHF_REG_FAN_STEPDOWN_TIME 0x0e
183
184 /* DC or PWM output fan configuration */
185 static const u8 W83627EHF_REG_PWM_ENABLE[] = {
186 0x04, /* SYS FAN0 output mode and PWM mode */
187 0x04, /* CPU FAN0 output mode and PWM mode */
188 0x12, /* AUX FAN mode */
189 0x62, /* CPU FAN1 mode */
190 };
191
192 static const u8 W83627EHF_PWM_MODE_SHIFT[] = { 0, 1, 0, 6 };
193 static const u8 W83627EHF_PWM_ENABLE_SHIFT[] = { 2, 4, 1, 4 };
194
195 /* FAN Duty Cycle, be used to control */
196 static const u8 W83627EHF_REG_PWM[] = { 0x01, 0x03, 0x11, 0x61 };
197 static const u8 W83627EHF_REG_TARGET[] = { 0x05, 0x06, 0x13, 0x63 };
198 static const u8 W83627EHF_REG_TOLERANCE[] = { 0x07, 0x07, 0x14, 0x62 };
199
200 /* Advanced Fan control, some values are common for all fans */
201 static const u8 W83627EHF_REG_FAN_START_OUTPUT[] = { 0x0a, 0x0b, 0x16, 0x65 };
202 static const u8 W83627EHF_REG_FAN_STOP_OUTPUT[] = { 0x08, 0x09, 0x15, 0x64 };
203 static const u8 W83627EHF_REG_FAN_STOP_TIME[] = { 0x0c, 0x0d, 0x17, 0x66 };
204 static const u8 W83627EHF_REG_FAN_MAX_OUTPUT[] = { 0xff, 0x67, 0xff, 0x69 };
205 static const u8 W83627EHF_REG_FAN_STEP_OUTPUT[] = { 0xff, 0x68, 0xff, 0x6a };
206
207 /*
208 * Conversions
209 */
210
211 /* 1 is PWM mode, output in ms */
212 static inline unsigned int step_time_from_reg(u8 reg, u8 mode)
213 {
214 return mode ? 100 * reg : 400 * reg;
215 }
216
217 static inline u8 step_time_to_reg(unsigned int msec, u8 mode)
218 {
219 return SENSORS_LIMIT((mode ? (msec + 50) / 100 :
220 (msec + 200) / 400), 1, 255);
221 }
222
223 static inline unsigned int
224 fan_from_reg(u8 reg, unsigned int div)
225 {
226 if (reg == 0 || reg == 255)
227 return 0;
228 return 1350000U / (reg * div);
229 }
230
231 static inline unsigned int
232 div_from_reg(u8 reg)
233 {
234 return 1 << reg;
235 }
236
237 static inline int
238 temp1_from_reg(s8 reg)
239 {
240 return reg * 1000;
241 }
242
243 static inline s8
244 temp1_to_reg(long temp, int min, int max)
245 {
246 if (temp <= min)
247 return min / 1000;
248 if (temp >= max)
249 return max / 1000;
250 if (temp < 0)
251 return (temp - 500) / 1000;
252 return (temp + 500) / 1000;
253 }
254
255 /* Some of analog inputs have internal scaling (2x), 8mV is ADC LSB */
256
257 static u8 scale_in[10] = { 8, 8, 16, 16, 8, 8, 8, 16, 16, 8 };
258
259 static inline long in_from_reg(u8 reg, u8 nr)
260 {
261 return reg * scale_in[nr];
262 }
263
264 static inline u8 in_to_reg(u32 val, u8 nr)
265 {
266 return SENSORS_LIMIT(((val + (scale_in[nr] / 2)) / scale_in[nr]), 0, 255);
267 }
268
269 /*
270 * Data structures and manipulation thereof
271 */
272
273 struct w83627ehf_data {
274 int addr; /* IO base of hw monitor block */
275 const char *name;
276
277 struct device *hwmon_dev;
278 struct mutex lock;
279
280 struct mutex update_lock;
281 char valid; /* !=0 if following fields are valid */
282 unsigned long last_updated; /* In jiffies */
283
284 /* Register values */
285 u8 in_num; /* number of in inputs we have */
286 u8 in[10]; /* Register value */
287 u8 in_max[10]; /* Register value */
288 u8 in_min[10]; /* Register value */
289 u8 fan[5];
290 u8 fan_min[5];
291 u8 fan_div[5];
292 u8 has_fan; /* some fan inputs can be disabled */
293 u8 temp_type[3];
294 s8 temp1;
295 s8 temp1_max;
296 s8 temp1_max_hyst;
297 s16 temp[2];
298 s16 temp_max[2];
299 s16 temp_max_hyst[2];
300 u32 alarms;
301
302 u8 pwm_mode[4]; /* 0->DC variable voltage, 1->PWM variable duty cycle */
303 u8 pwm_enable[4]; /* 1->manual
304 2->thermal cruise mode (also called SmartFan I)
305 3->fan speed cruise mode
306 4->variable thermal cruise (also called SmartFan III) */
307 u8 pwm_num; /* number of pwm */
308 u8 pwm[4];
309 u8 target_temp[4];
310 u8 tolerance[4];
311
312 u8 fan_start_output[4]; /* minimum fan speed when spinning up */
313 u8 fan_stop_output[4]; /* minimum fan speed when spinning down */
314 u8 fan_stop_time[4]; /* time at minimum before disabling fan */
315 u8 fan_max_output[4]; /* maximum fan speed */
316 u8 fan_step_output[4]; /* rate of change output value */
317
318 u8 vid;
319 u8 vrm;
320
321 u8 temp3_disable;
322 u8 in6_skip;
323 };
324
325 struct w83627ehf_sio_data {
326 int sioreg;
327 enum kinds kind;
328 };
329
330 static inline int is_word_sized(u16 reg)
331 {
332 return (((reg & 0xff00) == 0x100
333 || (reg & 0xff00) == 0x200)
334 && ((reg & 0x00ff) == 0x50
335 || (reg & 0x00ff) == 0x53
336 || (reg & 0x00ff) == 0x55));
337 }
338
339 /* Registers 0x50-0x5f are banked */
340 static inline void w83627ehf_set_bank(struct w83627ehf_data *data, u16 reg)
341 {
342 if ((reg & 0x00f0) == 0x50) {
343 outb_p(W83627EHF_REG_BANK, data->addr + ADDR_REG_OFFSET);
344 outb_p(reg >> 8, data->addr + DATA_REG_OFFSET);
345 }
346 }
347
348 /* Not strictly necessary, but play it safe for now */
349 static inline void w83627ehf_reset_bank(struct w83627ehf_data *data, u16 reg)
350 {
351 if (reg & 0xff00) {
352 outb_p(W83627EHF_REG_BANK, data->addr + ADDR_REG_OFFSET);
353 outb_p(0, data->addr + DATA_REG_OFFSET);
354 }
355 }
356
357 static u16 w83627ehf_read_value(struct w83627ehf_data *data, u16 reg)
358 {
359 int res, word_sized = is_word_sized(reg);
360
361 mutex_lock(&data->lock);
362
363 w83627ehf_set_bank(data, reg);
364 outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
365 res = inb_p(data->addr + DATA_REG_OFFSET);
366 if (word_sized) {
367 outb_p((reg & 0xff) + 1,
368 data->addr + ADDR_REG_OFFSET);
369 res = (res << 8) + inb_p(data->addr + DATA_REG_OFFSET);
370 }
371 w83627ehf_reset_bank(data, reg);
372
373 mutex_unlock(&data->lock);
374
375 return res;
376 }
377
378 static int w83627ehf_write_value(struct w83627ehf_data *data, u16 reg, u16 value)
379 {
380 int word_sized = is_word_sized(reg);
381
382 mutex_lock(&data->lock);
383
384 w83627ehf_set_bank(data, reg);
385 outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
386 if (word_sized) {
387 outb_p(value >> 8, data->addr + DATA_REG_OFFSET);
388 outb_p((reg & 0xff) + 1,
389 data->addr + ADDR_REG_OFFSET);
390 }
391 outb_p(value & 0xff, data->addr + DATA_REG_OFFSET);
392 w83627ehf_reset_bank(data, reg);
393
394 mutex_unlock(&data->lock);
395 return 0;
396 }
397
398 /* This function assumes that the caller holds data->update_lock */
399 static void w83627ehf_write_fan_div(struct w83627ehf_data *data, int nr)
400 {
401 u8 reg;
402
403 switch (nr) {
404 case 0:
405 reg = (w83627ehf_read_value(data, W83627EHF_REG_FANDIV1) & 0xcf)
406 | ((data->fan_div[0] & 0x03) << 4);
407 /* fan5 input control bit is write only, compute the value */
408 reg |= (data->has_fan & (1 << 4)) ? 1 : 0;
409 w83627ehf_write_value(data, W83627EHF_REG_FANDIV1, reg);
410 reg = (w83627ehf_read_value(data, W83627EHF_REG_VBAT) & 0xdf)
411 | ((data->fan_div[0] & 0x04) << 3);
412 w83627ehf_write_value(data, W83627EHF_REG_VBAT, reg);
413 break;
414 case 1:
415 reg = (w83627ehf_read_value(data, W83627EHF_REG_FANDIV1) & 0x3f)
416 | ((data->fan_div[1] & 0x03) << 6);
417 /* fan5 input control bit is write only, compute the value */
418 reg |= (data->has_fan & (1 << 4)) ? 1 : 0;
419 w83627ehf_write_value(data, W83627EHF_REG_FANDIV1, reg);
420 reg = (w83627ehf_read_value(data, W83627EHF_REG_VBAT) & 0xbf)
421 | ((data->fan_div[1] & 0x04) << 4);
422 w83627ehf_write_value(data, W83627EHF_REG_VBAT, reg);
423 break;
424 case 2:
425 reg = (w83627ehf_read_value(data, W83627EHF_REG_FANDIV2) & 0x3f)
426 | ((data->fan_div[2] & 0x03) << 6);
427 w83627ehf_write_value(data, W83627EHF_REG_FANDIV2, reg);
428 reg = (w83627ehf_read_value(data, W83627EHF_REG_VBAT) & 0x7f)
429 | ((data->fan_div[2] & 0x04) << 5);
430 w83627ehf_write_value(data, W83627EHF_REG_VBAT, reg);
431 break;
432 case 3:
433 reg = (w83627ehf_read_value(data, W83627EHF_REG_DIODE) & 0xfc)
434 | (data->fan_div[3] & 0x03);
435 w83627ehf_write_value(data, W83627EHF_REG_DIODE, reg);
436 reg = (w83627ehf_read_value(data, W83627EHF_REG_SMI_OVT) & 0x7f)
437 | ((data->fan_div[3] & 0x04) << 5);
438 w83627ehf_write_value(data, W83627EHF_REG_SMI_OVT, reg);
439 break;
440 case 4:
441 reg = (w83627ehf_read_value(data, W83627EHF_REG_DIODE) & 0x73)
442 | ((data->fan_div[4] & 0x03) << 2)
443 | ((data->fan_div[4] & 0x04) << 5);
444 w83627ehf_write_value(data, W83627EHF_REG_DIODE, reg);
445 break;
446 }
447 }
448
449 static void w83627ehf_update_fan_div(struct w83627ehf_data *data)
450 {
451 int i;
452
453 i = w83627ehf_read_value(data, W83627EHF_REG_FANDIV1);
454 data->fan_div[0] = (i >> 4) & 0x03;
455 data->fan_div[1] = (i >> 6) & 0x03;
456 i = w83627ehf_read_value(data, W83627EHF_REG_FANDIV2);
457 data->fan_div[2] = (i >> 6) & 0x03;
458 i = w83627ehf_read_value(data, W83627EHF_REG_VBAT);
459 data->fan_div[0] |= (i >> 3) & 0x04;
460 data->fan_div[1] |= (i >> 4) & 0x04;
461 data->fan_div[2] |= (i >> 5) & 0x04;
462 if (data->has_fan & ((1 << 3) | (1 << 4))) {
463 i = w83627ehf_read_value(data, W83627EHF_REG_DIODE);
464 data->fan_div[3] = i & 0x03;
465 data->fan_div[4] = ((i >> 2) & 0x03)
466 | ((i >> 5) & 0x04);
467 }
468 if (data->has_fan & (1 << 3)) {
469 i = w83627ehf_read_value(data, W83627EHF_REG_SMI_OVT);
470 data->fan_div[3] |= (i >> 5) & 0x04;
471 }
472 }
473
474 static struct w83627ehf_data *w83627ehf_update_device(struct device *dev)
475 {
476 struct w83627ehf_data *data = dev_get_drvdata(dev);
477 int pwmcfg = 0, tolerance = 0; /* shut up the compiler */
478 int i;
479
480 mutex_lock(&data->update_lock);
481
482 if (time_after(jiffies, data->last_updated + HZ + HZ/2)
483 || !data->valid) {
484 /* Fan clock dividers */
485 w83627ehf_update_fan_div(data);
486
487 /* Measured voltages and limits */
488 for (i = 0; i < data->in_num; i++) {
489 data->in[i] = w83627ehf_read_value(data,
490 W83627EHF_REG_IN(i));
491 data->in_min[i] = w83627ehf_read_value(data,
492 W83627EHF_REG_IN_MIN(i));
493 data->in_max[i] = w83627ehf_read_value(data,
494 W83627EHF_REG_IN_MAX(i));
495 }
496
497 /* Measured fan speeds and limits */
498 for (i = 0; i < 5; i++) {
499 if (!(data->has_fan & (1 << i)))
500 continue;
501
502 data->fan[i] = w83627ehf_read_value(data,
503 W83627EHF_REG_FAN[i]);
504 data->fan_min[i] = w83627ehf_read_value(data,
505 W83627EHF_REG_FAN_MIN[i]);
506
507 /* If we failed to measure the fan speed and clock
508 divider can be increased, let's try that for next
509 time */
510 if (data->fan[i] == 0xff
511 && data->fan_div[i] < 0x07) {
512 dev_dbg(dev, "Increasing fan%d "
513 "clock divider from %u to %u\n",
514 i + 1, div_from_reg(data->fan_div[i]),
515 div_from_reg(data->fan_div[i] + 1));
516 data->fan_div[i]++;
517 w83627ehf_write_fan_div(data, i);
518 /* Preserve min limit if possible */
519 if (data->fan_min[i] >= 2
520 && data->fan_min[i] != 255)
521 w83627ehf_write_value(data,
522 W83627EHF_REG_FAN_MIN[i],
523 (data->fan_min[i] /= 2));
524 }
525 }
526
527 for (i = 0; i < 4; i++) {
528 /* pwmcfg, tolerance mapped for i=0, i=1 to same reg */
529 if (i != 1) {
530 pwmcfg = w83627ehf_read_value(data,
531 W83627EHF_REG_PWM_ENABLE[i]);
532 tolerance = w83627ehf_read_value(data,
533 W83627EHF_REG_TOLERANCE[i]);
534 }
535 data->pwm_mode[i] =
536 ((pwmcfg >> W83627EHF_PWM_MODE_SHIFT[i]) & 1)
537 ? 0 : 1;
538 data->pwm_enable[i] =
539 ((pwmcfg >> W83627EHF_PWM_ENABLE_SHIFT[i])
540 & 3) + 1;
541 data->pwm[i] = w83627ehf_read_value(data,
542 W83627EHF_REG_PWM[i]);
543 data->fan_start_output[i] = w83627ehf_read_value(data,
544 W83627EHF_REG_FAN_START_OUTPUT[i]);
545 data->fan_stop_output[i] = w83627ehf_read_value(data,
546 W83627EHF_REG_FAN_STOP_OUTPUT[i]);
547 data->fan_stop_time[i] = w83627ehf_read_value(data,
548 W83627EHF_REG_FAN_STOP_TIME[i]);
549 data->target_temp[i] =
550 w83627ehf_read_value(data,
551 W83627EHF_REG_TARGET[i]) &
552 (data->pwm_mode[i] == 1 ? 0x7f : 0xff);
553 data->tolerance[i] = (tolerance >> (i == 1 ? 4 : 0))
554 & 0x0f;
555 }
556
557 /* Measured temperatures and limits */
558 data->temp1 = w83627ehf_read_value(data,
559 W83627EHF_REG_TEMP1);
560 data->temp1_max = w83627ehf_read_value(data,
561 W83627EHF_REG_TEMP1_OVER);
562 data->temp1_max_hyst = w83627ehf_read_value(data,
563 W83627EHF_REG_TEMP1_HYST);
564 for (i = 0; i < 2; i++) {
565 data->temp[i] = w83627ehf_read_value(data,
566 W83627EHF_REG_TEMP[i]);
567 data->temp_max[i] = w83627ehf_read_value(data,
568 W83627EHF_REG_TEMP_OVER[i]);
569 data->temp_max_hyst[i] = w83627ehf_read_value(data,
570 W83627EHF_REG_TEMP_HYST[i]);
571 }
572
573 data->alarms = w83627ehf_read_value(data,
574 W83627EHF_REG_ALARM1) |
575 (w83627ehf_read_value(data,
576 W83627EHF_REG_ALARM2) << 8) |
577 (w83627ehf_read_value(data,
578 W83627EHF_REG_ALARM3) << 16);
579
580 data->last_updated = jiffies;
581 data->valid = 1;
582 }
583
584 mutex_unlock(&data->update_lock);
585 return data;
586 }
587
588 /*
589 * Sysfs callback functions
590 */
591 #define show_in_reg(reg) \
592 static ssize_t \
593 show_##reg(struct device *dev, struct device_attribute *attr, \
594 char *buf) \
595 { \
596 struct w83627ehf_data *data = w83627ehf_update_device(dev); \
597 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
598 int nr = sensor_attr->index; \
599 return sprintf(buf, "%ld\n", in_from_reg(data->reg[nr], nr)); \
600 }
601 show_in_reg(in)
602 show_in_reg(in_min)
603 show_in_reg(in_max)
604
605 #define store_in_reg(REG, reg) \
606 static ssize_t \
607 store_in_##reg (struct device *dev, struct device_attribute *attr, \
608 const char *buf, size_t count) \
609 { \
610 struct w83627ehf_data *data = dev_get_drvdata(dev); \
611 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
612 int nr = sensor_attr->index; \
613 u32 val = simple_strtoul(buf, NULL, 10); \
614 \
615 mutex_lock(&data->update_lock); \
616 data->in_##reg[nr] = in_to_reg(val, nr); \
617 w83627ehf_write_value(data, W83627EHF_REG_IN_##REG(nr), \
618 data->in_##reg[nr]); \
619 mutex_unlock(&data->update_lock); \
620 return count; \
621 }
622
623 store_in_reg(MIN, min)
624 store_in_reg(MAX, max)
625
626 static ssize_t show_alarm(struct device *dev, struct device_attribute *attr, char *buf)
627 {
628 struct w83627ehf_data *data = w83627ehf_update_device(dev);
629 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
630 int nr = sensor_attr->index;
631 return sprintf(buf, "%u\n", (data->alarms >> nr) & 0x01);
632 }
633
634 static struct sensor_device_attribute sda_in_input[] = {
635 SENSOR_ATTR(in0_input, S_IRUGO, show_in, NULL, 0),
636 SENSOR_ATTR(in1_input, S_IRUGO, show_in, NULL, 1),
637 SENSOR_ATTR(in2_input, S_IRUGO, show_in, NULL, 2),
638 SENSOR_ATTR(in3_input, S_IRUGO, show_in, NULL, 3),
639 SENSOR_ATTR(in4_input, S_IRUGO, show_in, NULL, 4),
640 SENSOR_ATTR(in5_input, S_IRUGO, show_in, NULL, 5),
641 SENSOR_ATTR(in6_input, S_IRUGO, show_in, NULL, 6),
642 SENSOR_ATTR(in7_input, S_IRUGO, show_in, NULL, 7),
643 SENSOR_ATTR(in8_input, S_IRUGO, show_in, NULL, 8),
644 SENSOR_ATTR(in9_input, S_IRUGO, show_in, NULL, 9),
645 };
646
647 static struct sensor_device_attribute sda_in_alarm[] = {
648 SENSOR_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 0),
649 SENSOR_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 1),
650 SENSOR_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 2),
651 SENSOR_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 3),
652 SENSOR_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 8),
653 SENSOR_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 21),
654 SENSOR_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 20),
655 SENSOR_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 16),
656 SENSOR_ATTR(in8_alarm, S_IRUGO, show_alarm, NULL, 17),
657 SENSOR_ATTR(in9_alarm, S_IRUGO, show_alarm, NULL, 19),
658 };
659
660 static struct sensor_device_attribute sda_in_min[] = {
661 SENSOR_ATTR(in0_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 0),
662 SENSOR_ATTR(in1_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 1),
663 SENSOR_ATTR(in2_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 2),
664 SENSOR_ATTR(in3_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 3),
665 SENSOR_ATTR(in4_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 4),
666 SENSOR_ATTR(in5_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 5),
667 SENSOR_ATTR(in6_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 6),
668 SENSOR_ATTR(in7_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 7),
669 SENSOR_ATTR(in8_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 8),
670 SENSOR_ATTR(in9_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 9),
671 };
672
673 static struct sensor_device_attribute sda_in_max[] = {
674 SENSOR_ATTR(in0_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 0),
675 SENSOR_ATTR(in1_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 1),
676 SENSOR_ATTR(in2_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 2),
677 SENSOR_ATTR(in3_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 3),
678 SENSOR_ATTR(in4_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 4),
679 SENSOR_ATTR(in5_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 5),
680 SENSOR_ATTR(in6_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 6),
681 SENSOR_ATTR(in7_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 7),
682 SENSOR_ATTR(in8_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 8),
683 SENSOR_ATTR(in9_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 9),
684 };
685
686 #define show_fan_reg(reg) \
687 static ssize_t \
688 show_##reg(struct device *dev, struct device_attribute *attr, \
689 char *buf) \
690 { \
691 struct w83627ehf_data *data = w83627ehf_update_device(dev); \
692 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
693 int nr = sensor_attr->index; \
694 return sprintf(buf, "%d\n", \
695 fan_from_reg(data->reg[nr], \
696 div_from_reg(data->fan_div[nr]))); \
697 }
698 show_fan_reg(fan);
699 show_fan_reg(fan_min);
700
701 static ssize_t
702 show_fan_div(struct device *dev, struct device_attribute *attr,
703 char *buf)
704 {
705 struct w83627ehf_data *data = w83627ehf_update_device(dev);
706 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
707 int nr = sensor_attr->index;
708 return sprintf(buf, "%u\n", div_from_reg(data->fan_div[nr]));
709 }
710
711 static ssize_t
712 store_fan_min(struct device *dev, struct device_attribute *attr,
713 const char *buf, size_t count)
714 {
715 struct w83627ehf_data *data = dev_get_drvdata(dev);
716 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
717 int nr = sensor_attr->index;
718 unsigned int val = simple_strtoul(buf, NULL, 10);
719 unsigned int reg;
720 u8 new_div;
721
722 mutex_lock(&data->update_lock);
723 if (!val) {
724 /* No min limit, alarm disabled */
725 data->fan_min[nr] = 255;
726 new_div = data->fan_div[nr]; /* No change */
727 dev_info(dev, "fan%u low limit and alarm disabled\n", nr + 1);
728 } else if ((reg = 1350000U / val) >= 128 * 255) {
729 /* Speed below this value cannot possibly be represented,
730 even with the highest divider (128) */
731 data->fan_min[nr] = 254;
732 new_div = 7; /* 128 == (1 << 7) */
733 dev_warn(dev, "fan%u low limit %u below minimum %u, set to "
734 "minimum\n", nr + 1, val, fan_from_reg(254, 128));
735 } else if (!reg) {
736 /* Speed above this value cannot possibly be represented,
737 even with the lowest divider (1) */
738 data->fan_min[nr] = 1;
739 new_div = 0; /* 1 == (1 << 0) */
740 dev_warn(dev, "fan%u low limit %u above maximum %u, set to "
741 "maximum\n", nr + 1, val, fan_from_reg(1, 1));
742 } else {
743 /* Automatically pick the best divider, i.e. the one such
744 that the min limit will correspond to a register value
745 in the 96..192 range */
746 new_div = 0;
747 while (reg > 192 && new_div < 7) {
748 reg >>= 1;
749 new_div++;
750 }
751 data->fan_min[nr] = reg;
752 }
753
754 /* Write both the fan clock divider (if it changed) and the new
755 fan min (unconditionally) */
756 if (new_div != data->fan_div[nr]) {
757 /* Preserve the fan speed reading */
758 if (data->fan[nr] != 0xff) {
759 if (new_div > data->fan_div[nr])
760 data->fan[nr] >>= new_div - data->fan_div[nr];
761 else if (data->fan[nr] & 0x80)
762 data->fan[nr] = 0xff;
763 else
764 data->fan[nr] <<= data->fan_div[nr] - new_div;
765 }
766
767 dev_dbg(dev, "fan%u clock divider changed from %u to %u\n",
768 nr + 1, div_from_reg(data->fan_div[nr]),
769 div_from_reg(new_div));
770 data->fan_div[nr] = new_div;
771 w83627ehf_write_fan_div(data, nr);
772 /* Give the chip time to sample a new speed value */
773 data->last_updated = jiffies;
774 }
775 w83627ehf_write_value(data, W83627EHF_REG_FAN_MIN[nr],
776 data->fan_min[nr]);
777 mutex_unlock(&data->update_lock);
778
779 return count;
780 }
781
782 static struct sensor_device_attribute sda_fan_input[] = {
783 SENSOR_ATTR(fan1_input, S_IRUGO, show_fan, NULL, 0),
784 SENSOR_ATTR(fan2_input, S_IRUGO, show_fan, NULL, 1),
785 SENSOR_ATTR(fan3_input, S_IRUGO, show_fan, NULL, 2),
786 SENSOR_ATTR(fan4_input, S_IRUGO, show_fan, NULL, 3),
787 SENSOR_ATTR(fan5_input, S_IRUGO, show_fan, NULL, 4),
788 };
789
790 static struct sensor_device_attribute sda_fan_alarm[] = {
791 SENSOR_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 6),
792 SENSOR_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 7),
793 SENSOR_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 11),
794 SENSOR_ATTR(fan4_alarm, S_IRUGO, show_alarm, NULL, 10),
795 SENSOR_ATTR(fan5_alarm, S_IRUGO, show_alarm, NULL, 23),
796 };
797
798 static struct sensor_device_attribute sda_fan_min[] = {
799 SENSOR_ATTR(fan1_min, S_IWUSR | S_IRUGO, show_fan_min,
800 store_fan_min, 0),
801 SENSOR_ATTR(fan2_min, S_IWUSR | S_IRUGO, show_fan_min,
802 store_fan_min, 1),
803 SENSOR_ATTR(fan3_min, S_IWUSR | S_IRUGO, show_fan_min,
804 store_fan_min, 2),
805 SENSOR_ATTR(fan4_min, S_IWUSR | S_IRUGO, show_fan_min,
806 store_fan_min, 3),
807 SENSOR_ATTR(fan5_min, S_IWUSR | S_IRUGO, show_fan_min,
808 store_fan_min, 4),
809 };
810
811 static struct sensor_device_attribute sda_fan_div[] = {
812 SENSOR_ATTR(fan1_div, S_IRUGO, show_fan_div, NULL, 0),
813 SENSOR_ATTR(fan2_div, S_IRUGO, show_fan_div, NULL, 1),
814 SENSOR_ATTR(fan3_div, S_IRUGO, show_fan_div, NULL, 2),
815 SENSOR_ATTR(fan4_div, S_IRUGO, show_fan_div, NULL, 3),
816 SENSOR_ATTR(fan5_div, S_IRUGO, show_fan_div, NULL, 4),
817 };
818
819 #define show_temp1_reg(reg) \
820 static ssize_t \
821 show_##reg(struct device *dev, struct device_attribute *attr, \
822 char *buf) \
823 { \
824 struct w83627ehf_data *data = w83627ehf_update_device(dev); \
825 return sprintf(buf, "%d\n", temp1_from_reg(data->reg)); \
826 }
827 show_temp1_reg(temp1);
828 show_temp1_reg(temp1_max);
829 show_temp1_reg(temp1_max_hyst);
830
831 #define store_temp1_reg(REG, reg) \
832 static ssize_t \
833 store_temp1_##reg(struct device *dev, struct device_attribute *attr, \
834 const char *buf, size_t count) \
835 { \
836 struct w83627ehf_data *data = dev_get_drvdata(dev); \
837 long val = simple_strtol(buf, NULL, 10); \
838 \
839 mutex_lock(&data->update_lock); \
840 data->temp1_##reg = temp1_to_reg(val, -128000, 127000); \
841 w83627ehf_write_value(data, W83627EHF_REG_TEMP1_##REG, \
842 data->temp1_##reg); \
843 mutex_unlock(&data->update_lock); \
844 return count; \
845 }
846 store_temp1_reg(OVER, max);
847 store_temp1_reg(HYST, max_hyst);
848
849 #define show_temp_reg(reg) \
850 static ssize_t \
851 show_##reg(struct device *dev, struct device_attribute *attr, \
852 char *buf) \
853 { \
854 struct w83627ehf_data *data = w83627ehf_update_device(dev); \
855 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
856 int nr = sensor_attr->index; \
857 return sprintf(buf, "%d\n", \
858 LM75_TEMP_FROM_REG(data->reg[nr])); \
859 }
860 show_temp_reg(temp);
861 show_temp_reg(temp_max);
862 show_temp_reg(temp_max_hyst);
863
864 #define store_temp_reg(REG, reg) \
865 static ssize_t \
866 store_##reg(struct device *dev, struct device_attribute *attr, \
867 const char *buf, size_t count) \
868 { \
869 struct w83627ehf_data *data = dev_get_drvdata(dev); \
870 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
871 int nr = sensor_attr->index; \
872 long val = simple_strtol(buf, NULL, 10); \
873 \
874 mutex_lock(&data->update_lock); \
875 data->reg[nr] = LM75_TEMP_TO_REG(val); \
876 w83627ehf_write_value(data, W83627EHF_REG_TEMP_##REG[nr], \
877 data->reg[nr]); \
878 mutex_unlock(&data->update_lock); \
879 return count; \
880 }
881 store_temp_reg(OVER, temp_max);
882 store_temp_reg(HYST, temp_max_hyst);
883
884 static ssize_t
885 show_temp_type(struct device *dev, struct device_attribute *attr, char *buf)
886 {
887 struct w83627ehf_data *data = w83627ehf_update_device(dev);
888 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
889 int nr = sensor_attr->index;
890 return sprintf(buf, "%d\n", (int)data->temp_type[nr]);
891 }
892
893 static struct sensor_device_attribute sda_temp_input[] = {
894 SENSOR_ATTR(temp1_input, S_IRUGO, show_temp1, NULL, 0),
895 SENSOR_ATTR(temp2_input, S_IRUGO, show_temp, NULL, 0),
896 SENSOR_ATTR(temp3_input, S_IRUGO, show_temp, NULL, 1),
897 };
898
899 static struct sensor_device_attribute sda_temp_max[] = {
900 SENSOR_ATTR(temp1_max, S_IRUGO | S_IWUSR, show_temp1_max,
901 store_temp1_max, 0),
902 SENSOR_ATTR(temp2_max, S_IRUGO | S_IWUSR, show_temp_max,
903 store_temp_max, 0),
904 SENSOR_ATTR(temp3_max, S_IRUGO | S_IWUSR, show_temp_max,
905 store_temp_max, 1),
906 };
907
908 static struct sensor_device_attribute sda_temp_max_hyst[] = {
909 SENSOR_ATTR(temp1_max_hyst, S_IRUGO | S_IWUSR, show_temp1_max_hyst,
910 store_temp1_max_hyst, 0),
911 SENSOR_ATTR(temp2_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,
912 store_temp_max_hyst, 0),
913 SENSOR_ATTR(temp3_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,
914 store_temp_max_hyst, 1),
915 };
916
917 static struct sensor_device_attribute sda_temp_alarm[] = {
918 SENSOR_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 4),
919 SENSOR_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 5),
920 SENSOR_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 13),
921 };
922
923 static struct sensor_device_attribute sda_temp_type[] = {
924 SENSOR_ATTR(temp1_type, S_IRUGO, show_temp_type, NULL, 0),
925 SENSOR_ATTR(temp2_type, S_IRUGO, show_temp_type, NULL, 1),
926 SENSOR_ATTR(temp3_type, S_IRUGO, show_temp_type, NULL, 2),
927 };
928
929 #define show_pwm_reg(reg) \
930 static ssize_t show_##reg (struct device *dev, struct device_attribute *attr, \
931 char *buf) \
932 { \
933 struct w83627ehf_data *data = w83627ehf_update_device(dev); \
934 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
935 int nr = sensor_attr->index; \
936 return sprintf(buf, "%d\n", data->reg[nr]); \
937 }
938
939 show_pwm_reg(pwm_mode)
940 show_pwm_reg(pwm_enable)
941 show_pwm_reg(pwm)
942
943 static ssize_t
944 store_pwm_mode(struct device *dev, struct device_attribute *attr,
945 const char *buf, size_t count)
946 {
947 struct w83627ehf_data *data = dev_get_drvdata(dev);
948 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
949 int nr = sensor_attr->index;
950 u32 val = simple_strtoul(buf, NULL, 10);
951 u16 reg;
952
953 if (val > 1)
954 return -EINVAL;
955 mutex_lock(&data->update_lock);
956 reg = w83627ehf_read_value(data, W83627EHF_REG_PWM_ENABLE[nr]);
957 data->pwm_mode[nr] = val;
958 reg &= ~(1 << W83627EHF_PWM_MODE_SHIFT[nr]);
959 if (!val)
960 reg |= 1 << W83627EHF_PWM_MODE_SHIFT[nr];
961 w83627ehf_write_value(data, W83627EHF_REG_PWM_ENABLE[nr], reg);
962 mutex_unlock(&data->update_lock);
963 return count;
964 }
965
966 static ssize_t
967 store_pwm(struct device *dev, struct device_attribute *attr,
968 const char *buf, size_t count)
969 {
970 struct w83627ehf_data *data = dev_get_drvdata(dev);
971 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
972 int nr = sensor_attr->index;
973 u32 val = SENSORS_LIMIT(simple_strtoul(buf, NULL, 10), 0, 255);
974
975 mutex_lock(&data->update_lock);
976 data->pwm[nr] = val;
977 w83627ehf_write_value(data, W83627EHF_REG_PWM[nr], val);
978 mutex_unlock(&data->update_lock);
979 return count;
980 }
981
982 static ssize_t
983 store_pwm_enable(struct device *dev, struct device_attribute *attr,
984 const char *buf, size_t count)
985 {
986 struct w83627ehf_data *data = dev_get_drvdata(dev);
987 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
988 int nr = sensor_attr->index;
989 u32 val = simple_strtoul(buf, NULL, 10);
990 u16 reg;
991
992 if (!val || (val > 4))
993 return -EINVAL;
994 mutex_lock(&data->update_lock);
995 reg = w83627ehf_read_value(data, W83627EHF_REG_PWM_ENABLE[nr]);
996 data->pwm_enable[nr] = val;
997 reg &= ~(0x03 << W83627EHF_PWM_ENABLE_SHIFT[nr]);
998 reg |= (val - 1) << W83627EHF_PWM_ENABLE_SHIFT[nr];
999 w83627ehf_write_value(data, W83627EHF_REG_PWM_ENABLE[nr], reg);
1000 mutex_unlock(&data->update_lock);
1001 return count;
1002 }
1003
1004
1005 #define show_tol_temp(reg) \
1006 static ssize_t show_##reg(struct device *dev, struct device_attribute *attr, \
1007 char *buf) \
1008 { \
1009 struct w83627ehf_data *data = w83627ehf_update_device(dev); \
1010 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
1011 int nr = sensor_attr->index; \
1012 return sprintf(buf, "%d\n", temp1_from_reg(data->reg[nr])); \
1013 }
1014
1015 show_tol_temp(tolerance)
1016 show_tol_temp(target_temp)
1017
1018 static ssize_t
1019 store_target_temp(struct device *dev, struct device_attribute *attr,
1020 const char *buf, size_t count)
1021 {
1022 struct w83627ehf_data *data = dev_get_drvdata(dev);
1023 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1024 int nr = sensor_attr->index;
1025 u8 val = temp1_to_reg(simple_strtoul(buf, NULL, 10), 0, 127000);
1026
1027 mutex_lock(&data->update_lock);
1028 data->target_temp[nr] = val;
1029 w83627ehf_write_value(data, W83627EHF_REG_TARGET[nr], val);
1030 mutex_unlock(&data->update_lock);
1031 return count;
1032 }
1033
1034 static ssize_t
1035 store_tolerance(struct device *dev, struct device_attribute *attr,
1036 const char *buf, size_t count)
1037 {
1038 struct w83627ehf_data *data = dev_get_drvdata(dev);
1039 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1040 int nr = sensor_attr->index;
1041 u16 reg;
1042 /* Limit the temp to 0C - 15C */
1043 u8 val = temp1_to_reg(simple_strtoul(buf, NULL, 10), 0, 15000);
1044
1045 mutex_lock(&data->update_lock);
1046 reg = w83627ehf_read_value(data, W83627EHF_REG_TOLERANCE[nr]);
1047 data->tolerance[nr] = val;
1048 if (nr == 1)
1049 reg = (reg & 0x0f) | (val << 4);
1050 else
1051 reg = (reg & 0xf0) | val;
1052 w83627ehf_write_value(data, W83627EHF_REG_TOLERANCE[nr], reg);
1053 mutex_unlock(&data->update_lock);
1054 return count;
1055 }
1056
1057 static struct sensor_device_attribute sda_pwm[] = {
1058 SENSOR_ATTR(pwm1, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0),
1059 SENSOR_ATTR(pwm2, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 1),
1060 SENSOR_ATTR(pwm3, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 2),
1061 SENSOR_ATTR(pwm4, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 3),
1062 };
1063
1064 static struct sensor_device_attribute sda_pwm_mode[] = {
1065 SENSOR_ATTR(pwm1_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
1066 store_pwm_mode, 0),
1067 SENSOR_ATTR(pwm2_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
1068 store_pwm_mode, 1),
1069 SENSOR_ATTR(pwm3_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
1070 store_pwm_mode, 2),
1071 SENSOR_ATTR(pwm4_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
1072 store_pwm_mode, 3),
1073 };
1074
1075 static struct sensor_device_attribute sda_pwm_enable[] = {
1076 SENSOR_ATTR(pwm1_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
1077 store_pwm_enable, 0),
1078 SENSOR_ATTR(pwm2_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
1079 store_pwm_enable, 1),
1080 SENSOR_ATTR(pwm3_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
1081 store_pwm_enable, 2),
1082 SENSOR_ATTR(pwm4_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
1083 store_pwm_enable, 3),
1084 };
1085
1086 static struct sensor_device_attribute sda_target_temp[] = {
1087 SENSOR_ATTR(pwm1_target, S_IWUSR | S_IRUGO, show_target_temp,
1088 store_target_temp, 0),
1089 SENSOR_ATTR(pwm2_target, S_IWUSR | S_IRUGO, show_target_temp,
1090 store_target_temp, 1),
1091 SENSOR_ATTR(pwm3_target, S_IWUSR | S_IRUGO, show_target_temp,
1092 store_target_temp, 2),
1093 SENSOR_ATTR(pwm4_target, S_IWUSR | S_IRUGO, show_target_temp,
1094 store_target_temp, 3),
1095 };
1096
1097 static struct sensor_device_attribute sda_tolerance[] = {
1098 SENSOR_ATTR(pwm1_tolerance, S_IWUSR | S_IRUGO, show_tolerance,
1099 store_tolerance, 0),
1100 SENSOR_ATTR(pwm2_tolerance, S_IWUSR | S_IRUGO, show_tolerance,
1101 store_tolerance, 1),
1102 SENSOR_ATTR(pwm3_tolerance, S_IWUSR | S_IRUGO, show_tolerance,
1103 store_tolerance, 2),
1104 SENSOR_ATTR(pwm4_tolerance, S_IWUSR | S_IRUGO, show_tolerance,
1105 store_tolerance, 3),
1106 };
1107
1108 /* Smart Fan registers */
1109
1110 #define fan_functions(reg, REG) \
1111 static ssize_t show_##reg(struct device *dev, struct device_attribute *attr, \
1112 char *buf) \
1113 { \
1114 struct w83627ehf_data *data = w83627ehf_update_device(dev); \
1115 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
1116 int nr = sensor_attr->index; \
1117 return sprintf(buf, "%d\n", data->reg[nr]); \
1118 }\
1119 static ssize_t \
1120 store_##reg(struct device *dev, struct device_attribute *attr, \
1121 const char *buf, size_t count) \
1122 {\
1123 struct w83627ehf_data *data = dev_get_drvdata(dev); \
1124 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
1125 int nr = sensor_attr->index; \
1126 u32 val = SENSORS_LIMIT(simple_strtoul(buf, NULL, 10), 1, 255); \
1127 mutex_lock(&data->update_lock); \
1128 data->reg[nr] = val; \
1129 w83627ehf_write_value(data, W83627EHF_REG_##REG[nr], val); \
1130 mutex_unlock(&data->update_lock); \
1131 return count; \
1132 }
1133
1134 fan_functions(fan_start_output, FAN_START_OUTPUT)
1135 fan_functions(fan_stop_output, FAN_STOP_OUTPUT)
1136 fan_functions(fan_max_output, FAN_MAX_OUTPUT)
1137 fan_functions(fan_step_output, FAN_STEP_OUTPUT)
1138
1139 #define fan_time_functions(reg, REG) \
1140 static ssize_t show_##reg(struct device *dev, struct device_attribute *attr, \
1141 char *buf) \
1142 { \
1143 struct w83627ehf_data *data = w83627ehf_update_device(dev); \
1144 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
1145 int nr = sensor_attr->index; \
1146 return sprintf(buf, "%d\n", \
1147 step_time_from_reg(data->reg[nr], data->pwm_mode[nr])); \
1148 } \
1149 \
1150 static ssize_t \
1151 store_##reg(struct device *dev, struct device_attribute *attr, \
1152 const char *buf, size_t count) \
1153 { \
1154 struct w83627ehf_data *data = dev_get_drvdata(dev); \
1155 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
1156 int nr = sensor_attr->index; \
1157 u8 val = step_time_to_reg(simple_strtoul(buf, NULL, 10), \
1158 data->pwm_mode[nr]); \
1159 mutex_lock(&data->update_lock); \
1160 data->reg[nr] = val; \
1161 w83627ehf_write_value(data, W83627EHF_REG_##REG[nr], val); \
1162 mutex_unlock(&data->update_lock); \
1163 return count; \
1164 } \
1165
1166 fan_time_functions(fan_stop_time, FAN_STOP_TIME)
1167
1168 static ssize_t show_name(struct device *dev, struct device_attribute *attr,
1169 char *buf)
1170 {
1171 struct w83627ehf_data *data = dev_get_drvdata(dev);
1172
1173 return sprintf(buf, "%s\n", data->name);
1174 }
1175 static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
1176
1177 static struct sensor_device_attribute sda_sf3_arrays_fan4[] = {
1178 SENSOR_ATTR(pwm4_stop_time, S_IWUSR | S_IRUGO, show_fan_stop_time,
1179 store_fan_stop_time, 3),
1180 SENSOR_ATTR(pwm4_start_output, S_IWUSR | S_IRUGO, show_fan_start_output,
1181 store_fan_start_output, 3),
1182 SENSOR_ATTR(pwm4_stop_output, S_IWUSR | S_IRUGO, show_fan_stop_output,
1183 store_fan_stop_output, 3),
1184 SENSOR_ATTR(pwm4_max_output, S_IWUSR | S_IRUGO, show_fan_max_output,
1185 store_fan_max_output, 3),
1186 SENSOR_ATTR(pwm4_step_output, S_IWUSR | S_IRUGO, show_fan_step_output,
1187 store_fan_step_output, 3),
1188 };
1189
1190 static struct sensor_device_attribute sda_sf3_arrays[] = {
1191 SENSOR_ATTR(pwm1_stop_time, S_IWUSR | S_IRUGO, show_fan_stop_time,
1192 store_fan_stop_time, 0),
1193 SENSOR_ATTR(pwm2_stop_time, S_IWUSR | S_IRUGO, show_fan_stop_time,
1194 store_fan_stop_time, 1),
1195 SENSOR_ATTR(pwm3_stop_time, S_IWUSR | S_IRUGO, show_fan_stop_time,
1196 store_fan_stop_time, 2),
1197 SENSOR_ATTR(pwm1_start_output, S_IWUSR | S_IRUGO, show_fan_start_output,
1198 store_fan_start_output, 0),
1199 SENSOR_ATTR(pwm2_start_output, S_IWUSR | S_IRUGO, show_fan_start_output,
1200 store_fan_start_output, 1),
1201 SENSOR_ATTR(pwm3_start_output, S_IWUSR | S_IRUGO, show_fan_start_output,
1202 store_fan_start_output, 2),
1203 SENSOR_ATTR(pwm1_stop_output, S_IWUSR | S_IRUGO, show_fan_stop_output,
1204 store_fan_stop_output, 0),
1205 SENSOR_ATTR(pwm2_stop_output, S_IWUSR | S_IRUGO, show_fan_stop_output,
1206 store_fan_stop_output, 1),
1207 SENSOR_ATTR(pwm3_stop_output, S_IWUSR | S_IRUGO, show_fan_stop_output,
1208 store_fan_stop_output, 2),
1209
1210 /* pwm1 and pwm3 don't support max and step settings */
1211 SENSOR_ATTR(pwm2_max_output, S_IWUSR | S_IRUGO, show_fan_max_output,
1212 store_fan_max_output, 1),
1213 SENSOR_ATTR(pwm2_step_output, S_IWUSR | S_IRUGO, show_fan_step_output,
1214 store_fan_step_output, 1),
1215 };
1216
1217 static ssize_t
1218 show_vid(struct device *dev, struct device_attribute *attr, char *buf)
1219 {
1220 struct w83627ehf_data *data = dev_get_drvdata(dev);
1221 return sprintf(buf, "%d\n", vid_from_reg(data->vid, data->vrm));
1222 }
1223 static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid, NULL);
1224
1225 /*
1226 * Driver and device management
1227 */
1228
1229 static void w83627ehf_device_remove_files(struct device *dev)
1230 {
1231 /* some entries in the following arrays may not have been used in
1232 * device_create_file(), but device_remove_file() will ignore them */
1233 int i;
1234 struct w83627ehf_data *data = dev_get_drvdata(dev);
1235
1236 for (i = 0; i < ARRAY_SIZE(sda_sf3_arrays); i++)
1237 device_remove_file(dev, &sda_sf3_arrays[i].dev_attr);
1238 for (i = 0; i < ARRAY_SIZE(sda_sf3_arrays_fan4); i++)
1239 device_remove_file(dev, &sda_sf3_arrays_fan4[i].dev_attr);
1240 for (i = 0; i < data->in_num; i++) {
1241 if ((i == 6) && data->in6_skip)
1242 continue;
1243 device_remove_file(dev, &sda_in_input[i].dev_attr);
1244 device_remove_file(dev, &sda_in_alarm[i].dev_attr);
1245 device_remove_file(dev, &sda_in_min[i].dev_attr);
1246 device_remove_file(dev, &sda_in_max[i].dev_attr);
1247 }
1248 for (i = 0; i < 5; i++) {
1249 device_remove_file(dev, &sda_fan_input[i].dev_attr);
1250 device_remove_file(dev, &sda_fan_alarm[i].dev_attr);
1251 device_remove_file(dev, &sda_fan_div[i].dev_attr);
1252 device_remove_file(dev, &sda_fan_min[i].dev_attr);
1253 }
1254 for (i = 0; i < data->pwm_num; i++) {
1255 device_remove_file(dev, &sda_pwm[i].dev_attr);
1256 device_remove_file(dev, &sda_pwm_mode[i].dev_attr);
1257 device_remove_file(dev, &sda_pwm_enable[i].dev_attr);
1258 device_remove_file(dev, &sda_target_temp[i].dev_attr);
1259 device_remove_file(dev, &sda_tolerance[i].dev_attr);
1260 }
1261 for (i = 0; i < 3; i++) {
1262 if ((i == 2) && data->temp3_disable)
1263 continue;
1264 device_remove_file(dev, &sda_temp_input[i].dev_attr);
1265 device_remove_file(dev, &sda_temp_max[i].dev_attr);
1266 device_remove_file(dev, &sda_temp_max_hyst[i].dev_attr);
1267 device_remove_file(dev, &sda_temp_alarm[i].dev_attr);
1268 device_remove_file(dev, &sda_temp_type[i].dev_attr);
1269 }
1270
1271 device_remove_file(dev, &dev_attr_name);
1272 device_remove_file(dev, &dev_attr_cpu0_vid);
1273 }
1274
1275 /* Get the monitoring functions started */
1276 static inline void __devinit w83627ehf_init_device(struct w83627ehf_data *data)
1277 {
1278 int i;
1279 u8 tmp, diode;
1280
1281 /* Start monitoring is needed */
1282 tmp = w83627ehf_read_value(data, W83627EHF_REG_CONFIG);
1283 if (!(tmp & 0x01))
1284 w83627ehf_write_value(data, W83627EHF_REG_CONFIG,
1285 tmp | 0x01);
1286
1287 /* Enable temp2 and temp3 if needed */
1288 for (i = 0; i < 2; i++) {
1289 tmp = w83627ehf_read_value(data,
1290 W83627EHF_REG_TEMP_CONFIG[i]);
1291 if ((i == 1) && data->temp3_disable)
1292 continue;
1293 if (tmp & 0x01)
1294 w83627ehf_write_value(data,
1295 W83627EHF_REG_TEMP_CONFIG[i],
1296 tmp & 0xfe);
1297 }
1298
1299 /* Enable VBAT monitoring if needed */
1300 tmp = w83627ehf_read_value(data, W83627EHF_REG_VBAT);
1301 if (!(tmp & 0x01))
1302 w83627ehf_write_value(data, W83627EHF_REG_VBAT, tmp | 0x01);
1303
1304 /* Get thermal sensor types */
1305 diode = w83627ehf_read_value(data, W83627EHF_REG_DIODE);
1306 for (i = 0; i < 3; i++) {
1307 if ((tmp & (0x02 << i)))
1308 data->temp_type[i] = (diode & (0x10 << i)) ? 1 : 2;
1309 else
1310 data->temp_type[i] = 4; /* thermistor */
1311 }
1312 }
1313
1314 static int __devinit w83627ehf_probe(struct platform_device *pdev)
1315 {
1316 struct device *dev = &pdev->dev;
1317 struct w83627ehf_sio_data *sio_data = dev->platform_data;
1318 struct w83627ehf_data *data;
1319 struct resource *res;
1320 u8 fan4pin, fan5pin, en_vrm10;
1321 int i, err = 0;
1322
1323 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
1324 if (!request_region(res->start, IOREGION_LENGTH, DRVNAME)) {
1325 err = -EBUSY;
1326 dev_err(dev, "Failed to request region 0x%lx-0x%lx\n",
1327 (unsigned long)res->start,
1328 (unsigned long)res->start + IOREGION_LENGTH - 1);
1329 goto exit;
1330 }
1331
1332 if (!(data = kzalloc(sizeof(struct w83627ehf_data), GFP_KERNEL))) {
1333 err = -ENOMEM;
1334 goto exit_release;
1335 }
1336
1337 data->addr = res->start;
1338 mutex_init(&data->lock);
1339 mutex_init(&data->update_lock);
1340 data->name = w83627ehf_device_names[sio_data->kind];
1341 platform_set_drvdata(pdev, data);
1342
1343 /* 627EHG and 627EHF have 10 voltage inputs; 627DHG and 667HG have 9 */
1344 data->in_num = (sio_data->kind == w83627ehf) ? 10 : 9;
1345 /* 667HG has 3 pwms */
1346 data->pwm_num = (sio_data->kind == w83667hg) ? 3 : 4;
1347
1348 /* Check temp3 configuration bit for 667HG */
1349 if (sio_data->kind == w83667hg) {
1350 data->temp3_disable = w83627ehf_read_value(data,
1351 W83627EHF_REG_TEMP_CONFIG[1]) & 0x01;
1352 data->in6_skip = !data->temp3_disable;
1353 }
1354
1355 /* Initialize the chip */
1356 w83627ehf_init_device(data);
1357
1358 data->vrm = vid_which_vrm();
1359 superio_enter(sio_data->sioreg);
1360 /* Read VID value */
1361 if (sio_data->kind == w83667hg) {
1362 /* W83667HG has different pins for VID input and output, so
1363 we can get the VID input values directly at logical device D
1364 0xe3. */
1365 superio_select(sio_data->sioreg, W83667HG_LD_VID);
1366 data->vid = superio_inb(sio_data->sioreg, 0xe3);
1367 err = device_create_file(dev, &dev_attr_cpu0_vid);
1368 if (err)
1369 goto exit_release;
1370 } else {
1371 superio_select(sio_data->sioreg, W83627EHF_LD_HWM);
1372 if (superio_inb(sio_data->sioreg, SIO_REG_VID_CTRL) & 0x80) {
1373 /* Set VID input sensibility if needed. In theory the
1374 BIOS should have set it, but in practice it's not
1375 always the case. We only do it for the W83627EHF/EHG
1376 because the W83627DHG is more complex in this
1377 respect. */
1378 if (sio_data->kind == w83627ehf) {
1379 en_vrm10 = superio_inb(sio_data->sioreg,
1380 SIO_REG_EN_VRM10);
1381 if ((en_vrm10 & 0x08) && data->vrm == 90) {
1382 dev_warn(dev, "Setting VID input "
1383 "voltage to TTL\n");
1384 superio_outb(sio_data->sioreg,
1385 SIO_REG_EN_VRM10,
1386 en_vrm10 & ~0x08);
1387 } else if (!(en_vrm10 & 0x08)
1388 && data->vrm == 100) {
1389 dev_warn(dev, "Setting VID input "
1390 "voltage to VRM10\n");
1391 superio_outb(sio_data->sioreg,
1392 SIO_REG_EN_VRM10,
1393 en_vrm10 | 0x08);
1394 }
1395 }
1396
1397 data->vid = superio_inb(sio_data->sioreg,
1398 SIO_REG_VID_DATA);
1399 if (sio_data->kind == w83627ehf) /* 6 VID pins only */
1400 data->vid &= 0x3f;
1401
1402 err = device_create_file(dev, &dev_attr_cpu0_vid);
1403 if (err)
1404 goto exit_release;
1405 } else {
1406 dev_info(dev, "VID pins in output mode, CPU VID not "
1407 "available\n");
1408 }
1409 }
1410
1411 /* fan4 and fan5 share some pins with the GPIO and serial flash */
1412 if (sio_data->kind == w83667hg) {
1413 fan5pin = superio_inb(sio_data->sioreg, 0x27) & 0x20;
1414 fan4pin = superio_inb(sio_data->sioreg, 0x27) & 0x40;
1415 } else {
1416 fan5pin = !(superio_inb(sio_data->sioreg, 0x24) & 0x02);
1417 fan4pin = !(superio_inb(sio_data->sioreg, 0x29) & 0x06);
1418 }
1419 superio_exit(sio_data->sioreg);
1420
1421 /* It looks like fan4 and fan5 pins can be alternatively used
1422 as fan on/off switches, but fan5 control is write only :/
1423 We assume that if the serial interface is disabled, designers
1424 connected fan5 as input unless they are emitting log 1, which
1425 is not the default. */
1426
1427 data->has_fan = 0x07; /* fan1, fan2 and fan3 */
1428 i = w83627ehf_read_value(data, W83627EHF_REG_FANDIV1);
1429 if ((i & (1 << 2)) && fan4pin)
1430 data->has_fan |= (1 << 3);
1431 if (!(i & (1 << 1)) && fan5pin)
1432 data->has_fan |= (1 << 4);
1433
1434 /* Read fan clock dividers immediately */
1435 w83627ehf_update_fan_div(data);
1436
1437 /* Register sysfs hooks */
1438 for (i = 0; i < ARRAY_SIZE(sda_sf3_arrays); i++)
1439 if ((err = device_create_file(dev,
1440 &sda_sf3_arrays[i].dev_attr)))
1441 goto exit_remove;
1442
1443 /* if fan4 is enabled create the sf3 files for it */
1444 if ((data->has_fan & (1 << 3)) && data->pwm_num >= 4)
1445 for (i = 0; i < ARRAY_SIZE(sda_sf3_arrays_fan4); i++) {
1446 if ((err = device_create_file(dev,
1447 &sda_sf3_arrays_fan4[i].dev_attr)))
1448 goto exit_remove;
1449 }
1450
1451 for (i = 0; i < data->in_num; i++) {
1452 if ((i == 6) && data->in6_skip)
1453 continue;
1454 if ((err = device_create_file(dev, &sda_in_input[i].dev_attr))
1455 || (err = device_create_file(dev,
1456 &sda_in_alarm[i].dev_attr))
1457 || (err = device_create_file(dev,
1458 &sda_in_min[i].dev_attr))
1459 || (err = device_create_file(dev,
1460 &sda_in_max[i].dev_attr)))
1461 goto exit_remove;
1462 }
1463
1464 for (i = 0; i < 5; i++) {
1465 if (data->has_fan & (1 << i)) {
1466 if ((err = device_create_file(dev,
1467 &sda_fan_input[i].dev_attr))
1468 || (err = device_create_file(dev,
1469 &sda_fan_alarm[i].dev_attr))
1470 || (err = device_create_file(dev,
1471 &sda_fan_div[i].dev_attr))
1472 || (err = device_create_file(dev,
1473 &sda_fan_min[i].dev_attr)))
1474 goto exit_remove;
1475 if (i < data->pwm_num &&
1476 ((err = device_create_file(dev,
1477 &sda_pwm[i].dev_attr))
1478 || (err = device_create_file(dev,
1479 &sda_pwm_mode[i].dev_attr))
1480 || (err = device_create_file(dev,
1481 &sda_pwm_enable[i].dev_attr))
1482 || (err = device_create_file(dev,
1483 &sda_target_temp[i].dev_attr))
1484 || (err = device_create_file(dev,
1485 &sda_tolerance[i].dev_attr))))
1486 goto exit_remove;
1487 }
1488 }
1489
1490 for (i = 0; i < 3; i++) {
1491 if ((i == 2) && data->temp3_disable)
1492 continue;
1493 if ((err = device_create_file(dev,
1494 &sda_temp_input[i].dev_attr))
1495 || (err = device_create_file(dev,
1496 &sda_temp_max[i].dev_attr))
1497 || (err = device_create_file(dev,
1498 &sda_temp_max_hyst[i].dev_attr))
1499 || (err = device_create_file(dev,
1500 &sda_temp_alarm[i].dev_attr))
1501 || (err = device_create_file(dev,
1502 &sda_temp_type[i].dev_attr)))
1503 goto exit_remove;
1504 }
1505
1506 err = device_create_file(dev, &dev_attr_name);
1507 if (err)
1508 goto exit_remove;
1509
1510 data->hwmon_dev = hwmon_device_register(dev);
1511 if (IS_ERR(data->hwmon_dev)) {
1512 err = PTR_ERR(data->hwmon_dev);
1513 goto exit_remove;
1514 }
1515
1516 return 0;
1517
1518 exit_remove:
1519 w83627ehf_device_remove_files(dev);
1520 kfree(data);
1521 platform_set_drvdata(pdev, NULL);
1522 exit_release:
1523 release_region(res->start, IOREGION_LENGTH);
1524 exit:
1525 return err;
1526 }
1527
1528 static int __devexit w83627ehf_remove(struct platform_device *pdev)
1529 {
1530 struct w83627ehf_data *data = platform_get_drvdata(pdev);
1531
1532 hwmon_device_unregister(data->hwmon_dev);
1533 w83627ehf_device_remove_files(&pdev->dev);
1534 release_region(data->addr, IOREGION_LENGTH);
1535 platform_set_drvdata(pdev, NULL);
1536 kfree(data);
1537
1538 return 0;
1539 }
1540
1541 static struct platform_driver w83627ehf_driver = {
1542 .driver = {
1543 .owner = THIS_MODULE,
1544 .name = DRVNAME,
1545 },
1546 .probe = w83627ehf_probe,
1547 .remove = __devexit_p(w83627ehf_remove),
1548 };
1549
1550 /* w83627ehf_find() looks for a '627 in the Super-I/O config space */
1551 static int __init w83627ehf_find(int sioaddr, unsigned short *addr,
1552 struct w83627ehf_sio_data *sio_data)
1553 {
1554 static const char __initdata sio_name_W83627EHF[] = "W83627EHF";
1555 static const char __initdata sio_name_W83627EHG[] = "W83627EHG";
1556 static const char __initdata sio_name_W83627DHG[] = "W83627DHG";
1557 static const char __initdata sio_name_W83627DHG_P[] = "W83627DHG-P";
1558 static const char __initdata sio_name_W83667HG[] = "W83667HG";
1559
1560 u16 val;
1561 const char *sio_name;
1562
1563 superio_enter(sioaddr);
1564
1565 if (force_id)
1566 val = force_id;
1567 else
1568 val = (superio_inb(sioaddr, SIO_REG_DEVID) << 8)
1569 | superio_inb(sioaddr, SIO_REG_DEVID + 1);
1570 switch (val & SIO_ID_MASK) {
1571 case SIO_W83627EHF_ID:
1572 sio_data->kind = w83627ehf;
1573 sio_name = sio_name_W83627EHF;
1574 break;
1575 case SIO_W83627EHG_ID:
1576 sio_data->kind = w83627ehf;
1577 sio_name = sio_name_W83627EHG;
1578 break;
1579 case SIO_W83627DHG_ID:
1580 sio_data->kind = w83627dhg;
1581 sio_name = sio_name_W83627DHG;
1582 break;
1583 case SIO_W83627DHG_P_ID:
1584 sio_data->kind = w83627dhg_p;
1585 sio_name = sio_name_W83627DHG_P;
1586 break;
1587 case SIO_W83667HG_ID:
1588 sio_data->kind = w83667hg;
1589 sio_name = sio_name_W83667HG;
1590 break;
1591 default:
1592 if (val != 0xffff)
1593 pr_debug(DRVNAME ": unsupported chip ID: 0x%04x\n",
1594 val);
1595 superio_exit(sioaddr);
1596 return -ENODEV;
1597 }
1598
1599 /* We have a known chip, find the HWM I/O address */
1600 superio_select(sioaddr, W83627EHF_LD_HWM);
1601 val = (superio_inb(sioaddr, SIO_REG_ADDR) << 8)
1602 | superio_inb(sioaddr, SIO_REG_ADDR + 1);
1603 *addr = val & IOREGION_ALIGNMENT;
1604 if (*addr == 0) {
1605 printk(KERN_ERR DRVNAME ": Refusing to enable a Super-I/O "
1606 "device with a base I/O port 0.\n");
1607 superio_exit(sioaddr);
1608 return -ENODEV;
1609 }
1610
1611 /* Activate logical device if needed */
1612 val = superio_inb(sioaddr, SIO_REG_ENABLE);
1613 if (!(val & 0x01)) {
1614 printk(KERN_WARNING DRVNAME ": Forcibly enabling Super-I/O. "
1615 "Sensor is probably unusable.\n");
1616 superio_outb(sioaddr, SIO_REG_ENABLE, val | 0x01);
1617 }
1618
1619 superio_exit(sioaddr);
1620 pr_info(DRVNAME ": Found %s chip at %#x\n", sio_name, *addr);
1621 sio_data->sioreg = sioaddr;
1622
1623 return 0;
1624 }
1625
1626 /* when Super-I/O functions move to a separate file, the Super-I/O
1627 * bus will manage the lifetime of the device and this module will only keep
1628 * track of the w83627ehf driver. But since we platform_device_alloc(), we
1629 * must keep track of the device */
1630 static struct platform_device *pdev;
1631
1632 static int __init sensors_w83627ehf_init(void)
1633 {
1634 int err;
1635 unsigned short address;
1636 struct resource res;
1637 struct w83627ehf_sio_data sio_data;
1638
1639 /* initialize sio_data->kind and sio_data->sioreg.
1640 *
1641 * when Super-I/O functions move to a separate file, the Super-I/O
1642 * driver will probe 0x2e and 0x4e and auto-detect the presence of a
1643 * w83627ehf hardware monitor, and call probe() */
1644 if (w83627ehf_find(0x2e, &address, &sio_data) &&
1645 w83627ehf_find(0x4e, &address, &sio_data))
1646 return -ENODEV;
1647
1648 err = platform_driver_register(&w83627ehf_driver);
1649 if (err)
1650 goto exit;
1651
1652 if (!(pdev = platform_device_alloc(DRVNAME, address))) {
1653 err = -ENOMEM;
1654 printk(KERN_ERR DRVNAME ": Device allocation failed\n");
1655 goto exit_unregister;
1656 }
1657
1658 err = platform_device_add_data(pdev, &sio_data,
1659 sizeof(struct w83627ehf_sio_data));
1660 if (err) {
1661 printk(KERN_ERR DRVNAME ": Platform data allocation failed\n");
1662 goto exit_device_put;
1663 }
1664
1665 memset(&res, 0, sizeof(res));
1666 res.name = DRVNAME;
1667 res.start = address + IOREGION_OFFSET;
1668 res.end = address + IOREGION_OFFSET + IOREGION_LENGTH - 1;
1669 res.flags = IORESOURCE_IO;
1670
1671 err = acpi_check_resource_conflict(&res);
1672 if (err)
1673 goto exit_device_put;
1674
1675 err = platform_device_add_resources(pdev, &res, 1);
1676 if (err) {
1677 printk(KERN_ERR DRVNAME ": Device resource addition failed "
1678 "(%d)\n", err);
1679 goto exit_device_put;
1680 }
1681
1682 /* platform_device_add calls probe() */
1683 err = platform_device_add(pdev);
1684 if (err) {
1685 printk(KERN_ERR DRVNAME ": Device addition failed (%d)\n",
1686 err);
1687 goto exit_device_put;
1688 }
1689
1690 return 0;
1691
1692 exit_device_put:
1693 platform_device_put(pdev);
1694 exit_unregister:
1695 platform_driver_unregister(&w83627ehf_driver);
1696 exit:
1697 return err;
1698 }
1699
1700 static void __exit sensors_w83627ehf_exit(void)
1701 {
1702 platform_device_unregister(pdev);
1703 platform_driver_unregister(&w83627ehf_driver);
1704 }
1705
1706 MODULE_AUTHOR("Jean Delvare <khali@linux-fr.org>");
1707 MODULE_DESCRIPTION("W83627EHF driver");
1708 MODULE_LICENSE("GPL");
1709
1710 module_init(sensors_w83627ehf_init);
1711 module_exit(sensors_w83627ehf_exit);
x86 "subsystem" repository