drivers/ata/pata_atiixp.c

   1 /*
   2  * pata_atiixp.c        - ATI PATA for new ATA layer
   3  *                        (C) 2005 Red Hat Inc
   4  *                        Alan Cox <alan@redhat.com>
   5  *
   6  * Based on
   7  *
   8  *  linux/drivers/ide/pci/atiixp.c      Version 0.01-bart2      Feb. 26, 2004
   9  *
  10  *  Copyright (C) 2003 ATI Inc. <hyu@ati.com>
  11  *  Copyright (C) 2004 Bartlomiej Zolnierkiewicz
  12  *
  13  */
  14
  15 #include <linux/kernel.h>
  16 #include <linux/module.h>
  17 #include <linux/pci.h>
  18 #include <linux/init.h>
  19 #include <linux/blkdev.h>
  20 #include <linux/delay.h>
  21 #include <scsi/scsi_host.h>
  22 #include <linux/libata.h>
  23
  24 #define DRV_NAME "pata_atiixp"
  25 #define DRV_VERSION "0.4.4"
  26
  27 enum {
  28         ATIIXP_IDE_PIO_TIMING   = 0x40,
  29         ATIIXP_IDE_MWDMA_TIMING = 0x44,
  30         ATIIXP_IDE_PIO_CONTROL  = 0x48,
  31         ATIIXP_IDE_PIO_MODE     = 0x4a,
  32         ATIIXP_IDE_UDMA_CONTROL = 0x54,
  33         ATIIXP_IDE_UDMA_MODE    = 0x56
  34 };
  35
  36 static int atiixp_pre_reset(struct ata_port *ap)
  37 {
  38         struct pci_dev *pdev = to_pci_dev(ap->host->dev);
  39         static struct pci_bits atiixp_enable_bits[] = {
  40                 { 0x48, 1, 0x01, 0x00 },
  41                 { 0x48, 1, 0x08, 0x00 }
  42         };
  43
  44         if (!pci_test_config_bits(pdev, &atiixp_enable_bits[ap->port_no]))
  45                 return -ENOENT;
  46
  47         ap->cbl = ATA_CBL_PATA80;
  48         return ata_std_prereset(ap);
  49 }
  50
  51 static void atiixp_error_handler(struct ata_port *ap)
  52 {
  53         ata_bmdma_drive_eh(ap, atiixp_pre_reset, ata_std_softreset, NULL,   ata_std_postreset);
  54 }
  55
  56 /**
  57  *      atiixp_set_pio_timing   -       set initial PIO mode data
  58  *      @ap: ATA interface
  59  *      @adev: ATA device
  60  *
  61  *      Called by both the pio and dma setup functions to set the controller
  62  *      timings for PIO transfers. We must load both the mode number and
  63  *      timing values into the controller.
  64  */
  65
  66 static void atiixp_set_pio_timing(struct ata_port *ap, struct ata_device *adev, int pio)
  67 {
  68         static u8 pio_timings[5] = { 0x5D, 0x47, 0x34, 0x22, 0x20 };
  69
  70         struct pci_dev *pdev = to_pci_dev(ap->host->dev);
  71         int dn = 2 * ap->port_no + adev->devno;
  72
  73         /* Check this is correct - the order is odd in both drivers */
  74         int timing_shift = (16 * ap->port_no) + 8 * (adev->devno ^ 1);
  75         u16 pio_mode_data, pio_timing_data;
  76
  77         pci_read_config_word(pdev, ATIIXP_IDE_PIO_MODE, &pio_mode_data);
  78         pio_mode_data &= ~(0x7 << (4 * dn));
  79         pio_mode_data |= pio << (4 * dn);
  80         pci_write_config_word(pdev, ATIIXP_IDE_PIO_MODE, pio_mode_data);
  81
  82         pci_read_config_word(pdev, ATIIXP_IDE_PIO_TIMING, &pio_timing_data);
  83         pio_mode_data &= ~(0xFF << timing_shift);
  84         pio_mode_data |= (pio_timings[pio] << timing_shift);
  85         pci_write_config_word(pdev, ATIIXP_IDE_PIO_TIMING, pio_timing_data);
  86 }
  87
  88 /**
  89  *      atiixp_set_piomode      -       set initial PIO mode data
  90  *      @ap: ATA interface
  91  *      @adev: ATA device
  92  *
  93  *      Called to do the PIO mode setup. We use a shared helper for this
  94  *      as the DMA setup must also adjust the PIO timing information.
  95  */
  96
  97 static void atiixp_set_piomode(struct ata_port *ap, struct ata_device *adev)
  98 {
  99         atiixp_set_pio_timing(ap, adev, adev->pio_mode - XFER_PIO_0);
 100 }
 101
 102 /**
 103  *      atiixp_set_dmamode      -       set initial DMA mode data
 104  *      @ap: ATA interface
 105  *      @adev: ATA device
 106  *
 107  *      Called to do the DMA mode setup. We use timing tables for most
 108  *      modes but must tune an appropriate PIO mode to match.
 109  */
 110
 111 static void atiixp_set_dmamode(struct ata_port *ap, struct ata_device *adev)
 112 {
 113         static u8 mwdma_timings[5] = { 0x77, 0x21, 0x20 };
 114
 115         struct pci_dev *pdev = to_pci_dev(ap->host->dev);
 116         int dma = adev->dma_mode;
 117         int dn = 2 * ap->port_no + adev->devno;
 118         int wanted_pio;
 119
 120         if (adev->dma_mode >= XFER_UDMA_0) {
 121                 u16 udma_mode_data;
 122
 123                 dma -= XFER_UDMA_0;
 124
 125                 pci_read_config_word(pdev, ATIIXP_IDE_UDMA_MODE, &udma_mode_data);
 126                 udma_mode_data &= ~(0x7 << (4 * dn));
 127                 udma_mode_data |= dma << (4 * dn);
 128                 pci_write_config_word(pdev, ATIIXP_IDE_UDMA_MODE, udma_mode_data);
 129         } else {
 130                 u16 mwdma_timing_data;
 131                 /* Check this is correct - the order is odd in both drivers */
 132                 int timing_shift = (16 * ap->port_no) + 8 * (adev->devno ^ 1);
 133
 134                 dma -= XFER_MW_DMA_0;
 135
 136                 pci_read_config_word(pdev, ATIIXP_IDE_MWDMA_TIMING, &mwdma_timing_data);
 137                 mwdma_timing_data &= ~(0xFF << timing_shift);
 138                 mwdma_timing_data |= (mwdma_timings[dma] << timing_shift);
 139                 pci_write_config_word(pdev, ATIIXP_IDE_MWDMA_TIMING, mwdma_timing_data);
 140         }
 141         /*
 142          *      We must now look at the PIO mode situation. We may need to
 143          *      adjust the PIO mode to keep the timings acceptable
 144          */
 145          if (adev->dma_mode >= XFER_MW_DMA_2)
 146                 wanted_pio = 4;
 147         else if (adev->dma_mode == XFER_MW_DMA_1)
 148                 wanted_pio = 3;
 149         else if (adev->dma_mode == XFER_MW_DMA_0)
 150                 wanted_pio = 0;
 151         else BUG();
 152
 153         if (adev->pio_mode != wanted_pio)
 154                 atiixp_set_pio_timing(ap, adev, wanted_pio);
 155 }
 156
 157 /**
 158  *      atiixp_bmdma_start      -       DMA start callback
 159  *      @qc: Command in progress
 160  *
 161  *      When DMA begins we need to ensure that the UDMA control
 162  *      register for the channel is correctly set.
 163  */
 164
 165 static void atiixp_bmdma_start(struct ata_queued_cmd *qc)
 166 {
 167         struct ata_port *ap = qc->ap;
 168         struct ata_device *adev = qc->dev;
 169
 170         struct pci_dev *pdev = to_pci_dev(ap->host->dev);
 171         int dn = (2 * ap->port_no) + adev->devno;
 172         u16 tmp16;
 173
 174         pci_read_config_word(pdev, ATIIXP_IDE_UDMA_CONTROL, &tmp16);
 175         if (adev->dma_mode >= XFER_UDMA_0)
 176                 tmp16 |= (1 << dn);
 177         else
 178                 tmp16 &= ~(1 << dn);
 179         pci_write_config_word(pdev, ATIIXP_IDE_UDMA_CONTROL, tmp16);
 180         ata_bmdma_start(qc);
 181 }
 182
 183 /**
 184  *      atiixp_dma_stop -       DMA stop callback
 185  *      @qc: Command in progress
 186  *
 187  *      DMA has completed. Clear the UDMA flag as the next operations will
 188  *      be PIO ones not UDMA data transfer.
 189  */
 190
 191 static void atiixp_bmdma_stop(struct ata_queued_cmd *qc)
 192 {
 193         struct ata_port *ap = qc->ap;
 194         struct pci_dev *pdev = to_pci_dev(ap->host->dev);
 195         int dn = (2 * ap->port_no) + qc->dev->devno;
 196         u16 tmp16;
 197
 198         pci_read_config_word(pdev, ATIIXP_IDE_UDMA_CONTROL, &tmp16);
 199         tmp16 &= ~(1 << dn);
 200         pci_write_config_word(pdev, ATIIXP_IDE_UDMA_CONTROL, tmp16);
 201         ata_bmdma_stop(qc);
 202 }
 203
 204 static struct scsi_host_template atiixp_sht = {
 205         .module                 = THIS_MODULE,
 206         .name                   = DRV_NAME,
 207         .ioctl                  = ata_scsi_ioctl,
 208         .queuecommand           = ata_scsi_queuecmd,
 209         .can_queue              = ATA_DEF_QUEUE,
 210         .this_id                = ATA_SHT_THIS_ID,
 211         .sg_tablesize           = LIBATA_MAX_PRD,
 212         .cmd_per_lun            = ATA_SHT_CMD_PER_LUN,
 213         .emulated               = ATA_SHT_EMULATED,
 214         .use_clustering         = ATA_SHT_USE_CLUSTERING,
 215         .proc_name              = DRV_NAME,
 216         .dma_boundary           = ATA_DMA_BOUNDARY,
 217         .slave_configure        = ata_scsi_slave_config,
 218         .slave_destroy          = ata_scsi_slave_destroy,
 219         .bios_param             = ata_std_bios_param,
 220         .resume                 = ata_scsi_device_resume,
 221         .suspend                = ata_scsi_device_suspend,
 222 };
 223
 224 static struct ata_port_operations atiixp_port_ops = {
 225         .port_disable   = ata_port_disable,
 226         .set_piomode    = atiixp_set_piomode,
 227         .set_dmamode    = atiixp_set_dmamode,
 228         .mode_filter    = ata_pci_default_filter,
 229         .tf_load        = ata_tf_load,
 230         .tf_read        = ata_tf_read,
 231         .check_status   = ata_check_status,
 232         .exec_command   = ata_exec_command,
 233         .dev_select     = ata_std_dev_select,
 234
 235         .freeze         = ata_bmdma_freeze,
 236         .thaw           = ata_bmdma_thaw,
 237         .error_handler  = atiixp_error_handler,
 238         .post_internal_cmd = ata_bmdma_post_internal_cmd,
 239
 240         .bmdma_setup    = ata_bmdma_setup,
 241         .bmdma_start    = atiixp_bmdma_start,
 242         .bmdma_stop     = atiixp_bmdma_stop,
 243         .bmdma_status   = ata_bmdma_status,
 244
 245         .qc_prep        = ata_qc_prep,
 246         .qc_issue       = ata_qc_issue_prot,
 247
 248         .data_xfer      = ata_pio_data_xfer,
 249
 250         .irq_handler    = ata_interrupt,
 251         .irq_clear      = ata_bmdma_irq_clear,
 252
 253         .port_start     = ata_port_start,
 254         .port_stop      = ata_port_stop,
 255         .host_stop      = ata_host_stop
 256 };
 257
 258 static int atiixp_init_one(struct pci_dev *dev, const struct pci_device_id *id)
 259 {
 260         static struct ata_port_info info = {
 261                 .sht = &atiixp_sht,
 262                 .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST,
 263                 .pio_mask = 0x1f,
 264                 .mwdma_mask = 0x06,     /* No MWDMA0 support */
 265                 .udma_mask = 0x3F,
 266                 .port_ops = &atiixp_port_ops
 267         };
 268         static struct ata_port_info *port_info[2] = { &info, &info };
 269         return ata_pci_init_one(dev, port_info, 2);
 270 }
 271
 272 static const struct pci_device_id atiixp[] = {
 273         { PCI_VDEVICE(ATI, PCI_DEVICE_ID_ATI_IXP200_IDE), },
 274         { PCI_VDEVICE(ATI, PCI_DEVICE_ID_ATI_IXP300_IDE), },
 275         { PCI_VDEVICE(ATI, PCI_DEVICE_ID_ATI_IXP400_IDE), },
 276         { PCI_VDEVICE(ATI, PCI_DEVICE_ID_ATI_IXP600_IDE), },
 277
 278         { },
 279 };
 280
 281 static struct pci_driver atiixp_pci_driver = {
 282         .name           = DRV_NAME,
 283         .id_table       = atiixp,
 284         .probe          = atiixp_init_one,
 285         .remove         = ata_pci_remove_one,
 286         .resume         = ata_pci_device_resume,
 287         .suspend        = ata_pci_device_suspend,
 288 };
 289
 290 static int __init atiixp_init(void)
 291 {
 292         return pci_register_driver(&atiixp_pci_driver);
 293 }
 294
 295
 296 static void __exit atiixp_exit(void)
 297 {
 298         pci_unregister_driver(&atiixp_pci_driver);
 299 }
 300
 301 MODULE_AUTHOR("Alan Cox");
 302 MODULE_DESCRIPTION("low-level driver for ATI IXP200/300/400");
 303 MODULE_LICENSE("GPL");
 304 MODULE_DEVICE_TABLE(pci, atiixp);
 305 MODULE_VERSION(DRV_VERSION);
 306
 307 module_init(atiixp_init);
 308 module_exit(atiixp_exit);