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Blackfin arch: move fixed code into init section
[linux-2.6/x86.git] / arch / blackfin / kernel / setup.c
blobc644d234a02ebc511d8b72068358e4e64295b636
1 /*
2 * arch/blackfin/kernel/setup.c
3 *
4 * Copyright 2004-2006 Analog Devices Inc.
5 *
6 * Enter bugs at http://blackfin.uclinux.org/
7 *
8 * Licensed under the GPL-2 or later.
9 */
10
11 #include <linux/delay.h>
12 #include <linux/console.h>
13 #include <linux/bootmem.h>
14 #include <linux/seq_file.h>
15 #include <linux/cpu.h>
16 #include <linux/module.h>
17 #include <linux/tty.h>
18 #include <linux/pfn.h>
19
20 #include <linux/ext2_fs.h>
21 #include <linux/cramfs_fs.h>
22 #include <linux/romfs_fs.h>
23
24 #include <asm/cplb.h>
25 #include <asm/cacheflush.h>
26 #include <asm/blackfin.h>
27 #include <asm/cplbinit.h>
28 #include <asm/div64.h>
29 #include <asm/cpu.h>
30 #include <asm/fixed_code.h>
31 #include <asm/early_printk.h>
32
33 u16 _bfin_swrst;
34 EXPORT_SYMBOL(_bfin_swrst);
35
36 unsigned long memory_start, memory_end, physical_mem_end;
37 unsigned long _rambase, _ramstart, _ramend;
38 unsigned long reserved_mem_dcache_on;
39 unsigned long reserved_mem_icache_on;
40 EXPORT_SYMBOL(memory_start);
41 EXPORT_SYMBOL(memory_end);
42 EXPORT_SYMBOL(physical_mem_end);
43 EXPORT_SYMBOL(_ramend);
44 EXPORT_SYMBOL(reserved_mem_dcache_on);
45
46 #ifdef CONFIG_MTD_UCLINUX
47 unsigned long memory_mtd_end, memory_mtd_start, mtd_size;
48 unsigned long _ebss;
49 EXPORT_SYMBOL(memory_mtd_end);
50 EXPORT_SYMBOL(memory_mtd_start);
51 EXPORT_SYMBOL(mtd_size);
52 #endif
53
54 char __initdata command_line[COMMAND_LINE_SIZE];
55 void __initdata *init_retx, *init_saved_retx, *init_saved_seqstat,
56 *init_saved_icplb_fault_addr, *init_saved_dcplb_fault_addr;
57
58 /* boot memmap, for parsing "memmap=" */
59 #define BFIN_MEMMAP_MAX 128 /* number of entries in bfin_memmap */
60 #define BFIN_MEMMAP_RAM 1
61 #define BFIN_MEMMAP_RESERVED 2
62 struct bfin_memmap {
63 int nr_map;
64 struct bfin_memmap_entry {
65 unsigned long long addr; /* start of memory segment */
66 unsigned long long size;
67 unsigned long type;
68 } map[BFIN_MEMMAP_MAX];
69 } bfin_memmap __initdata;
70
71 /* for memmap sanitization */
72 struct change_member {
73 struct bfin_memmap_entry *pentry; /* pointer to original entry */
74 unsigned long long addr; /* address for this change point */
75 };
76 static struct change_member change_point_list[2*BFIN_MEMMAP_MAX] __initdata;
77 static struct change_member *change_point[2*BFIN_MEMMAP_MAX] __initdata;
78 static struct bfin_memmap_entry *overlap_list[BFIN_MEMMAP_MAX] __initdata;
79 static struct bfin_memmap_entry new_map[BFIN_MEMMAP_MAX] __initdata;
80
81 DEFINE_PER_CPU(struct blackfin_cpudata, cpu_data);
82
83 #if defined(CONFIG_BFIN_DCACHE) || defined(CONFIG_BFIN_ICACHE)
84 void __init generate_cplb_tables(void)
85 {
86 unsigned int cpu;
87
88 /* Generate per-CPU I&D CPLB tables */
89 for (cpu = 0; cpu < num_possible_cpus(); ++cpu)
90 generate_cplb_tables_cpu(cpu);
91 }
92 #endif
93
94 void __cpuinit bfin_setup_caches(unsigned int cpu)
95 {
96 #ifdef CONFIG_BFIN_ICACHE
97 #ifdef CONFIG_MPU
98 bfin_icache_init(icplb_tbl[cpu]);
99 #else
100 bfin_icache_init(icplb_tables[cpu]);
101 #endif
102 #endif
103
104 #ifdef CONFIG_BFIN_DCACHE
105 #ifdef CONFIG_MPU
106 bfin_dcache_init(dcplb_tbl[cpu]);
107 #else
108 bfin_dcache_init(dcplb_tables[cpu]);
109 #endif
110 #endif
111
112 /*
113 * In cache coherence emulation mode, we need to have the
114 * D-cache enabled before running any atomic operation which
115 * might invove cache invalidation (i.e. spinlock, rwlock).
116 * So printk's are deferred until then.
117 */
118 #ifdef CONFIG_BFIN_ICACHE
119 printk(KERN_INFO "Instruction Cache Enabled for CPU%u\n", cpu);
120 #endif
121 #ifdef CONFIG_BFIN_DCACHE
122 printk(KERN_INFO "Data Cache Enabled for CPU%u"
123 # if defined CONFIG_BFIN_WB
124 " (write-back)"
125 # elif defined CONFIG_BFIN_WT
126 " (write-through)"
127 # endif
128 "\n", cpu);
129 #endif
130 }
131
132 void __cpuinit bfin_setup_cpudata(unsigned int cpu)
133 {
134 struct blackfin_cpudata *cpudata = &per_cpu(cpu_data, cpu);
135
136 cpudata->idle = current;
137 cpudata->loops_per_jiffy = loops_per_jiffy;
138 cpudata->cclk = get_cclk();
139 cpudata->imemctl = bfin_read_IMEM_CONTROL();
140 cpudata->dmemctl = bfin_read_DMEM_CONTROL();
141 }
142
143 void __init bfin_cache_init(void)
144 {
145 #if defined(CONFIG_BFIN_DCACHE) || defined(CONFIG_BFIN_ICACHE)
146 generate_cplb_tables();
147 #endif
148 bfin_setup_caches(0);
149 }
150
151 void __init bfin_relocate_l1_mem(void)
152 {
153 unsigned long l1_code_length;
154 unsigned long l1_data_a_length;
155 unsigned long l1_data_b_length;
156 unsigned long l2_length;
157
158 l1_code_length = _etext_l1 - _stext_l1;
159 if (l1_code_length > L1_CODE_LENGTH)
160 panic("L1 Instruction SRAM Overflow\n");
161 /* cannot complain as printk is not available as yet.
162 * But we can continue booting and complain later!
163 */
164
165 /* Copy _stext_l1 to _etext_l1 to L1 instruction SRAM */
166 dma_memcpy(_stext_l1, _l1_lma_start, l1_code_length);
167
168 l1_data_a_length = _sbss_l1 - _sdata_l1;
169 if (l1_data_a_length > L1_DATA_A_LENGTH)
170 panic("L1 Data SRAM Bank A Overflow\n");
171
172 /* Copy _sdata_l1 to _sbss_l1 to L1 data bank A SRAM */
173 dma_memcpy(_sdata_l1, _l1_lma_start + l1_code_length, l1_data_a_length);
174
175 l1_data_b_length = _sbss_b_l1 - _sdata_b_l1;
176 if (l1_data_b_length > L1_DATA_B_LENGTH)
177 panic("L1 Data SRAM Bank B Overflow\n");
178
179 /* Copy _sdata_b_l1 to _sbss_b_l1 to L1 data bank B SRAM */
180 dma_memcpy(_sdata_b_l1, _l1_lma_start + l1_code_length +
181 l1_data_a_length, l1_data_b_length);
182
183 if (L2_LENGTH != 0) {
184 l2_length = _sbss_l2 - _stext_l2;
185 if (l2_length > L2_LENGTH)
186 panic("L2 SRAM Overflow\n");
187
188 /* Copy _stext_l2 to _edata_l2 to L2 SRAM */
189 dma_memcpy(_stext_l2, _l2_lma_start, l2_length);
190 }
191 }
192
193 /* add_memory_region to memmap */
194 static void __init add_memory_region(unsigned long long start,
195 unsigned long long size, int type)
196 {
197 int i;
198
199 i = bfin_memmap.nr_map;
200
201 if (i == BFIN_MEMMAP_MAX) {
202 printk(KERN_ERR "Ooops! Too many entries in the memory map!\n");
203 return;
204 }
205
206 bfin_memmap.map[i].addr = start;
207 bfin_memmap.map[i].size = size;
208 bfin_memmap.map[i].type = type;
209 bfin_memmap.nr_map++;
210 }
211
212 /*
213 * Sanitize the boot memmap, removing overlaps.
214 */
215 static int __init sanitize_memmap(struct bfin_memmap_entry *map, int *pnr_map)
216 {
217 struct change_member *change_tmp;
218 unsigned long current_type, last_type;
219 unsigned long long last_addr;
220 int chgidx, still_changing;
221 int overlap_entries;
222 int new_entry;
223 int old_nr, new_nr, chg_nr;
224 int i;
225
226 /*
227 Visually we're performing the following (1,2,3,4 = memory types)
228
229 Sample memory map (w/overlaps):
230 ____22__________________
231 ______________________4_
232 ____1111________________
233 _44_____________________
234 11111111________________
235 ____________________33__
236 ___________44___________
237 __________33333_________
238 ______________22________
239 ___________________2222_
240 _________111111111______
241 _____________________11_
242 _________________4______
243
244 Sanitized equivalent (no overlap):
245 1_______________________
246 _44_____________________
247 ___1____________________
248 ____22__________________
249 ______11________________
250 _________1______________
251 __________3_____________
252 ___________44___________
253 _____________33_________
254 _______________2________
255 ________________1_______
256 _________________4______
257 ___________________2____
258 ____________________33__
259 ______________________4_
260 */
261 /* if there's only one memory region, don't bother */
262 if (*pnr_map < 2)
263 return -1;
264
265 old_nr = *pnr_map;
266
267 /* bail out if we find any unreasonable addresses in memmap */
268 for (i = 0; i < old_nr; i++)
269 if (map[i].addr + map[i].size < map[i].addr)
270 return -1;
271
272 /* create pointers for initial change-point information (for sorting) */
273 for (i = 0; i < 2*old_nr; i++)
274 change_point[i] = &change_point_list[i];
275
276 /* record all known change-points (starting and ending addresses),
277 omitting those that are for empty memory regions */
278 chgidx = 0;
279 for (i = 0; i < old_nr; i++) {
280 if (map[i].size != 0) {
281 change_point[chgidx]->addr = map[i].addr;
282 change_point[chgidx++]->pentry = &map[i];
283 change_point[chgidx]->addr = map[i].addr + map[i].size;
284 change_point[chgidx++]->pentry = &map[i];
285 }
286 }
287 chg_nr = chgidx; /* true number of change-points */
288
289 /* sort change-point list by memory addresses (low -> high) */
290 still_changing = 1;
291 while (still_changing) {
292 still_changing = 0;
293 for (i = 1; i < chg_nr; i++) {
294 /* if <current_addr> > <last_addr>, swap */
295 /* or, if current=<start_addr> & last=<end_addr>, swap */
296 if ((change_point[i]->addr < change_point[i-1]->addr) ||
297 ((change_point[i]->addr == change_point[i-1]->addr) &&
298 (change_point[i]->addr == change_point[i]->pentry->addr) &&
299 (change_point[i-1]->addr != change_point[i-1]->pentry->addr))
300 ) {
301 change_tmp = change_point[i];
302 change_point[i] = change_point[i-1];
303 change_point[i-1] = change_tmp;
304 still_changing = 1;
305 }
306 }
307 }
308
309 /* create a new memmap, removing overlaps */
310 overlap_entries = 0; /* number of entries in the overlap table */
311 new_entry = 0; /* index for creating new memmap entries */
312 last_type = 0; /* start with undefined memory type */
313 last_addr = 0; /* start with 0 as last starting address */
314 /* loop through change-points, determining affect on the new memmap */
315 for (chgidx = 0; chgidx < chg_nr; chgidx++) {
316 /* keep track of all overlapping memmap entries */
317 if (change_point[chgidx]->addr == change_point[chgidx]->pentry->addr) {
318 /* add map entry to overlap list (> 1 entry implies an overlap) */
319 overlap_list[overlap_entries++] = change_point[chgidx]->pentry;
320 } else {
321 /* remove entry from list (order independent, so swap with last) */
322 for (i = 0; i < overlap_entries; i++) {
323 if (overlap_list[i] == change_point[chgidx]->pentry)
324 overlap_list[i] = overlap_list[overlap_entries-1];
325 }
326 overlap_entries--;
327 }
328 /* if there are overlapping entries, decide which "type" to use */
329 /* (larger value takes precedence -- 1=usable, 2,3,4,4+=unusable) */
330 current_type = 0;
331 for (i = 0; i < overlap_entries; i++)
332 if (overlap_list[i]->type > current_type)
333 current_type = overlap_list[i]->type;
334 /* continue building up new memmap based on this information */
335 if (current_type != last_type) {
336 if (last_type != 0) {
337 new_map[new_entry].size =
338 change_point[chgidx]->addr - last_addr;
339 /* move forward only if the new size was non-zero */
340 if (new_map[new_entry].size != 0)
341 if (++new_entry >= BFIN_MEMMAP_MAX)
342 break; /* no more space left for new entries */
343 }
344 if (current_type != 0) {
345 new_map[new_entry].addr = change_point[chgidx]->addr;
346 new_map[new_entry].type = current_type;
347 last_addr = change_point[chgidx]->addr;
348 }
349 last_type = current_type;
350 }
351 }
352 new_nr = new_entry; /* retain count for new entries */
353
354 /* copy new mapping into original location */
355 memcpy(map, new_map, new_nr*sizeof(struct bfin_memmap_entry));
356 *pnr_map = new_nr;
357
358 return 0;
359 }
360
361 static void __init print_memory_map(char *who)
362 {
363 int i;
364
365 for (i = 0; i < bfin_memmap.nr_map; i++) {
366 printk(KERN_DEBUG " %s: %016Lx - %016Lx ", who,
367 bfin_memmap.map[i].addr,
368 bfin_memmap.map[i].addr + bfin_memmap.map[i].size);
369 switch (bfin_memmap.map[i].type) {
370 case BFIN_MEMMAP_RAM:
371 printk("(usable)\n");
372 break;
373 case BFIN_MEMMAP_RESERVED:
374 printk("(reserved)\n");
375 break;
376 default: printk("type %lu\n", bfin_memmap.map[i].type);
377 break;
378 }
379 }
380 }
381
382 static __init int parse_memmap(char *arg)
383 {
384 unsigned long long start_at, mem_size;
385
386 if (!arg)
387 return -EINVAL;
388
389 mem_size = memparse(arg, &arg);
390 if (*arg == '@') {
391 start_at = memparse(arg+1, &arg);
392 add_memory_region(start_at, mem_size, BFIN_MEMMAP_RAM);
393 } else if (*arg == '$') {
394 start_at = memparse(arg+1, &arg);
395 add_memory_region(start_at, mem_size, BFIN_MEMMAP_RESERVED);
396 }
397
398 return 0;
399 }
400
401 /*
402 * Initial parsing of the command line. Currently, we support:
403 * - Controlling the linux memory size: mem=xxx[KMG]
404 * - Controlling the physical memory size: max_mem=xxx[KMG][$][#]
405 * $ -> reserved memory is dcacheable
406 * # -> reserved memory is icacheable
407 * - "memmap=XXX[KkmM][@][$]XXX[KkmM]" defines a memory region
408 * @ from <start> to <start>+<mem>, type RAM
409 * $ from <start> to <start>+<mem>, type RESERVED
410 */
411 static __init void parse_cmdline_early(char *cmdline_p)
412 {
413 char c = ' ', *to = cmdline_p;
414 unsigned int memsize;
415 for (;;) {
416 if (c == ' ') {
417 if (!memcmp(to, "mem=", 4)) {
418 to += 4;
419 memsize = memparse(to, &to);
420 if (memsize)
421 _ramend = memsize;
422
423 } else if (!memcmp(to, "max_mem=", 8)) {
424 to += 8;
425 memsize = memparse(to, &to);
426 if (memsize) {
427 physical_mem_end = memsize;
428 if (*to != ' ') {
429 if (*to == '$'
430 || *(to + 1) == '$')
431 reserved_mem_dcache_on = 1;
432 if (*to == '#'
433 || *(to + 1) == '#')
434 reserved_mem_icache_on = 1;
435 }
436 }
437 } else if (!memcmp(to, "earlyprintk=", 12)) {
438 to += 12;
439 setup_early_printk(to);
440 } else if (!memcmp(to, "memmap=", 7)) {
441 to += 7;
442 parse_memmap(to);
443 }
444 }
445 c = *(to++);
446 if (!c)
447 break;
448 }
449 }
450
451 /*
452 * Setup memory defaults from user config.
453 * The physical memory layout looks like:
454 *
455 * [_rambase, _ramstart]: kernel image
456 * [memory_start, memory_end]: dynamic memory managed by kernel
457 * [memory_end, _ramend]: reserved memory
458 * [memory_mtd_start(memory_end),
459 * memory_mtd_start + mtd_size]: rootfs (if any)
460 * [_ramend - DMA_UNCACHED_REGION,
461 * _ramend]: uncached DMA region
462 * [_ramend, physical_mem_end]: memory not managed by kernel
463 */
464 static __init void memory_setup(void)
465 {
466 #ifdef CONFIG_MTD_UCLINUX
467 unsigned long mtd_phys = 0;
468 #endif
469
470 _rambase = (unsigned long)_stext;
471 _ramstart = (unsigned long)_end;
472
473 if (DMA_UNCACHED_REGION > (_ramend - _ramstart)) {
474 console_init();
475 panic("DMA region exceeds memory limit: %lu.\n",
476 _ramend - _ramstart);
477 }
478 memory_end = _ramend - DMA_UNCACHED_REGION;
479
480 #ifdef CONFIG_MPU
481 /* Round up to multiple of 4MB */
482 memory_start = (_ramstart + 0x3fffff) & ~0x3fffff;
483 #else
484 memory_start = PAGE_ALIGN(_ramstart);
485 #endif
486
487 #if defined(CONFIG_MTD_UCLINUX)
488 /* generic memory mapped MTD driver */
489 memory_mtd_end = memory_end;
490
491 mtd_phys = _ramstart;
492 mtd_size = PAGE_ALIGN(*((unsigned long *)(mtd_phys + 8)));
493
494 # if defined(CONFIG_EXT2_FS) || defined(CONFIG_EXT3_FS)
495 if (*((unsigned short *)(mtd_phys + 0x438)) == EXT2_SUPER_MAGIC)
496 mtd_size =
497 PAGE_ALIGN(*((unsigned long *)(mtd_phys + 0x404)) << 10);
498 # endif
499
500 # if defined(CONFIG_CRAMFS)
501 if (*((unsigned long *)(mtd_phys)) == CRAMFS_MAGIC)
502 mtd_size = PAGE_ALIGN(*((unsigned long *)(mtd_phys + 0x4)));
503 # endif
504
505 # if defined(CONFIG_ROMFS_FS)
506 if (((unsigned long *)mtd_phys)[0] == ROMSB_WORD0
507 && ((unsigned long *)mtd_phys)[1] == ROMSB_WORD1)
508 mtd_size =
509 PAGE_ALIGN(be32_to_cpu(((unsigned long *)mtd_phys)[2]));
510 # if (defined(CONFIG_BFIN_ICACHE) && ANOMALY_05000263)
511 /* Due to a Hardware Anomaly we need to limit the size of usable
512 * instruction memory to max 60MB, 56 if HUNT_FOR_ZERO is on
513 * 05000263 - Hardware loop corrupted when taking an ICPLB exception
514 */
515 # if (defined(CONFIG_DEBUG_HUNT_FOR_ZERO))
516 if (memory_end >= 56 * 1024 * 1024)
517 memory_end = 56 * 1024 * 1024;
518 # else
519 if (memory_end >= 60 * 1024 * 1024)
520 memory_end = 60 * 1024 * 1024;
521 # endif /* CONFIG_DEBUG_HUNT_FOR_ZERO */
522 # endif /* ANOMALY_05000263 */
523 # endif /* CONFIG_ROMFS_FS */
524
525 memory_end -= mtd_size;
526
527 if (mtd_size == 0) {
528 console_init();
529 panic("Don't boot kernel without rootfs attached.\n");
530 }
531
532 /* Relocate MTD image to the top of memory after the uncached memory area */
533 dma_memcpy((char *)memory_end, _end, mtd_size);
534
535 memory_mtd_start = memory_end;
536 _ebss = memory_mtd_start; /* define _ebss for compatible */
537 #endif /* CONFIG_MTD_UCLINUX */
538
539 #if (defined(CONFIG_BFIN_ICACHE) && ANOMALY_05000263)
540 /* Due to a Hardware Anomaly we need to limit the size of usable
541 * instruction memory to max 60MB, 56 if HUNT_FOR_ZERO is on
542 * 05000263 - Hardware loop corrupted when taking an ICPLB exception
543 */
544 #if (defined(CONFIG_DEBUG_HUNT_FOR_ZERO))
545 if (memory_end >= 56 * 1024 * 1024)
546 memory_end = 56 * 1024 * 1024;
547 #else
548 if (memory_end >= 60 * 1024 * 1024)
549 memory_end = 60 * 1024 * 1024;
550 #endif /* CONFIG_DEBUG_HUNT_FOR_ZERO */
551 printk(KERN_NOTICE "Warning: limiting memory to %liMB due to hardware anomaly 05000263\n", memory_end >> 20);
552 #endif /* ANOMALY_05000263 */
553
554 #ifdef CONFIG_MPU
555 page_mask_nelts = ((_ramend >> PAGE_SHIFT) + 31) / 32;
556 page_mask_order = get_order(3 * page_mask_nelts * sizeof(long));
557 #endif
558
559 #if !defined(CONFIG_MTD_UCLINUX)
560 /*In case there is no valid CPLB behind memory_end make sure we don't get to close*/
561 memory_end -= SIZE_4K;
562 #endif
563
564 init_mm.start_code = (unsigned long)_stext;
565 init_mm.end_code = (unsigned long)_etext;
566 init_mm.end_data = (unsigned long)_edata;
567 init_mm.brk = (unsigned long)0;
568
569 printk(KERN_INFO "Board Memory: %ldMB\n", physical_mem_end >> 20);
570 printk(KERN_INFO "Kernel Managed Memory: %ldMB\n", _ramend >> 20);
571
572 printk(KERN_INFO "Memory map:\n"
573 KERN_INFO " fixedcode = 0x%p-0x%p\n"
574 KERN_INFO " text = 0x%p-0x%p\n"
575 KERN_INFO " rodata = 0x%p-0x%p\n"
576 KERN_INFO " bss = 0x%p-0x%p\n"
577 KERN_INFO " data = 0x%p-0x%p\n"
578 KERN_INFO " stack = 0x%p-0x%p\n"
579 KERN_INFO " init = 0x%p-0x%p\n"
580 KERN_INFO " available = 0x%p-0x%p\n"
581 #ifdef CONFIG_MTD_UCLINUX
582 KERN_INFO " rootfs = 0x%p-0x%p\n"
583 #endif
584 #if DMA_UNCACHED_REGION > 0
585 KERN_INFO " DMA Zone = 0x%p-0x%p\n"
586 #endif
587 , (void *)FIXED_CODE_START, (void *)FIXED_CODE_END,
588 _stext, _etext,
589 __start_rodata, __end_rodata,
590 __bss_start, __bss_stop,
591 _sdata, _edata,
592 (void *)&init_thread_union,
593 (void *)((int)(&init_thread_union) + 0x2000),
594 __init_begin, __init_end,
595 (void *)_ramstart, (void *)memory_end
596 #ifdef CONFIG_MTD_UCLINUX
597 , (void *)memory_mtd_start, (void *)(memory_mtd_start + mtd_size)
598 #endif
599 #if DMA_UNCACHED_REGION > 0
600 , (void *)(_ramend - DMA_UNCACHED_REGION), (void *)(_ramend)
601 #endif
602 );
603 }
604
605 /*
606 * Find the lowest, highest page frame number we have available
607 */
608 void __init find_min_max_pfn(void)
609 {
610 int i;
611
612 max_pfn = 0;
613 min_low_pfn = memory_end;
614
615 for (i = 0; i < bfin_memmap.nr_map; i++) {
616 unsigned long start, end;
617 /* RAM? */
618 if (bfin_memmap.map[i].type != BFIN_MEMMAP_RAM)
619 continue;
620 start = PFN_UP(bfin_memmap.map[i].addr);
621 end = PFN_DOWN(bfin_memmap.map[i].addr +
622 bfin_memmap.map[i].size);
623 if (start >= end)
624 continue;
625 if (end > max_pfn)
626 max_pfn = end;
627 if (start < min_low_pfn)
628 min_low_pfn = start;
629 }
630 }
631
632 static __init void setup_bootmem_allocator(void)
633 {
634 int bootmap_size;
635 int i;
636 unsigned long start_pfn, end_pfn;
637 unsigned long curr_pfn, last_pfn, size;
638
639 /* mark memory between memory_start and memory_end usable */
640 add_memory_region(memory_start,
641 memory_end - memory_start, BFIN_MEMMAP_RAM);
642 /* sanity check for overlap */
643 sanitize_memmap(bfin_memmap.map, &bfin_memmap.nr_map);
644 print_memory_map("boot memmap");
645
646 /* intialize globals in linux/bootmem.h */
647 find_min_max_pfn();
648 /* pfn of the last usable page frame */
649 if (max_pfn > memory_end >> PAGE_SHIFT)
650 max_pfn = memory_end >> PAGE_SHIFT;
651 /* pfn of last page frame directly mapped by kernel */
652 max_low_pfn = max_pfn;
653 /* pfn of the first usable page frame after kernel image*/
654 if (min_low_pfn < memory_start >> PAGE_SHIFT)
655 min_low_pfn = memory_start >> PAGE_SHIFT;
656
657 start_pfn = PAGE_OFFSET >> PAGE_SHIFT;
658 end_pfn = memory_end >> PAGE_SHIFT;
659
660 /*
661 * give all the memory to the bootmap allocator, tell it to put the
662 * boot mem_map at the start of memory.
663 */
664 bootmap_size = init_bootmem_node(NODE_DATA(0),
665 memory_start >> PAGE_SHIFT, /* map goes here */
666 start_pfn, end_pfn);
667
668 /* register the memmap regions with the bootmem allocator */
669 for (i = 0; i < bfin_memmap.nr_map; i++) {
670 /*
671 * Reserve usable memory
672 */
673 if (bfin_memmap.map[i].type != BFIN_MEMMAP_RAM)
674 continue;
675 /*
676 * We are rounding up the start address of usable memory:
677 */
678 curr_pfn = PFN_UP(bfin_memmap.map[i].addr);
679 if (curr_pfn >= end_pfn)
680 continue;
681 /*
682 * ... and at the end of the usable range downwards:
683 */
684 last_pfn = PFN_DOWN(bfin_memmap.map[i].addr +
685 bfin_memmap.map[i].size);
686
687 if (last_pfn > end_pfn)
688 last_pfn = end_pfn;
689
690 /*
691 * .. finally, did all the rounding and playing
692 * around just make the area go away?
693 */
694 if (last_pfn <= curr_pfn)
695 continue;
696
697 size = last_pfn - curr_pfn;
698 free_bootmem(PFN_PHYS(curr_pfn), PFN_PHYS(size));
699 }
700
701 /* reserve memory before memory_start, including bootmap */
702 reserve_bootmem(PAGE_OFFSET,
703 memory_start + bootmap_size + PAGE_SIZE - 1 - PAGE_OFFSET,
704 BOOTMEM_DEFAULT);
705 }
706
707 #define EBSZ_TO_MEG(ebsz) \
708 ({ \
709 int meg = 0; \
710 switch (ebsz & 0xf) { \
711 case 0x1: meg = 16; break; \
712 case 0x3: meg = 32; break; \
713 case 0x5: meg = 64; break; \
714 case 0x7: meg = 128; break; \
715 case 0x9: meg = 256; break; \
716 case 0xb: meg = 512; break; \
717 } \
718 meg; \
719 })
720 static inline int __init get_mem_size(void)
721 {
722 #if defined(EBIU_SDBCTL)
723 # if defined(BF561_FAMILY)
724 int ret = 0;
725 u32 sdbctl = bfin_read_EBIU_SDBCTL();
726 ret += EBSZ_TO_MEG(sdbctl >> 0);
727 ret += EBSZ_TO_MEG(sdbctl >> 8);
728 ret += EBSZ_TO_MEG(sdbctl >> 16);
729 ret += EBSZ_TO_MEG(sdbctl >> 24);
730 return ret;
731 # else
732 return EBSZ_TO_MEG(bfin_read_EBIU_SDBCTL());
733 # endif
734 #elif defined(EBIU_DDRCTL1)
735 u32 ddrctl = bfin_read_EBIU_DDRCTL1();
736 int ret = 0;
737 switch (ddrctl & 0xc0000) {
738 case DEVSZ_64: ret = 64 / 8;
739 case DEVSZ_128: ret = 128 / 8;
740 case DEVSZ_256: ret = 256 / 8;
741 case DEVSZ_512: ret = 512 / 8;
742 }
743 switch (ddrctl & 0x30000) {
744 case DEVWD_4: ret *= 2;
745 case DEVWD_8: ret *= 2;
746 case DEVWD_16: break;
747 }
748 if ((ddrctl & 0xc000) == 0x4000)
749 ret *= 2;
750 return ret;
751 #endif
752 BUG();
753 }
754
755 void __init setup_arch(char **cmdline_p)
756 {
757 unsigned long sclk, cclk;
758
759 #ifdef CONFIG_DUMMY_CONSOLE
760 conswitchp = &dummy_con;
761 #endif
762
763 #if defined(CONFIG_CMDLINE_BOOL)
764 strncpy(&command_line[0], CONFIG_CMDLINE, sizeof(command_line));
765 command_line[sizeof(command_line) - 1] = 0;
766 #endif
767
768 /* Keep a copy of command line */
769 *cmdline_p = &command_line[0];
770 memcpy(boot_command_line, command_line, COMMAND_LINE_SIZE);
771 boot_command_line[COMMAND_LINE_SIZE - 1] = '\0';
772
773 /* setup memory defaults from the user config */
774 physical_mem_end = 0;
775 _ramend = get_mem_size() * 1024 * 1024;
776
777 memset(&bfin_memmap, 0, sizeof(bfin_memmap));
778
779 parse_cmdline_early(&command_line[0]);
780
781 if (physical_mem_end == 0)
782 physical_mem_end = _ramend;
783
784 memory_setup();
785
786 /* Initialize Async memory banks */
787 bfin_write_EBIU_AMBCTL0(AMBCTL0VAL);
788 bfin_write_EBIU_AMBCTL1(AMBCTL1VAL);
789 bfin_write_EBIU_AMGCTL(AMGCTLVAL);
790 #ifdef CONFIG_EBIU_MBSCTLVAL
791 bfin_write_EBIU_MBSCTL(CONFIG_EBIU_MBSCTLVAL);
792 bfin_write_EBIU_MODE(CONFIG_EBIU_MODEVAL);
793 bfin_write_EBIU_FCTL(CONFIG_EBIU_FCTLVAL);
794 #endif
795
796 cclk = get_cclk();
797 sclk = get_sclk();
798
799 #if !defined(CONFIG_BFIN_KERNEL_CLOCK)
800 if (ANOMALY_05000273 && cclk == sclk)
801 panic("ANOMALY 05000273, SCLK can not be same as CCLK");
802 #endif
803
804 #ifdef BF561_FAMILY
805 if (ANOMALY_05000266) {
806 bfin_read_IMDMA_D0_IRQ_STATUS();
807 bfin_read_IMDMA_D1_IRQ_STATUS();
808 }
809 #endif
810 printk(KERN_INFO "Hardware Trace ");
811 if (bfin_read_TBUFCTL() & 0x1)
812 printk("Active ");
813 else
814 printk("Off ");
815 if (bfin_read_TBUFCTL() & 0x2)
816 printk("and Enabled\n");
817 else
818 printk("and Disabled\n");
819
820 #if defined(CONFIG_CHR_DEV_FLASH) || defined(CONFIG_BLK_DEV_FLASH)
821 /* we need to initialize the Flashrom device here since we might
822 * do things with flash early on in the boot
823 */
824 flash_probe();
825 #endif
826
827 _bfin_swrst = bfin_read_SWRST();
828
829 #ifdef CONFIG_DEBUG_DOUBLEFAULT_PRINT
830 bfin_write_SWRST(_bfin_swrst & ~DOUBLE_FAULT);
831 #endif
832 #ifdef CONFIG_DEBUG_DOUBLEFAULT_RESET
833 bfin_write_SWRST(_bfin_swrst | DOUBLE_FAULT);
834 #endif
835
836 #ifdef CONFIG_SMP
837 if (_bfin_swrst & SWRST_DBL_FAULT_A) {
838 #else
839 if (_bfin_swrst & RESET_DOUBLE) {
840 #endif
841 printk(KERN_EMERG "Recovering from DOUBLE FAULT event\n");
842 #ifdef CONFIG_DEBUG_DOUBLEFAULT
843 /* We assume the crashing kernel, and the current symbol table match */
844 printk(KERN_EMERG " While handling exception (EXCAUSE = 0x%x) at %pF\n",
845 (int)init_saved_seqstat & SEQSTAT_EXCAUSE, init_saved_retx);
846 printk(KERN_NOTICE " DCPLB_FAULT_ADDR: %pF\n", init_saved_dcplb_fault_addr);
847 printk(KERN_NOTICE " ICPLB_FAULT_ADDR: %pF\n", init_saved_icplb_fault_addr);
848 #endif
849 printk(KERN_NOTICE " The instruction at %pF caused a double exception\n",
850 init_retx);
851 } else if (_bfin_swrst & RESET_WDOG)
852 printk(KERN_INFO "Recovering from Watchdog event\n");
853 else if (_bfin_swrst & RESET_SOFTWARE)
854 printk(KERN_NOTICE "Reset caused by Software reset\n");
855
856 printk(KERN_INFO "Blackfin support (C) 2004-2008 Analog Devices, Inc.\n");
857 if (bfin_compiled_revid() == 0xffff)
858 printk(KERN_INFO "Compiled for ADSP-%s Rev any\n", CPU);
859 else if (bfin_compiled_revid() == -1)
860 printk(KERN_INFO "Compiled for ADSP-%s Rev none\n", CPU);
861 else
862 printk(KERN_INFO "Compiled for ADSP-%s Rev 0.%d\n", CPU, bfin_compiled_revid());
863
864 if (unlikely(CPUID != bfin_cpuid()))
865 printk(KERN_ERR "ERROR: Not running on ADSP-%s: unknown CPUID 0x%04x Rev 0.%d\n",
866 CPU, bfin_cpuid(), bfin_revid());
867 else {
868 if (bfin_revid() != bfin_compiled_revid()) {
869 if (bfin_compiled_revid() == -1)
870 printk(KERN_ERR "Warning: Compiled for Rev none, but running on Rev %d\n",
871 bfin_revid());
872 else if (bfin_compiled_revid() != 0xffff)
873 printk(KERN_ERR "Warning: Compiled for Rev %d, but running on Rev %d\n",
874 bfin_compiled_revid(), bfin_revid());
875 }
876 if (bfin_revid() < CONFIG_BF_REV_MIN || bfin_revid() > CONFIG_BF_REV_MAX)
877 printk(KERN_ERR "Warning: Unsupported Chip Revision ADSP-%s Rev 0.%d detected\n",
878 CPU, bfin_revid());
879 }
880
881 printk(KERN_INFO "Blackfin Linux support by http://blackfin.uclinux.org/\n");
882
883 printk(KERN_INFO "Processor Speed: %lu MHz core clock and %lu MHz System Clock\n",
884 cclk / 1000000, sclk / 1000000);
885
886 if (ANOMALY_05000273 && (cclk >> 1) <= sclk)
887 printk("\n\n\nANOMALY_05000273: CCLK must be >= 2*SCLK !!!\n\n\n");
888
889 setup_bootmem_allocator();
890
891 paging_init();
892
893 /* Copy atomic sequences to their fixed location, and sanity check that
894 these locations are the ones that we advertise to userspace. */
895 memcpy((void *)FIXED_CODE_START, &fixed_code_start,
896 FIXED_CODE_END - FIXED_CODE_START);
897 BUG_ON((char *)&sigreturn_stub - (char *)&fixed_code_start
898 != SIGRETURN_STUB - FIXED_CODE_START);
899 BUG_ON((char *)&atomic_xchg32 - (char *)&fixed_code_start
900 != ATOMIC_XCHG32 - FIXED_CODE_START);
901 BUG_ON((char *)&atomic_cas32 - (char *)&fixed_code_start
902 != ATOMIC_CAS32 - FIXED_CODE_START);
903 BUG_ON((char *)&atomic_add32 - (char *)&fixed_code_start
904 != ATOMIC_ADD32 - FIXED_CODE_START);
905 BUG_ON((char *)&atomic_sub32 - (char *)&fixed_code_start
906 != ATOMIC_SUB32 - FIXED_CODE_START);
907 BUG_ON((char *)&atomic_ior32 - (char *)&fixed_code_start
908 != ATOMIC_IOR32 - FIXED_CODE_START);
909 BUG_ON((char *)&atomic_and32 - (char *)&fixed_code_start
910 != ATOMIC_AND32 - FIXED_CODE_START);
911 BUG_ON((char *)&atomic_xor32 - (char *)&fixed_code_start
912 != ATOMIC_XOR32 - FIXED_CODE_START);
913 BUG_ON((char *)&safe_user_instruction - (char *)&fixed_code_start
914 != SAFE_USER_INSTRUCTION - FIXED_CODE_START);
915
916 #ifdef CONFIG_SMP
917 platform_init_cpus();
918 #endif
919 init_exception_vectors();
920 bfin_cache_init(); /* Initialize caches for the boot CPU */
921 }
922
923 static int __init topology_init(void)
924 {
925 unsigned int cpu;
926 /* Record CPU-private information for the boot processor. */
927 bfin_setup_cpudata(0);
928
929 for_each_possible_cpu(cpu) {
930 register_cpu(&per_cpu(cpu_data, cpu).cpu, cpu);
931 }
932
933 return 0;
934 }
935
936 subsys_initcall(topology_init);
937
938 /* Get the voltage input multiplier */
939 static u_long cached_vco_pll_ctl, cached_vco;
940 static u_long get_vco(void)
941 {
942 u_long msel;
943
944 u_long pll_ctl = bfin_read_PLL_CTL();
945 if (pll_ctl == cached_vco_pll_ctl)
946 return cached_vco;
947 else
948 cached_vco_pll_ctl = pll_ctl;
949
950 msel = (pll_ctl >> 9) & 0x3F;
951 if (0 == msel)
952 msel = 64;
953
954 cached_vco = CONFIG_CLKIN_HZ;
955 cached_vco >>= (1 & pll_ctl); /* DF bit */
956 cached_vco *= msel;
957 return cached_vco;
958 }
959
960 /* Get the Core clock */
961 static u_long cached_cclk_pll_div, cached_cclk;
962 u_long get_cclk(void)
963 {
964 u_long csel, ssel;
965
966 if (bfin_read_PLL_STAT() & 0x1)
967 return CONFIG_CLKIN_HZ;
968
969 ssel = bfin_read_PLL_DIV();
970 if (ssel == cached_cclk_pll_div)
971 return cached_cclk;
972 else
973 cached_cclk_pll_div = ssel;
974
975 csel = ((ssel >> 4) & 0x03);
976 ssel &= 0xf;
977 if (ssel && ssel < (1 << csel)) /* SCLK > CCLK */
978 cached_cclk = get_vco() / ssel;
979 else
980 cached_cclk = get_vco() >> csel;
981 return cached_cclk;
982 }
983 EXPORT_SYMBOL(get_cclk);
984
985 /* Get the System clock */
986 static u_long cached_sclk_pll_div, cached_sclk;
987 u_long get_sclk(void)
988 {
989 u_long ssel;
990
991 if (bfin_read_PLL_STAT() & 0x1)
992 return CONFIG_CLKIN_HZ;
993
994 ssel = bfin_read_PLL_DIV();
995 if (ssel == cached_sclk_pll_div)
996 return cached_sclk;
997 else
998 cached_sclk_pll_div = ssel;
999
1000 ssel &= 0xf;
1001 if (0 == ssel) {
1002 printk(KERN_WARNING "Invalid System Clock\n");
1003 ssel = 1;
1004 }
1005
1006 cached_sclk = get_vco() / ssel;
1007 return cached_sclk;
1008 }
1009 EXPORT_SYMBOL(get_sclk);
1010
1011 unsigned long sclk_to_usecs(unsigned long sclk)
1012 {
1013 u64 tmp = USEC_PER_SEC * (u64)sclk;
1014 do_div(tmp, get_sclk());
1015 return tmp;
1016 }
1017 EXPORT_SYMBOL(sclk_to_usecs);
1018
1019 unsigned long usecs_to_sclk(unsigned long usecs)
1020 {
1021 u64 tmp = get_sclk() * (u64)usecs;
1022 do_div(tmp, USEC_PER_SEC);
1023 return tmp;
1024 }
1025 EXPORT_SYMBOL(usecs_to_sclk);
1026
1027 /*
1028 * Get CPU information for use by the procfs.
1029 */
1030 static int show_cpuinfo(struct seq_file *m, void *v)
1031 {
1032 char *cpu, *mmu, *fpu, *vendor, *cache;
1033 uint32_t revid;
1034
1035 u_long sclk = 0;
1036 u_int icache_size = BFIN_ICACHESIZE / 1024, dcache_size = 0, dsup_banks = 0;
1037 struct blackfin_cpudata *cpudata = &per_cpu(cpu_data, *(unsigned int *)v);
1038
1039 cpu = CPU;
1040 mmu = "none";
1041 fpu = "none";
1042 revid = bfin_revid();
1043
1044 sclk = get_sclk();
1045
1046 switch (bfin_read_CHIPID() & CHIPID_MANUFACTURE) {
1047 case 0xca:
1048 vendor = "Analog Devices";
1049 break;
1050 default:
1051 vendor = "unknown";
1052 break;
1053 }
1054
1055 seq_printf(m, "processor\t: %d\n" "vendor_id\t: %s\n",
1056 *(unsigned int *)v, vendor);
1057
1058 if (CPUID == bfin_cpuid())
1059 seq_printf(m, "cpu family\t: 0x%04x\n", CPUID);
1060 else
1061 seq_printf(m, "cpu family\t: Compiled for:0x%04x, running on:0x%04x\n",
1062 CPUID, bfin_cpuid());
1063
1064 seq_printf(m, "model name\t: ADSP-%s %lu(MHz CCLK) %lu(MHz SCLK) (%s)\n"
1065 "stepping\t: %d\n",
1066 cpu, cpudata->cclk/1000000, sclk/1000000,
1067 #ifdef CONFIG_MPU
1068 "mpu on",
1069 #else
1070 "mpu off",
1071 #endif
1072 revid);
1073
1074 seq_printf(m, "cpu MHz\t\t: %lu.%03lu/%lu.%03lu\n",
1075 cpudata->cclk/1000000, cpudata->cclk%1000000,
1076 sclk/1000000, sclk%1000000);
1077 seq_printf(m, "bogomips\t: %lu.%02lu\n"
1078 "Calibration\t: %lu loops\n",
1079 (cpudata->loops_per_jiffy * HZ) / 500000,
1080 ((cpudata->loops_per_jiffy * HZ) / 5000) % 100,
1081 (cpudata->loops_per_jiffy * HZ));
1082
1083 /* Check Cache configutation */
1084 switch (cpudata->dmemctl & (1 << DMC0_P | 1 << DMC1_P)) {
1085 case ACACHE_BSRAM:
1086 cache = "dbank-A/B\t: cache/sram";
1087 dcache_size = 16;
1088 dsup_banks = 1;
1089 break;
1090 case ACACHE_BCACHE:
1091 cache = "dbank-A/B\t: cache/cache";
1092 dcache_size = 32;
1093 dsup_banks = 2;
1094 break;
1095 case ASRAM_BSRAM:
1096 cache = "dbank-A/B\t: sram/sram";
1097 dcache_size = 0;
1098 dsup_banks = 0;
1099 break;
1100 default:
1101 cache = "unknown";
1102 dcache_size = 0;
1103 dsup_banks = 0;
1104 break;
1105 }
1106
1107 /* Is it turned on? */
1108 if ((cpudata->dmemctl & (ENDCPLB | DMC_ENABLE)) != (ENDCPLB | DMC_ENABLE))
1109 dcache_size = 0;
1110
1111 if ((cpudata->imemctl & (IMC | ENICPLB)) != (IMC | ENICPLB))
1112 icache_size = 0;
1113
1114 seq_printf(m, "cache size\t: %d KB(L1 icache) "
1115 "%d KB(L1 dcache-%s) %d KB(L2 cache)\n",
1116 icache_size, dcache_size,
1117 #if defined CONFIG_BFIN_WB
1118 "wb"
1119 #elif defined CONFIG_BFIN_WT
1120 "wt"
1121 #endif
1122 "", 0);
1123
1124 seq_printf(m, "%s\n", cache);
1125
1126 if (icache_size)
1127 seq_printf(m, "icache setup\t: %d Sub-banks/%d Ways, %d Lines/Way\n",
1128 BFIN_ISUBBANKS, BFIN_IWAYS, BFIN_ILINES);
1129 else
1130 seq_printf(m, "icache setup\t: off\n");
1131
1132 seq_printf(m,
1133 "dcache setup\t: %d Super-banks/%d Sub-banks/%d Ways, %d Lines/Way\n",
1134 dsup_banks, BFIN_DSUBBANKS, BFIN_DWAYS,
1135 BFIN_DLINES);
1136 #ifdef __ARCH_SYNC_CORE_DCACHE
1137 seq_printf(m,
1138 "SMP Dcache Flushes\t: %lu\n\n",
1139 per_cpu(cpu_data, *(unsigned int *)v).dcache_invld_count);
1140 #endif
1141 #ifdef CONFIG_BFIN_ICACHE_LOCK
1142 switch ((cpudata->imemctl >> 3) & WAYALL_L) {
1143 case WAY0_L:
1144 seq_printf(m, "Way0 Locked-Down\n");
1145 break;
1146 case WAY1_L:
1147 seq_printf(m, "Way1 Locked-Down\n");
1148 break;
1149 case WAY01_L:
1150 seq_printf(m, "Way0,Way1 Locked-Down\n");
1151 break;
1152 case WAY2_L:
1153 seq_printf(m, "Way2 Locked-Down\n");
1154 break;
1155 case WAY02_L:
1156 seq_printf(m, "Way0,Way2 Locked-Down\n");
1157 break;
1158 case WAY12_L:
1159 seq_printf(m, "Way1,Way2 Locked-Down\n");
1160 break;
1161 case WAY012_L:
1162 seq_printf(m, "Way0,Way1 & Way2 Locked-Down\n");
1163 break;
1164 case WAY3_L:
1165 seq_printf(m, "Way3 Locked-Down\n");
1166 break;
1167 case WAY03_L:
1168 seq_printf(m, "Way0,Way3 Locked-Down\n");
1169 break;
1170 case WAY13_L:
1171 seq_printf(m, "Way1,Way3 Locked-Down\n");
1172 break;
1173 case WAY013_L:
1174 seq_printf(m, "Way 0,Way1,Way3 Locked-Down\n");
1175 break;
1176 case WAY32_L:
1177 seq_printf(m, "Way3,Way2 Locked-Down\n");
1178 break;
1179 case WAY320_L:
1180 seq_printf(m, "Way3,Way2,Way0 Locked-Down\n");
1181 break;
1182 case WAY321_L:
1183 seq_printf(m, "Way3,Way2,Way1 Locked-Down\n");
1184 break;
1185 case WAYALL_L:
1186 seq_printf(m, "All Ways are locked\n");
1187 break;
1188 default:
1189 seq_printf(m, "No Ways are locked\n");
1190 }
1191 #endif
1192 if (*(unsigned int *)v != NR_CPUS-1)
1193 return 0;
1194
1195 #if L2_LENGTH
1196 seq_printf(m, "L2 SRAM\t\t: %dKB\n", L2_LENGTH/0x400);
1197 #endif
1198 seq_printf(m, "board name\t: %s\n", bfin_board_name);
1199 seq_printf(m, "board memory\t: %ld kB (0x%p -> 0x%p)\n",
1200 physical_mem_end >> 10, (void *)0, (void *)physical_mem_end);
1201 seq_printf(m, "kernel memory\t: %d kB (0x%p -> 0x%p)\n",
1202 ((int)memory_end - (int)_stext) >> 10,
1203 _stext,
1204 (void *)memory_end);
1205 seq_printf(m, "\n");
1206
1207 return 0;
1208 }
1209
1210 static void *c_start(struct seq_file *m, loff_t *pos)
1211 {
1212 if (*pos == 0)
1213 *pos = first_cpu(cpu_online_map);
1214 if (*pos >= num_online_cpus())
1215 return NULL;
1216
1217 return pos;
1218 }
1219
1220 static void *c_next(struct seq_file *m, void *v, loff_t *pos)
1221 {
1222 *pos = next_cpu(*pos, cpu_online_map);
1223
1224 return c_start(m, pos);
1225 }
1226
1227 static void c_stop(struct seq_file *m, void *v)
1228 {
1229 }
1230
1231 const struct seq_operations cpuinfo_op = {
1232 .start = c_start,
1233 .next = c_next,
1234 .stop = c_stop,
1235 .show = show_cpuinfo,
1236 };
1237
1238 void __init cmdline_init(const char *r0)
1239 {
1240 if (r0)
1241 strncpy(command_line, r0, COMMAND_LINE_SIZE);
1242 }
x86 "subsystem" repository