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hwmon: (w83795) Fix fan control mode attributes
[linux-2.6/x86.git] / drivers / hwmon / w83795.c
blobfd96e72adde04f29579d04990266b5854682bf30
1 /*
2 * w83795.c - Linux kernel driver for hardware monitoring
3 * Copyright (C) 2008 Nuvoton Technology Corp.
4 * Wei Song
5 * Copyright (C) 2010 Jean Delvare <khali@linux-fr.org>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation - version 2.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
19 * 02110-1301 USA.
20 *
21 * Supports following chips:
22 *
23 * Chip #vin #fanin #pwm #temp #dts wchipid vendid i2c ISA
24 * w83795g 21 14 8 6 8 0x79 0x5ca3 yes no
25 * w83795adg 18 14 2 6 8 0x79 0x5ca3 yes no
26 */
27
28 #include <linux/kernel.h>
29 #include <linux/module.h>
30 #include <linux/init.h>
31 #include <linux/slab.h>
32 #include <linux/i2c.h>
33 #include <linux/hwmon.h>
34 #include <linux/hwmon-sysfs.h>
35 #include <linux/err.h>
36 #include <linux/mutex.h>
37 #include <linux/delay.h>
38
39 /* Addresses to scan */
40 static const unsigned short normal_i2c[] = {
41 0x2c, 0x2d, 0x2e, 0x2f, I2C_CLIENT_END
42 };
43
44
45 static int reset;
46 module_param(reset, bool, 0);
47 MODULE_PARM_DESC(reset, "Set to 1 to reset chip, not recommended");
48
49
50 #define W83795_REG_BANKSEL 0x00
51 #define W83795_REG_VENDORID 0xfd
52 #define W83795_REG_CHIPID 0xfe
53 #define W83795_REG_DEVICEID 0xfb
54 #define W83795_REG_DEVICEID_A 0xff
55
56 #define W83795_REG_I2C_ADDR 0xfc
57 #define W83795_REG_CONFIG 0x01
58 #define W83795_REG_CONFIG_CONFIG48 0x04
59 #define W83795_REG_CONFIG_START 0x01
60
61 /* Multi-Function Pin Ctrl Registers */
62 #define W83795_REG_VOLT_CTRL1 0x02
63 #define W83795_REG_VOLT_CTRL2 0x03
64 #define W83795_REG_TEMP_CTRL1 0x04
65 #define W83795_REG_TEMP_CTRL2 0x05
66 #define W83795_REG_FANIN_CTRL1 0x06
67 #define W83795_REG_FANIN_CTRL2 0x07
68 #define W83795_REG_VMIGB_CTRL 0x08
69
70 #define TEMP_READ 0
71 #define TEMP_CRIT 1
72 #define TEMP_CRIT_HYST 2
73 #define TEMP_WARN 3
74 #define TEMP_WARN_HYST 4
75 /* only crit and crit_hyst affect real-time alarm status
76 * current crit crit_hyst warn warn_hyst */
77 static const u16 W83795_REG_TEMP[][5] = {
78 {0x21, 0x96, 0x97, 0x98, 0x99}, /* TD1/TR1 */
79 {0x22, 0x9a, 0x9b, 0x9c, 0x9d}, /* TD2/TR2 */
80 {0x23, 0x9e, 0x9f, 0xa0, 0xa1}, /* TD3/TR3 */
81 {0x24, 0xa2, 0xa3, 0xa4, 0xa5}, /* TD4/TR4 */
82 {0x1f, 0xa6, 0xa7, 0xa8, 0xa9}, /* TR5 */
83 {0x20, 0xaa, 0xab, 0xac, 0xad}, /* TR6 */
84 };
85
86 #define IN_READ 0
87 #define IN_MAX 1
88 #define IN_LOW 2
89 static const u16 W83795_REG_IN[][3] = {
90 /* Current, HL, LL */
91 {0x10, 0x70, 0x71}, /* VSEN1 */
92 {0x11, 0x72, 0x73}, /* VSEN2 */
93 {0x12, 0x74, 0x75}, /* VSEN3 */
94 {0x13, 0x76, 0x77}, /* VSEN4 */
95 {0x14, 0x78, 0x79}, /* VSEN5 */
96 {0x15, 0x7a, 0x7b}, /* VSEN6 */
97 {0x16, 0x7c, 0x7d}, /* VSEN7 */
98 {0x17, 0x7e, 0x7f}, /* VSEN8 */
99 {0x18, 0x80, 0x81}, /* VSEN9 */
100 {0x19, 0x82, 0x83}, /* VSEN10 */
101 {0x1A, 0x84, 0x85}, /* VSEN11 */
102 {0x1B, 0x86, 0x87}, /* VTT */
103 {0x1C, 0x88, 0x89}, /* 3VDD */
104 {0x1D, 0x8a, 0x8b}, /* 3VSB */
105 {0x1E, 0x8c, 0x8d}, /* VBAT */
106 {0x1F, 0xa6, 0xa7}, /* VSEN12 */
107 {0x20, 0xaa, 0xab}, /* VSEN13 */
108 {0x21, 0x96, 0x97}, /* VSEN14 */
109 {0x22, 0x9a, 0x9b}, /* VSEN15 */
110 {0x23, 0x9e, 0x9f}, /* VSEN16 */
111 {0x24, 0xa2, 0xa3}, /* VSEN17 */
112 };
113 #define W83795_REG_VRLSB 0x3C
114
115 static const u8 W83795_REG_IN_HL_LSB[] = {
116 0x8e, /* VSEN1-4 */
117 0x90, /* VSEN5-8 */
118 0x92, /* VSEN9-11 */
119 0x94, /* VTT, 3VDD, 3VSB, 3VBAT */
120 0xa8, /* VSEN12 */
121 0xac, /* VSEN13 */
122 0x98, /* VSEN14 */
123 0x9c, /* VSEN15 */
124 0xa0, /* VSEN16 */
125 0xa4, /* VSEN17 */
126 };
127
128 #define IN_LSB_REG(index, type) \
129 (((type) == 1) ? W83795_REG_IN_HL_LSB[(index)] \
130 : (W83795_REG_IN_HL_LSB[(index)] + 1))
131
132 #define IN_LSB_SHIFT 0
133 #define IN_LSB_IDX 1
134 static const u8 IN_LSB_SHIFT_IDX[][2] = {
135 /* High/Low LSB shift, LSB No. */
136 {0x00, 0x00}, /* VSEN1 */
137 {0x02, 0x00}, /* VSEN2 */
138 {0x04, 0x00}, /* VSEN3 */
139 {0x06, 0x00}, /* VSEN4 */
140 {0x00, 0x01}, /* VSEN5 */
141 {0x02, 0x01}, /* VSEN6 */
142 {0x04, 0x01}, /* VSEN7 */
143 {0x06, 0x01}, /* VSEN8 */
144 {0x00, 0x02}, /* VSEN9 */
145 {0x02, 0x02}, /* VSEN10 */
146 {0x04, 0x02}, /* VSEN11 */
147 {0x00, 0x03}, /* VTT */
148 {0x02, 0x03}, /* 3VDD */
149 {0x04, 0x03}, /* 3VSB */
150 {0x06, 0x03}, /* VBAT */
151 {0x06, 0x04}, /* VSEN12 */
152 {0x06, 0x05}, /* VSEN13 */
153 {0x06, 0x06}, /* VSEN14 */
154 {0x06, 0x07}, /* VSEN15 */
155 {0x06, 0x08}, /* VSEN16 */
156 {0x06, 0x09}, /* VSEN17 */
157 };
158
159
160 #define W83795_REG_FAN(index) (0x2E + (index))
161 #define W83795_REG_FAN_MIN_HL(index) (0xB6 + (index))
162 #define W83795_REG_FAN_MIN_LSB(index) (0xC4 + (index) / 2)
163 #define W83795_REG_FAN_MIN_LSB_SHIFT(index) \
164 (((index) & 1) ? 4 : 0)
165
166 #define W83795_REG_VID_CTRL 0x6A
167
168 #define W83795_REG_ALARM(index) (0x41 + (index))
169 #define W83795_REG_BEEP(index) (0x50 + (index))
170
171 #define W83795_REG_CLR_CHASSIS 0x4D
172
173
174 #define W83795_REG_FCMS1 0x201
175 #define W83795_REG_FCMS2 0x208
176 #define W83795_REG_TFMR(index) (0x202 + (index))
177 #define W83795_REG_FOMC 0x20F
178
179 #define W83795_REG_TSS(index) (0x209 + (index))
180
181 #define PWM_OUTPUT 0
182 #define PWM_FREQ 1
183 #define PWM_START 2
184 #define PWM_NONSTOP 3
185 #define PWM_STOP_TIME 4
186 #define W83795_REG_PWM(index, nr) (0x210 + (nr) * 8 + (index))
187
188 #define W83795_REG_FTSH(index) (0x240 + (index) * 2)
189 #define W83795_REG_FTSL(index) (0x241 + (index) * 2)
190 #define W83795_REG_TFTS 0x250
191
192 #define TEMP_PWM_TTTI 0
193 #define TEMP_PWM_CTFS 1
194 #define TEMP_PWM_HCT 2
195 #define TEMP_PWM_HOT 3
196 #define W83795_REG_TTTI(index) (0x260 + (index))
197 #define W83795_REG_CTFS(index) (0x268 + (index))
198 #define W83795_REG_HT(index) (0x270 + (index))
199
200 #define SF4_TEMP 0
201 #define SF4_PWM 1
202 #define W83795_REG_SF4_TEMP(temp_num, index) \
203 (0x280 + 0x10 * (temp_num) + (index))
204 #define W83795_REG_SF4_PWM(temp_num, index) \
205 (0x288 + 0x10 * (temp_num) + (index))
206
207 #define W83795_REG_DTSC 0x301
208 #define W83795_REG_DTSE 0x302
209 #define W83795_REG_DTS(index) (0x26 + (index))
210 #define W83795_REG_PECI_TBASE(index) (0x320 + (index))
211
212 #define DTS_CRIT 0
213 #define DTS_CRIT_HYST 1
214 #define DTS_WARN 2
215 #define DTS_WARN_HYST 3
216 #define W83795_REG_DTS_EXT(index) (0xB2 + (index))
217
218 #define SETUP_PWM_DEFAULT 0
219 #define SETUP_PWM_UPTIME 1
220 #define SETUP_PWM_DOWNTIME 2
221 #define W83795_REG_SETUP_PWM(index) (0x20C + (index))
222
223 static inline u16 in_from_reg(u8 index, u16 val)
224 {
225 /* 3VDD, 3VSB and VBAT: 6 mV/bit; other inputs: 2 mV/bit */
226 if (index >= 12 && index <= 14)
227 return val * 6;
228 else
229 return val * 2;
230 }
231
232 static inline u16 in_to_reg(u8 index, u16 val)
233 {
234 if (index >= 12 && index <= 14)
235 return val / 6;
236 else
237 return val / 2;
238 }
239
240 static inline unsigned long fan_from_reg(u16 val)
241 {
242 if ((val == 0xfff) || (val == 0))
243 return 0;
244 return 1350000UL / val;
245 }
246
247 static inline u16 fan_to_reg(long rpm)
248 {
249 if (rpm <= 0)
250 return 0x0fff;
251 return SENSORS_LIMIT((1350000 + (rpm >> 1)) / rpm, 1, 0xffe);
252 }
253
254 static inline unsigned long time_from_reg(u8 reg)
255 {
256 return reg * 100;
257 }
258
259 static inline u8 time_to_reg(unsigned long val)
260 {
261 return SENSORS_LIMIT((val + 50) / 100, 0, 0xff);
262 }
263
264 static inline long temp_from_reg(s8 reg)
265 {
266 return reg * 1000;
267 }
268
269 static inline s8 temp_to_reg(long val, s8 min, s8 max)
270 {
271 return SENSORS_LIMIT(val / 1000, min, max);
272 }
273
274 static const u16 pwm_freq_cksel0[16] = {
275 1024, 512, 341, 256, 205, 171, 146, 128,
276 85, 64, 32, 16, 8, 4, 2, 1
277 };
278
279 static unsigned int pwm_freq_from_reg(u8 reg, u16 clkin)
280 {
281 unsigned long base_clock;
282
283 if (reg & 0x80) {
284 base_clock = clkin * 1000 / ((clkin == 48000) ? 384 : 256);
285 return base_clock / ((reg & 0x7f) + 1);
286 } else
287 return pwm_freq_cksel0[reg & 0x0f];
288 }
289
290 static u8 pwm_freq_to_reg(unsigned long val, u16 clkin)
291 {
292 unsigned long base_clock;
293 u8 reg0, reg1;
294 unsigned long best0, best1;
295
296 /* Best fit for cksel = 0 */
297 for (reg0 = 0; reg0 < ARRAY_SIZE(pwm_freq_cksel0) - 1; reg0++) {
298 if (val > (pwm_freq_cksel0[reg0] +
299 pwm_freq_cksel0[reg0 + 1]) / 2)
300 break;
301 }
302 if (val < 375) /* cksel = 1 can't beat this */
303 return reg0;
304 best0 = pwm_freq_cksel0[reg0];
305
306 /* Best fit for cksel = 1 */
307 base_clock = clkin * 1000 / ((clkin == 48000) ? 384 : 256);
308 reg1 = SENSORS_LIMIT(DIV_ROUND_CLOSEST(base_clock, val), 1, 128);
309 best1 = base_clock / reg1;
310 reg1 = 0x80 | (reg1 - 1);
311
312 /* Choose the closest one */
313 if (abs(val - best0) > abs(val - best1))
314 return reg1;
315 else
316 return reg0;
317 }
318
319 enum chip_types {w83795g, w83795adg};
320
321 struct w83795_data {
322 struct device *hwmon_dev;
323 struct mutex update_lock;
324 unsigned long last_updated; /* In jiffies */
325 enum chip_types chip_type;
326
327 u8 bank;
328
329 u32 has_in; /* Enable monitor VIN or not */
330 u8 has_dyn_in; /* Only in2-0 can have this */
331 u16 in[21][3]; /* Register value, read/high/low */
332 u8 in_lsb[10][3]; /* LSB Register value, high/low */
333 u8 has_gain; /* has gain: in17-20 * 8 */
334
335 u16 has_fan; /* Enable fan14-1 or not */
336 u16 fan[14]; /* Register value combine */
337 u16 fan_min[14]; /* Register value combine */
338
339 u8 has_temp; /* Enable monitor temp6-1 or not */
340 s8 temp[6][5]; /* current, crit, crit_hyst, warn, warn_hyst */
341 u8 temp_read_vrlsb[6];
342 u8 temp_mode; /* Bit vector, 0 = TR, 1 = TD */
343 u8 temp_src[3]; /* Register value */
344
345 u8 enable_dts; /* Enable PECI and SB-TSI,
346 * bit 0: =1 enable, =0 disable,
347 * bit 1: =1 AMD SB-TSI, =0 Intel PECI */
348 u8 has_dts; /* Enable monitor DTS temp */
349 s8 dts[8]; /* Register value */
350 u8 dts_read_vrlsb[8]; /* Register value */
351 s8 dts_ext[4]; /* Register value */
352
353 u8 has_pwm; /* 795g supports 8 pwm, 795adg only supports 2,
354 * no config register, only affected by chip
355 * type */
356 u8 pwm[8][5]; /* Register value, output, freq, start,
357 * non stop, stop time */
358 u16 clkin; /* CLKIN frequency in kHz */
359 u8 pwm_fcms[2]; /* Register value */
360 u8 pwm_tfmr[6]; /* Register value */
361 u8 pwm_fomc; /* Register value */
362
363 u16 target_speed[8]; /* Register value, target speed for speed
364 * cruise */
365 u8 tol_speed; /* tolerance of target speed */
366 u8 pwm_temp[6][4]; /* TTTI, CTFS, HCT, HOT */
367 u8 sf4_reg[6][2][7]; /* 6 temp, temp/dcpwm, 7 registers */
368
369 u8 setup_pwm[3]; /* Register value */
370
371 u8 alarms[6]; /* Register value */
372 u8 beeps[6]; /* Register value */
373
374 char valid;
375 char valid_limits;
376 char valid_pwm_config;
377 };
378
379 /*
380 * Hardware access
381 * We assume that nobdody can change the bank outside the driver.
382 */
383
384 /* Must be called with data->update_lock held, except during initialization */
385 static int w83795_set_bank(struct i2c_client *client, u8 bank)
386 {
387 struct w83795_data *data = i2c_get_clientdata(client);
388 int err;
389
390 /* If the same bank is already set, nothing to do */
391 if ((data->bank & 0x07) == bank)
392 return 0;
393
394 /* Change to new bank, preserve all other bits */
395 bank |= data->bank & ~0x07;
396 err = i2c_smbus_write_byte_data(client, W83795_REG_BANKSEL, bank);
397 if (err < 0) {
398 dev_err(&client->dev,
399 "Failed to set bank to %d, err %d\n",
400 (int)bank, err);
401 return err;
402 }
403 data->bank = bank;
404
405 return 0;
406 }
407
408 /* Must be called with data->update_lock held, except during initialization */
409 static u8 w83795_read(struct i2c_client *client, u16 reg)
410 {
411 int err;
412
413 err = w83795_set_bank(client, reg >> 8);
414 if (err < 0)
415 return 0x00; /* Arbitrary */
416
417 err = i2c_smbus_read_byte_data(client, reg & 0xff);
418 if (err < 0) {
419 dev_err(&client->dev,
420 "Failed to read from register 0x%03x, err %d\n",
421 (int)reg, err);
422 return 0x00; /* Arbitrary */
423 }
424 return err;
425 }
426
427 /* Must be called with data->update_lock held, except during initialization */
428 static int w83795_write(struct i2c_client *client, u16 reg, u8 value)
429 {
430 int err;
431
432 err = w83795_set_bank(client, reg >> 8);
433 if (err < 0)
434 return err;
435
436 err = i2c_smbus_write_byte_data(client, reg & 0xff, value);
437 if (err < 0)
438 dev_err(&client->dev,
439 "Failed to write to register 0x%03x, err %d\n",
440 (int)reg, err);
441 return err;
442 }
443
444 static void w83795_update_limits(struct i2c_client *client)
445 {
446 struct w83795_data *data = i2c_get_clientdata(client);
447 int i, limit;
448
449 /* Read the voltage limits */
450 for (i = 0; i < ARRAY_SIZE(data->in); i++) {
451 if (!(data->has_in & (1 << i)))
452 continue;
453 data->in[i][IN_MAX] =
454 w83795_read(client, W83795_REG_IN[i][IN_MAX]);
455 data->in[i][IN_LOW] =
456 w83795_read(client, W83795_REG_IN[i][IN_LOW]);
457 }
458 for (i = 0; i < ARRAY_SIZE(data->in_lsb); i++) {
459 if ((i == 2 && data->chip_type == w83795adg) ||
460 (i >= 4 && !(data->has_in & (1 << (i + 11)))))
461 continue;
462 data->in_lsb[i][IN_MAX] =
463 w83795_read(client, IN_LSB_REG(i, IN_MAX));
464 data->in_lsb[i][IN_LOW] =
465 w83795_read(client, IN_LSB_REG(i, IN_LOW));
466 }
467
468 /* Read the fan limits */
469 for (i = 0; i < ARRAY_SIZE(data->fan); i++) {
470 u8 lsb;
471
472 /* Each register contains LSB for 2 fans, but we want to
473 * read it only once to save time */
474 if ((i & 1) == 0 && (data->has_fan & (3 << i)))
475 lsb = w83795_read(client, W83795_REG_FAN_MIN_LSB(i));
476
477 if (!(data->has_fan & (1 << i)))
478 continue;
479 data->fan_min[i] =
480 w83795_read(client, W83795_REG_FAN_MIN_HL(i)) << 4;
481 data->fan_min[i] |=
482 (lsb >> W83795_REG_FAN_MIN_LSB_SHIFT(i)) & 0x0F;
483 }
484
485 /* Read the temperature limits */
486 for (i = 0; i < ARRAY_SIZE(data->temp); i++) {
487 if (!(data->has_temp & (1 << i)))
488 continue;
489 for (limit = TEMP_CRIT; limit <= TEMP_WARN_HYST; limit++)
490 data->temp[i][limit] =
491 w83795_read(client, W83795_REG_TEMP[i][limit]);
492 }
493
494 /* Read the DTS limits */
495 if (data->enable_dts) {
496 for (limit = DTS_CRIT; limit <= DTS_WARN_HYST; limit++)
497 data->dts_ext[limit] =
498 w83795_read(client, W83795_REG_DTS_EXT(limit));
499 }
500
501 /* Read beep settings */
502 for (i = 0; i < ARRAY_SIZE(data->beeps); i++)
503 data->beeps[i] = w83795_read(client, W83795_REG_BEEP(i));
504
505 data->valid_limits = 1;
506 }
507
508 static struct w83795_data *w83795_update_pwm_config(struct device *dev)
509 {
510 struct i2c_client *client = to_i2c_client(dev);
511 struct w83795_data *data = i2c_get_clientdata(client);
512 int i, tmp;
513
514 mutex_lock(&data->update_lock);
515
516 if (data->valid_pwm_config)
517 goto END;
518
519 /* Read temperature source selection */
520 for (i = 0; i < ARRAY_SIZE(data->temp_src); i++)
521 data->temp_src[i] = w83795_read(client, W83795_REG_TSS(i));
522
523 /* Read automatic fan speed control settings */
524 data->pwm_fcms[0] = w83795_read(client, W83795_REG_FCMS1);
525 data->pwm_fcms[1] = w83795_read(client, W83795_REG_FCMS2);
526 for (i = 0; i < ARRAY_SIZE(data->pwm_tfmr); i++)
527 data->pwm_tfmr[i] = w83795_read(client, W83795_REG_TFMR(i));
528 data->pwm_fomc = w83795_read(client, W83795_REG_FOMC);
529 for (i = 0; i < data->has_pwm; i++) {
530 for (tmp = PWM_FREQ; tmp <= PWM_STOP_TIME; tmp++)
531 data->pwm[i][tmp] =
532 w83795_read(client, W83795_REG_PWM(i, tmp));
533 }
534 for (i = 0; i < ARRAY_SIZE(data->target_speed); i++) {
535 data->target_speed[i] =
536 w83795_read(client, W83795_REG_FTSH(i)) << 4;
537 data->target_speed[i] |=
538 w83795_read(client, W83795_REG_FTSL(i)) >> 4;
539 }
540 data->tol_speed = w83795_read(client, W83795_REG_TFTS) & 0x3f;
541
542 for (i = 0; i < ARRAY_SIZE(data->pwm_temp); i++) {
543 data->pwm_temp[i][TEMP_PWM_TTTI] =
544 w83795_read(client, W83795_REG_TTTI(i)) & 0x7f;
545 data->pwm_temp[i][TEMP_PWM_CTFS] =
546 w83795_read(client, W83795_REG_CTFS(i));
547 tmp = w83795_read(client, W83795_REG_HT(i));
548 data->pwm_temp[i][TEMP_PWM_HCT] = tmp >> 4;
549 data->pwm_temp[i][TEMP_PWM_HOT] = tmp & 0x0f;
550 }
551
552 /* Read SmartFanIV trip points */
553 for (i = 0; i < ARRAY_SIZE(data->sf4_reg); i++) {
554 for (tmp = 0; tmp < 7; tmp++) {
555 data->sf4_reg[i][SF4_TEMP][tmp] =
556 w83795_read(client,
557 W83795_REG_SF4_TEMP(i, tmp));
558 data->sf4_reg[i][SF4_PWM][tmp] =
559 w83795_read(client, W83795_REG_SF4_PWM(i, tmp));
560 }
561 }
562
563 /* Read setup PWM */
564 for (i = 0; i < ARRAY_SIZE(data->setup_pwm); i++)
565 data->setup_pwm[i] =
566 w83795_read(client, W83795_REG_SETUP_PWM(i));
567
568 data->valid_pwm_config = 1;
569
570 END:
571 mutex_unlock(&data->update_lock);
572 return data;
573 }
574
575 static struct w83795_data *w83795_update_device(struct device *dev)
576 {
577 struct i2c_client *client = to_i2c_client(dev);
578 struct w83795_data *data = i2c_get_clientdata(client);
579 u16 tmp;
580 int i;
581
582 mutex_lock(&data->update_lock);
583
584 if (!data->valid_limits)
585 w83795_update_limits(client);
586
587 if (!(time_after(jiffies, data->last_updated + HZ * 2)
588 || !data->valid))
589 goto END;
590
591 /* Update the voltages value */
592 for (i = 0; i < ARRAY_SIZE(data->in); i++) {
593 if (!(data->has_in & (1 << i)))
594 continue;
595 tmp = w83795_read(client, W83795_REG_IN[i][IN_READ]) << 2;
596 tmp |= w83795_read(client, W83795_REG_VRLSB) >> 6;
597 data->in[i][IN_READ] = tmp;
598 }
599
600 /* in0-2 can have dynamic limits (W83795G only) */
601 if (data->has_dyn_in) {
602 u8 lsb_max = w83795_read(client, IN_LSB_REG(0, IN_MAX));
603 u8 lsb_low = w83795_read(client, IN_LSB_REG(0, IN_LOW));
604
605 for (i = 0; i < 3; i++) {
606 if (!(data->has_dyn_in & (1 << i)))
607 continue;
608 data->in[i][IN_MAX] =
609 w83795_read(client, W83795_REG_IN[i][IN_MAX]);
610 data->in[i][IN_LOW] =
611 w83795_read(client, W83795_REG_IN[i][IN_LOW]);
612 data->in_lsb[i][IN_MAX] = (lsb_max >> (2 * i)) & 0x03;
613 data->in_lsb[i][IN_LOW] = (lsb_low >> (2 * i)) & 0x03;
614 }
615 }
616
617 /* Update fan */
618 for (i = 0; i < ARRAY_SIZE(data->fan); i++) {
619 if (!(data->has_fan & (1 << i)))
620 continue;
621 data->fan[i] = w83795_read(client, W83795_REG_FAN(i)) << 4;
622 data->fan[i] |= w83795_read(client, W83795_REG_VRLSB) >> 4;
623 }
624
625 /* Update temperature */
626 for (i = 0; i < ARRAY_SIZE(data->temp); i++) {
627 data->temp[i][TEMP_READ] =
628 w83795_read(client, W83795_REG_TEMP[i][TEMP_READ]);
629 data->temp_read_vrlsb[i] =
630 w83795_read(client, W83795_REG_VRLSB);
631 }
632
633 /* Update dts temperature */
634 if (data->enable_dts) {
635 for (i = 0; i < ARRAY_SIZE(data->dts); i++) {
636 if (!(data->has_dts & (1 << i)))
637 continue;
638 data->dts[i] =
639 w83795_read(client, W83795_REG_DTS(i));
640 data->dts_read_vrlsb[i] =
641 w83795_read(client, W83795_REG_VRLSB);
642 }
643 }
644
645 /* Update pwm output */
646 for (i = 0; i < data->has_pwm; i++) {
647 data->pwm[i][PWM_OUTPUT] =
648 w83795_read(client, W83795_REG_PWM(i, PWM_OUTPUT));
649 }
650
651 /* update alarm */
652 for (i = 0; i < ARRAY_SIZE(data->alarms); i++)
653 data->alarms[i] = w83795_read(client, W83795_REG_ALARM(i));
654
655 data->last_updated = jiffies;
656 data->valid = 1;
657
658 END:
659 mutex_unlock(&data->update_lock);
660 return data;
661 }
662
663 /*
664 * Sysfs attributes
665 */
666
667 #define ALARM_STATUS 0
668 #define BEEP_ENABLE 1
669 static ssize_t
670 show_alarm_beep(struct device *dev, struct device_attribute *attr, char *buf)
671 {
672 struct w83795_data *data = w83795_update_device(dev);
673 struct sensor_device_attribute_2 *sensor_attr =
674 to_sensor_dev_attr_2(attr);
675 int nr = sensor_attr->nr;
676 int index = sensor_attr->index >> 3;
677 int bit = sensor_attr->index & 0x07;
678 u8 val;
679
680 if (nr == ALARM_STATUS)
681 val = (data->alarms[index] >> bit) & 1;
682 else /* BEEP_ENABLE */
683 val = (data->beeps[index] >> bit) & 1;
684
685 return sprintf(buf, "%u\n", val);
686 }
687
688 static ssize_t
689 store_beep(struct device *dev, struct device_attribute *attr,
690 const char *buf, size_t count)
691 {
692 struct i2c_client *client = to_i2c_client(dev);
693 struct w83795_data *data = i2c_get_clientdata(client);
694 struct sensor_device_attribute_2 *sensor_attr =
695 to_sensor_dev_attr_2(attr);
696 int index = sensor_attr->index >> 3;
697 int shift = sensor_attr->index & 0x07;
698 u8 beep_bit = 1 << shift;
699 unsigned long val;
700
701 if (strict_strtoul(buf, 10, &val) < 0)
702 return -EINVAL;
703 if (val != 0 && val != 1)
704 return -EINVAL;
705
706 mutex_lock(&data->update_lock);
707 data->beeps[index] = w83795_read(client, W83795_REG_BEEP(index));
708 data->beeps[index] &= ~beep_bit;
709 data->beeps[index] |= val << shift;
710 w83795_write(client, W83795_REG_BEEP(index), data->beeps[index]);
711 mutex_unlock(&data->update_lock);
712
713 return count;
714 }
715
716 /* Write 0 to clear chassis alarm */
717 static ssize_t
718 store_chassis_clear(struct device *dev,
719 struct device_attribute *attr, const char *buf,
720 size_t count)
721 {
722 struct i2c_client *client = to_i2c_client(dev);
723 struct w83795_data *data = i2c_get_clientdata(client);
724 unsigned long val;
725
726 if (strict_strtoul(buf, 10, &val) < 0 || val != 0)
727 return -EINVAL;
728
729 mutex_lock(&data->update_lock);
730 val = w83795_read(client, W83795_REG_CLR_CHASSIS);
731 val |= 0x80;
732 w83795_write(client, W83795_REG_CLR_CHASSIS, val);
733 mutex_unlock(&data->update_lock);
734 return count;
735 }
736
737 #define FAN_INPUT 0
738 #define FAN_MIN 1
739 static ssize_t
740 show_fan(struct device *dev, struct device_attribute *attr, char *buf)
741 {
742 struct sensor_device_attribute_2 *sensor_attr =
743 to_sensor_dev_attr_2(attr);
744 int nr = sensor_attr->nr;
745 int index = sensor_attr->index;
746 struct w83795_data *data = w83795_update_device(dev);
747 u16 val;
748
749 if (nr == FAN_INPUT)
750 val = data->fan[index] & 0x0fff;
751 else
752 val = data->fan_min[index] & 0x0fff;
753
754 return sprintf(buf, "%lu\n", fan_from_reg(val));
755 }
756
757 static ssize_t
758 store_fan_min(struct device *dev, struct device_attribute *attr,
759 const char *buf, size_t count)
760 {
761 struct sensor_device_attribute_2 *sensor_attr =
762 to_sensor_dev_attr_2(attr);
763 int index = sensor_attr->index;
764 struct i2c_client *client = to_i2c_client(dev);
765 struct w83795_data *data = i2c_get_clientdata(client);
766 unsigned long val;
767
768 if (strict_strtoul(buf, 10, &val))
769 return -EINVAL;
770 val = fan_to_reg(val);
771
772 mutex_lock(&data->update_lock);
773 data->fan_min[index] = val;
774 w83795_write(client, W83795_REG_FAN_MIN_HL(index), (val >> 4) & 0xff);
775 val &= 0x0f;
776 if (index & 1) {
777 val <<= 4;
778 val |= w83795_read(client, W83795_REG_FAN_MIN_LSB(index))
779 & 0x0f;
780 } else {
781 val |= w83795_read(client, W83795_REG_FAN_MIN_LSB(index))
782 & 0xf0;
783 }
784 w83795_write(client, W83795_REG_FAN_MIN_LSB(index), val & 0xff);
785 mutex_unlock(&data->update_lock);
786
787 return count;
788 }
789
790 static ssize_t
791 show_pwm(struct device *dev, struct device_attribute *attr, char *buf)
792 {
793 struct w83795_data *data;
794 struct sensor_device_attribute_2 *sensor_attr =
795 to_sensor_dev_attr_2(attr);
796 int nr = sensor_attr->nr;
797 int index = sensor_attr->index;
798 unsigned int val;
799
800 data = nr == PWM_OUTPUT ? w83795_update_device(dev)
801 : w83795_update_pwm_config(dev);
802
803 switch (nr) {
804 case PWM_STOP_TIME:
805 val = time_from_reg(data->pwm[index][nr]);
806 break;
807 case PWM_FREQ:
808 val = pwm_freq_from_reg(data->pwm[index][nr], data->clkin);
809 break;
810 default:
811 val = data->pwm[index][nr];
812 break;
813 }
814
815 return sprintf(buf, "%u\n", val);
816 }
817
818 static ssize_t
819 store_pwm(struct device *dev, struct device_attribute *attr,
820 const char *buf, size_t count)
821 {
822 struct i2c_client *client = to_i2c_client(dev);
823 struct w83795_data *data = i2c_get_clientdata(client);
824 struct sensor_device_attribute_2 *sensor_attr =
825 to_sensor_dev_attr_2(attr);
826 int nr = sensor_attr->nr;
827 int index = sensor_attr->index;
828 unsigned long val;
829
830 if (strict_strtoul(buf, 10, &val) < 0)
831 return -EINVAL;
832
833 mutex_lock(&data->update_lock);
834 switch (nr) {
835 case PWM_STOP_TIME:
836 val = time_to_reg(val);
837 break;
838 case PWM_FREQ:
839 val = pwm_freq_to_reg(val, data->clkin);
840 break;
841 default:
842 val = SENSORS_LIMIT(val, 0, 0xff);
843 break;
844 }
845 w83795_write(client, W83795_REG_PWM(index, nr), val);
846 data->pwm[index][nr] = val;
847 mutex_unlock(&data->update_lock);
848 return count;
849 }
850
851 static ssize_t
852 show_pwm_enable(struct device *dev, struct device_attribute *attr, char *buf)
853 {
854 struct sensor_device_attribute_2 *sensor_attr =
855 to_sensor_dev_attr_2(attr);
856 struct w83795_data *data = w83795_update_pwm_config(dev);
857 int index = sensor_attr->index;
858 u8 tmp;
859
860 /* Speed cruise mode */
861 if (data->pwm_fcms[0] & (1 << index)) {
862 tmp = 2;
863 goto out;
864 }
865 /* Thermal cruise or SmartFan IV mode */
866 for (tmp = 0; tmp < 6; tmp++) {
867 if (data->pwm_tfmr[tmp] & (1 << index)) {
868 tmp = 3;
869 goto out;
870 }
871 }
872 /* Manual mode */
873 tmp = 1;
874
875 out:
876 return sprintf(buf, "%u\n", tmp);
877 }
878
879 static ssize_t
880 store_pwm_enable(struct device *dev, struct device_attribute *attr,
881 const char *buf, size_t count)
882 {
883 struct i2c_client *client = to_i2c_client(dev);
884 struct w83795_data *data = w83795_update_pwm_config(dev);
885 struct sensor_device_attribute_2 *sensor_attr =
886 to_sensor_dev_attr_2(attr);
887 int index = sensor_attr->index;
888 unsigned long val;
889 int i;
890
891 if (strict_strtoul(buf, 10, &val) < 0)
892 return -EINVAL;
893 if (val < 1 || val > 2)
894 return -EINVAL;
895
896 mutex_lock(&data->update_lock);
897 switch (val) {
898 case 1:
899 /* Clear speed cruise mode bits */
900 data->pwm_fcms[0] &= ~(1 << index);
901 w83795_write(client, W83795_REG_FCMS1, data->pwm_fcms[0]);
902 /* Clear thermal cruise mode bits */
903 for (i = 0; i < 6; i++) {
904 data->pwm_tfmr[i] &= ~(1 << index);
905 w83795_write(client, W83795_REG_TFMR(i),
906 data->pwm_tfmr[i]);
907 }
908 break;
909 case 2:
910 data->pwm_fcms[0] |= (1 << index);
911 w83795_write(client, W83795_REG_FCMS1, data->pwm_fcms[0]);
912 break;
913 }
914 mutex_unlock(&data->update_lock);
915 return count;
916 }
917
918 static ssize_t
919 show_temp_src(struct device *dev, struct device_attribute *attr, char *buf)
920 {
921 struct sensor_device_attribute_2 *sensor_attr =
922 to_sensor_dev_attr_2(attr);
923 struct w83795_data *data = w83795_update_pwm_config(dev);
924 int index = sensor_attr->index;
925 u8 val = index / 2;
926 u8 tmp = data->temp_src[val];
927
928 if (index & 1)
929 val = 4;
930 else
931 val = 0;
932 tmp >>= val;
933 tmp &= 0x0f;
934
935 return sprintf(buf, "%u\n", tmp);
936 }
937
938 static ssize_t
939 store_temp_src(struct device *dev, struct device_attribute *attr,
940 const char *buf, size_t count)
941 {
942 struct i2c_client *client = to_i2c_client(dev);
943 struct w83795_data *data = w83795_update_pwm_config(dev);
944 struct sensor_device_attribute_2 *sensor_attr =
945 to_sensor_dev_attr_2(attr);
946 int index = sensor_attr->index;
947 unsigned long tmp;
948 u8 val = index / 2;
949
950 if (strict_strtoul(buf, 10, &tmp) < 0)
951 return -EINVAL;
952 tmp = SENSORS_LIMIT(tmp, 0, 15);
953
954 mutex_lock(&data->update_lock);
955 if (index & 1) {
956 tmp <<= 4;
957 data->temp_src[val] &= 0x0f;
958 } else {
959 data->temp_src[val] &= 0xf0;
960 }
961 data->temp_src[val] |= tmp;
962 w83795_write(client, W83795_REG_TSS(val), data->temp_src[val]);
963 mutex_unlock(&data->update_lock);
964
965 return count;
966 }
967
968 #define TEMP_PWM_ENABLE 0
969 #define TEMP_PWM_FAN_MAP 1
970 static ssize_t
971 show_temp_pwm_enable(struct device *dev, struct device_attribute *attr,
972 char *buf)
973 {
974 struct w83795_data *data = w83795_update_pwm_config(dev);
975 struct sensor_device_attribute_2 *sensor_attr =
976 to_sensor_dev_attr_2(attr);
977 int nr = sensor_attr->nr;
978 int index = sensor_attr->index;
979 u8 tmp = 0xff;
980
981 switch (nr) {
982 case TEMP_PWM_ENABLE:
983 tmp = (data->pwm_fcms[1] >> index) & 1;
984 if (tmp)
985 tmp = 4;
986 else
987 tmp = 3;
988 break;
989 case TEMP_PWM_FAN_MAP:
990 tmp = data->pwm_tfmr[index];
991 break;
992 }
993
994 return sprintf(buf, "%u\n", tmp);
995 }
996
997 static ssize_t
998 store_temp_pwm_enable(struct device *dev, struct device_attribute *attr,
999 const char *buf, size_t count)
1000 {
1001 struct i2c_client *client = to_i2c_client(dev);
1002 struct w83795_data *data = w83795_update_pwm_config(dev);
1003 struct sensor_device_attribute_2 *sensor_attr =
1004 to_sensor_dev_attr_2(attr);
1005 int nr = sensor_attr->nr;
1006 int index = sensor_attr->index;
1007 unsigned long tmp;
1008
1009 if (strict_strtoul(buf, 10, &tmp) < 0)
1010 return -EINVAL;
1011
1012 switch (nr) {
1013 case TEMP_PWM_ENABLE:
1014 if (tmp != 3 && tmp != 4)
1015 return -EINVAL;
1016 tmp -= 3;
1017 mutex_lock(&data->update_lock);
1018 data->pwm_fcms[1] &= ~(1 << index);
1019 data->pwm_fcms[1] |= tmp << index;
1020 w83795_write(client, W83795_REG_FCMS2, data->pwm_fcms[1]);
1021 mutex_unlock(&data->update_lock);
1022 break;
1023 case TEMP_PWM_FAN_MAP:
1024 mutex_lock(&data->update_lock);
1025 tmp = SENSORS_LIMIT(tmp, 0, 0xff);
1026 w83795_write(client, W83795_REG_TFMR(index), tmp);
1027 data->pwm_tfmr[index] = tmp;
1028 mutex_unlock(&data->update_lock);
1029 break;
1030 }
1031 return count;
1032 }
1033
1034 #define FANIN_TARGET 0
1035 #define FANIN_TOL 1
1036 static ssize_t
1037 show_fanin(struct device *dev, struct device_attribute *attr, char *buf)
1038 {
1039 struct w83795_data *data = w83795_update_pwm_config(dev);
1040 struct sensor_device_attribute_2 *sensor_attr =
1041 to_sensor_dev_attr_2(attr);
1042 int nr = sensor_attr->nr;
1043 int index = sensor_attr->index;
1044 u16 tmp = 0;
1045
1046 switch (nr) {
1047 case FANIN_TARGET:
1048 tmp = fan_from_reg(data->target_speed[index]);
1049 break;
1050 case FANIN_TOL:
1051 tmp = data->tol_speed;
1052 break;
1053 }
1054
1055 return sprintf(buf, "%u\n", tmp);
1056 }
1057
1058 static ssize_t
1059 store_fanin(struct device *dev, struct device_attribute *attr,
1060 const char *buf, size_t count)
1061 {
1062 struct i2c_client *client = to_i2c_client(dev);
1063 struct w83795_data *data = i2c_get_clientdata(client);
1064 struct sensor_device_attribute_2 *sensor_attr =
1065 to_sensor_dev_attr_2(attr);
1066 int nr = sensor_attr->nr;
1067 int index = sensor_attr->index;
1068 unsigned long val;
1069
1070 if (strict_strtoul(buf, 10, &val) < 0)
1071 return -EINVAL;
1072
1073 mutex_lock(&data->update_lock);
1074 switch (nr) {
1075 case FANIN_TARGET:
1076 val = fan_to_reg(SENSORS_LIMIT(val, 0, 0xfff));
1077 w83795_write(client, W83795_REG_FTSH(index), val >> 4);
1078 w83795_write(client, W83795_REG_FTSL(index), (val << 4) & 0xf0);
1079 data->target_speed[index] = val;
1080 break;
1081 case FANIN_TOL:
1082 val = SENSORS_LIMIT(val, 0, 0x3f);
1083 w83795_write(client, W83795_REG_TFTS, val);
1084 data->tol_speed = val;
1085 break;
1086 }
1087 mutex_unlock(&data->update_lock);
1088
1089 return count;
1090 }
1091
1092
1093 static ssize_t
1094 show_temp_pwm(struct device *dev, struct device_attribute *attr, char *buf)
1095 {
1096 struct w83795_data *data = w83795_update_pwm_config(dev);
1097 struct sensor_device_attribute_2 *sensor_attr =
1098 to_sensor_dev_attr_2(attr);
1099 int nr = sensor_attr->nr;
1100 int index = sensor_attr->index;
1101 long tmp = temp_from_reg(data->pwm_temp[index][nr]);
1102
1103 return sprintf(buf, "%ld\n", tmp);
1104 }
1105
1106 static ssize_t
1107 store_temp_pwm(struct device *dev, struct device_attribute *attr,
1108 const char *buf, size_t count)
1109 {
1110 struct i2c_client *client = to_i2c_client(dev);
1111 struct w83795_data *data = i2c_get_clientdata(client);
1112 struct sensor_device_attribute_2 *sensor_attr =
1113 to_sensor_dev_attr_2(attr);
1114 int nr = sensor_attr->nr;
1115 int index = sensor_attr->index;
1116 unsigned long val;
1117 u8 tmp;
1118
1119 if (strict_strtoul(buf, 10, &val) < 0)
1120 return -EINVAL;
1121 val /= 1000;
1122
1123 mutex_lock(&data->update_lock);
1124 switch (nr) {
1125 case TEMP_PWM_TTTI:
1126 val = SENSORS_LIMIT(val, 0, 0x7f);
1127 w83795_write(client, W83795_REG_TTTI(index), val);
1128 break;
1129 case TEMP_PWM_CTFS:
1130 val = SENSORS_LIMIT(val, 0, 0x7f);
1131 w83795_write(client, W83795_REG_CTFS(index), val);
1132 break;
1133 case TEMP_PWM_HCT:
1134 val = SENSORS_LIMIT(val, 0, 0x0f);
1135 tmp = w83795_read(client, W83795_REG_HT(index));
1136 tmp &= 0x0f;
1137 tmp |= (val << 4) & 0xf0;
1138 w83795_write(client, W83795_REG_HT(index), tmp);
1139 break;
1140 case TEMP_PWM_HOT:
1141 val = SENSORS_LIMIT(val, 0, 0x0f);
1142 tmp = w83795_read(client, W83795_REG_HT(index));
1143 tmp &= 0xf0;
1144 tmp |= val & 0x0f;
1145 w83795_write(client, W83795_REG_HT(index), tmp);
1146 break;
1147 }
1148 data->pwm_temp[index][nr] = val;
1149 mutex_unlock(&data->update_lock);
1150
1151 return count;
1152 }
1153
1154 static ssize_t
1155 show_sf4_pwm(struct device *dev, struct device_attribute *attr, char *buf)
1156 {
1157 struct w83795_data *data = w83795_update_pwm_config(dev);
1158 struct sensor_device_attribute_2 *sensor_attr =
1159 to_sensor_dev_attr_2(attr);
1160 int nr = sensor_attr->nr;
1161 int index = sensor_attr->index;
1162
1163 return sprintf(buf, "%u\n", data->sf4_reg[index][SF4_PWM][nr]);
1164 }
1165
1166 static ssize_t
1167 store_sf4_pwm(struct device *dev, struct device_attribute *attr,
1168 const char *buf, size_t count)
1169 {
1170 struct i2c_client *client = to_i2c_client(dev);
1171 struct w83795_data *data = i2c_get_clientdata(client);
1172 struct sensor_device_attribute_2 *sensor_attr =
1173 to_sensor_dev_attr_2(attr);
1174 int nr = sensor_attr->nr;
1175 int index = sensor_attr->index;
1176 unsigned long val;
1177
1178 if (strict_strtoul(buf, 10, &val) < 0)
1179 return -EINVAL;
1180
1181 mutex_lock(&data->update_lock);
1182 w83795_write(client, W83795_REG_SF4_PWM(index, nr), val);
1183 data->sf4_reg[index][SF4_PWM][nr] = val;
1184 mutex_unlock(&data->update_lock);
1185
1186 return count;
1187 }
1188
1189 static ssize_t
1190 show_sf4_temp(struct device *dev, struct device_attribute *attr, char *buf)
1191 {
1192 struct w83795_data *data = w83795_update_pwm_config(dev);
1193 struct sensor_device_attribute_2 *sensor_attr =
1194 to_sensor_dev_attr_2(attr);
1195 int nr = sensor_attr->nr;
1196 int index = sensor_attr->index;
1197
1198 return sprintf(buf, "%u\n",
1199 (data->sf4_reg[index][SF4_TEMP][nr]) * 1000);
1200 }
1201
1202 static ssize_t
1203 store_sf4_temp(struct device *dev, struct device_attribute *attr,
1204 const char *buf, size_t count)
1205 {
1206 struct i2c_client *client = to_i2c_client(dev);
1207 struct w83795_data *data = i2c_get_clientdata(client);
1208 struct sensor_device_attribute_2 *sensor_attr =
1209 to_sensor_dev_attr_2(attr);
1210 int nr = sensor_attr->nr;
1211 int index = sensor_attr->index;
1212 unsigned long val;
1213
1214 if (strict_strtoul(buf, 10, &val) < 0)
1215 return -EINVAL;
1216 val /= 1000;
1217
1218 mutex_lock(&data->update_lock);
1219 w83795_write(client, W83795_REG_SF4_TEMP(index, nr), val);
1220 data->sf4_reg[index][SF4_TEMP][nr] = val;
1221 mutex_unlock(&data->update_lock);
1222
1223 return count;
1224 }
1225
1226
1227 static ssize_t
1228 show_temp(struct device *dev, struct device_attribute *attr, char *buf)
1229 {
1230 struct sensor_device_attribute_2 *sensor_attr =
1231 to_sensor_dev_attr_2(attr);
1232 int nr = sensor_attr->nr;
1233 int index = sensor_attr->index;
1234 struct w83795_data *data = w83795_update_device(dev);
1235 long temp = temp_from_reg(data->temp[index][nr]);
1236
1237 if (nr == TEMP_READ)
1238 temp += (data->temp_read_vrlsb[index] >> 6) * 250;
1239 return sprintf(buf, "%ld\n", temp);
1240 }
1241
1242 static ssize_t
1243 store_temp(struct device *dev, struct device_attribute *attr,
1244 const char *buf, size_t count)
1245 {
1246 struct sensor_device_attribute_2 *sensor_attr =
1247 to_sensor_dev_attr_2(attr);
1248 int nr = sensor_attr->nr;
1249 int index = sensor_attr->index;
1250 struct i2c_client *client = to_i2c_client(dev);
1251 struct w83795_data *data = i2c_get_clientdata(client);
1252 long tmp;
1253
1254 if (strict_strtol(buf, 10, &tmp) < 0)
1255 return -EINVAL;
1256
1257 mutex_lock(&data->update_lock);
1258 data->temp[index][nr] = temp_to_reg(tmp, -128, 127);
1259 w83795_write(client, W83795_REG_TEMP[index][nr], data->temp[index][nr]);
1260 mutex_unlock(&data->update_lock);
1261 return count;
1262 }
1263
1264
1265 static ssize_t
1266 show_dts_mode(struct device *dev, struct device_attribute *attr, char *buf)
1267 {
1268 struct w83795_data *data = dev_get_drvdata(dev);
1269 int tmp;
1270
1271 if (data->enable_dts & 2)
1272 tmp = 5;
1273 else
1274 tmp = 6;
1275
1276 return sprintf(buf, "%d\n", tmp);
1277 }
1278
1279 static ssize_t
1280 show_dts(struct device *dev, struct device_attribute *attr, char *buf)
1281 {
1282 struct sensor_device_attribute_2 *sensor_attr =
1283 to_sensor_dev_attr_2(attr);
1284 int index = sensor_attr->index;
1285 struct w83795_data *data = w83795_update_device(dev);
1286 long temp = temp_from_reg(data->dts[index]);
1287
1288 temp += (data->dts_read_vrlsb[index] >> 6) * 250;
1289 return sprintf(buf, "%ld\n", temp);
1290 }
1291
1292 static ssize_t
1293 show_dts_ext(struct device *dev, struct device_attribute *attr, char *buf)
1294 {
1295 struct sensor_device_attribute_2 *sensor_attr =
1296 to_sensor_dev_attr_2(attr);
1297 int nr = sensor_attr->nr;
1298 struct w83795_data *data = dev_get_drvdata(dev);
1299 long temp = temp_from_reg(data->dts_ext[nr]);
1300
1301 return sprintf(buf, "%ld\n", temp);
1302 }
1303
1304 static ssize_t
1305 store_dts_ext(struct device *dev, struct device_attribute *attr,
1306 const char *buf, size_t count)
1307 {
1308 struct sensor_device_attribute_2 *sensor_attr =
1309 to_sensor_dev_attr_2(attr);
1310 int nr = sensor_attr->nr;
1311 struct i2c_client *client = to_i2c_client(dev);
1312 struct w83795_data *data = i2c_get_clientdata(client);
1313 long tmp;
1314
1315 if (strict_strtol(buf, 10, &tmp) < 0)
1316 return -EINVAL;
1317
1318 mutex_lock(&data->update_lock);
1319 data->dts_ext[nr] = temp_to_reg(tmp, -128, 127);
1320 w83795_write(client, W83795_REG_DTS_EXT(nr), data->dts_ext[nr]);
1321 mutex_unlock(&data->update_lock);
1322 return count;
1323 }
1324
1325
1326 static ssize_t
1327 show_temp_mode(struct device *dev, struct device_attribute *attr, char *buf)
1328 {
1329 struct w83795_data *data = dev_get_drvdata(dev);
1330 struct sensor_device_attribute_2 *sensor_attr =
1331 to_sensor_dev_attr_2(attr);
1332 int index = sensor_attr->index;
1333 int tmp;
1334
1335 if (data->temp_mode & (1 << index))
1336 tmp = 3; /* Thermal diode */
1337 else
1338 tmp = 4; /* Thermistor */
1339
1340 return sprintf(buf, "%d\n", tmp);
1341 }
1342
1343 /* Only for temp1-4 (temp5-6 can only be thermistor) */
1344 static ssize_t
1345 store_temp_mode(struct device *dev, struct device_attribute *attr,
1346 const char *buf, size_t count)
1347 {
1348 struct i2c_client *client = to_i2c_client(dev);
1349 struct w83795_data *data = i2c_get_clientdata(client);
1350 struct sensor_device_attribute_2 *sensor_attr =
1351 to_sensor_dev_attr_2(attr);
1352 int index = sensor_attr->index;
1353 int reg_shift;
1354 unsigned long val;
1355 u8 tmp;
1356
1357 if (strict_strtoul(buf, 10, &val) < 0)
1358 return -EINVAL;
1359 if ((val != 4) && (val != 3))
1360 return -EINVAL;
1361
1362 mutex_lock(&data->update_lock);
1363 if (val == 3) {
1364 /* Thermal diode */
1365 val = 0x01;
1366 data->temp_mode |= 1 << index;
1367 } else if (val == 4) {
1368 /* Thermistor */
1369 val = 0x03;
1370 data->temp_mode &= ~(1 << index);
1371 }
1372
1373 reg_shift = 2 * index;
1374 tmp = w83795_read(client, W83795_REG_TEMP_CTRL2);
1375 tmp &= ~(0x03 << reg_shift);
1376 tmp |= val << reg_shift;
1377 w83795_write(client, W83795_REG_TEMP_CTRL2, tmp);
1378
1379 mutex_unlock(&data->update_lock);
1380 return count;
1381 }
1382
1383
1384 /* show/store VIN */
1385 static ssize_t
1386 show_in(struct device *dev, struct device_attribute *attr, char *buf)
1387 {
1388 struct sensor_device_attribute_2 *sensor_attr =
1389 to_sensor_dev_attr_2(attr);
1390 int nr = sensor_attr->nr;
1391 int index = sensor_attr->index;
1392 struct w83795_data *data = w83795_update_device(dev);
1393 u16 val = data->in[index][nr];
1394 u8 lsb_idx;
1395
1396 switch (nr) {
1397 case IN_READ:
1398 /* calculate this value again by sensors as sensors3.conf */
1399 if ((index >= 17) &&
1400 !((data->has_gain >> (index - 17)) & 1))
1401 val *= 8;
1402 break;
1403 case IN_MAX:
1404 case IN_LOW:
1405 lsb_idx = IN_LSB_SHIFT_IDX[index][IN_LSB_IDX];
1406 val <<= 2;
1407 val |= (data->in_lsb[lsb_idx][nr] >>
1408 IN_LSB_SHIFT_IDX[index][IN_LSB_SHIFT]) & 0x03;
1409 if ((index >= 17) &&
1410 !((data->has_gain >> (index - 17)) & 1))
1411 val *= 8;
1412 break;
1413 }
1414 val = in_from_reg(index, val);
1415
1416 return sprintf(buf, "%d\n", val);
1417 }
1418
1419 static ssize_t
1420 store_in(struct device *dev, struct device_attribute *attr,
1421 const char *buf, size_t count)
1422 {
1423 struct sensor_device_attribute_2 *sensor_attr =
1424 to_sensor_dev_attr_2(attr);
1425 int nr = sensor_attr->nr;
1426 int index = sensor_attr->index;
1427 struct i2c_client *client = to_i2c_client(dev);
1428 struct w83795_data *data = i2c_get_clientdata(client);
1429 unsigned long val;
1430 u8 tmp;
1431 u8 lsb_idx;
1432
1433 if (strict_strtoul(buf, 10, &val) < 0)
1434 return -EINVAL;
1435 val = in_to_reg(index, val);
1436
1437 if ((index >= 17) &&
1438 !((data->has_gain >> (index - 17)) & 1))
1439 val /= 8;
1440 val = SENSORS_LIMIT(val, 0, 0x3FF);
1441 mutex_lock(&data->update_lock);
1442
1443 lsb_idx = IN_LSB_SHIFT_IDX[index][IN_LSB_IDX];
1444 tmp = w83795_read(client, IN_LSB_REG(lsb_idx, nr));
1445 tmp &= ~(0x03 << IN_LSB_SHIFT_IDX[index][IN_LSB_SHIFT]);
1446 tmp |= (val & 0x03) << IN_LSB_SHIFT_IDX[index][IN_LSB_SHIFT];
1447 w83795_write(client, IN_LSB_REG(lsb_idx, nr), tmp);
1448 data->in_lsb[lsb_idx][nr] = tmp;
1449
1450 tmp = (val >> 2) & 0xff;
1451 w83795_write(client, W83795_REG_IN[index][nr], tmp);
1452 data->in[index][nr] = tmp;
1453
1454 mutex_unlock(&data->update_lock);
1455 return count;
1456 }
1457
1458
1459 #ifdef CONFIG_SENSORS_W83795_FANCTRL
1460 static ssize_t
1461 show_sf_setup(struct device *dev, struct device_attribute *attr, char *buf)
1462 {
1463 struct sensor_device_attribute_2 *sensor_attr =
1464 to_sensor_dev_attr_2(attr);
1465 int nr = sensor_attr->nr;
1466 struct w83795_data *data = w83795_update_pwm_config(dev);
1467 u16 val = data->setup_pwm[nr];
1468
1469 switch (nr) {
1470 case SETUP_PWM_UPTIME:
1471 case SETUP_PWM_DOWNTIME:
1472 val = time_from_reg(val);
1473 break;
1474 }
1475
1476 return sprintf(buf, "%d\n", val);
1477 }
1478
1479 static ssize_t
1480 store_sf_setup(struct device *dev, struct device_attribute *attr,
1481 const char *buf, size_t count)
1482 {
1483 struct sensor_device_attribute_2 *sensor_attr =
1484 to_sensor_dev_attr_2(attr);
1485 int nr = sensor_attr->nr;
1486 struct i2c_client *client = to_i2c_client(dev);
1487 struct w83795_data *data = i2c_get_clientdata(client);
1488 unsigned long val;
1489
1490 if (strict_strtoul(buf, 10, &val) < 0)
1491 return -EINVAL;
1492
1493 switch (nr) {
1494 case SETUP_PWM_DEFAULT:
1495 val = SENSORS_LIMIT(val, 0, 0xff);
1496 break;
1497 case SETUP_PWM_UPTIME:
1498 case SETUP_PWM_DOWNTIME:
1499 val = time_to_reg(val);
1500 if (val == 0)
1501 return -EINVAL;
1502 break;
1503 }
1504
1505 mutex_lock(&data->update_lock);
1506 data->setup_pwm[nr] = val;
1507 w83795_write(client, W83795_REG_SETUP_PWM(nr), val);
1508 mutex_unlock(&data->update_lock);
1509 return count;
1510 }
1511 #endif
1512
1513
1514 #define NOT_USED -1
1515
1516 /* Don't change the attribute order, _max and _min are accessed by index
1517 * somewhere else in the code */
1518 #define SENSOR_ATTR_IN(index) { \
1519 SENSOR_ATTR_2(in##index##_input, S_IRUGO, show_in, NULL, \
1520 IN_READ, index), \
1521 SENSOR_ATTR_2(in##index##_max, S_IRUGO | S_IWUSR, show_in, \
1522 store_in, IN_MAX, index), \
1523 SENSOR_ATTR_2(in##index##_min, S_IRUGO | S_IWUSR, show_in, \
1524 store_in, IN_LOW, index), \
1525 SENSOR_ATTR_2(in##index##_alarm, S_IRUGO, show_alarm_beep, \
1526 NULL, ALARM_STATUS, index + ((index > 14) ? 1 : 0)), \
1527 SENSOR_ATTR_2(in##index##_beep, S_IWUSR | S_IRUGO, \
1528 show_alarm_beep, store_beep, BEEP_ENABLE, \
1529 index + ((index > 14) ? 1 : 0)) }
1530
1531 #define SENSOR_ATTR_FAN(index) { \
1532 SENSOR_ATTR_2(fan##index##_input, S_IRUGO, show_fan, \
1533 NULL, FAN_INPUT, index - 1), \
1534 SENSOR_ATTR_2(fan##index##_min, S_IWUSR | S_IRUGO, \
1535 show_fan, store_fan_min, FAN_MIN, index - 1), \
1536 SENSOR_ATTR_2(fan##index##_alarm, S_IRUGO, show_alarm_beep, \
1537 NULL, ALARM_STATUS, index + 31), \
1538 SENSOR_ATTR_2(fan##index##_beep, S_IWUSR | S_IRUGO, \
1539 show_alarm_beep, store_beep, BEEP_ENABLE, index + 31) }
1540
1541 #define SENSOR_ATTR_PWM(index) { \
1542 SENSOR_ATTR_2(pwm##index, S_IWUSR | S_IRUGO, show_pwm, \
1543 store_pwm, PWM_OUTPUT, index - 1), \
1544 SENSOR_ATTR_2(pwm##index##_nonstop, S_IWUSR | S_IRUGO, \
1545 show_pwm, store_pwm, PWM_NONSTOP, index - 1), \
1546 SENSOR_ATTR_2(pwm##index##_start, S_IWUSR | S_IRUGO, \
1547 show_pwm, store_pwm, PWM_START, index - 1), \
1548 SENSOR_ATTR_2(pwm##index##_stop_time, S_IWUSR | S_IRUGO, \
1549 show_pwm, store_pwm, PWM_STOP_TIME, index - 1), \
1550 SENSOR_ATTR_2(pwm##index##_freq, S_IWUSR | S_IRUGO, \
1551 show_pwm, store_pwm, PWM_FREQ, index - 1), \
1552 SENSOR_ATTR_2(pwm##index##_enable, S_IWUSR | S_IRUGO, \
1553 show_pwm_enable, store_pwm_enable, NOT_USED, index - 1), \
1554 SENSOR_ATTR_2(fan##index##_target, S_IWUSR | S_IRUGO, \
1555 show_fanin, store_fanin, FANIN_TARGET, index - 1) }
1556
1557 #define SENSOR_ATTR_DTS(index) { \
1558 SENSOR_ATTR_2(temp##index##_type, S_IRUGO , \
1559 show_dts_mode, NULL, NOT_USED, index - 7), \
1560 SENSOR_ATTR_2(temp##index##_input, S_IRUGO, show_dts, \
1561 NULL, NOT_USED, index - 7), \
1562 SENSOR_ATTR_2(temp##index##_crit, S_IRUGO | S_IWUSR, show_dts_ext, \
1563 store_dts_ext, DTS_CRIT, NOT_USED), \
1564 SENSOR_ATTR_2(temp##index##_crit_hyst, S_IRUGO | S_IWUSR, \
1565 show_dts_ext, store_dts_ext, DTS_CRIT_HYST, NOT_USED), \
1566 SENSOR_ATTR_2(temp##index##_max, S_IRUGO | S_IWUSR, show_dts_ext, \
1567 store_dts_ext, DTS_WARN, NOT_USED), \
1568 SENSOR_ATTR_2(temp##index##_max_hyst, S_IRUGO | S_IWUSR, \
1569 show_dts_ext, store_dts_ext, DTS_WARN_HYST, NOT_USED), \
1570 SENSOR_ATTR_2(temp##index##_alarm, S_IRUGO, \
1571 show_alarm_beep, NULL, ALARM_STATUS, index + 17), \
1572 SENSOR_ATTR_2(temp##index##_beep, S_IWUSR | S_IRUGO, \
1573 show_alarm_beep, store_beep, BEEP_ENABLE, index + 17) }
1574
1575 #define SENSOR_ATTR_TEMP(index) { \
1576 SENSOR_ATTR_2(temp##index##_type, S_IRUGO | (index < 4 ? S_IWUSR : 0), \
1577 show_temp_mode, store_temp_mode, NOT_USED, index - 1), \
1578 SENSOR_ATTR_2(temp##index##_input, S_IRUGO, show_temp, \
1579 NULL, TEMP_READ, index - 1), \
1580 SENSOR_ATTR_2(temp##index##_crit, S_IRUGO | S_IWUSR, show_temp, \
1581 store_temp, TEMP_CRIT, index - 1), \
1582 SENSOR_ATTR_2(temp##index##_crit_hyst, S_IRUGO | S_IWUSR, \
1583 show_temp, store_temp, TEMP_CRIT_HYST, index - 1), \
1584 SENSOR_ATTR_2(temp##index##_max, S_IRUGO | S_IWUSR, show_temp, \
1585 store_temp, TEMP_WARN, index - 1), \
1586 SENSOR_ATTR_2(temp##index##_max_hyst, S_IRUGO | S_IWUSR, \
1587 show_temp, store_temp, TEMP_WARN_HYST, index - 1), \
1588 SENSOR_ATTR_2(temp##index##_alarm, S_IRUGO, \
1589 show_alarm_beep, NULL, ALARM_STATUS, \
1590 index + (index > 4 ? 11 : 17)), \
1591 SENSOR_ATTR_2(temp##index##_beep, S_IWUSR | S_IRUGO, \
1592 show_alarm_beep, store_beep, BEEP_ENABLE, \
1593 index + (index > 4 ? 11 : 17)), \
1594 SENSOR_ATTR_2(temp##index##_source_sel, S_IWUSR | S_IRUGO, \
1595 show_temp_src, store_temp_src, NOT_USED, index - 1), \
1596 SENSOR_ATTR_2(temp##index##_pwm_enable, S_IWUSR | S_IRUGO, \
1597 show_temp_pwm_enable, store_temp_pwm_enable, \
1598 TEMP_PWM_ENABLE, index - 1), \
1599 SENSOR_ATTR_2(temp##index##_auto_channels_pwm, S_IWUSR | S_IRUGO, \
1600 show_temp_pwm_enable, store_temp_pwm_enable, \
1601 TEMP_PWM_FAN_MAP, index - 1), \
1602 SENSOR_ATTR_2(thermal_cruise##index, S_IWUSR | S_IRUGO, \
1603 show_temp_pwm, store_temp_pwm, TEMP_PWM_TTTI, index - 1), \
1604 SENSOR_ATTR_2(temp##index##_warn, S_IWUSR | S_IRUGO, \
1605 show_temp_pwm, store_temp_pwm, TEMP_PWM_CTFS, index - 1), \
1606 SENSOR_ATTR_2(temp##index##_warn_hyst, S_IWUSR | S_IRUGO, \
1607 show_temp_pwm, store_temp_pwm, TEMP_PWM_HCT, index - 1), \
1608 SENSOR_ATTR_2(temp##index##_operation_hyst, S_IWUSR | S_IRUGO, \
1609 show_temp_pwm, store_temp_pwm, TEMP_PWM_HOT, index - 1), \
1610 SENSOR_ATTR_2(temp##index##_auto_point1_pwm, S_IRUGO | S_IWUSR, \
1611 show_sf4_pwm, store_sf4_pwm, 0, index - 1), \
1612 SENSOR_ATTR_2(temp##index##_auto_point2_pwm, S_IRUGO | S_IWUSR, \
1613 show_sf4_pwm, store_sf4_pwm, 1, index - 1), \
1614 SENSOR_ATTR_2(temp##index##_auto_point3_pwm, S_IRUGO | S_IWUSR, \
1615 show_sf4_pwm, store_sf4_pwm, 2, index - 1), \
1616 SENSOR_ATTR_2(temp##index##_auto_point4_pwm, S_IRUGO | S_IWUSR, \
1617 show_sf4_pwm, store_sf4_pwm, 3, index - 1), \
1618 SENSOR_ATTR_2(temp##index##_auto_point5_pwm, S_IRUGO | S_IWUSR, \
1619 show_sf4_pwm, store_sf4_pwm, 4, index - 1), \
1620 SENSOR_ATTR_2(temp##index##_auto_point6_pwm, S_IRUGO | S_IWUSR, \
1621 show_sf4_pwm, store_sf4_pwm, 5, index - 1), \
1622 SENSOR_ATTR_2(temp##index##_auto_point7_pwm, S_IRUGO | S_IWUSR, \
1623 show_sf4_pwm, store_sf4_pwm, 6, index - 1), \
1624 SENSOR_ATTR_2(temp##index##_auto_point1_temp, S_IRUGO | S_IWUSR,\
1625 show_sf4_temp, store_sf4_temp, 0, index - 1), \
1626 SENSOR_ATTR_2(temp##index##_auto_point2_temp, S_IRUGO | S_IWUSR,\
1627 show_sf4_temp, store_sf4_temp, 1, index - 1), \
1628 SENSOR_ATTR_2(temp##index##_auto_point3_temp, S_IRUGO | S_IWUSR,\
1629 show_sf4_temp, store_sf4_temp, 2, index - 1), \
1630 SENSOR_ATTR_2(temp##index##_auto_point4_temp, S_IRUGO | S_IWUSR,\
1631 show_sf4_temp, store_sf4_temp, 3, index - 1), \
1632 SENSOR_ATTR_2(temp##index##_auto_point5_temp, S_IRUGO | S_IWUSR,\
1633 show_sf4_temp, store_sf4_temp, 4, index - 1), \
1634 SENSOR_ATTR_2(temp##index##_auto_point6_temp, S_IRUGO | S_IWUSR,\
1635 show_sf4_temp, store_sf4_temp, 5, index - 1), \
1636 SENSOR_ATTR_2(temp##index##_auto_point7_temp, S_IRUGO | S_IWUSR,\
1637 show_sf4_temp, store_sf4_temp, 6, index - 1) }
1638
1639
1640 static struct sensor_device_attribute_2 w83795_in[][5] = {
1641 SENSOR_ATTR_IN(0),
1642 SENSOR_ATTR_IN(1),
1643 SENSOR_ATTR_IN(2),
1644 SENSOR_ATTR_IN(3),
1645 SENSOR_ATTR_IN(4),
1646 SENSOR_ATTR_IN(5),
1647 SENSOR_ATTR_IN(6),
1648 SENSOR_ATTR_IN(7),
1649 SENSOR_ATTR_IN(8),
1650 SENSOR_ATTR_IN(9),
1651 SENSOR_ATTR_IN(10),
1652 SENSOR_ATTR_IN(11),
1653 SENSOR_ATTR_IN(12),
1654 SENSOR_ATTR_IN(13),
1655 SENSOR_ATTR_IN(14),
1656 SENSOR_ATTR_IN(15),
1657 SENSOR_ATTR_IN(16),
1658 SENSOR_ATTR_IN(17),
1659 SENSOR_ATTR_IN(18),
1660 SENSOR_ATTR_IN(19),
1661 SENSOR_ATTR_IN(20),
1662 };
1663
1664 static const struct sensor_device_attribute_2 w83795_fan[][4] = {
1665 SENSOR_ATTR_FAN(1),
1666 SENSOR_ATTR_FAN(2),
1667 SENSOR_ATTR_FAN(3),
1668 SENSOR_ATTR_FAN(4),
1669 SENSOR_ATTR_FAN(5),
1670 SENSOR_ATTR_FAN(6),
1671 SENSOR_ATTR_FAN(7),
1672 SENSOR_ATTR_FAN(8),
1673 SENSOR_ATTR_FAN(9),
1674 SENSOR_ATTR_FAN(10),
1675 SENSOR_ATTR_FAN(11),
1676 SENSOR_ATTR_FAN(12),
1677 SENSOR_ATTR_FAN(13),
1678 SENSOR_ATTR_FAN(14),
1679 };
1680
1681 static const struct sensor_device_attribute_2 w83795_temp[][29] = {
1682 SENSOR_ATTR_TEMP(1),
1683 SENSOR_ATTR_TEMP(2),
1684 SENSOR_ATTR_TEMP(3),
1685 SENSOR_ATTR_TEMP(4),
1686 SENSOR_ATTR_TEMP(5),
1687 SENSOR_ATTR_TEMP(6),
1688 };
1689
1690 static const struct sensor_device_attribute_2 w83795_dts[][8] = {
1691 SENSOR_ATTR_DTS(7),
1692 SENSOR_ATTR_DTS(8),
1693 SENSOR_ATTR_DTS(9),
1694 SENSOR_ATTR_DTS(10),
1695 SENSOR_ATTR_DTS(11),
1696 SENSOR_ATTR_DTS(12),
1697 SENSOR_ATTR_DTS(13),
1698 SENSOR_ATTR_DTS(14),
1699 };
1700
1701 static const struct sensor_device_attribute_2 w83795_pwm[][7] = {
1702 SENSOR_ATTR_PWM(1),
1703 SENSOR_ATTR_PWM(2),
1704 SENSOR_ATTR_PWM(3),
1705 SENSOR_ATTR_PWM(4),
1706 SENSOR_ATTR_PWM(5),
1707 SENSOR_ATTR_PWM(6),
1708 SENSOR_ATTR_PWM(7),
1709 SENSOR_ATTR_PWM(8),
1710 };
1711
1712 static const struct sensor_device_attribute_2 sda_single_files[] = {
1713 SENSOR_ATTR_2(intrusion0_alarm, S_IWUSR | S_IRUGO, show_alarm_beep,
1714 store_chassis_clear, ALARM_STATUS, 46),
1715 SENSOR_ATTR_2(intrusion0_beep, S_IWUSR | S_IRUGO, show_alarm_beep,
1716 store_beep, BEEP_ENABLE, 46),
1717 SENSOR_ATTR_2(beep_enable, S_IWUSR | S_IRUGO, show_alarm_beep,
1718 store_beep, BEEP_ENABLE, 47),
1719 #ifdef CONFIG_SENSORS_W83795_FANCTRL
1720 SENSOR_ATTR_2(speed_cruise_tolerance, S_IWUSR | S_IRUGO, show_fanin,
1721 store_fanin, FANIN_TOL, NOT_USED),
1722 SENSOR_ATTR_2(pwm_default, S_IWUSR | S_IRUGO, show_sf_setup,
1723 store_sf_setup, SETUP_PWM_DEFAULT, NOT_USED),
1724 SENSOR_ATTR_2(pwm_uptime, S_IWUSR | S_IRUGO, show_sf_setup,
1725 store_sf_setup, SETUP_PWM_UPTIME, NOT_USED),
1726 SENSOR_ATTR_2(pwm_downtime, S_IWUSR | S_IRUGO, show_sf_setup,
1727 store_sf_setup, SETUP_PWM_DOWNTIME, NOT_USED),
1728 #endif
1729 };
1730
1731 /*
1732 * Driver interface
1733 */
1734
1735 static void w83795_init_client(struct i2c_client *client)
1736 {
1737 struct w83795_data *data = i2c_get_clientdata(client);
1738 static const u16 clkin[4] = { /* in kHz */
1739 14318, 24000, 33333, 48000
1740 };
1741 u8 config;
1742
1743 if (reset)
1744 w83795_write(client, W83795_REG_CONFIG, 0x80);
1745
1746 /* Start monitoring if needed */
1747 config = w83795_read(client, W83795_REG_CONFIG);
1748 if (!(config & W83795_REG_CONFIG_START)) {
1749 dev_info(&client->dev, "Enabling monitoring operations\n");
1750 w83795_write(client, W83795_REG_CONFIG,
1751 config | W83795_REG_CONFIG_START);
1752 }
1753
1754 data->clkin = clkin[(config >> 3) & 0x3];
1755 dev_dbg(&client->dev, "clkin = %u kHz\n", data->clkin);
1756 }
1757
1758 static int w83795_get_device_id(struct i2c_client *client)
1759 {
1760 int device_id;
1761
1762 device_id = i2c_smbus_read_byte_data(client, W83795_REG_DEVICEID);
1763
1764 /* Special case for rev. A chips; can't be checked first because later
1765 revisions emulate this for compatibility */
1766 if (device_id < 0 || (device_id & 0xf0) != 0x50) {
1767 int alt_id;
1768
1769 alt_id = i2c_smbus_read_byte_data(client,
1770 W83795_REG_DEVICEID_A);
1771 if (alt_id == 0x50)
1772 device_id = alt_id;
1773 }
1774
1775 return device_id;
1776 }
1777
1778 /* Return 0 if detection is successful, -ENODEV otherwise */
1779 static int w83795_detect(struct i2c_client *client,
1780 struct i2c_board_info *info)
1781 {
1782 int bank, vendor_id, device_id, expected, i2c_addr, config;
1783 struct i2c_adapter *adapter = client->adapter;
1784 unsigned short address = client->addr;
1785 const char *chip_name;
1786
1787 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
1788 return -ENODEV;
1789 bank = i2c_smbus_read_byte_data(client, W83795_REG_BANKSEL);
1790 if (bank < 0 || (bank & 0x7c)) {
1791 dev_dbg(&adapter->dev,
1792 "w83795: Detection failed at addr 0x%02hx, check %s\n",
1793 address, "bank");
1794 return -ENODEV;
1795 }
1796
1797 /* Check Nuvoton vendor ID */
1798 vendor_id = i2c_smbus_read_byte_data(client, W83795_REG_VENDORID);
1799 expected = bank & 0x80 ? 0x5c : 0xa3;
1800 if (vendor_id != expected) {
1801 dev_dbg(&adapter->dev,
1802 "w83795: Detection failed at addr 0x%02hx, check %s\n",
1803 address, "vendor id");
1804 return -ENODEV;
1805 }
1806
1807 /* Check device ID */
1808 device_id = w83795_get_device_id(client) |
1809 (i2c_smbus_read_byte_data(client, W83795_REG_CHIPID) << 8);
1810 if ((device_id >> 4) != 0x795) {
1811 dev_dbg(&adapter->dev,
1812 "w83795: Detection failed at addr 0x%02hx, check %s\n",
1813 address, "device id\n");
1814 return -ENODEV;
1815 }
1816
1817 /* If Nuvoton chip, address of chip and W83795_REG_I2C_ADDR
1818 should match */
1819 if ((bank & 0x07) == 0) {
1820 i2c_addr = i2c_smbus_read_byte_data(client,
1821 W83795_REG_I2C_ADDR);
1822 if ((i2c_addr & 0x7f) != address) {
1823 dev_dbg(&adapter->dev,
1824 "w83795: Detection failed at addr 0x%02hx, "
1825 "check %s\n", address, "i2c addr");
1826 return -ENODEV;
1827 }
1828 }
1829
1830 /* Check 795 chip type: 795G or 795ADG
1831 Usually we don't write to chips during detection, but here we don't
1832 quite have the choice; hopefully it's OK, we are about to return
1833 success anyway */
1834 if ((bank & 0x07) != 0)
1835 i2c_smbus_write_byte_data(client, W83795_REG_BANKSEL,
1836 bank & ~0x07);
1837 config = i2c_smbus_read_byte_data(client, W83795_REG_CONFIG);
1838 if (config & W83795_REG_CONFIG_CONFIG48)
1839 chip_name = "w83795adg";
1840 else
1841 chip_name = "w83795g";
1842
1843 strlcpy(info->type, chip_name, I2C_NAME_SIZE);
1844 dev_info(&adapter->dev, "Found %s rev. %c at 0x%02hx\n", chip_name,
1845 'A' + (device_id & 0xf), address);
1846
1847 return 0;
1848 }
1849
1850 static int w83795_handle_files(struct device *dev, int (*fn)(struct device *,
1851 const struct device_attribute *))
1852 {
1853 struct w83795_data *data = dev_get_drvdata(dev);
1854 int err, i, j;
1855
1856 for (i = 0; i < ARRAY_SIZE(w83795_in); i++) {
1857 if (!(data->has_in & (1 << i)))
1858 continue;
1859 for (j = 0; j < ARRAY_SIZE(w83795_in[0]); j++) {
1860 err = fn(dev, &w83795_in[i][j].dev_attr);
1861 if (err)
1862 return err;
1863 }
1864 }
1865
1866 for (i = 0; i < ARRAY_SIZE(w83795_fan); i++) {
1867 if (!(data->has_fan & (1 << i)))
1868 continue;
1869 for (j = 0; j < ARRAY_SIZE(w83795_fan[0]); j++) {
1870 err = fn(dev, &w83795_fan[i][j].dev_attr);
1871 if (err)
1872 return err;
1873 }
1874 }
1875
1876 for (i = 0; i < ARRAY_SIZE(sda_single_files); i++) {
1877 err = fn(dev, &sda_single_files[i].dev_attr);
1878 if (err)
1879 return err;
1880 }
1881
1882 #ifdef CONFIG_SENSORS_W83795_FANCTRL
1883 for (i = 0; i < data->has_pwm; i++) {
1884 for (j = 0; j < ARRAY_SIZE(w83795_pwm[0]); j++) {
1885 err = fn(dev, &w83795_pwm[i][j].dev_attr);
1886 if (err)
1887 return err;
1888 }
1889 }
1890 #endif
1891
1892 for (i = 0; i < ARRAY_SIZE(w83795_temp); i++) {
1893 if (!(data->has_temp & (1 << i)))
1894 continue;
1895 #ifdef CONFIG_SENSORS_W83795_FANCTRL
1896 for (j = 0; j < ARRAY_SIZE(w83795_temp[0]); j++) {
1897 #else
1898 for (j = 0; j < 8; j++) {
1899 #endif
1900 err = fn(dev, &w83795_temp[i][j].dev_attr);
1901 if (err)
1902 return err;
1903 }
1904 }
1905
1906 if (data->enable_dts) {
1907 for (i = 0; i < ARRAY_SIZE(w83795_dts); i++) {
1908 if (!(data->has_dts & (1 << i)))
1909 continue;
1910 for (j = 0; j < ARRAY_SIZE(w83795_dts[0]); j++) {
1911 err = fn(dev, &w83795_dts[i][j].dev_attr);
1912 if (err)
1913 return err;
1914 }
1915 }
1916 }
1917
1918 return 0;
1919 }
1920
1921 /* We need a wrapper that fits in w83795_handle_files */
1922 static int device_remove_file_wrapper(struct device *dev,
1923 const struct device_attribute *attr)
1924 {
1925 device_remove_file(dev, attr);
1926 return 0;
1927 }
1928
1929 static void w83795_check_dynamic_in_limits(struct i2c_client *client)
1930 {
1931 struct w83795_data *data = i2c_get_clientdata(client);
1932 u8 vid_ctl;
1933 int i, err_max, err_min;
1934
1935 vid_ctl = w83795_read(client, W83795_REG_VID_CTRL);
1936
1937 /* Return immediately if VRM isn't configured */
1938 if ((vid_ctl & 0x07) == 0x00 || (vid_ctl & 0x07) == 0x07)
1939 return;
1940
1941 data->has_dyn_in = (vid_ctl >> 3) & 0x07;
1942 for (i = 0; i < 2; i++) {
1943 if (!(data->has_dyn_in & (1 << i)))
1944 continue;
1945
1946 /* Voltage limits in dynamic mode, switch to read-only */
1947 err_max = sysfs_chmod_file(&client->dev.kobj,
1948 &w83795_in[i][2].dev_attr.attr,
1949 S_IRUGO);
1950 err_min = sysfs_chmod_file(&client->dev.kobj,
1951 &w83795_in[i][3].dev_attr.attr,
1952 S_IRUGO);
1953 if (err_max || err_min)
1954 dev_warn(&client->dev, "Failed to set in%d limits "
1955 "read-only (%d, %d)\n", i, err_max, err_min);
1956 else
1957 dev_info(&client->dev, "in%d limits set dynamically "
1958 "from VID\n", i);
1959 }
1960 }
1961
1962 /* Check pins that can be used for either temperature or voltage monitoring */
1963 static void w83795_apply_temp_config(struct w83795_data *data, u8 config,
1964 int temp_chan, int in_chan)
1965 {
1966 /* config is a 2-bit value */
1967 switch (config) {
1968 case 0x2: /* Voltage monitoring */
1969 data->has_in |= 1 << in_chan;
1970 break;
1971 case 0x1: /* Thermal diode */
1972 if (temp_chan >= 4)
1973 break;
1974 data->temp_mode |= 1 << temp_chan;
1975 /* fall through */
1976 case 0x3: /* Thermistor */
1977 data->has_temp |= 1 << temp_chan;
1978 break;
1979 }
1980 }
1981
1982 static int w83795_probe(struct i2c_client *client,
1983 const struct i2c_device_id *id)
1984 {
1985 int i;
1986 u8 tmp;
1987 struct device *dev = &client->dev;
1988 struct w83795_data *data;
1989 int err;
1990
1991 data = kzalloc(sizeof(struct w83795_data), GFP_KERNEL);
1992 if (!data) {
1993 err = -ENOMEM;
1994 goto exit;
1995 }
1996
1997 i2c_set_clientdata(client, data);
1998 data->chip_type = id->driver_data;
1999 data->bank = i2c_smbus_read_byte_data(client, W83795_REG_BANKSEL);
2000 mutex_init(&data->update_lock);
2001
2002 /* Initialize the chip */
2003 w83795_init_client(client);
2004
2005 /* Check which voltages and fans are present */
2006 data->has_in = w83795_read(client, W83795_REG_VOLT_CTRL1)
2007 | (w83795_read(client, W83795_REG_VOLT_CTRL2) << 8);
2008 data->has_fan = w83795_read(client, W83795_REG_FANIN_CTRL1)
2009 | (w83795_read(client, W83795_REG_FANIN_CTRL2) << 8);
2010
2011 /* Check which analog temperatures and extra voltages are present */
2012 tmp = w83795_read(client, W83795_REG_TEMP_CTRL1);
2013 if (tmp & 0x20)
2014 data->enable_dts = 1;
2015 w83795_apply_temp_config(data, (tmp >> 2) & 0x3, 5, 16);
2016 w83795_apply_temp_config(data, tmp & 0x3, 4, 15);
2017 tmp = w83795_read(client, W83795_REG_TEMP_CTRL2);
2018 w83795_apply_temp_config(data, tmp >> 6, 3, 20);
2019 w83795_apply_temp_config(data, (tmp >> 4) & 0x3, 2, 19);
2020 w83795_apply_temp_config(data, (tmp >> 2) & 0x3, 1, 18);
2021 w83795_apply_temp_config(data, tmp & 0x3, 0, 17);
2022
2023 /* Check DTS enable status */
2024 if (data->enable_dts) {
2025 if (1 & w83795_read(client, W83795_REG_DTSC))
2026 data->enable_dts |= 2;
2027 data->has_dts = w83795_read(client, W83795_REG_DTSE);
2028 }
2029
2030 /* Report PECI Tbase values */
2031 if (data->enable_dts == 1) {
2032 for (i = 0; i < 8; i++) {
2033 if (!(data->has_dts & (1 << i)))
2034 continue;
2035 tmp = w83795_read(client, W83795_REG_PECI_TBASE(i));
2036 dev_info(&client->dev,
2037 "PECI agent %d Tbase temperature: %u\n",
2038 i + 1, (unsigned int)tmp & 0x7f);
2039 }
2040 }
2041
2042 data->has_gain = w83795_read(client, W83795_REG_VMIGB_CTRL) & 0x0f;
2043
2044 /* pwm and smart fan */
2045 if (data->chip_type == w83795g)
2046 data->has_pwm = 8;
2047 else
2048 data->has_pwm = 2;
2049
2050 err = w83795_handle_files(dev, device_create_file);
2051 if (err)
2052 goto exit_remove;
2053
2054 if (data->chip_type == w83795g)
2055 w83795_check_dynamic_in_limits(client);
2056
2057 data->hwmon_dev = hwmon_device_register(dev);
2058 if (IS_ERR(data->hwmon_dev)) {
2059 err = PTR_ERR(data->hwmon_dev);
2060 goto exit_remove;
2061 }
2062
2063 return 0;
2064
2065 exit_remove:
2066 w83795_handle_files(dev, device_remove_file_wrapper);
2067 kfree(data);
2068 exit:
2069 return err;
2070 }
2071
2072 static int w83795_remove(struct i2c_client *client)
2073 {
2074 struct w83795_data *data = i2c_get_clientdata(client);
2075
2076 hwmon_device_unregister(data->hwmon_dev);
2077 w83795_handle_files(&client->dev, device_remove_file_wrapper);
2078 kfree(data);
2079
2080 return 0;
2081 }
2082
2083
2084 static const struct i2c_device_id w83795_id[] = {
2085 { "w83795g", w83795g },
2086 { "w83795adg", w83795adg },
2087 { }
2088 };
2089 MODULE_DEVICE_TABLE(i2c, w83795_id);
2090
2091 static struct i2c_driver w83795_driver = {
2092 .driver = {
2093 .name = "w83795",
2094 },
2095 .probe = w83795_probe,
2096 .remove = w83795_remove,
2097 .id_table = w83795_id,
2098
2099 .class = I2C_CLASS_HWMON,
2100 .detect = w83795_detect,
2101 .address_list = normal_i2c,
2102 };
2103
2104 static int __init sensors_w83795_init(void)
2105 {
2106 return i2c_add_driver(&w83795_driver);
2107 }
2108
2109 static void __exit sensors_w83795_exit(void)
2110 {
2111 i2c_del_driver(&w83795_driver);
2112 }
2113
2114 MODULE_AUTHOR("Wei Song, Jean Delvare <khali@linux-fr.org>");
2115 MODULE_DESCRIPTION("W83795G/ADG hardware monitoring driver");
2116 MODULE_LICENSE("GPL");
2117
2118 module_init(sensors_w83795_init);
2119 module_exit(sensors_w83795_exit);
x86 "subsystem" repository