2 * sata_nv.c - NVIDIA nForce SATA
4 * Copyright 2004 NVIDIA Corp. All rights reserved.
5 * Copyright 2004 Andrew Chew
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2, or (at your option)
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; see the file COPYING. If not, write to
20 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
23 * libata documentation is available via 'make {ps|pdf}docs',
24 * as Documentation/DocBook/libata.*
26 * No hardware documentation available outside of NVIDIA.
27 * This driver programs the NVIDIA SATA controller in a similar
28 * fashion as with other PCI IDE BMDMA controllers, with a few
29 * NV-specific details such as register offsets, SATA phy location,
34 * - Added generic SATA support by using a pci_device_id that filters on
35 * the IDE storage class code.
38 * - Fixed a bug where the hotplug handlers for non-CK804/MCP04 were using
39 * mmio_base, which is only set for the CK804/MCP04 case.
42 * - Added support for CK804 SATA controller.
48 #include <linux/config.h>
49 #include <linux/kernel.h>
50 #include <linux/module.h>
51 #include <linux/pci.h>
52 #include <linux/init.h>
53 #include <linux/blkdev.h>
54 #include <linux/delay.h>
55 #include <linux/interrupt.h>
57 #include <scsi/scsi_host.h>
58 #include <linux/libata.h>
60 #define DRV_NAME "sata_nv"
61 #define DRV_VERSION "0.6"
64 #define NV_PIO_MASK 0x1f
65 #define NV_MWDMA_MASK 0x07
66 #define NV_UDMA_MASK 0x7f
67 #define NV_PORT0_SCR_REG_OFFSET 0x00
68 #define NV_PORT1_SCR_REG_OFFSET 0x40
70 #define NV_INT_STATUS 0x10
71 #define NV_INT_STATUS_CK804 0x440
72 #define NV_INT_STATUS_PDEV_INT 0x01
73 #define NV_INT_STATUS_PDEV_PM 0x02
74 #define NV_INT_STATUS_PDEV_ADDED 0x04
75 #define NV_INT_STATUS_PDEV_REMOVED 0x08
76 #define NV_INT_STATUS_SDEV_INT 0x10
77 #define NV_INT_STATUS_SDEV_PM 0x20
78 #define NV_INT_STATUS_SDEV_ADDED 0x40
79 #define NV_INT_STATUS_SDEV_REMOVED 0x80
80 #define NV_INT_STATUS_PDEV_HOTPLUG (NV_INT_STATUS_PDEV_ADDED | \
81 NV_INT_STATUS_PDEV_REMOVED)
82 #define NV_INT_STATUS_SDEV_HOTPLUG (NV_INT_STATUS_SDEV_ADDED | \
83 NV_INT_STATUS_SDEV_REMOVED)
84 #define NV_INT_STATUS_HOTPLUG (NV_INT_STATUS_PDEV_HOTPLUG | \
85 NV_INT_STATUS_SDEV_HOTPLUG)
87 #define NV_INT_ENABLE 0x11
88 #define NV_INT_ENABLE_CK804 0x441
89 #define NV_INT_ENABLE_PDEV_MASK 0x01
90 #define NV_INT_ENABLE_PDEV_PM 0x02
91 #define NV_INT_ENABLE_PDEV_ADDED 0x04
92 #define NV_INT_ENABLE_PDEV_REMOVED 0x08
93 #define NV_INT_ENABLE_SDEV_MASK 0x10
94 #define NV_INT_ENABLE_SDEV_PM 0x20
95 #define NV_INT_ENABLE_SDEV_ADDED 0x40
96 #define NV_INT_ENABLE_SDEV_REMOVED 0x80
97 #define NV_INT_ENABLE_PDEV_HOTPLUG (NV_INT_ENABLE_PDEV_ADDED | \
98 NV_INT_ENABLE_PDEV_REMOVED)
99 #define NV_INT_ENABLE_SDEV_HOTPLUG (NV_INT_ENABLE_SDEV_ADDED | \
100 NV_INT_ENABLE_SDEV_REMOVED)
101 #define NV_INT_ENABLE_HOTPLUG (NV_INT_ENABLE_PDEV_HOTPLUG | \
102 NV_INT_ENABLE_SDEV_HOTPLUG)
104 #define NV_INT_CONFIG 0x12
105 #define NV_INT_CONFIG_METHD 0x01 // 0 = INT, 1 = SMI
107 // For PCI config register 20
108 #define NV_MCP_SATA_CFG_20 0x50
109 #define NV_MCP_SATA_CFG_20_SATA_SPACE_EN 0x04
111 static int nv_init_one (struct pci_dev
*pdev
, const struct pci_device_id
*ent
);
112 static irqreturn_t
nv_interrupt (int irq
, void *dev_instance
,
113 struct pt_regs
*regs
);
114 static u32
nv_scr_read (struct ata_port
*ap
, unsigned int sc_reg
);
115 static void nv_scr_write (struct ata_port
*ap
, unsigned int sc_reg
, u32 val
);
116 static void nv_host_stop (struct ata_host_set
*host_set
);
117 static void nv_enable_hotplug(struct ata_probe_ent
*probe_ent
);
118 static void nv_disable_hotplug(struct ata_host_set
*host_set
);
119 static void nv_check_hotplug(struct ata_host_set
*host_set
);
120 static void nv_enable_hotplug_ck804(struct ata_probe_ent
*probe_ent
);
121 static void nv_disable_hotplug_ck804(struct ata_host_set
*host_set
);
122 static void nv_check_hotplug_ck804(struct ata_host_set
*host_set
);
132 static struct pci_device_id nv_pci_tbl
[] = {
133 { PCI_VENDOR_ID_NVIDIA
, PCI_DEVICE_ID_NVIDIA_NFORCE2S_SATA
,
134 PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, NFORCE2
},
135 { PCI_VENDOR_ID_NVIDIA
, PCI_DEVICE_ID_NVIDIA_NFORCE3S_SATA
,
136 PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, NFORCE3
},
137 { PCI_VENDOR_ID_NVIDIA
, PCI_DEVICE_ID_NVIDIA_NFORCE3S_SATA2
,
138 PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, NFORCE3
},
139 { PCI_VENDOR_ID_NVIDIA
, PCI_DEVICE_ID_NVIDIA_NFORCE_CK804_SATA
,
140 PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, CK804
},
141 { PCI_VENDOR_ID_NVIDIA
, PCI_DEVICE_ID_NVIDIA_NFORCE_CK804_SATA2
,
142 PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, CK804
},
143 { PCI_VENDOR_ID_NVIDIA
, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP04_SATA
,
144 PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, CK804
},
145 { PCI_VENDOR_ID_NVIDIA
, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP04_SATA2
,
146 PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, CK804
},
147 { PCI_VENDOR_ID_NVIDIA
, PCI_ANY_ID
,
148 PCI_ANY_ID
, PCI_ANY_ID
,
149 PCI_CLASS_STORAGE_IDE
<<8, 0xffff00, GENERIC
},
150 { 0, } /* terminate list */
153 #define NV_HOST_FLAGS_SCR_MMIO 0x00000001
157 enum nv_host_type host_type
;
158 void (*enable_hotplug
)(struct ata_probe_ent
*probe_ent
);
159 void (*disable_hotplug
)(struct ata_host_set
*host_set
);
160 void (*check_hotplug
)(struct ata_host_set
*host_set
);
163 static struct nv_host_desc nv_device_tbl
[] = {
165 .host_type
= GENERIC
,
166 .enable_hotplug
= NULL
,
167 .disable_hotplug
= NULL
,
168 .check_hotplug
= NULL
,
171 .host_type
= NFORCE2
,
172 .enable_hotplug
= nv_enable_hotplug
,
173 .disable_hotplug
= nv_disable_hotplug
,
174 .check_hotplug
= nv_check_hotplug
,
177 .host_type
= NFORCE3
,
178 .enable_hotplug
= nv_enable_hotplug
,
179 .disable_hotplug
= nv_disable_hotplug
,
180 .check_hotplug
= nv_check_hotplug
,
182 { .host_type
= CK804
,
183 .enable_hotplug
= nv_enable_hotplug_ck804
,
184 .disable_hotplug
= nv_disable_hotplug_ck804
,
185 .check_hotplug
= nv_check_hotplug_ck804
,
191 struct nv_host_desc
*host_desc
;
192 unsigned long host_flags
;
195 static struct pci_driver nv_pci_driver
= {
197 .id_table
= nv_pci_tbl
,
198 .probe
= nv_init_one
,
199 .remove
= ata_pci_remove_one
,
202 static Scsi_Host_Template nv_sht
= {
203 .module
= THIS_MODULE
,
205 .ioctl
= ata_scsi_ioctl
,
206 .queuecommand
= ata_scsi_queuecmd
,
207 .eh_strategy_handler
= ata_scsi_error
,
208 .can_queue
= ATA_DEF_QUEUE
,
209 .this_id
= ATA_SHT_THIS_ID
,
210 .sg_tablesize
= LIBATA_MAX_PRD
,
211 .max_sectors
= ATA_MAX_SECTORS
,
212 .cmd_per_lun
= ATA_SHT_CMD_PER_LUN
,
213 .emulated
= ATA_SHT_EMULATED
,
214 .use_clustering
= ATA_SHT_USE_CLUSTERING
,
215 .proc_name
= DRV_NAME
,
216 .dma_boundary
= ATA_DMA_BOUNDARY
,
217 .slave_configure
= ata_scsi_slave_config
,
218 .bios_param
= ata_std_bios_param
,
222 static struct ata_port_operations nv_ops
= {
223 .port_disable
= ata_port_disable
,
224 .tf_load
= ata_tf_load
,
225 .tf_read
= ata_tf_read
,
226 .exec_command
= ata_exec_command
,
227 .check_status
= ata_check_status
,
228 .dev_select
= ata_std_dev_select
,
229 .phy_reset
= sata_phy_reset
,
230 .bmdma_setup
= ata_bmdma_setup
,
231 .bmdma_start
= ata_bmdma_start
,
232 .bmdma_stop
= ata_bmdma_stop
,
233 .bmdma_status
= ata_bmdma_status
,
234 .qc_prep
= ata_qc_prep
,
235 .qc_issue
= ata_qc_issue_prot
,
236 .eng_timeout
= ata_eng_timeout
,
237 .irq_handler
= nv_interrupt
,
238 .irq_clear
= ata_bmdma_irq_clear
,
239 .scr_read
= nv_scr_read
,
240 .scr_write
= nv_scr_write
,
241 .port_start
= ata_port_start
,
242 .port_stop
= ata_port_stop
,
243 .host_stop
= nv_host_stop
,
246 /* FIXME: The hardware provides the necessary SATA PHY controls
247 * to support ATA_FLAG_SATA_RESET. However, it is currently
248 * necessary to disable that flag, to solve misdetection problems.
249 * See http://bugme.osdl.org/show_bug.cgi?id=3352 for more info.
251 * This problem really needs to be investigated further. But in the
252 * meantime, we avoid ATA_FLAG_SATA_RESET to get people working.
254 static struct ata_port_info nv_port_info
= {
256 .host_flags
= ATA_FLAG_SATA
|
257 /* ATA_FLAG_SATA_RESET | */
260 .pio_mask
= NV_PIO_MASK
,
261 .mwdma_mask
= NV_MWDMA_MASK
,
262 .udma_mask
= NV_UDMA_MASK
,
266 MODULE_AUTHOR("NVIDIA");
267 MODULE_DESCRIPTION("low-level driver for NVIDIA nForce SATA controller");
268 MODULE_LICENSE("GPL");
269 MODULE_DEVICE_TABLE(pci
, nv_pci_tbl
);
270 MODULE_VERSION(DRV_VERSION
);
272 static irqreturn_t
nv_interrupt (int irq
, void *dev_instance
,
273 struct pt_regs
*regs
)
275 struct ata_host_set
*host_set
= dev_instance
;
276 struct nv_host
*host
= host_set
->private_data
;
278 unsigned int handled
= 0;
281 spin_lock_irqsave(&host_set
->lock
, flags
);
283 for (i
= 0; i
< host_set
->n_ports
; i
++) {
286 ap
= host_set
->ports
[i
];
287 if (ap
&& (!(ap
->flags
& ATA_FLAG_PORT_DISABLED
))) {
288 struct ata_queued_cmd
*qc
;
290 qc
= ata_qc_from_tag(ap
, ap
->active_tag
);
291 if (qc
&& (!(qc
->tf
.ctl
& ATA_NIEN
)))
292 handled
+= ata_host_intr(ap
, qc
);
297 if (host
->host_desc
->check_hotplug
)
298 host
->host_desc
->check_hotplug(host_set
);
300 spin_unlock_irqrestore(&host_set
->lock
, flags
);
302 return IRQ_RETVAL(handled
);
305 static u32
nv_scr_read (struct ata_port
*ap
, unsigned int sc_reg
)
307 struct ata_host_set
*host_set
= ap
->host_set
;
308 struct nv_host
*host
= host_set
->private_data
;
310 if (sc_reg
> SCR_CONTROL
)
313 if (host
->host_flags
& NV_HOST_FLAGS_SCR_MMIO
)
314 return readl((void*)ap
->ioaddr
.scr_addr
+ (sc_reg
* 4));
316 return inl(ap
->ioaddr
.scr_addr
+ (sc_reg
* 4));
319 static void nv_scr_write (struct ata_port
*ap
, unsigned int sc_reg
, u32 val
)
321 struct ata_host_set
*host_set
= ap
->host_set
;
322 struct nv_host
*host
= host_set
->private_data
;
324 if (sc_reg
> SCR_CONTROL
)
327 if (host
->host_flags
& NV_HOST_FLAGS_SCR_MMIO
)
328 writel(val
, (void*)ap
->ioaddr
.scr_addr
+ (sc_reg
* 4));
330 outl(val
, ap
->ioaddr
.scr_addr
+ (sc_reg
* 4));
333 static void nv_host_stop (struct ata_host_set
*host_set
)
335 struct nv_host
*host
= host_set
->private_data
;
337 // Disable hotplug event interrupts.
338 if (host
->host_desc
->disable_hotplug
)
339 host
->host_desc
->disable_hotplug(host_set
);
343 ata_host_stop(host_set
);
346 static int nv_init_one (struct pci_dev
*pdev
, const struct pci_device_id
*ent
)
348 static int printed_version
= 0;
349 struct nv_host
*host
;
350 struct ata_port_info
*ppi
;
351 struct ata_probe_ent
*probe_ent
;
352 int pci_dev_busy
= 0;
356 // Make sure this is a SATA controller by counting the number of bars
357 // (NVIDIA SATA controllers will always have six bars). Otherwise,
358 // it's an IDE controller and we ignore it.
359 for (bar
=0; bar
<6; bar
++)
360 if (pci_resource_start(pdev
, bar
) == 0)
363 if (!printed_version
++)
364 printk(KERN_DEBUG DRV_NAME
" version " DRV_VERSION
"\n");
366 rc
= pci_enable_device(pdev
);
370 rc
= pci_request_regions(pdev
, DRV_NAME
);
373 goto err_out_disable
;
376 rc
= pci_set_dma_mask(pdev
, ATA_DMA_MASK
);
378 goto err_out_regions
;
379 rc
= pci_set_consistent_dma_mask(pdev
, ATA_DMA_MASK
);
381 goto err_out_regions
;
386 probe_ent
= ata_pci_init_native_mode(pdev
, &ppi
);
388 goto err_out_regions
;
390 host
= kmalloc(sizeof(struct nv_host
), GFP_KERNEL
);
392 goto err_out_free_ent
;
394 memset(host
, 0, sizeof(struct nv_host
));
395 host
->host_desc
= &nv_device_tbl
[ent
->driver_data
];
397 probe_ent
->private_data
= host
;
399 if (pci_resource_flags(pdev
, 5) & IORESOURCE_MEM
)
400 host
->host_flags
|= NV_HOST_FLAGS_SCR_MMIO
;
402 if (host
->host_flags
& NV_HOST_FLAGS_SCR_MMIO
) {
405 probe_ent
->mmio_base
= ioremap(pci_resource_start(pdev
, 5),
406 pci_resource_len(pdev
, 5));
407 if (probe_ent
->mmio_base
== NULL
) {
409 goto err_out_free_host
;
412 base
= (unsigned long)probe_ent
->mmio_base
;
414 probe_ent
->port
[0].scr_addr
=
415 base
+ NV_PORT0_SCR_REG_OFFSET
;
416 probe_ent
->port
[1].scr_addr
=
417 base
+ NV_PORT1_SCR_REG_OFFSET
;
420 probe_ent
->port
[0].scr_addr
=
421 pci_resource_start(pdev
, 5) | NV_PORT0_SCR_REG_OFFSET
;
422 probe_ent
->port
[1].scr_addr
=
423 pci_resource_start(pdev
, 5) | NV_PORT1_SCR_REG_OFFSET
;
426 pci_set_master(pdev
);
428 rc
= ata_device_add(probe_ent
);
430 goto err_out_iounmap
;
432 // Enable hotplug event interrupts.
433 if (host
->host_desc
->enable_hotplug
)
434 host
->host_desc
->enable_hotplug(probe_ent
);
441 if (host
->host_flags
& NV_HOST_FLAGS_SCR_MMIO
)
442 iounmap(probe_ent
->mmio_base
);
448 pci_release_regions(pdev
);
451 pci_disable_device(pdev
);
456 static void nv_enable_hotplug(struct ata_probe_ent
*probe_ent
)
460 outb(NV_INT_STATUS_HOTPLUG
,
461 probe_ent
->port
[0].scr_addr
+ NV_INT_STATUS
);
463 intr_mask
= inb(probe_ent
->port
[0].scr_addr
+ NV_INT_ENABLE
);
464 intr_mask
|= NV_INT_ENABLE_HOTPLUG
;
466 outb(intr_mask
, probe_ent
->port
[0].scr_addr
+ NV_INT_ENABLE
);
469 static void nv_disable_hotplug(struct ata_host_set
*host_set
)
473 intr_mask
= inb(host_set
->ports
[0]->ioaddr
.scr_addr
+ NV_INT_ENABLE
);
475 intr_mask
&= ~(NV_INT_ENABLE_HOTPLUG
);
477 outb(intr_mask
, host_set
->ports
[0]->ioaddr
.scr_addr
+ NV_INT_ENABLE
);
480 static void nv_check_hotplug(struct ata_host_set
*host_set
)
484 intr_status
= inb(host_set
->ports
[0]->ioaddr
.scr_addr
+ NV_INT_STATUS
);
486 // Clear interrupt status.
487 outb(0xff, host_set
->ports
[0]->ioaddr
.scr_addr
+ NV_INT_STATUS
);
489 if (intr_status
& NV_INT_STATUS_HOTPLUG
) {
490 if (intr_status
& NV_INT_STATUS_PDEV_ADDED
)
491 printk(KERN_WARNING
"nv_sata: "
492 "Primary device added\n");
494 if (intr_status
& NV_INT_STATUS_PDEV_REMOVED
)
495 printk(KERN_WARNING
"nv_sata: "
496 "Primary device removed\n");
498 if (intr_status
& NV_INT_STATUS_SDEV_ADDED
)
499 printk(KERN_WARNING
"nv_sata: "
500 "Secondary device added\n");
502 if (intr_status
& NV_INT_STATUS_SDEV_REMOVED
)
503 printk(KERN_WARNING
"nv_sata: "
504 "Secondary device removed\n");
508 static void nv_enable_hotplug_ck804(struct ata_probe_ent
*probe_ent
)
510 struct pci_dev
*pdev
= to_pci_dev(probe_ent
->dev
);
514 pci_read_config_byte(pdev
, NV_MCP_SATA_CFG_20
, ®val
);
515 regval
|= NV_MCP_SATA_CFG_20_SATA_SPACE_EN
;
516 pci_write_config_byte(pdev
, NV_MCP_SATA_CFG_20
, regval
);
518 writeb(NV_INT_STATUS_HOTPLUG
, probe_ent
->mmio_base
+ NV_INT_STATUS_CK804
);
520 intr_mask
= readb(probe_ent
->mmio_base
+ NV_INT_ENABLE_CK804
);
521 intr_mask
|= NV_INT_ENABLE_HOTPLUG
;
523 writeb(intr_mask
, probe_ent
->mmio_base
+ NV_INT_ENABLE_CK804
);
526 static void nv_disable_hotplug_ck804(struct ata_host_set
*host_set
)
528 struct pci_dev
*pdev
= to_pci_dev(host_set
->dev
);
532 intr_mask
= readb(host_set
->mmio_base
+ NV_INT_ENABLE_CK804
);
534 intr_mask
&= ~(NV_INT_ENABLE_HOTPLUG
);
536 writeb(intr_mask
, host_set
->mmio_base
+ NV_INT_ENABLE_CK804
);
538 pci_read_config_byte(pdev
, NV_MCP_SATA_CFG_20
, ®val
);
539 regval
&= ~NV_MCP_SATA_CFG_20_SATA_SPACE_EN
;
540 pci_write_config_byte(pdev
, NV_MCP_SATA_CFG_20
, regval
);
543 static void nv_check_hotplug_ck804(struct ata_host_set
*host_set
)
547 intr_status
= readb(host_set
->mmio_base
+ NV_INT_STATUS_CK804
);
549 // Clear interrupt status.
550 writeb(0xff, host_set
->mmio_base
+ NV_INT_STATUS_CK804
);
552 if (intr_status
& NV_INT_STATUS_HOTPLUG
) {
553 if (intr_status
& NV_INT_STATUS_PDEV_ADDED
)
554 printk(KERN_WARNING
"nv_sata: "
555 "Primary device added\n");
557 if (intr_status
& NV_INT_STATUS_PDEV_REMOVED
)
558 printk(KERN_WARNING
"nv_sata: "
559 "Primary device removed\n");
561 if (intr_status
& NV_INT_STATUS_SDEV_ADDED
)
562 printk(KERN_WARNING
"nv_sata: "
563 "Secondary device added\n");
565 if (intr_status
& NV_INT_STATUS_SDEV_REMOVED
)
566 printk(KERN_WARNING
"nv_sata: "
567 "Secondary device removed\n");
571 static int __init
nv_init(void)
573 return pci_module_init(&nv_pci_driver
);
576 static void __exit
nv_exit(void)
578 pci_unregister_driver(&nv_pci_driver
);
581 module_init(nv_init
);
582 module_exit(nv_exit
);