Merge branch 'sched/urgent'
[linux-2.6/x86.git] / arch / mips / math-emu / sp_sub.c
blob886ed5bcfefb58e4d26d210334f200d34188d386
1 /* IEEE754 floating point arithmetic
2 * single precision
3 */
4 /*
5 * MIPS floating point support
6 * Copyright (C) 1994-2000 Algorithmics Ltd.
8 * ########################################################################
10 * This program is free software; you can distribute it and/or modify it
11 * under the terms of the GNU General Public License (Version 2) as
12 * published by the Free Software Foundation.
14 * This program is distributed in the hope it will be useful, but WITHOUT
15 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
16 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 * for more details.
19 * You should have received a copy of the GNU General Public License along
20 * with this program; if not, write to the Free Software Foundation, Inc.,
21 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
23 * ########################################################################
27 #include "ieee754sp.h"
29 ieee754sp ieee754sp_sub(ieee754sp x, ieee754sp y)
31 COMPXSP;
32 COMPYSP;
34 EXPLODEXSP;
35 EXPLODEYSP;
37 CLEARCX;
39 FLUSHXSP;
40 FLUSHYSP;
42 switch (CLPAIR(xc, yc)) {
43 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_QNAN):
44 case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_SNAN):
45 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_SNAN):
46 case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_SNAN):
47 case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_SNAN):
48 case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_SNAN):
49 case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_SNAN):
50 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_ZERO):
51 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_NORM):
52 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_DNORM):
53 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_INF):
54 SETCX(IEEE754_INVALID_OPERATION);
55 return ieee754sp_nanxcpt(ieee754sp_indef(), "sub", x, y);
57 case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_QNAN):
58 case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_QNAN):
59 case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_QNAN):
60 case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_QNAN):
61 return y;
63 case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_QNAN):
64 case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_ZERO):
65 case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_NORM):
66 case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_DNORM):
67 case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_INF):
68 return x;
71 /* Infinity handling
74 case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_INF):
75 if (xs != ys)
76 return x;
77 SETCX(IEEE754_INVALID_OPERATION);
78 return ieee754sp_xcpt(ieee754sp_indef(), "sub", x, y);
80 case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_INF):
81 case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_INF):
82 case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_INF):
83 return ieee754sp_inf(ys ^ 1);
85 case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_ZERO):
86 case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_NORM):
87 case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_DNORM):
88 return x;
90 /* Zero handling
93 case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_ZERO):
94 if (xs != ys)
95 return x;
96 else
97 return ieee754sp_zero(ieee754_csr.rm ==
98 IEEE754_RD);
100 case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_ZERO):
101 case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_ZERO):
102 return x;
104 case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_NORM):
105 case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_DNORM):
106 /* quick fix up */
107 DPSIGN(y) ^= 1;
108 return y;
110 case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_DNORM):
111 SPDNORMX;
113 case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_DNORM):
114 SPDNORMY;
115 break;
117 case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_NORM):
118 SPDNORMX;
119 break;
121 case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_NORM):
122 break;
124 /* flip sign of y and handle as add */
125 ys ^= 1;
127 assert(xm & SP_HIDDEN_BIT);
128 assert(ym & SP_HIDDEN_BIT);
131 /* provide guard,round and stick bit space */
132 xm <<= 3;
133 ym <<= 3;
135 if (xe > ye) {
136 /* have to shift y fraction right to align
138 int s = xe - ye;
139 SPXSRSYn(s);
140 } else if (ye > xe) {
141 /* have to shift x fraction right to align
143 int s = ye - xe;
144 SPXSRSXn(s);
146 assert(xe == ye);
147 assert(xe <= SP_EMAX);
149 if (xs == ys) {
150 /* generate 28 bit result of adding two 27 bit numbers
152 xm = xm + ym;
153 xe = xe;
154 xs = xs;
156 if (xm >> (SP_MBITS + 1 + 3)) { /* carry out */
157 SPXSRSX1(); /* shift preserving sticky */
159 } else {
160 if (xm >= ym) {
161 xm = xm - ym;
162 xe = xe;
163 xs = xs;
164 } else {
165 xm = ym - xm;
166 xe = xe;
167 xs = ys;
169 if (xm == 0) {
170 if (ieee754_csr.rm == IEEE754_RD)
171 return ieee754sp_zero(1); /* round negative inf. => sign = -1 */
172 else
173 return ieee754sp_zero(0); /* other round modes => sign = 1 */
175 /* normalize to rounding precision
177 while ((xm >> (SP_MBITS + 3)) == 0) {
178 xm <<= 1;
179 xe--;
182 SPNORMRET2(xs, xe, xm, "sub", x, y);