drivers/tty/serial/s3c2412.c

   1 /*
   2  * Driver for Samsung S3C2412 and S3C2413 SoC onboard UARTs.
   3  *
   4  * Ben Dooks, Copyright (c) 2003-2008 Simtec Electronics
   5  *      http://armlinux.simtec.co.uk/
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License version 2 as
   9  * published by the Free Software Foundation.
  10 */
  11
  12 #include <linux/module.h>
  13 #include <linux/ioport.h>
  14 #include <linux/io.h>
  15 #include <linux/platform_device.h>
  16 #include <linux/init.h>
  17 #include <linux/serial_core.h>
  18 #include <linux/serial.h>
  19
  20 #include <asm/irq.h>
  21 #include <mach/hardware.h>
  22
  23 #include <plat/regs-serial.h>
  24 #include <mach/regs-gpio.h>
  25
  26 #include "samsung.h"
  27
  28 static int s3c2412_serial_setsource(struct uart_port *port,
  29                                      struct s3c24xx_uart_clksrc *clk)
  30 {
  31         unsigned long ucon = rd_regl(port, S3C2410_UCON);
  32
  33         ucon &= ~S3C2412_UCON_CLKMASK;
  34
  35         if (strcmp(clk->name, "uclk") == 0)
  36                 ucon |= S3C2440_UCON_UCLK;
  37         else if (strcmp(clk->name, "pclk") == 0)
  38                 ucon |= S3C2440_UCON_PCLK;
  39         else if (strcmp(clk->name, "usysclk") == 0)
  40                 ucon |= S3C2412_UCON_USYSCLK;
  41         else {
  42                 printk(KERN_ERR "unknown clock source %s\n", clk->name);
  43                 return -EINVAL;
  44         }
  45
  46         wr_regl(port, S3C2410_UCON, ucon);
  47         return 0;
  48 }
  49
  50
  51 static int s3c2412_serial_getsource(struct uart_port *port,
  52                                     struct s3c24xx_uart_clksrc *clk)
  53 {
  54         unsigned long ucon = rd_regl(port, S3C2410_UCON);
  55
  56         switch (ucon & S3C2412_UCON_CLKMASK) {
  57         case S3C2412_UCON_UCLK:
  58                 clk->divisor = 1;
  59                 clk->name = "uclk";
  60                 break;
  61
  62         case S3C2412_UCON_PCLK:
  63         case S3C2412_UCON_PCLK2:
  64                 clk->divisor = 1;
  65                 clk->name = "pclk";
  66                 break;
  67
  68         case S3C2412_UCON_USYSCLK:
  69                 clk->divisor = 1;
  70                 clk->name = "usysclk";
  71                 break;
  72         }
  73
  74         return 0;
  75 }
  76
  77 static int s3c2412_serial_resetport(struct uart_port *port,
  78                                     struct s3c2410_uartcfg *cfg)
  79 {
  80         unsigned long ucon = rd_regl(port, S3C2410_UCON);
  81
  82         dbg("%s: port=%p (%08lx), cfg=%p\n",
  83             __func__, port, port->mapbase, cfg);
  84
  85         /* ensure we don't change the clock settings... */
  86
  87         ucon &= S3C2412_UCON_CLKMASK;
  88
  89         wr_regl(port, S3C2410_UCON,  ucon | cfg->ucon);
  90         wr_regl(port, S3C2410_ULCON, cfg->ulcon);
  91
  92         /* reset both fifos */
  93
  94         wr_regl(port, S3C2410_UFCON, cfg->ufcon | S3C2410_UFCON_RESETBOTH);
  95         wr_regl(port, S3C2410_UFCON, cfg->ufcon);
  96
  97         return 0;
  98 }
  99
 100 static struct s3c24xx_uart_info s3c2412_uart_inf = {
 101         .name           = "Samsung S3C2412 UART",
 102         .type           = PORT_S3C2412,
 103         .fifosize       = 64,
 104         .has_divslot    = 1,
 105         .rx_fifomask    = S3C2440_UFSTAT_RXMASK,
 106         .rx_fifoshift   = S3C2440_UFSTAT_RXSHIFT,
 107         .rx_fifofull    = S3C2440_UFSTAT_RXFULL,
 108         .tx_fifofull    = S3C2440_UFSTAT_TXFULL,
 109         .tx_fifomask    = S3C2440_UFSTAT_TXMASK,
 110         .tx_fifoshift   = S3C2440_UFSTAT_TXSHIFT,
 111         .get_clksrc     = s3c2412_serial_getsource,
 112         .set_clksrc     = s3c2412_serial_setsource,
 113         .reset_port     = s3c2412_serial_resetport,
 114 };
 115
 116 /* device management */
 117
 118 static int s3c2412_serial_probe(struct platform_device *dev)
 119 {
 120         dbg("s3c2440_serial_probe: dev=%p\n", dev);
 121         return s3c24xx_serial_probe(dev, &s3c2412_uart_inf);
 122 }
 123
 124 static struct platform_driver s3c2412_serial_driver = {
 125         .probe          = s3c2412_serial_probe,
 126         .remove         = __devexit_p(s3c24xx_serial_remove),
 127         .driver         = {
 128                 .name   = "s3c2412-uart",
 129                 .owner  = THIS_MODULE,
 130         },
 131 };
 132
 133 s3c24xx_console_init(&s3c2412_serial_driver, &s3c2412_uart_inf);
 134
 135 static inline int s3c2412_serial_init(void)
 136 {
 137         return s3c24xx_serial_init(&s3c2412_serial_driver, &s3c2412_uart_inf);
 138 }
 139
 140 static inline void s3c2412_serial_exit(void)
 141 {
 142         platform_driver_unregister(&s3c2412_serial_driver);
 143 }
 144
 145 module_init(s3c2412_serial_init);
 146 module_exit(s3c2412_serial_exit);
 147
 148 MODULE_DESCRIPTION("Samsung S3C2412,S3C2413 SoC Serial port driver");
 149 MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>");
 150 MODULE_LICENSE("GPL v2");
 151 MODULE_ALIAS("platform:s3c2412-uart");