[POWERPC] Quieten cache information at boot
[linux-2.6/x86.git] / arch / powerpc / kernel / setup_64.c
blobede77dbbd4df7fa3338e343973f93a71accb7de5
1 /*
2 *
3 * Common boot and setup code.
5 * Copyright (C) 2001 PPC64 Team, IBM Corp
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
13 #undef DEBUG
15 #include <linux/module.h>
16 #include <linux/string.h>
17 #include <linux/sched.h>
18 #include <linux/init.h>
19 #include <linux/kernel.h>
20 #include <linux/reboot.h>
21 #include <linux/delay.h>
22 #include <linux/initrd.h>
23 #include <linux/seq_file.h>
24 #include <linux/ioport.h>
25 #include <linux/console.h>
26 #include <linux/utsname.h>
27 #include <linux/tty.h>
28 #include <linux/root_dev.h>
29 #include <linux/notifier.h>
30 #include <linux/cpu.h>
31 #include <linux/unistd.h>
32 #include <linux/serial.h>
33 #include <linux/serial_8250.h>
34 #include <linux/bootmem.h>
35 #include <linux/pci.h>
36 #include <asm/io.h>
37 #include <asm/kdump.h>
38 #include <asm/prom.h>
39 #include <asm/processor.h>
40 #include <asm/pgtable.h>
41 #include <asm/smp.h>
42 #include <asm/elf.h>
43 #include <asm/machdep.h>
44 #include <asm/paca.h>
45 #include <asm/time.h>
46 #include <asm/cputable.h>
47 #include <asm/sections.h>
48 #include <asm/btext.h>
49 #include <asm/nvram.h>
50 #include <asm/setup.h>
51 #include <asm/system.h>
52 #include <asm/rtas.h>
53 #include <asm/iommu.h>
54 #include <asm/serial.h>
55 #include <asm/cache.h>
56 #include <asm/page.h>
57 #include <asm/mmu.h>
58 #include <asm/lmb.h>
59 #include <asm/firmware.h>
60 #include <asm/xmon.h>
61 #include <asm/udbg.h>
62 #include <asm/kexec.h>
64 #include "setup.h"
66 #ifdef DEBUG
67 #define DBG(fmt...) udbg_printf(fmt)
68 #else
69 #define DBG(fmt...)
70 #endif
72 int have_of = 1;
73 int boot_cpuid = 0;
74 u64 ppc64_pft_size;
76 /* Pick defaults since we might want to patch instructions
77 * before we've read this from the device tree.
79 struct ppc64_caches ppc64_caches = {
80 .dline_size = 0x40,
81 .log_dline_size = 6,
82 .iline_size = 0x40,
83 .log_iline_size = 6
85 EXPORT_SYMBOL_GPL(ppc64_caches);
88 * These are used in binfmt_elf.c to put aux entries on the stack
89 * for each elf executable being started.
91 int dcache_bsize;
92 int icache_bsize;
93 int ucache_bsize;
95 #ifdef CONFIG_SMP
97 static int smt_enabled_cmdline;
99 /* Look for ibm,smt-enabled OF option */
100 static void check_smt_enabled(void)
102 struct device_node *dn;
103 const char *smt_option;
105 /* Allow the command line to overrule the OF option */
106 if (smt_enabled_cmdline)
107 return;
109 dn = of_find_node_by_path("/options");
111 if (dn) {
112 smt_option = of_get_property(dn, "ibm,smt-enabled", NULL);
114 if (smt_option) {
115 if (!strcmp(smt_option, "on"))
116 smt_enabled_at_boot = 1;
117 else if (!strcmp(smt_option, "off"))
118 smt_enabled_at_boot = 0;
123 /* Look for smt-enabled= cmdline option */
124 static int __init early_smt_enabled(char *p)
126 smt_enabled_cmdline = 1;
128 if (!p)
129 return 0;
131 if (!strcmp(p, "on") || !strcmp(p, "1"))
132 smt_enabled_at_boot = 1;
133 else if (!strcmp(p, "off") || !strcmp(p, "0"))
134 smt_enabled_at_boot = 0;
136 return 0;
138 early_param("smt-enabled", early_smt_enabled);
140 #else
141 #define check_smt_enabled()
142 #endif /* CONFIG_SMP */
144 /* Put the paca pointer into r13 and SPRG3 */
145 void __init setup_paca(int cpu)
147 local_paca = &paca[cpu];
148 mtspr(SPRN_SPRG3, local_paca);
152 * Early initialization entry point. This is called by head.S
153 * with MMU translation disabled. We rely on the "feature" of
154 * the CPU that ignores the top 2 bits of the address in real
155 * mode so we can access kernel globals normally provided we
156 * only toy with things in the RMO region. From here, we do
157 * some early parsing of the device-tree to setup out LMB
158 * data structures, and allocate & initialize the hash table
159 * and segment tables so we can start running with translation
160 * enabled.
162 * It is this function which will call the probe() callback of
163 * the various platform types and copy the matching one to the
164 * global ppc_md structure. Your platform can eventually do
165 * some very early initializations from the probe() routine, but
166 * this is not recommended, be very careful as, for example, the
167 * device-tree is not accessible via normal means at this point.
170 void __init early_setup(unsigned long dt_ptr)
172 /* Identify CPU type */
173 identify_cpu(0, mfspr(SPRN_PVR));
175 /* Assume we're on cpu 0 for now. Don't write to the paca yet! */
176 setup_paca(0);
178 /* Enable early debugging if any specified (see udbg.h) */
179 udbg_early_init();
181 DBG(" -> early_setup(), dt_ptr: 0x%lx\n", dt_ptr);
184 * Do early initialization using the flattened device
185 * tree, such as retrieving the physical memory map or
186 * calculating/retrieving the hash table size.
188 early_init_devtree(__va(dt_ptr));
190 /* Now we know the logical id of our boot cpu, setup the paca. */
191 setup_paca(boot_cpuid);
193 /* Fix up paca fields required for the boot cpu */
194 get_paca()->cpu_start = 1;
195 get_paca()->stab_real = __pa((u64)&initial_stab);
196 get_paca()->stab_addr = (u64)&initial_stab;
198 /* Probe the machine type */
199 probe_machine();
201 setup_kdump_trampoline();
203 DBG("Found, Initializing memory management...\n");
206 * Initialize the MMU Hash table and create the linear mapping
207 * of memory. Has to be done before stab/slb initialization as
208 * this is currently where the page size encoding is obtained
210 htab_initialize();
213 * Initialize stab / SLB management except on iSeries
215 if (cpu_has_feature(CPU_FTR_SLB))
216 slb_initialize();
217 else if (!firmware_has_feature(FW_FEATURE_ISERIES))
218 stab_initialize(get_paca()->stab_real);
220 DBG(" <- early_setup()\n");
223 #ifdef CONFIG_SMP
224 void early_setup_secondary(void)
226 struct paca_struct *lpaca = get_paca();
228 /* Mark interrupts enabled in PACA */
229 lpaca->soft_enabled = 0;
231 /* Initialize hash table for that CPU */
232 htab_initialize_secondary();
234 /* Initialize STAB/SLB. We use a virtual address as it works
235 * in real mode on pSeries and we want a virutal address on
236 * iSeries anyway
238 if (cpu_has_feature(CPU_FTR_SLB))
239 slb_initialize();
240 else
241 stab_initialize(lpaca->stab_addr);
244 #endif /* CONFIG_SMP */
246 #if defined(CONFIG_SMP) || defined(CONFIG_KEXEC)
247 void smp_release_cpus(void)
249 extern unsigned long __secondary_hold_spinloop;
250 unsigned long *ptr;
252 DBG(" -> smp_release_cpus()\n");
254 /* All secondary cpus are spinning on a common spinloop, release them
255 * all now so they can start to spin on their individual paca
256 * spinloops. For non SMP kernels, the secondary cpus never get out
257 * of the common spinloop.
258 * This is useless but harmless on iSeries, secondaries are already
259 * waiting on their paca spinloops. */
261 ptr = (unsigned long *)((unsigned long)&__secondary_hold_spinloop
262 - PHYSICAL_START);
263 *ptr = 1;
264 mb();
266 DBG(" <- smp_release_cpus()\n");
268 #endif /* CONFIG_SMP || CONFIG_KEXEC */
271 * Initialize some remaining members of the ppc64_caches and systemcfg
272 * structures
273 * (at least until we get rid of them completely). This is mostly some
274 * cache informations about the CPU that will be used by cache flush
275 * routines and/or provided to userland
277 static void __init initialize_cache_info(void)
279 struct device_node *np;
280 unsigned long num_cpus = 0;
282 DBG(" -> initialize_cache_info()\n");
284 for (np = NULL; (np = of_find_node_by_type(np, "cpu"));) {
285 num_cpus += 1;
287 /* We're assuming *all* of the CPUs have the same
288 * d-cache and i-cache sizes... -Peter
291 if ( num_cpus == 1 ) {
292 const u32 *sizep, *lsizep;
293 u32 size, lsize;
294 const char *dc, *ic;
296 /* Then read cache informations */
297 if (machine_is(powermac)) {
298 dc = "d-cache-block-size";
299 ic = "i-cache-block-size";
300 } else {
301 dc = "d-cache-line-size";
302 ic = "i-cache-line-size";
305 size = 0;
306 lsize = cur_cpu_spec->dcache_bsize;
307 sizep = of_get_property(np, "d-cache-size", NULL);
308 if (sizep != NULL)
309 size = *sizep;
310 lsizep = of_get_property(np, dc, NULL);
311 if (lsizep != NULL)
312 lsize = *lsizep;
313 if (sizep == 0 || lsizep == 0)
314 DBG("Argh, can't find dcache properties ! "
315 "sizep: %p, lsizep: %p\n", sizep, lsizep);
317 ppc64_caches.dsize = size;
318 ppc64_caches.dline_size = lsize;
319 ppc64_caches.log_dline_size = __ilog2(lsize);
320 ppc64_caches.dlines_per_page = PAGE_SIZE / lsize;
322 size = 0;
323 lsize = cur_cpu_spec->icache_bsize;
324 sizep = of_get_property(np, "i-cache-size", NULL);
325 if (sizep != NULL)
326 size = *sizep;
327 lsizep = of_get_property(np, ic, NULL);
328 if (lsizep != NULL)
329 lsize = *lsizep;
330 if (sizep == 0 || lsizep == 0)
331 DBG("Argh, can't find icache properties ! "
332 "sizep: %p, lsizep: %p\n", sizep, lsizep);
334 ppc64_caches.isize = size;
335 ppc64_caches.iline_size = lsize;
336 ppc64_caches.log_iline_size = __ilog2(lsize);
337 ppc64_caches.ilines_per_page = PAGE_SIZE / lsize;
341 DBG(" <- initialize_cache_info()\n");
346 * Do some initial setup of the system. The parameters are those which
347 * were passed in from the bootloader.
349 void __init setup_system(void)
351 DBG(" -> setup_system()\n");
353 /* Apply the CPUs-specific and firmware specific fixups to kernel
354 * text (nop out sections not relevant to this CPU or this firmware)
356 do_feature_fixups(cur_cpu_spec->cpu_features,
357 &__start___ftr_fixup, &__stop___ftr_fixup);
358 do_feature_fixups(powerpc_firmware_features,
359 &__start___fw_ftr_fixup, &__stop___fw_ftr_fixup);
362 * Unflatten the device-tree passed by prom_init or kexec
364 unflatten_device_tree();
367 * Fill the ppc64_caches & systemcfg structures with informations
368 * retrieved from the device-tree.
370 initialize_cache_info();
373 * Initialize irq remapping subsystem
375 irq_early_init();
377 #ifdef CONFIG_PPC_RTAS
379 * Initialize RTAS if available
381 rtas_initialize();
382 #endif /* CONFIG_PPC_RTAS */
385 * Check if we have an initrd provided via the device-tree
387 check_for_initrd();
390 * Do some platform specific early initializations, that includes
391 * setting up the hash table pointers. It also sets up some interrupt-mapping
392 * related options that will be used by finish_device_tree()
394 if (ppc_md.init_early)
395 ppc_md.init_early();
398 * We can discover serial ports now since the above did setup the
399 * hash table management for us, thus ioremap works. We do that early
400 * so that further code can be debugged
402 find_legacy_serial_ports();
405 * Register early console
407 register_early_udbg_console();
410 * Initialize xmon
412 xmon_setup();
414 check_smt_enabled();
415 smp_setup_cpu_maps();
417 #ifdef CONFIG_SMP
418 /* Release secondary cpus out of their spinloops at 0x60 now that
419 * we can map physical -> logical CPU ids
421 smp_release_cpus();
422 #endif
424 printk("Starting Linux PPC64 %s\n", init_utsname()->version);
426 printk("-----------------------------------------------------\n");
427 printk("ppc64_pft_size = 0x%lx\n", ppc64_pft_size);
428 printk("physicalMemorySize = 0x%lx\n", lmb_phys_mem_size());
429 if (ppc64_caches.dline_size != 0x80)
430 printk("ppc64_caches.dcache_line_size = 0x%x\n",
431 ppc64_caches.dline_size);
432 if (ppc64_caches.iline_size != 0x80)
433 printk("ppc64_caches.icache_line_size = 0x%x\n",
434 ppc64_caches.iline_size);
435 if (htab_address)
436 printk("htab_address = 0x%p\n", htab_address);
437 printk("htab_hash_mask = 0x%lx\n", htab_hash_mask);
438 #if PHYSICAL_START > 0
439 printk("physical_start = 0x%x\n", PHYSICAL_START);
440 #endif
441 printk("-----------------------------------------------------\n");
443 DBG(" <- setup_system()\n");
446 #ifdef CONFIG_IRQSTACKS
447 static void __init irqstack_early_init(void)
449 unsigned int i;
452 * interrupt stacks must be under 256MB, we cannot afford to take
453 * SLB misses on them.
455 for_each_possible_cpu(i) {
456 softirq_ctx[i] = (struct thread_info *)
457 __va(lmb_alloc_base(THREAD_SIZE,
458 THREAD_SIZE, 0x10000000));
459 hardirq_ctx[i] = (struct thread_info *)
460 __va(lmb_alloc_base(THREAD_SIZE,
461 THREAD_SIZE, 0x10000000));
464 #else
465 #define irqstack_early_init()
466 #endif
469 * Stack space used when we detect a bad kernel stack pointer, and
470 * early in SMP boots before relocation is enabled.
472 static void __init emergency_stack_init(void)
474 unsigned long limit;
475 unsigned int i;
478 * Emergency stacks must be under 256MB, we cannot afford to take
479 * SLB misses on them. The ABI also requires them to be 128-byte
480 * aligned.
482 * Since we use these as temporary stacks during secondary CPU
483 * bringup, we need to get at them in real mode. This means they
484 * must also be within the RMO region.
486 limit = min(0x10000000UL, lmb.rmo_size);
488 for_each_possible_cpu(i)
489 paca[i].emergency_sp =
490 __va(lmb_alloc_base(HW_PAGE_SIZE, 128, limit)) + HW_PAGE_SIZE;
494 * Called into from start_kernel, after lock_kernel has been called.
495 * Initializes bootmem, which is unsed to manage page allocation until
496 * mem_init is called.
498 void __init setup_arch(char **cmdline_p)
500 ppc64_boot_msg(0x12, "Setup Arch");
502 *cmdline_p = cmd_line;
505 * Set cache line size based on type of cpu as a default.
506 * Systems with OF can look in the properties on the cpu node(s)
507 * for a possibly more accurate value.
509 dcache_bsize = ppc64_caches.dline_size;
510 icache_bsize = ppc64_caches.iline_size;
512 /* reboot on panic */
513 panic_timeout = 180;
515 if (ppc_md.panic)
516 setup_panic();
518 init_mm.start_code = PAGE_OFFSET;
519 init_mm.end_code = (unsigned long) _etext;
520 init_mm.end_data = (unsigned long) _edata;
521 init_mm.brk = klimit;
523 irqstack_early_init();
524 emergency_stack_init();
526 stabs_alloc();
528 /* set up the bootmem stuff with available memory */
529 do_init_bootmem();
530 sparse_init();
532 #ifdef CONFIG_DUMMY_CONSOLE
533 conswitchp = &dummy_con;
534 #endif
536 if (ppc_md.setup_arch)
537 ppc_md.setup_arch();
539 paging_init();
540 ppc64_boot_msg(0x15, "Setup Done");
544 /* ToDo: do something useful if ppc_md is not yet setup. */
545 #define PPC64_LINUX_FUNCTION 0x0f000000
546 #define PPC64_IPL_MESSAGE 0xc0000000
547 #define PPC64_TERM_MESSAGE 0xb0000000
549 static void ppc64_do_msg(unsigned int src, const char *msg)
551 if (ppc_md.progress) {
552 char buf[128];
554 sprintf(buf, "%08X\n", src);
555 ppc_md.progress(buf, 0);
556 snprintf(buf, 128, "%s", msg);
557 ppc_md.progress(buf, 0);
561 /* Print a boot progress message. */
562 void ppc64_boot_msg(unsigned int src, const char *msg)
564 ppc64_do_msg(PPC64_LINUX_FUNCTION|PPC64_IPL_MESSAGE|src, msg);
565 printk("[boot]%04x %s\n", src, msg);
568 /* Print a termination message (print only -- does not stop the kernel) */
569 void ppc64_terminate_msg(unsigned int src, const char *msg)
571 ppc64_do_msg(PPC64_LINUX_FUNCTION|PPC64_TERM_MESSAGE|src, msg);
572 printk("[terminate]%04x %s\n", src, msg);
575 void cpu_die(void)
577 if (ppc_md.cpu_die)
578 ppc_md.cpu_die();
581 #ifdef CONFIG_SMP
582 void __init setup_per_cpu_areas(void)
584 int i;
585 unsigned long size;
586 char *ptr;
588 /* Copy section for each CPU (we discard the original) */
589 size = ALIGN(__per_cpu_end - __per_cpu_start, PAGE_SIZE);
590 #ifdef CONFIG_MODULES
591 if (size < PERCPU_ENOUGH_ROOM)
592 size = PERCPU_ENOUGH_ROOM;
593 #endif
595 for_each_possible_cpu(i) {
596 ptr = alloc_bootmem_pages_node(NODE_DATA(cpu_to_node(i)), size);
597 if (!ptr)
598 panic("Cannot allocate cpu data for CPU %d\n", i);
600 paca[i].data_offset = ptr - __per_cpu_start;
601 memcpy(ptr, __per_cpu_start, __per_cpu_end - __per_cpu_start);
604 /* Now that per_cpu is setup, initialize cpu_sibling_map */
605 smp_setup_cpu_sibling_map();
607 #endif
610 #ifdef CONFIG_PPC_INDIRECT_IO
611 struct ppc_pci_io ppc_pci_io;
612 EXPORT_SYMBOL(ppc_pci_io);
613 #endif /* CONFIG_PPC_INDIRECT_IO */