2 * 8259 interrupt controller emulation
4 * Copyright (c) 2003-2004 Fabrice Bellard
5 * Copyright (c) 2007 Intel Corporation
7 * Permission is hereby granted, free of charge, to any person obtaining a copy
8 * of this software and associated documentation files (the "Software"), to deal
9 * in the Software without restriction, including without limitation the rights
10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11 * copies of the Software, and to permit persons to whom the Software is
12 * furnished to do so, subject to the following conditions:
14 * The above copyright notice and this permission notice shall be included in
15 * all copies or substantial portions of the Software.
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
25 * Yaozu (Eddie) Dong <Eddie.dong@intel.com>
29 #include <linux/bitops.h>
32 #include <linux/kvm_host.h>
35 static void pic_lock(struct kvm_pic
*s
)
41 static void pic_unlock(struct kvm_pic
*s
)
44 spin_unlock(&s
->lock
);
47 static void pic_clear_isr(struct kvm_kpic_state
*s
, int irq
)
49 s
->isr
&= ~(1 << irq
);
50 s
->isr_ack
|= (1 << irq
);
51 if (s
!= &s
->pics_state
->pics
[0])
53 kvm_notify_acked_irq(s
->pics_state
->kvm
, SELECT_PIC(irq
), irq
);
56 void kvm_pic_clear_isr_ack(struct kvm
*kvm
)
58 struct kvm_pic
*s
= pic_irqchip(kvm
);
60 s
->pics
[0].isr_ack
= 0xff;
61 s
->pics
[1].isr_ack
= 0xff;
66 * set irq level. If an edge is detected, then the IRR is set to 1
68 static inline int pic_set_irq1(struct kvm_kpic_state
*s
, int irq
, int level
)
72 if (s
->elcr
& mask
) /* level triggered */
74 ret
= !(s
->irr
& mask
);
81 else /* edge triggered */
83 if ((s
->last_irr
& mask
) == 0) {
84 ret
= !(s
->irr
& mask
);
91 return (s
->imr
& mask
) ? -1 : ret
;
95 * return the highest priority found in mask (highest = smallest
96 * number). Return 8 if no irq
98 static inline int get_priority(struct kvm_kpic_state
*s
, int mask
)
104 while ((mask
& (1 << ((priority
+ s
->priority_add
) & 7))) == 0)
110 * return the pic wanted interrupt. return -1 if none
112 static int pic_get_irq(struct kvm_kpic_state
*s
)
114 int mask
, cur_priority
, priority
;
116 mask
= s
->irr
& ~s
->imr
;
117 priority
= get_priority(s
, mask
);
121 * compute current priority. If special fully nested mode on the
122 * master, the IRQ coming from the slave is not taken into account
123 * for the priority computation.
126 if (s
->special_fully_nested_mode
&& s
== &s
->pics_state
->pics
[0])
128 cur_priority
= get_priority(s
, mask
);
129 if (priority
< cur_priority
)
131 * higher priority found: an irq should be generated
133 return (priority
+ s
->priority_add
) & 7;
139 * raise irq to CPU if necessary. must be called every time the active
142 static void pic_update_irq(struct kvm_pic
*s
)
146 irq2
= pic_get_irq(&s
->pics
[1]);
149 * if irq request by slave pic, signal master PIC
151 pic_set_irq1(&s
->pics
[0], 2, 1);
152 pic_set_irq1(&s
->pics
[0], 2, 0);
154 irq
= pic_get_irq(&s
->pics
[0]);
156 s
->irq_request(s
->irq_request_opaque
, 1);
158 s
->irq_request(s
->irq_request_opaque
, 0);
161 void kvm_pic_update_irq(struct kvm_pic
*s
)
168 int kvm_pic_set_irq(void *opaque
, int irq
, int level
)
170 struct kvm_pic
*s
= opaque
;
174 if (irq
>= 0 && irq
< PIC_NUM_PINS
) {
175 ret
= pic_set_irq1(&s
->pics
[irq
>> 3], irq
& 7, level
);
177 trace_kvm_pic_set_irq(irq
>> 3, irq
& 7, s
->pics
[irq
>> 3].elcr
,
178 s
->pics
[irq
>> 3].imr
, ret
== 0);
186 * acknowledge interrupt 'irq'
188 static inline void pic_intack(struct kvm_kpic_state
*s
, int irq
)
192 if (s
->rotate_on_auto_eoi
)
193 s
->priority_add
= (irq
+ 1) & 7;
194 pic_clear_isr(s
, irq
);
197 * We don't clear a level sensitive interrupt here
199 if (!(s
->elcr
& (1 << irq
)))
200 s
->irr
&= ~(1 << irq
);
203 int kvm_pic_read_irq(struct kvm
*kvm
)
205 int irq
, irq2
, intno
;
206 struct kvm_pic
*s
= pic_irqchip(kvm
);
209 irq
= pic_get_irq(&s
->pics
[0]);
211 pic_intack(&s
->pics
[0], irq
);
213 irq2
= pic_get_irq(&s
->pics
[1]);
215 pic_intack(&s
->pics
[1], irq2
);
218 * spurious IRQ on slave controller
221 intno
= s
->pics
[1].irq_base
+ irq2
;
224 intno
= s
->pics
[0].irq_base
+ irq
;
227 * spurious IRQ on host controller
230 intno
= s
->pics
[0].irq_base
+ irq
;
238 void kvm_pic_reset(struct kvm_kpic_state
*s
)
241 struct kvm
*kvm
= s
->pics_state
->irq_request_opaque
;
242 struct kvm_vcpu
*vcpu0
= kvm
->bsp_vcpu
;
244 if (s
== &s
->pics_state
->pics
[0])
249 for (irq
= 0; irq
< PIC_NUM_PINS
/2; irq
++) {
250 if (vcpu0
&& kvm_apic_accept_pic_intr(vcpu0
))
251 if (s
->irr
& (1 << irq
) || s
->isr
& (1 << irq
)) {
253 kvm_notify_acked_irq(kvm
, SELECT_PIC(n
), n
);
263 s
->read_reg_select
= 0;
268 s
->rotate_on_auto_eoi
= 0;
269 s
->special_fully_nested_mode
= 0;
273 static void pic_ioport_write(void *opaque
, u32 addr
, u32 val
)
275 struct kvm_kpic_state
*s
= opaque
;
276 int priority
, cmd
, irq
;
281 kvm_pic_reset(s
); /* init */
283 * deassert a pending interrupt
285 s
->pics_state
->irq_request(s
->pics_state
->
286 irq_request_opaque
, 0);
290 printk(KERN_ERR
"single mode not supported");
293 "level sensitive irq not supported");
294 } else if (val
& 0x08) {
298 s
->read_reg_select
= val
& 1;
300 s
->special_mask
= (val
>> 5) & 1;
306 s
->rotate_on_auto_eoi
= cmd
>> 2;
308 case 1: /* end of interrupt */
310 priority
= get_priority(s
, s
->isr
);
312 irq
= (priority
+ s
->priority_add
) & 7;
313 pic_clear_isr(s
, irq
);
315 s
->priority_add
= (irq
+ 1) & 7;
316 pic_update_irq(s
->pics_state
);
321 pic_clear_isr(s
, irq
);
322 pic_update_irq(s
->pics_state
);
325 s
->priority_add
= (val
+ 1) & 7;
326 pic_update_irq(s
->pics_state
);
330 s
->priority_add
= (irq
+ 1) & 7;
331 pic_clear_isr(s
, irq
);
332 pic_update_irq(s
->pics_state
);
335 break; /* no operation */
339 switch (s
->init_state
) {
340 case 0: /* normal mode */
342 pic_update_irq(s
->pics_state
);
345 s
->irq_base
= val
& 0xf8;
355 s
->special_fully_nested_mode
= (val
>> 4) & 1;
356 s
->auto_eoi
= (val
>> 1) & 1;
362 static u32
pic_poll_read(struct kvm_kpic_state
*s
, u32 addr1
)
366 ret
= pic_get_irq(s
);
369 s
->pics_state
->pics
[0].isr
&= ~(1 << 2);
370 s
->pics_state
->pics
[0].irr
&= ~(1 << 2);
372 s
->irr
&= ~(1 << ret
);
373 pic_clear_isr(s
, ret
);
374 if (addr1
>> 7 || ret
!= 2)
375 pic_update_irq(s
->pics_state
);
378 pic_update_irq(s
->pics_state
);
384 static u32
pic_ioport_read(void *opaque
, u32 addr1
)
386 struct kvm_kpic_state
*s
= opaque
;
393 ret
= pic_poll_read(s
, addr1
);
397 if (s
->read_reg_select
)
406 static void elcr_ioport_write(void *opaque
, u32 addr
, u32 val
)
408 struct kvm_kpic_state
*s
= opaque
;
409 s
->elcr
= val
& s
->elcr_mask
;
412 static u32
elcr_ioport_read(void *opaque
, u32 addr1
)
414 struct kvm_kpic_state
*s
= opaque
;
418 static int picdev_in_range(gpa_t addr
)
433 static inline struct kvm_pic
*to_pic(struct kvm_io_device
*dev
)
435 return container_of(dev
, struct kvm_pic
, dev
);
438 static int picdev_write(struct kvm_io_device
*this,
439 gpa_t addr
, int len
, const void *val
)
441 struct kvm_pic
*s
= to_pic(this);
442 unsigned char data
= *(unsigned char *)val
;
443 if (!picdev_in_range(addr
))
447 if (printk_ratelimit())
448 printk(KERN_ERR
"PIC: non byte write\n");
457 pic_ioport_write(&s
->pics
[addr
>> 7], addr
, data
);
461 elcr_ioport_write(&s
->pics
[addr
& 1], addr
, data
);
468 static int picdev_read(struct kvm_io_device
*this,
469 gpa_t addr
, int len
, void *val
)
471 struct kvm_pic
*s
= to_pic(this);
472 unsigned char data
= 0;
473 if (!picdev_in_range(addr
))
477 if (printk_ratelimit())
478 printk(KERN_ERR
"PIC: non byte read\n");
487 data
= pic_ioport_read(&s
->pics
[addr
>> 7], addr
);
491 data
= elcr_ioport_read(&s
->pics
[addr
& 1], addr
);
494 *(unsigned char *)val
= data
;
500 * callback when PIC0 irq status changed
502 static void pic_irq_request(void *opaque
, int level
)
504 struct kvm
*kvm
= opaque
;
505 struct kvm_vcpu
*vcpu
= kvm
->bsp_vcpu
;
506 struct kvm_pic
*s
= pic_irqchip(kvm
);
507 int irq
= pic_get_irq(&s
->pics
[0]);
510 if (vcpu
&& level
&& (s
->pics
[0].isr_ack
& (1 << irq
))) {
511 s
->pics
[0].isr_ack
&= ~(1 << irq
);
516 static const struct kvm_io_device_ops picdev_ops
= {
518 .write
= picdev_write
,
521 struct kvm_pic
*kvm_create_pic(struct kvm
*kvm
)
526 s
= kzalloc(sizeof(struct kvm_pic
), GFP_KERNEL
);
529 spin_lock_init(&s
->lock
);
531 s
->pics
[0].elcr_mask
= 0xf8;
532 s
->pics
[1].elcr_mask
= 0xde;
533 s
->irq_request
= pic_irq_request
;
534 s
->irq_request_opaque
= kvm
;
535 s
->pics
[0].pics_state
= s
;
536 s
->pics
[1].pics_state
= s
;
539 * Initialize PIO device
541 kvm_iodevice_init(&s
->dev
, &picdev_ops
);
542 ret
= kvm_io_bus_register_dev(kvm
, &kvm
->pio_bus
, &s
->dev
);