[PATCH] paravirt: fix missing pte update
[linux-2.6/x86.git] / drivers / hwmon / w83781d.c
blob1232171c3aad804a97320e0a909bd1fa6ee3d362
1 /*
2 w83781d.c - Part of lm_sensors, Linux kernel modules for hardware
3 monitoring
4 Copyright (c) 1998 - 2001 Frodo Looijaard <frodol@dds.nl>,
5 Philip Edelbrock <phil@netroedge.com>,
6 and Mark Studebaker <mdsxyz123@yahoo.com>
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
24 Supports following chips:
26 Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA
27 as99127f 7 3 0 3 0x31 0x12c3 yes no
28 as99127f rev.2 (type_name = as99127f) 0x31 0x5ca3 yes no
29 w83781d 7 3 0 3 0x10-1 0x5ca3 yes yes
30 w83627hf 9 3 2 3 0x21 0x5ca3 yes yes(LPC)
31 w83782d 9 3 2-4 3 0x30 0x5ca3 yes yes
32 w83783s 5-6 3 2 1-2 0x40 0x5ca3 yes no
36 #include <linux/module.h>
37 #include <linux/init.h>
38 #include <linux/slab.h>
39 #include <linux/jiffies.h>
40 #include <linux/i2c.h>
41 #include <linux/i2c-isa.h>
42 #include <linux/hwmon.h>
43 #include <linux/hwmon-vid.h>
44 #include <linux/sysfs.h>
45 #include <linux/err.h>
46 #include <linux/mutex.h>
47 #include <asm/io.h>
48 #include "lm75.h"
50 /* Addresses to scan */
51 static unsigned short normal_i2c[] = { 0x20, 0x21, 0x22, 0x23, 0x24, 0x25,
52 0x26, 0x27, 0x28, 0x29, 0x2a, 0x2b,
53 0x2c, 0x2d, 0x2e, 0x2f, I2C_CLIENT_END };
54 static unsigned short isa_address = 0x290;
56 /* Insmod parameters */
57 I2C_CLIENT_INSMOD_5(w83781d, w83782d, w83783s, w83627hf, as99127f);
58 I2C_CLIENT_MODULE_PARM(force_subclients, "List of subclient addresses: "
59 "{bus, clientaddr, subclientaddr1, subclientaddr2}");
61 static int reset;
62 module_param(reset, bool, 0);
63 MODULE_PARM_DESC(reset, "Set to one to reset chip on load");
65 static int init = 1;
66 module_param(init, bool, 0);
67 MODULE_PARM_DESC(init, "Set to zero to bypass chip initialization");
69 /* Constants specified below */
71 /* Length of ISA address segment */
72 #define W83781D_EXTENT 8
74 /* Where are the ISA address/data registers relative to the base address */
75 #define W83781D_ADDR_REG_OFFSET 5
76 #define W83781D_DATA_REG_OFFSET 6
78 /* The W83781D registers */
79 /* The W83782D registers for nr=7,8 are in bank 5 */
80 #define W83781D_REG_IN_MAX(nr) ((nr < 7) ? (0x2b + (nr) * 2) : \
81 (0x554 + (((nr) - 7) * 2)))
82 #define W83781D_REG_IN_MIN(nr) ((nr < 7) ? (0x2c + (nr) * 2) : \
83 (0x555 + (((nr) - 7) * 2)))
84 #define W83781D_REG_IN(nr) ((nr < 7) ? (0x20 + (nr)) : \
85 (0x550 + (nr) - 7))
87 #define W83781D_REG_FAN_MIN(nr) (0x3a + (nr))
88 #define W83781D_REG_FAN(nr) (0x27 + (nr))
90 #define W83781D_REG_BANK 0x4E
91 #define W83781D_REG_TEMP2_CONFIG 0x152
92 #define W83781D_REG_TEMP3_CONFIG 0x252
93 #define W83781D_REG_TEMP(nr) ((nr == 3) ? (0x0250) : \
94 ((nr == 2) ? (0x0150) : \
95 (0x27)))
96 #define W83781D_REG_TEMP_HYST(nr) ((nr == 3) ? (0x253) : \
97 ((nr == 2) ? (0x153) : \
98 (0x3A)))
99 #define W83781D_REG_TEMP_OVER(nr) ((nr == 3) ? (0x255) : \
100 ((nr == 2) ? (0x155) : \
101 (0x39)))
103 #define W83781D_REG_CONFIG 0x40
105 /* Interrupt status (W83781D, AS99127F) */
106 #define W83781D_REG_ALARM1 0x41
107 #define W83781D_REG_ALARM2 0x42
109 /* Real-time status (W83782D, W83783S, W83627HF) */
110 #define W83782D_REG_ALARM1 0x459
111 #define W83782D_REG_ALARM2 0x45A
112 #define W83782D_REG_ALARM3 0x45B
114 #define W83781D_REG_BEEP_CONFIG 0x4D
115 #define W83781D_REG_BEEP_INTS1 0x56
116 #define W83781D_REG_BEEP_INTS2 0x57
117 #define W83781D_REG_BEEP_INTS3 0x453 /* not on W83781D */
119 #define W83781D_REG_VID_FANDIV 0x47
121 #define W83781D_REG_CHIPID 0x49
122 #define W83781D_REG_WCHIPID 0x58
123 #define W83781D_REG_CHIPMAN 0x4F
124 #define W83781D_REG_PIN 0x4B
126 /* 782D/783S only */
127 #define W83781D_REG_VBAT 0x5D
129 /* PWM 782D (1-4) and 783S (1-2) only */
130 #define W83781D_REG_PWM1 0x5B /* 782d and 783s/627hf datasheets disagree */
131 /* on which is which; */
132 #define W83781D_REG_PWM2 0x5A /* We follow the 782d convention here, */
133 /* However 782d is probably wrong. */
134 #define W83781D_REG_PWM3 0x5E
135 #define W83781D_REG_PWM4 0x5F
136 #define W83781D_REG_PWMCLK12 0x5C
137 #define W83781D_REG_PWMCLK34 0x45C
138 static const u8 regpwm[] = { W83781D_REG_PWM1, W83781D_REG_PWM2,
139 W83781D_REG_PWM3, W83781D_REG_PWM4
142 #define W83781D_REG_PWM(nr) (regpwm[(nr) - 1])
144 #define W83781D_REG_I2C_ADDR 0x48
145 #define W83781D_REG_I2C_SUBADDR 0x4A
147 /* The following are undocumented in the data sheets however we
148 received the information in an email from Winbond tech support */
149 /* Sensor selection - not on 781d */
150 #define W83781D_REG_SCFG1 0x5D
151 static const u8 BIT_SCFG1[] = { 0x02, 0x04, 0x08 };
153 #define W83781D_REG_SCFG2 0x59
154 static const u8 BIT_SCFG2[] = { 0x10, 0x20, 0x40 };
156 #define W83781D_DEFAULT_BETA 3435
158 /* RT Table registers */
159 #define W83781D_REG_RT_IDX 0x50
160 #define W83781D_REG_RT_VAL 0x51
162 /* Conversions. Rounding and limit checking is only done on the TO_REG
163 variants. Note that you should be a bit careful with which arguments
164 these macros are called: arguments may be evaluated more than once.
165 Fixing this is just not worth it. */
166 #define IN_TO_REG(val) (SENSORS_LIMIT((((val) * 10 + 8)/16),0,255))
167 #define IN_FROM_REG(val) (((val) * 16) / 10)
169 static inline u8
170 FAN_TO_REG(long rpm, int div)
172 if (rpm == 0)
173 return 255;
174 rpm = SENSORS_LIMIT(rpm, 1, 1000000);
175 return SENSORS_LIMIT((1350000 + rpm * div / 2) / (rpm * div), 1, 254);
178 #define FAN_FROM_REG(val,div) ((val) == 0 ? -1 : \
179 ((val) == 255 ? 0 : \
180 1350000 / ((val) * (div))))
182 #define TEMP_TO_REG(val) (SENSORS_LIMIT(((val) < 0 ? (val)+0x100*1000 \
183 : (val)) / 1000, 0, 0xff))
184 #define TEMP_FROM_REG(val) (((val) & 0x80 ? (val)-0x100 : (val)) * 1000)
186 #define PWM_FROM_REG(val) (val)
187 #define PWM_TO_REG(val) (SENSORS_LIMIT((val),0,255))
188 #define BEEP_MASK_FROM_REG(val,type) ((type) == as99127f ? \
189 (val) ^ 0x7fff : (val))
190 #define BEEP_MASK_TO_REG(val,type) ((type) == as99127f ? \
191 (~(val)) & 0x7fff : (val) & 0xffffff)
193 #define BEEP_ENABLE_TO_REG(val) ((val) ? 1 : 0)
194 #define BEEP_ENABLE_FROM_REG(val) ((val) ? 1 : 0)
196 #define DIV_FROM_REG(val) (1 << (val))
198 static inline u8
199 DIV_TO_REG(long val, enum chips type)
201 int i;
202 val = SENSORS_LIMIT(val, 1,
203 ((type == w83781d
204 || type == as99127f) ? 8 : 128)) >> 1;
205 for (i = 0; i < 7; i++) {
206 if (val == 0)
207 break;
208 val >>= 1;
210 return ((u8) i);
213 /* There are some complications in a module like this. First off, W83781D chips
214 may be both present on the SMBus and the ISA bus, and we have to handle
215 those cases separately at some places. Second, there might be several
216 W83781D chips available (well, actually, that is probably never done; but
217 it is a clean illustration of how to handle a case like that). Finally,
218 a specific chip may be attached to *both* ISA and SMBus, and we would
219 not like to detect it double. Fortunately, in the case of the W83781D at
220 least, a register tells us what SMBus address we are on, so that helps
221 a bit - except if there could be more than one SMBus. Groan. No solution
222 for this yet. */
224 /* This module may seem overly long and complicated. In fact, it is not so
225 bad. Quite a lot of bookkeeping is done. A real driver can often cut
226 some corners. */
228 /* For each registered W83781D, we need to keep some data in memory. That
229 data is pointed to by w83781d_list[NR]->data. The structure itself is
230 dynamically allocated, at the same time when a new w83781d client is
231 allocated. */
232 struct w83781d_data {
233 struct i2c_client client;
234 struct class_device *class_dev;
235 struct mutex lock;
236 enum chips type;
238 struct mutex update_lock;
239 char valid; /* !=0 if following fields are valid */
240 unsigned long last_updated; /* In jiffies */
242 struct i2c_client *lm75[2]; /* for secondary I2C addresses */
243 /* array of 2 pointers to subclients */
245 u8 in[9]; /* Register value - 8 & 9 for 782D only */
246 u8 in_max[9]; /* Register value - 8 & 9 for 782D only */
247 u8 in_min[9]; /* Register value - 8 & 9 for 782D only */
248 u8 fan[3]; /* Register value */
249 u8 fan_min[3]; /* Register value */
250 u8 temp;
251 u8 temp_max; /* Register value */
252 u8 temp_max_hyst; /* Register value */
253 u16 temp_add[2]; /* Register value */
254 u16 temp_max_add[2]; /* Register value */
255 u16 temp_max_hyst_add[2]; /* Register value */
256 u8 fan_div[3]; /* Register encoding, shifted right */
257 u8 vid; /* Register encoding, combined */
258 u32 alarms; /* Register encoding, combined */
259 u32 beep_mask; /* Register encoding, combined */
260 u8 beep_enable; /* Boolean */
261 u8 pwm[4]; /* Register value */
262 u8 pwmenable[4]; /* Boolean */
263 u16 sens[3]; /* 782D/783S only.
264 1 = pentium diode; 2 = 3904 diode;
265 3000-5000 = thermistor beta.
266 Default = 3435.
267 Other Betas unimplemented */
268 u8 vrm;
271 static int w83781d_attach_adapter(struct i2c_adapter *adapter);
272 static int w83781d_isa_attach_adapter(struct i2c_adapter *adapter);
273 static int w83781d_detect(struct i2c_adapter *adapter, int address, int kind);
274 static int w83781d_detach_client(struct i2c_client *client);
276 static int w83781d_read_value(struct i2c_client *client, u16 reg);
277 static int w83781d_write_value(struct i2c_client *client, u16 reg, u16 value);
278 static struct w83781d_data *w83781d_update_device(struct device *dev);
279 static void w83781d_init_client(struct i2c_client *client);
281 static struct i2c_driver w83781d_driver = {
282 .driver = {
283 .name = "w83781d",
285 .id = I2C_DRIVERID_W83781D,
286 .attach_adapter = w83781d_attach_adapter,
287 .detach_client = w83781d_detach_client,
290 static struct i2c_driver w83781d_isa_driver = {
291 .driver = {
292 .owner = THIS_MODULE,
293 .name = "w83781d-isa",
295 .attach_adapter = w83781d_isa_attach_adapter,
296 .detach_client = w83781d_detach_client,
300 /* following are the sysfs callback functions */
301 #define show_in_reg(reg) \
302 static ssize_t show_##reg (struct device *dev, char *buf, int nr) \
304 struct w83781d_data *data = w83781d_update_device(dev); \
305 return sprintf(buf,"%ld\n", (long)IN_FROM_REG(data->reg[nr] * 10)); \
307 show_in_reg(in);
308 show_in_reg(in_min);
309 show_in_reg(in_max);
311 #define store_in_reg(REG, reg) \
312 static ssize_t store_in_##reg (struct device *dev, const char *buf, size_t count, int nr) \
314 struct i2c_client *client = to_i2c_client(dev); \
315 struct w83781d_data *data = i2c_get_clientdata(client); \
316 u32 val; \
318 val = simple_strtoul(buf, NULL, 10) / 10; \
320 mutex_lock(&data->update_lock); \
321 data->in_##reg[nr] = IN_TO_REG(val); \
322 w83781d_write_value(client, W83781D_REG_IN_##REG(nr), data->in_##reg[nr]); \
324 mutex_unlock(&data->update_lock); \
325 return count; \
327 store_in_reg(MIN, min);
328 store_in_reg(MAX, max);
330 #define sysfs_in_offset(offset) \
331 static ssize_t \
332 show_regs_in_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
334 return show_in(dev, buf, offset); \
336 static DEVICE_ATTR(in##offset##_input, S_IRUGO, show_regs_in_##offset, NULL);
338 #define sysfs_in_reg_offset(reg, offset) \
339 static ssize_t show_regs_in_##reg##offset (struct device *dev, struct device_attribute *attr, char *buf) \
341 return show_in_##reg (dev, buf, offset); \
343 static ssize_t store_regs_in_##reg##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
345 return store_in_##reg (dev, buf, count, offset); \
347 static DEVICE_ATTR(in##offset##_##reg, S_IRUGO| S_IWUSR, show_regs_in_##reg##offset, store_regs_in_##reg##offset);
349 #define sysfs_in_offsets(offset) \
350 sysfs_in_offset(offset); \
351 sysfs_in_reg_offset(min, offset); \
352 sysfs_in_reg_offset(max, offset);
354 sysfs_in_offsets(0);
355 sysfs_in_offsets(1);
356 sysfs_in_offsets(2);
357 sysfs_in_offsets(3);
358 sysfs_in_offsets(4);
359 sysfs_in_offsets(5);
360 sysfs_in_offsets(6);
361 sysfs_in_offsets(7);
362 sysfs_in_offsets(8);
364 #define show_fan_reg(reg) \
365 static ssize_t show_##reg (struct device *dev, char *buf, int nr) \
367 struct w83781d_data *data = w83781d_update_device(dev); \
368 return sprintf(buf,"%ld\n", \
369 FAN_FROM_REG(data->reg[nr-1], (long)DIV_FROM_REG(data->fan_div[nr-1]))); \
371 show_fan_reg(fan);
372 show_fan_reg(fan_min);
374 static ssize_t
375 store_fan_min(struct device *dev, const char *buf, size_t count, int nr)
377 struct i2c_client *client = to_i2c_client(dev);
378 struct w83781d_data *data = i2c_get_clientdata(client);
379 u32 val;
381 val = simple_strtoul(buf, NULL, 10);
383 mutex_lock(&data->update_lock);
384 data->fan_min[nr - 1] =
385 FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr - 1]));
386 w83781d_write_value(client, W83781D_REG_FAN_MIN(nr),
387 data->fan_min[nr - 1]);
389 mutex_unlock(&data->update_lock);
390 return count;
393 #define sysfs_fan_offset(offset) \
394 static ssize_t show_regs_fan_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
396 return show_fan(dev, buf, offset); \
398 static DEVICE_ATTR(fan##offset##_input, S_IRUGO, show_regs_fan_##offset, NULL);
400 #define sysfs_fan_min_offset(offset) \
401 static ssize_t show_regs_fan_min##offset (struct device *dev, struct device_attribute *attr, char *buf) \
403 return show_fan_min(dev, buf, offset); \
405 static ssize_t store_regs_fan_min##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
407 return store_fan_min(dev, buf, count, offset); \
409 static DEVICE_ATTR(fan##offset##_min, S_IRUGO | S_IWUSR, show_regs_fan_min##offset, store_regs_fan_min##offset);
411 sysfs_fan_offset(1);
412 sysfs_fan_min_offset(1);
413 sysfs_fan_offset(2);
414 sysfs_fan_min_offset(2);
415 sysfs_fan_offset(3);
416 sysfs_fan_min_offset(3);
418 #define show_temp_reg(reg) \
419 static ssize_t show_##reg (struct device *dev, char *buf, int nr) \
421 struct w83781d_data *data = w83781d_update_device(dev); \
422 if (nr >= 2) { /* TEMP2 and TEMP3 */ \
423 return sprintf(buf,"%d\n", \
424 LM75_TEMP_FROM_REG(data->reg##_add[nr-2])); \
425 } else { /* TEMP1 */ \
426 return sprintf(buf,"%ld\n", (long)TEMP_FROM_REG(data->reg)); \
429 show_temp_reg(temp);
430 show_temp_reg(temp_max);
431 show_temp_reg(temp_max_hyst);
433 #define store_temp_reg(REG, reg) \
434 static ssize_t store_temp_##reg (struct device *dev, const char *buf, size_t count, int nr) \
436 struct i2c_client *client = to_i2c_client(dev); \
437 struct w83781d_data *data = i2c_get_clientdata(client); \
438 s32 val; \
440 val = simple_strtol(buf, NULL, 10); \
442 mutex_lock(&data->update_lock); \
444 if (nr >= 2) { /* TEMP2 and TEMP3 */ \
445 data->temp_##reg##_add[nr-2] = LM75_TEMP_TO_REG(val); \
446 w83781d_write_value(client, W83781D_REG_TEMP_##REG(nr), \
447 data->temp_##reg##_add[nr-2]); \
448 } else { /* TEMP1 */ \
449 data->temp_##reg = TEMP_TO_REG(val); \
450 w83781d_write_value(client, W83781D_REG_TEMP_##REG(nr), \
451 data->temp_##reg); \
454 mutex_unlock(&data->update_lock); \
455 return count; \
457 store_temp_reg(OVER, max);
458 store_temp_reg(HYST, max_hyst);
460 #define sysfs_temp_offset(offset) \
461 static ssize_t \
462 show_regs_temp_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
464 return show_temp(dev, buf, offset); \
466 static DEVICE_ATTR(temp##offset##_input, S_IRUGO, show_regs_temp_##offset, NULL);
468 #define sysfs_temp_reg_offset(reg, offset) \
469 static ssize_t show_regs_temp_##reg##offset (struct device *dev, struct device_attribute *attr, char *buf) \
471 return show_temp_##reg (dev, buf, offset); \
473 static ssize_t store_regs_temp_##reg##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
475 return store_temp_##reg (dev, buf, count, offset); \
477 static DEVICE_ATTR(temp##offset##_##reg, S_IRUGO| S_IWUSR, show_regs_temp_##reg##offset, store_regs_temp_##reg##offset);
479 #define sysfs_temp_offsets(offset) \
480 sysfs_temp_offset(offset); \
481 sysfs_temp_reg_offset(max, offset); \
482 sysfs_temp_reg_offset(max_hyst, offset);
484 sysfs_temp_offsets(1);
485 sysfs_temp_offsets(2);
486 sysfs_temp_offsets(3);
488 static ssize_t
489 show_vid_reg(struct device *dev, struct device_attribute *attr, char *buf)
491 struct w83781d_data *data = w83781d_update_device(dev);
492 return sprintf(buf, "%ld\n", (long) vid_from_reg(data->vid, data->vrm));
495 static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL);
497 static ssize_t
498 show_vrm_reg(struct device *dev, struct device_attribute *attr, char *buf)
500 struct w83781d_data *data = w83781d_update_device(dev);
501 return sprintf(buf, "%ld\n", (long) data->vrm);
504 static ssize_t
505 store_vrm_reg(struct device *dev, struct device_attribute *attr, const char *buf, size_t count)
507 struct i2c_client *client = to_i2c_client(dev);
508 struct w83781d_data *data = i2c_get_clientdata(client);
509 u32 val;
511 val = simple_strtoul(buf, NULL, 10);
512 data->vrm = val;
514 return count;
517 static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg);
519 static ssize_t
520 show_alarms_reg(struct device *dev, struct device_attribute *attr, char *buf)
522 struct w83781d_data *data = w83781d_update_device(dev);
523 return sprintf(buf, "%u\n", data->alarms);
526 static DEVICE_ATTR(alarms, S_IRUGO, show_alarms_reg, NULL);
528 static ssize_t show_beep_mask (struct device *dev, struct device_attribute *attr, char *buf)
530 struct w83781d_data *data = w83781d_update_device(dev);
531 return sprintf(buf, "%ld\n",
532 (long)BEEP_MASK_FROM_REG(data->beep_mask, data->type));
534 static ssize_t show_beep_enable (struct device *dev, struct device_attribute *attr, char *buf)
536 struct w83781d_data *data = w83781d_update_device(dev);
537 return sprintf(buf, "%ld\n",
538 (long)BEEP_ENABLE_FROM_REG(data->beep_enable));
541 #define BEEP_ENABLE 0 /* Store beep_enable */
542 #define BEEP_MASK 1 /* Store beep_mask */
544 static ssize_t
545 store_beep_reg(struct device *dev, const char *buf, size_t count,
546 int update_mask)
548 struct i2c_client *client = to_i2c_client(dev);
549 struct w83781d_data *data = i2c_get_clientdata(client);
550 u32 val, val2;
552 val = simple_strtoul(buf, NULL, 10);
554 mutex_lock(&data->update_lock);
556 if (update_mask == BEEP_MASK) { /* We are storing beep_mask */
557 data->beep_mask = BEEP_MASK_TO_REG(val, data->type);
558 w83781d_write_value(client, W83781D_REG_BEEP_INTS1,
559 data->beep_mask & 0xff);
561 if ((data->type != w83781d) && (data->type != as99127f)) {
562 w83781d_write_value(client, W83781D_REG_BEEP_INTS3,
563 ((data->beep_mask) >> 16) & 0xff);
566 val2 = (data->beep_mask >> 8) & 0x7f;
567 } else { /* We are storing beep_enable */
568 val2 = w83781d_read_value(client, W83781D_REG_BEEP_INTS2) & 0x7f;
569 data->beep_enable = BEEP_ENABLE_TO_REG(val);
572 w83781d_write_value(client, W83781D_REG_BEEP_INTS2,
573 val2 | data->beep_enable << 7);
575 mutex_unlock(&data->update_lock);
576 return count;
579 #define sysfs_beep(REG, reg) \
580 static ssize_t show_regs_beep_##reg (struct device *dev, struct device_attribute *attr, char *buf) \
582 return show_beep_##reg(dev, attr, buf); \
584 static ssize_t store_regs_beep_##reg (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
586 return store_beep_reg(dev, buf, count, BEEP_##REG); \
588 static DEVICE_ATTR(beep_##reg, S_IRUGO | S_IWUSR, show_regs_beep_##reg, store_regs_beep_##reg);
590 sysfs_beep(ENABLE, enable);
591 sysfs_beep(MASK, mask);
593 static ssize_t
594 show_fan_div_reg(struct device *dev, char *buf, int nr)
596 struct w83781d_data *data = w83781d_update_device(dev);
597 return sprintf(buf, "%ld\n",
598 (long) DIV_FROM_REG(data->fan_div[nr - 1]));
601 /* Note: we save and restore the fan minimum here, because its value is
602 determined in part by the fan divisor. This follows the principle of
603 least surprise; the user doesn't expect the fan minimum to change just
604 because the divisor changed. */
605 static ssize_t
606 store_fan_div_reg(struct device *dev, const char *buf, size_t count, int nr)
608 struct i2c_client *client = to_i2c_client(dev);
609 struct w83781d_data *data = i2c_get_clientdata(client);
610 unsigned long min;
611 u8 reg;
612 unsigned long val = simple_strtoul(buf, NULL, 10);
614 mutex_lock(&data->update_lock);
616 /* Save fan_min */
617 min = FAN_FROM_REG(data->fan_min[nr],
618 DIV_FROM_REG(data->fan_div[nr]));
620 data->fan_div[nr] = DIV_TO_REG(val, data->type);
622 reg = (w83781d_read_value(client, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV)
623 & (nr==0 ? 0xcf : 0x3f))
624 | ((data->fan_div[nr] & 0x03) << (nr==0 ? 4 : 6));
625 w83781d_write_value(client, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV, reg);
627 /* w83781d and as99127f don't have extended divisor bits */
628 if (data->type != w83781d && data->type != as99127f) {
629 reg = (w83781d_read_value(client, W83781D_REG_VBAT)
630 & ~(1 << (5 + nr)))
631 | ((data->fan_div[nr] & 0x04) << (3 + nr));
632 w83781d_write_value(client, W83781D_REG_VBAT, reg);
635 /* Restore fan_min */
636 data->fan_min[nr] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
637 w83781d_write_value(client, W83781D_REG_FAN_MIN(nr+1), data->fan_min[nr]);
639 mutex_unlock(&data->update_lock);
640 return count;
643 #define sysfs_fan_div(offset) \
644 static ssize_t show_regs_fan_div_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
646 return show_fan_div_reg(dev, buf, offset); \
648 static ssize_t store_regs_fan_div_##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
650 return store_fan_div_reg(dev, buf, count, offset - 1); \
652 static DEVICE_ATTR(fan##offset##_div, S_IRUGO | S_IWUSR, show_regs_fan_div_##offset, store_regs_fan_div_##offset);
654 sysfs_fan_div(1);
655 sysfs_fan_div(2);
656 sysfs_fan_div(3);
658 static ssize_t
659 show_pwm_reg(struct device *dev, char *buf, int nr)
661 struct w83781d_data *data = w83781d_update_device(dev);
662 return sprintf(buf, "%ld\n", (long) PWM_FROM_REG(data->pwm[nr - 1]));
665 static ssize_t
666 show_pwmenable_reg(struct device *dev, char *buf, int nr)
668 struct w83781d_data *data = w83781d_update_device(dev);
669 return sprintf(buf, "%ld\n", (long) data->pwmenable[nr - 1]);
672 static ssize_t
673 store_pwm_reg(struct device *dev, const char *buf, size_t count, int nr)
675 struct i2c_client *client = to_i2c_client(dev);
676 struct w83781d_data *data = i2c_get_clientdata(client);
677 u32 val;
679 val = simple_strtoul(buf, NULL, 10);
681 mutex_lock(&data->update_lock);
682 data->pwm[nr - 1] = PWM_TO_REG(val);
683 w83781d_write_value(client, W83781D_REG_PWM(nr), data->pwm[nr - 1]);
684 mutex_unlock(&data->update_lock);
685 return count;
688 static ssize_t
689 store_pwmenable_reg(struct device *dev, const char *buf, size_t count, int nr)
691 struct i2c_client *client = to_i2c_client(dev);
692 struct w83781d_data *data = i2c_get_clientdata(client);
693 u32 val, reg;
695 val = simple_strtoul(buf, NULL, 10);
697 mutex_lock(&data->update_lock);
699 switch (val) {
700 case 0:
701 case 1:
702 reg = w83781d_read_value(client, W83781D_REG_PWMCLK12);
703 w83781d_write_value(client, W83781D_REG_PWMCLK12,
704 (reg & 0xf7) | (val << 3));
706 reg = w83781d_read_value(client, W83781D_REG_BEEP_CONFIG);
707 w83781d_write_value(client, W83781D_REG_BEEP_CONFIG,
708 (reg & 0xef) | (!val << 4));
710 data->pwmenable[nr - 1] = val;
711 break;
713 default:
714 mutex_unlock(&data->update_lock);
715 return -EINVAL;
718 mutex_unlock(&data->update_lock);
719 return count;
722 #define sysfs_pwm(offset) \
723 static ssize_t show_regs_pwm_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
725 return show_pwm_reg(dev, buf, offset); \
727 static ssize_t store_regs_pwm_##offset (struct device *dev, struct device_attribute *attr, \
728 const char *buf, size_t count) \
730 return store_pwm_reg(dev, buf, count, offset); \
732 static DEVICE_ATTR(pwm##offset, S_IRUGO | S_IWUSR, \
733 show_regs_pwm_##offset, store_regs_pwm_##offset);
735 #define sysfs_pwmenable(offset) \
736 static ssize_t show_regs_pwmenable_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
738 return show_pwmenable_reg(dev, buf, offset); \
740 static ssize_t store_regs_pwmenable_##offset (struct device *dev, struct device_attribute *attr, \
741 const char *buf, size_t count) \
743 return store_pwmenable_reg(dev, buf, count, offset); \
745 static DEVICE_ATTR(pwm##offset##_enable, S_IRUGO | S_IWUSR, \
746 show_regs_pwmenable_##offset, store_regs_pwmenable_##offset);
748 sysfs_pwm(1);
749 sysfs_pwm(2);
750 sysfs_pwmenable(2); /* only PWM2 can be enabled/disabled */
751 sysfs_pwm(3);
752 sysfs_pwm(4);
754 static ssize_t
755 show_sensor_reg(struct device *dev, char *buf, int nr)
757 struct w83781d_data *data = w83781d_update_device(dev);
758 return sprintf(buf, "%ld\n", (long) data->sens[nr - 1]);
761 static ssize_t
762 store_sensor_reg(struct device *dev, const char *buf, size_t count, int nr)
764 struct i2c_client *client = to_i2c_client(dev);
765 struct w83781d_data *data = i2c_get_clientdata(client);
766 u32 val, tmp;
768 val = simple_strtoul(buf, NULL, 10);
770 mutex_lock(&data->update_lock);
772 switch (val) {
773 case 1: /* PII/Celeron diode */
774 tmp = w83781d_read_value(client, W83781D_REG_SCFG1);
775 w83781d_write_value(client, W83781D_REG_SCFG1,
776 tmp | BIT_SCFG1[nr - 1]);
777 tmp = w83781d_read_value(client, W83781D_REG_SCFG2);
778 w83781d_write_value(client, W83781D_REG_SCFG2,
779 tmp | BIT_SCFG2[nr - 1]);
780 data->sens[nr - 1] = val;
781 break;
782 case 2: /* 3904 */
783 tmp = w83781d_read_value(client, W83781D_REG_SCFG1);
784 w83781d_write_value(client, W83781D_REG_SCFG1,
785 tmp | BIT_SCFG1[nr - 1]);
786 tmp = w83781d_read_value(client, W83781D_REG_SCFG2);
787 w83781d_write_value(client, W83781D_REG_SCFG2,
788 tmp & ~BIT_SCFG2[nr - 1]);
789 data->sens[nr - 1] = val;
790 break;
791 case W83781D_DEFAULT_BETA: /* thermistor */
792 tmp = w83781d_read_value(client, W83781D_REG_SCFG1);
793 w83781d_write_value(client, W83781D_REG_SCFG1,
794 tmp & ~BIT_SCFG1[nr - 1]);
795 data->sens[nr - 1] = val;
796 break;
797 default:
798 dev_err(dev, "Invalid sensor type %ld; must be 1, 2, or %d\n",
799 (long) val, W83781D_DEFAULT_BETA);
800 break;
803 mutex_unlock(&data->update_lock);
804 return count;
807 #define sysfs_sensor(offset) \
808 static ssize_t show_regs_sensor_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
810 return show_sensor_reg(dev, buf, offset); \
812 static ssize_t store_regs_sensor_##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
814 return store_sensor_reg(dev, buf, count, offset); \
816 static DEVICE_ATTR(temp##offset##_type, S_IRUGO | S_IWUSR, show_regs_sensor_##offset, store_regs_sensor_##offset);
818 sysfs_sensor(1);
819 sysfs_sensor(2);
820 sysfs_sensor(3);
822 /* This function is called when:
823 * w83781d_driver is inserted (when this module is loaded), for each
824 available adapter
825 * when a new adapter is inserted (and w83781d_driver is still present) */
826 static int
827 w83781d_attach_adapter(struct i2c_adapter *adapter)
829 if (!(adapter->class & I2C_CLASS_HWMON))
830 return 0;
831 return i2c_probe(adapter, &addr_data, w83781d_detect);
834 static int
835 w83781d_isa_attach_adapter(struct i2c_adapter *adapter)
837 return w83781d_detect(adapter, isa_address, -1);
840 /* Assumes that adapter is of I2C, not ISA variety.
841 * OTHERWISE DON'T CALL THIS
843 static int
844 w83781d_detect_subclients(struct i2c_adapter *adapter, int address, int kind,
845 struct i2c_client *new_client)
847 int i, val1 = 0, id;
848 int err;
849 const char *client_name = "";
850 struct w83781d_data *data = i2c_get_clientdata(new_client);
852 data->lm75[0] = kzalloc(sizeof(struct i2c_client), GFP_KERNEL);
853 if (!(data->lm75[0])) {
854 err = -ENOMEM;
855 goto ERROR_SC_0;
858 id = i2c_adapter_id(adapter);
860 if (force_subclients[0] == id && force_subclients[1] == address) {
861 for (i = 2; i <= 3; i++) {
862 if (force_subclients[i] < 0x48 ||
863 force_subclients[i] > 0x4f) {
864 dev_err(&new_client->dev, "Invalid subclient "
865 "address %d; must be 0x48-0x4f\n",
866 force_subclients[i]);
867 err = -EINVAL;
868 goto ERROR_SC_1;
871 w83781d_write_value(new_client, W83781D_REG_I2C_SUBADDR,
872 (force_subclients[2] & 0x07) |
873 ((force_subclients[3] & 0x07) << 4));
874 data->lm75[0]->addr = force_subclients[2];
875 } else {
876 val1 = w83781d_read_value(new_client, W83781D_REG_I2C_SUBADDR);
877 data->lm75[0]->addr = 0x48 + (val1 & 0x07);
880 if (kind != w83783s) {
881 data->lm75[1] = kzalloc(sizeof(struct i2c_client), GFP_KERNEL);
882 if (!(data->lm75[1])) {
883 err = -ENOMEM;
884 goto ERROR_SC_1;
887 if (force_subclients[0] == id &&
888 force_subclients[1] == address) {
889 data->lm75[1]->addr = force_subclients[3];
890 } else {
891 data->lm75[1]->addr = 0x48 + ((val1 >> 4) & 0x07);
893 if (data->lm75[0]->addr == data->lm75[1]->addr) {
894 dev_err(&new_client->dev,
895 "Duplicate addresses 0x%x for subclients.\n",
896 data->lm75[0]->addr);
897 err = -EBUSY;
898 goto ERROR_SC_2;
902 if (kind == w83781d)
903 client_name = "w83781d subclient";
904 else if (kind == w83782d)
905 client_name = "w83782d subclient";
906 else if (kind == w83783s)
907 client_name = "w83783s subclient";
908 else if (kind == w83627hf)
909 client_name = "w83627hf subclient";
910 else if (kind == as99127f)
911 client_name = "as99127f subclient";
913 for (i = 0; i <= 1; i++) {
914 /* store all data in w83781d */
915 i2c_set_clientdata(data->lm75[i], NULL);
916 data->lm75[i]->adapter = adapter;
917 data->lm75[i]->driver = &w83781d_driver;
918 data->lm75[i]->flags = 0;
919 strlcpy(data->lm75[i]->name, client_name,
920 I2C_NAME_SIZE);
921 if ((err = i2c_attach_client(data->lm75[i]))) {
922 dev_err(&new_client->dev, "Subclient %d "
923 "registration at address 0x%x "
924 "failed.\n", i, data->lm75[i]->addr);
925 if (i == 1)
926 goto ERROR_SC_3;
927 goto ERROR_SC_2;
929 if (kind == w83783s)
930 break;
933 return 0;
935 /* Undo inits in case of errors */
936 ERROR_SC_3:
937 i2c_detach_client(data->lm75[0]);
938 ERROR_SC_2:
939 kfree(data->lm75[1]);
940 ERROR_SC_1:
941 kfree(data->lm75[0]);
942 ERROR_SC_0:
943 return err;
946 #define IN_UNIT_ATTRS(X) \
947 &dev_attr_in##X##_input.attr, \
948 &dev_attr_in##X##_min.attr, \
949 &dev_attr_in##X##_max.attr
951 #define FAN_UNIT_ATTRS(X) \
952 &dev_attr_fan##X##_input.attr, \
953 &dev_attr_fan##X##_min.attr, \
954 &dev_attr_fan##X##_div.attr
956 #define TEMP_UNIT_ATTRS(X) \
957 &dev_attr_temp##X##_input.attr, \
958 &dev_attr_temp##X##_max.attr, \
959 &dev_attr_temp##X##_max_hyst.attr
961 static struct attribute* w83781d_attributes[] = {
962 IN_UNIT_ATTRS(0),
963 IN_UNIT_ATTRS(2),
964 IN_UNIT_ATTRS(3),
965 IN_UNIT_ATTRS(4),
966 IN_UNIT_ATTRS(5),
967 IN_UNIT_ATTRS(6),
968 FAN_UNIT_ATTRS(1),
969 FAN_UNIT_ATTRS(2),
970 FAN_UNIT_ATTRS(3),
971 TEMP_UNIT_ATTRS(1),
972 TEMP_UNIT_ATTRS(2),
973 &dev_attr_cpu0_vid.attr,
974 &dev_attr_vrm.attr,
975 &dev_attr_alarms.attr,
976 &dev_attr_beep_mask.attr,
977 &dev_attr_beep_enable.attr,
978 NULL
980 static const struct attribute_group w83781d_group = {
981 .attrs = w83781d_attributes,
984 static struct attribute *w83781d_attributes_opt[] = {
985 IN_UNIT_ATTRS(1),
986 IN_UNIT_ATTRS(7),
987 IN_UNIT_ATTRS(8),
988 TEMP_UNIT_ATTRS(3),
989 &dev_attr_pwm1.attr,
990 &dev_attr_pwm2.attr,
991 &dev_attr_pwm2_enable.attr,
992 &dev_attr_pwm3.attr,
993 &dev_attr_pwm4.attr,
994 &dev_attr_temp1_type.attr,
995 &dev_attr_temp2_type.attr,
996 &dev_attr_temp3_type.attr,
997 NULL
999 static const struct attribute_group w83781d_group_opt = {
1000 .attrs = w83781d_attributes_opt,
1003 static int
1004 w83781d_detect(struct i2c_adapter *adapter, int address, int kind)
1006 int i = 0, val1 = 0, val2;
1007 struct i2c_client *client;
1008 struct device *dev;
1009 struct w83781d_data *data;
1010 int err;
1011 const char *client_name = "";
1012 int is_isa = i2c_is_isa_adapter(adapter);
1013 enum vendor { winbond, asus } vendid;
1015 if (!is_isa
1016 && !i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) {
1017 err = -EINVAL;
1018 goto ERROR0;
1021 /* Prevent users from forcing a kind for a bus it isn't supposed
1022 to possibly be on */
1023 if (is_isa && (kind == as99127f || kind == w83783s)) {
1024 dev_err(&adapter->dev,
1025 "Cannot force I2C-only chip for ISA address 0x%02x.\n",
1026 address);
1027 err = -EINVAL;
1028 goto ERROR0;
1031 if (is_isa)
1032 if (!request_region(address, W83781D_EXTENT,
1033 w83781d_isa_driver.driver.name)) {
1034 dev_dbg(&adapter->dev, "Request of region "
1035 "0x%x-0x%x for w83781d failed\n", address,
1036 address + W83781D_EXTENT - 1);
1037 err = -EBUSY;
1038 goto ERROR0;
1041 /* Probe whether there is anything available on this address. Already
1042 done for SMBus clients */
1043 if (kind < 0) {
1044 if (is_isa) {
1046 #define REALLY_SLOW_IO
1047 /* We need the timeouts for at least some LM78-like
1048 chips. But only if we read 'undefined' registers. */
1049 i = inb_p(address + 1);
1050 if (inb_p(address + 2) != i
1051 || inb_p(address + 3) != i
1052 || inb_p(address + 7) != i) {
1053 dev_dbg(&adapter->dev, "Detection of w83781d "
1054 "chip failed at step 1\n");
1055 err = -ENODEV;
1056 goto ERROR1;
1058 #undef REALLY_SLOW_IO
1060 /* Let's just hope nothing breaks here */
1061 i = inb_p(address + 5) & 0x7f;
1062 outb_p(~i & 0x7f, address + 5);
1063 val2 = inb_p(address + 5) & 0x7f;
1064 if (val2 != (~i & 0x7f)) {
1065 outb_p(i, address + 5);
1066 dev_dbg(&adapter->dev, "Detection of w83781d "
1067 "chip failed at step 2 (0x%x != "
1068 "0x%x at 0x%x)\n", val2, ~i & 0x7f,
1069 address + 5);
1070 err = -ENODEV;
1071 goto ERROR1;
1076 /* OK. For now, we presume we have a valid client. We now create the
1077 client structure, even though we cannot fill it completely yet.
1078 But it allows us to access w83781d_{read,write}_value. */
1080 if (!(data = kzalloc(sizeof(struct w83781d_data), GFP_KERNEL))) {
1081 err = -ENOMEM;
1082 goto ERROR1;
1085 client = &data->client;
1086 i2c_set_clientdata(client, data);
1087 client->addr = address;
1088 mutex_init(&data->lock);
1089 client->adapter = adapter;
1090 client->driver = is_isa ? &w83781d_isa_driver : &w83781d_driver;
1091 client->flags = 0;
1092 dev = &client->dev;
1094 /* Now, we do the remaining detection. */
1096 /* The w8378?d may be stuck in some other bank than bank 0. This may
1097 make reading other information impossible. Specify a force=... or
1098 force_*=... parameter, and the Winbond will be reset to the right
1099 bank. */
1100 if (kind < 0) {
1101 if (w83781d_read_value(client, W83781D_REG_CONFIG) & 0x80) {
1102 dev_dbg(&adapter->dev, "Detection of w83781d chip "
1103 "failed at step 3\n");
1104 err = -ENODEV;
1105 goto ERROR2;
1107 val1 = w83781d_read_value(client, W83781D_REG_BANK);
1108 val2 = w83781d_read_value(client, W83781D_REG_CHIPMAN);
1109 /* Check for Winbond or Asus ID if in bank 0 */
1110 if ((!(val1 & 0x07)) &&
1111 (((!(val1 & 0x80)) && (val2 != 0xa3) && (val2 != 0xc3))
1112 || ((val1 & 0x80) && (val2 != 0x5c) && (val2 != 0x12)))) {
1113 dev_dbg(&adapter->dev, "Detection of w83781d chip "
1114 "failed at step 4\n");
1115 err = -ENODEV;
1116 goto ERROR2;
1118 /* If Winbond SMBus, check address at 0x48.
1119 Asus doesn't support, except for as99127f rev.2 */
1120 if ((!is_isa) && (((!(val1 & 0x80)) && (val2 == 0xa3)) ||
1121 ((val1 & 0x80) && (val2 == 0x5c)))) {
1122 if (w83781d_read_value
1123 (client, W83781D_REG_I2C_ADDR) != address) {
1124 dev_dbg(&adapter->dev, "Detection of w83781d "
1125 "chip failed at step 5\n");
1126 err = -ENODEV;
1127 goto ERROR2;
1132 /* We have either had a force parameter, or we have already detected the
1133 Winbond. Put it now into bank 0 and Vendor ID High Byte */
1134 w83781d_write_value(client, W83781D_REG_BANK,
1135 (w83781d_read_value(client, W83781D_REG_BANK)
1136 & 0x78) | 0x80);
1138 /* Determine the chip type. */
1139 if (kind <= 0) {
1140 /* get vendor ID */
1141 val2 = w83781d_read_value(client, W83781D_REG_CHIPMAN);
1142 if (val2 == 0x5c)
1143 vendid = winbond;
1144 else if (val2 == 0x12)
1145 vendid = asus;
1146 else {
1147 dev_dbg(&adapter->dev, "w83781d chip vendor is "
1148 "neither Winbond nor Asus\n");
1149 err = -ENODEV;
1150 goto ERROR2;
1153 val1 = w83781d_read_value(client, W83781D_REG_WCHIPID);
1154 if ((val1 == 0x10 || val1 == 0x11) && vendid == winbond)
1155 kind = w83781d;
1156 else if (val1 == 0x30 && vendid == winbond)
1157 kind = w83782d;
1158 else if (val1 == 0x40 && vendid == winbond && !is_isa
1159 && address == 0x2d)
1160 kind = w83783s;
1161 else if (val1 == 0x21 && vendid == winbond)
1162 kind = w83627hf;
1163 else if (val1 == 0x31 && !is_isa && address >= 0x28)
1164 kind = as99127f;
1165 else {
1166 if (kind == 0)
1167 dev_warn(&adapter->dev, "Ignoring 'force' "
1168 "parameter for unknown chip at "
1169 "address 0x%02x\n", address);
1170 err = -EINVAL;
1171 goto ERROR2;
1175 if (kind == w83781d) {
1176 client_name = "w83781d";
1177 } else if (kind == w83782d) {
1178 client_name = "w83782d";
1179 } else if (kind == w83783s) {
1180 client_name = "w83783s";
1181 } else if (kind == w83627hf) {
1182 client_name = "w83627hf";
1183 } else if (kind == as99127f) {
1184 client_name = "as99127f";
1187 /* Fill in the remaining client fields and put into the global list */
1188 strlcpy(client->name, client_name, I2C_NAME_SIZE);
1189 data->type = kind;
1191 data->valid = 0;
1192 mutex_init(&data->update_lock);
1194 /* Tell the I2C layer a new client has arrived */
1195 if ((err = i2c_attach_client(client)))
1196 goto ERROR2;
1198 /* attach secondary i2c lm75-like clients */
1199 if (!is_isa) {
1200 if ((err = w83781d_detect_subclients(adapter, address,
1201 kind, client)))
1202 goto ERROR3;
1203 } else {
1204 data->lm75[0] = NULL;
1205 data->lm75[1] = NULL;
1208 /* Initialize the chip */
1209 w83781d_init_client(client);
1211 /* A few vars need to be filled upon startup */
1212 for (i = 1; i <= 3; i++) {
1213 data->fan_min[i - 1] = w83781d_read_value(client,
1214 W83781D_REG_FAN_MIN(i));
1216 if (kind != w83781d && kind != as99127f)
1217 for (i = 0; i < 4; i++)
1218 data->pwmenable[i] = 1;
1220 /* Register sysfs hooks */
1221 if ((err = sysfs_create_group(&dev->kobj, &w83781d_group)))
1222 goto ERROR4;
1224 if (kind != w83783s) {
1225 if ((err = device_create_file(dev, &dev_attr_in1_input))
1226 || (err = device_create_file(dev, &dev_attr_in1_min))
1227 || (err = device_create_file(dev, &dev_attr_in1_max)))
1228 goto ERROR4;
1230 if (kind != as99127f && kind != w83781d && kind != w83783s) {
1231 if ((err = device_create_file(dev, &dev_attr_in7_input))
1232 || (err = device_create_file(dev, &dev_attr_in7_min))
1233 || (err = device_create_file(dev, &dev_attr_in7_max))
1234 || (err = device_create_file(dev, &dev_attr_in8_input))
1235 || (err = device_create_file(dev, &dev_attr_in8_min))
1236 || (err = device_create_file(dev, &dev_attr_in8_max)))
1237 goto ERROR4;
1239 if (kind != w83783s) {
1240 if ((err = device_create_file(dev, &dev_attr_temp3_input))
1241 || (err = device_create_file(dev, &dev_attr_temp3_max))
1242 || (err = device_create_file(dev,
1243 &dev_attr_temp3_max_hyst)))
1244 goto ERROR4;
1247 if (kind != w83781d && kind != as99127f) {
1248 if ((err = device_create_file(dev, &dev_attr_pwm1))
1249 || (err = device_create_file(dev, &dev_attr_pwm2))
1250 || (err = device_create_file(dev, &dev_attr_pwm2_enable)))
1251 goto ERROR4;
1253 if (kind == w83782d && !is_isa) {
1254 if ((err = device_create_file(dev, &dev_attr_pwm3))
1255 || (err = device_create_file(dev, &dev_attr_pwm4)))
1256 goto ERROR4;
1259 if (kind != as99127f && kind != w83781d) {
1260 if ((err = device_create_file(dev, &dev_attr_temp1_type))
1261 || (err = device_create_file(dev,
1262 &dev_attr_temp2_type)))
1263 goto ERROR4;
1264 if (kind != w83783s) {
1265 if ((err = device_create_file(dev,
1266 &dev_attr_temp3_type)))
1267 goto ERROR4;
1271 data->class_dev = hwmon_device_register(dev);
1272 if (IS_ERR(data->class_dev)) {
1273 err = PTR_ERR(data->class_dev);
1274 goto ERROR4;
1277 return 0;
1279 ERROR4:
1280 sysfs_remove_group(&dev->kobj, &w83781d_group);
1281 sysfs_remove_group(&dev->kobj, &w83781d_group_opt);
1283 if (data->lm75[1]) {
1284 i2c_detach_client(data->lm75[1]);
1285 kfree(data->lm75[1]);
1287 if (data->lm75[0]) {
1288 i2c_detach_client(data->lm75[0]);
1289 kfree(data->lm75[0]);
1291 ERROR3:
1292 i2c_detach_client(client);
1293 ERROR2:
1294 kfree(data);
1295 ERROR1:
1296 if (is_isa)
1297 release_region(address, W83781D_EXTENT);
1298 ERROR0:
1299 return err;
1302 static int
1303 w83781d_detach_client(struct i2c_client *client)
1305 struct w83781d_data *data = i2c_get_clientdata(client);
1306 int err;
1308 /* main client */
1309 if (data) {
1310 hwmon_device_unregister(data->class_dev);
1311 sysfs_remove_group(&client->dev.kobj, &w83781d_group);
1312 sysfs_remove_group(&client->dev.kobj, &w83781d_group_opt);
1314 if (i2c_is_isa_client(client))
1315 release_region(client->addr, W83781D_EXTENT);
1317 if ((err = i2c_detach_client(client)))
1318 return err;
1320 /* main client */
1321 if (data)
1322 kfree(data);
1324 /* subclient */
1325 else
1326 kfree(client);
1328 return 0;
1331 /* The SMBus locks itself, usually, but nothing may access the Winbond between
1332 bank switches. ISA access must always be locked explicitly!
1333 We ignore the W83781D BUSY flag at this moment - it could lead to deadlocks,
1334 would slow down the W83781D access and should not be necessary.
1335 There are some ugly typecasts here, but the good news is - they should
1336 nowhere else be necessary! */
1337 static int
1338 w83781d_read_value(struct i2c_client *client, u16 reg)
1340 struct w83781d_data *data = i2c_get_clientdata(client);
1341 int res, word_sized, bank;
1342 struct i2c_client *cl;
1344 mutex_lock(&data->lock);
1345 if (i2c_is_isa_client(client)) {
1346 word_sized = (((reg & 0xff00) == 0x100)
1347 || ((reg & 0xff00) == 0x200))
1348 && (((reg & 0x00ff) == 0x50)
1349 || ((reg & 0x00ff) == 0x53)
1350 || ((reg & 0x00ff) == 0x55));
1351 if (reg & 0xff00) {
1352 outb_p(W83781D_REG_BANK,
1353 client->addr + W83781D_ADDR_REG_OFFSET);
1354 outb_p(reg >> 8,
1355 client->addr + W83781D_DATA_REG_OFFSET);
1357 outb_p(reg & 0xff, client->addr + W83781D_ADDR_REG_OFFSET);
1358 res = inb_p(client->addr + W83781D_DATA_REG_OFFSET);
1359 if (word_sized) {
1360 outb_p((reg & 0xff) + 1,
1361 client->addr + W83781D_ADDR_REG_OFFSET);
1362 res =
1363 (res << 8) + inb_p(client->addr +
1364 W83781D_DATA_REG_OFFSET);
1366 if (reg & 0xff00) {
1367 outb_p(W83781D_REG_BANK,
1368 client->addr + W83781D_ADDR_REG_OFFSET);
1369 outb_p(0, client->addr + W83781D_DATA_REG_OFFSET);
1371 } else {
1372 bank = (reg >> 8) & 0x0f;
1373 if (bank > 2)
1374 /* switch banks */
1375 i2c_smbus_write_byte_data(client, W83781D_REG_BANK,
1376 bank);
1377 if (bank == 0 || bank > 2) {
1378 res = i2c_smbus_read_byte_data(client, reg & 0xff);
1379 } else {
1380 /* switch to subclient */
1381 cl = data->lm75[bank - 1];
1382 /* convert from ISA to LM75 I2C addresses */
1383 switch (reg & 0xff) {
1384 case 0x50: /* TEMP */
1385 res = swab16(i2c_smbus_read_word_data(cl, 0));
1386 break;
1387 case 0x52: /* CONFIG */
1388 res = i2c_smbus_read_byte_data(cl, 1);
1389 break;
1390 case 0x53: /* HYST */
1391 res = swab16(i2c_smbus_read_word_data(cl, 2));
1392 break;
1393 case 0x55: /* OVER */
1394 default:
1395 res = swab16(i2c_smbus_read_word_data(cl, 3));
1396 break;
1399 if (bank > 2)
1400 i2c_smbus_write_byte_data(client, W83781D_REG_BANK, 0);
1402 mutex_unlock(&data->lock);
1403 return res;
1406 static int
1407 w83781d_write_value(struct i2c_client *client, u16 reg, u16 value)
1409 struct w83781d_data *data = i2c_get_clientdata(client);
1410 int word_sized, bank;
1411 struct i2c_client *cl;
1413 mutex_lock(&data->lock);
1414 if (i2c_is_isa_client(client)) {
1415 word_sized = (((reg & 0xff00) == 0x100)
1416 || ((reg & 0xff00) == 0x200))
1417 && (((reg & 0x00ff) == 0x53)
1418 || ((reg & 0x00ff) == 0x55));
1419 if (reg & 0xff00) {
1420 outb_p(W83781D_REG_BANK,
1421 client->addr + W83781D_ADDR_REG_OFFSET);
1422 outb_p(reg >> 8,
1423 client->addr + W83781D_DATA_REG_OFFSET);
1425 outb_p(reg & 0xff, client->addr + W83781D_ADDR_REG_OFFSET);
1426 if (word_sized) {
1427 outb_p(value >> 8,
1428 client->addr + W83781D_DATA_REG_OFFSET);
1429 outb_p((reg & 0xff) + 1,
1430 client->addr + W83781D_ADDR_REG_OFFSET);
1432 outb_p(value & 0xff, client->addr + W83781D_DATA_REG_OFFSET);
1433 if (reg & 0xff00) {
1434 outb_p(W83781D_REG_BANK,
1435 client->addr + W83781D_ADDR_REG_OFFSET);
1436 outb_p(0, client->addr + W83781D_DATA_REG_OFFSET);
1438 } else {
1439 bank = (reg >> 8) & 0x0f;
1440 if (bank > 2)
1441 /* switch banks */
1442 i2c_smbus_write_byte_data(client, W83781D_REG_BANK,
1443 bank);
1444 if (bank == 0 || bank > 2) {
1445 i2c_smbus_write_byte_data(client, reg & 0xff,
1446 value & 0xff);
1447 } else {
1448 /* switch to subclient */
1449 cl = data->lm75[bank - 1];
1450 /* convert from ISA to LM75 I2C addresses */
1451 switch (reg & 0xff) {
1452 case 0x52: /* CONFIG */
1453 i2c_smbus_write_byte_data(cl, 1, value & 0xff);
1454 break;
1455 case 0x53: /* HYST */
1456 i2c_smbus_write_word_data(cl, 2, swab16(value));
1457 break;
1458 case 0x55: /* OVER */
1459 i2c_smbus_write_word_data(cl, 3, swab16(value));
1460 break;
1463 if (bank > 2)
1464 i2c_smbus_write_byte_data(client, W83781D_REG_BANK, 0);
1466 mutex_unlock(&data->lock);
1467 return 0;
1470 static void
1471 w83781d_init_client(struct i2c_client *client)
1473 struct w83781d_data *data = i2c_get_clientdata(client);
1474 int i, p;
1475 int type = data->type;
1476 u8 tmp;
1478 if (reset && type != as99127f) { /* this resets registers we don't have
1479 documentation for on the as99127f */
1480 /* Resetting the chip has been the default for a long time,
1481 but it causes the BIOS initializations (fan clock dividers,
1482 thermal sensor types...) to be lost, so it is now optional.
1483 It might even go away if nobody reports it as being useful,
1484 as I see very little reason why this would be needed at
1485 all. */
1486 dev_info(&client->dev, "If reset=1 solved a problem you were "
1487 "having, please report!\n");
1489 /* save these registers */
1490 i = w83781d_read_value(client, W83781D_REG_BEEP_CONFIG);
1491 p = w83781d_read_value(client, W83781D_REG_PWMCLK12);
1492 /* Reset all except Watchdog values and last conversion values
1493 This sets fan-divs to 2, among others */
1494 w83781d_write_value(client, W83781D_REG_CONFIG, 0x80);
1495 /* Restore the registers and disable power-on abnormal beep.
1496 This saves FAN 1/2/3 input/output values set by BIOS. */
1497 w83781d_write_value(client, W83781D_REG_BEEP_CONFIG, i | 0x80);
1498 w83781d_write_value(client, W83781D_REG_PWMCLK12, p);
1499 /* Disable master beep-enable (reset turns it on).
1500 Individual beep_mask should be reset to off but for some reason
1501 disabling this bit helps some people not get beeped */
1502 w83781d_write_value(client, W83781D_REG_BEEP_INTS2, 0);
1505 /* Disable power-on abnormal beep, as advised by the datasheet.
1506 Already done if reset=1. */
1507 if (init && !reset && type != as99127f) {
1508 i = w83781d_read_value(client, W83781D_REG_BEEP_CONFIG);
1509 w83781d_write_value(client, W83781D_REG_BEEP_CONFIG, i | 0x80);
1512 data->vrm = vid_which_vrm();
1514 if ((type != w83781d) && (type != as99127f)) {
1515 tmp = w83781d_read_value(client, W83781D_REG_SCFG1);
1516 for (i = 1; i <= 3; i++) {
1517 if (!(tmp & BIT_SCFG1[i - 1])) {
1518 data->sens[i - 1] = W83781D_DEFAULT_BETA;
1519 } else {
1520 if (w83781d_read_value
1521 (client,
1522 W83781D_REG_SCFG2) & BIT_SCFG2[i - 1])
1523 data->sens[i - 1] = 1;
1524 else
1525 data->sens[i - 1] = 2;
1527 if (type == w83783s && i == 2)
1528 break;
1532 if (init && type != as99127f) {
1533 /* Enable temp2 */
1534 tmp = w83781d_read_value(client, W83781D_REG_TEMP2_CONFIG);
1535 if (tmp & 0x01) {
1536 dev_warn(&client->dev, "Enabling temp2, readings "
1537 "might not make sense\n");
1538 w83781d_write_value(client, W83781D_REG_TEMP2_CONFIG,
1539 tmp & 0xfe);
1542 /* Enable temp3 */
1543 if (type != w83783s) {
1544 tmp = w83781d_read_value(client,
1545 W83781D_REG_TEMP3_CONFIG);
1546 if (tmp & 0x01) {
1547 dev_warn(&client->dev, "Enabling temp3, "
1548 "readings might not make sense\n");
1549 w83781d_write_value(client,
1550 W83781D_REG_TEMP3_CONFIG, tmp & 0xfe);
1555 /* Start monitoring */
1556 w83781d_write_value(client, W83781D_REG_CONFIG,
1557 (w83781d_read_value(client,
1558 W83781D_REG_CONFIG) & 0xf7)
1559 | 0x01);
1562 static struct w83781d_data *w83781d_update_device(struct device *dev)
1564 struct i2c_client *client = to_i2c_client(dev);
1565 struct w83781d_data *data = i2c_get_clientdata(client);
1566 int i;
1568 mutex_lock(&data->update_lock);
1570 if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
1571 || !data->valid) {
1572 dev_dbg(dev, "Starting device update\n");
1574 for (i = 0; i <= 8; i++) {
1575 if (data->type == w83783s && i == 1)
1576 continue; /* 783S has no in1 */
1577 data->in[i] =
1578 w83781d_read_value(client, W83781D_REG_IN(i));
1579 data->in_min[i] =
1580 w83781d_read_value(client, W83781D_REG_IN_MIN(i));
1581 data->in_max[i] =
1582 w83781d_read_value(client, W83781D_REG_IN_MAX(i));
1583 if ((data->type != w83782d)
1584 && (data->type != w83627hf) && (i == 6))
1585 break;
1587 for (i = 1; i <= 3; i++) {
1588 data->fan[i - 1] =
1589 w83781d_read_value(client, W83781D_REG_FAN(i));
1590 data->fan_min[i - 1] =
1591 w83781d_read_value(client, W83781D_REG_FAN_MIN(i));
1593 if (data->type != w83781d && data->type != as99127f) {
1594 for (i = 1; i <= 4; i++) {
1595 data->pwm[i - 1] =
1596 w83781d_read_value(client,
1597 W83781D_REG_PWM(i));
1598 if ((data->type != w83782d
1599 || i2c_is_isa_client(client))
1600 && i == 2)
1601 break;
1603 /* Only PWM2 can be disabled */
1604 data->pwmenable[1] = (w83781d_read_value(client,
1605 W83781D_REG_PWMCLK12) & 0x08) >> 3;
1608 data->temp = w83781d_read_value(client, W83781D_REG_TEMP(1));
1609 data->temp_max =
1610 w83781d_read_value(client, W83781D_REG_TEMP_OVER(1));
1611 data->temp_max_hyst =
1612 w83781d_read_value(client, W83781D_REG_TEMP_HYST(1));
1613 data->temp_add[0] =
1614 w83781d_read_value(client, W83781D_REG_TEMP(2));
1615 data->temp_max_add[0] =
1616 w83781d_read_value(client, W83781D_REG_TEMP_OVER(2));
1617 data->temp_max_hyst_add[0] =
1618 w83781d_read_value(client, W83781D_REG_TEMP_HYST(2));
1619 if (data->type != w83783s) {
1620 data->temp_add[1] =
1621 w83781d_read_value(client, W83781D_REG_TEMP(3));
1622 data->temp_max_add[1] =
1623 w83781d_read_value(client,
1624 W83781D_REG_TEMP_OVER(3));
1625 data->temp_max_hyst_add[1] =
1626 w83781d_read_value(client,
1627 W83781D_REG_TEMP_HYST(3));
1629 i = w83781d_read_value(client, W83781D_REG_VID_FANDIV);
1630 data->vid = i & 0x0f;
1631 data->vid |= (w83781d_read_value(client,
1632 W83781D_REG_CHIPID) & 0x01) << 4;
1633 data->fan_div[0] = (i >> 4) & 0x03;
1634 data->fan_div[1] = (i >> 6) & 0x03;
1635 data->fan_div[2] = (w83781d_read_value(client,
1636 W83781D_REG_PIN) >> 6) & 0x03;
1637 if ((data->type != w83781d) && (data->type != as99127f)) {
1638 i = w83781d_read_value(client, W83781D_REG_VBAT);
1639 data->fan_div[0] |= (i >> 3) & 0x04;
1640 data->fan_div[1] |= (i >> 4) & 0x04;
1641 data->fan_div[2] |= (i >> 5) & 0x04;
1643 if ((data->type == w83782d) || (data->type == w83627hf)) {
1644 data->alarms = w83781d_read_value(client,
1645 W83782D_REG_ALARM1)
1646 | (w83781d_read_value(client,
1647 W83782D_REG_ALARM2) << 8)
1648 | (w83781d_read_value(client,
1649 W83782D_REG_ALARM3) << 16);
1650 } else if (data->type == w83783s) {
1651 data->alarms = w83781d_read_value(client,
1652 W83782D_REG_ALARM1)
1653 | (w83781d_read_value(client,
1654 W83782D_REG_ALARM2) << 8);
1655 } else {
1656 /* No real-time status registers, fall back to
1657 interrupt status registers */
1658 data->alarms = w83781d_read_value(client,
1659 W83781D_REG_ALARM1)
1660 | (w83781d_read_value(client,
1661 W83781D_REG_ALARM2) << 8);
1663 i = w83781d_read_value(client, W83781D_REG_BEEP_INTS2);
1664 data->beep_enable = i >> 7;
1665 data->beep_mask = ((i & 0x7f) << 8) +
1666 w83781d_read_value(client, W83781D_REG_BEEP_INTS1);
1667 if ((data->type != w83781d) && (data->type != as99127f)) {
1668 data->beep_mask |=
1669 w83781d_read_value(client,
1670 W83781D_REG_BEEP_INTS3) << 16;
1672 data->last_updated = jiffies;
1673 data->valid = 1;
1676 mutex_unlock(&data->update_lock);
1678 return data;
1681 static int __init
1682 sensors_w83781d_init(void)
1684 int res;
1686 res = i2c_add_driver(&w83781d_driver);
1687 if (res)
1688 return res;
1690 /* Don't exit if this one fails, we still want the I2C variants
1691 to work! */
1692 if (i2c_isa_add_driver(&w83781d_isa_driver))
1693 isa_address = 0;
1695 return 0;
1698 static void __exit
1699 sensors_w83781d_exit(void)
1701 if (isa_address)
1702 i2c_isa_del_driver(&w83781d_isa_driver);
1703 i2c_del_driver(&w83781d_driver);
1706 MODULE_AUTHOR("Frodo Looijaard <frodol@dds.nl>, "
1707 "Philip Edelbrock <phil@netroedge.com>, "
1708 "and Mark Studebaker <mdsxyz123@yahoo.com>");
1709 MODULE_DESCRIPTION("W83781D driver");
1710 MODULE_LICENSE("GPL");
1712 module_init(sensors_w83781d_init);
1713 module_exit(sensors_w83781d_exit);