1 /***************************************************************************
3 * Copyright (C) 2004-2008 SMSC
4 * Copyright (C) 2005-2008 ARM
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
20 ***************************************************************************
21 * Rewritten, heavily based on smsc911x simple driver by SMSC.
22 * Partly uses io macros from smc91x.c by Nicolas Pitre
25 * LAN9115, LAN9116, LAN9117, LAN9118
26 * LAN9215, LAN9216, LAN9217, LAN9218
32 #include <linux/crc32.h>
33 #include <linux/delay.h>
34 #include <linux/errno.h>
35 #include <linux/etherdevice.h>
36 #include <linux/ethtool.h>
37 #include <linux/init.h>
38 #include <linux/ioport.h>
39 #include <linux/kernel.h>
40 #include <linux/module.h>
41 #include <linux/netdevice.h>
42 #include <linux/platform_device.h>
43 #include <linux/sched.h>
44 #include <linux/slab.h>
45 #include <linux/timer.h>
46 #include <linux/version.h>
47 #include <linux/bug.h>
48 #include <linux/bitops.h>
49 #include <linux/irq.h>
51 #include <linux/phy.h>
52 #include <linux/smsc911x.h>
55 #define SMSC_CHIPNAME "smsc911x"
56 #define SMSC_MDIONAME "smsc911x-mdio"
57 #define SMSC_DRV_VERSION "2008-10-21"
59 MODULE_LICENSE("GPL");
60 MODULE_VERSION(SMSC_DRV_VERSION
);
63 static int debug
= 16;
68 module_param(debug
, int, 0);
69 MODULE_PARM_DESC(debug
, "Debug level (0=none,...,16=all)");
71 struct smsc911x_data
{
76 /* used to decide which workarounds apply */
77 unsigned int generation
;
79 /* device configuration (copied from platform_data during probe) */
80 struct smsc911x_platform_config config
;
82 /* This needs to be acquired before calling any of below:
83 * smsc911x_mac_read(), smsc911x_mac_write()
87 /* spinlock to ensure 16-bit accesses are serialised.
88 * unused with a 32-bit bus */
91 struct phy_device
*phy_dev
;
92 struct mii_bus
*mii_bus
;
93 int phy_irq
[PHY_MAX_ADDR
];
94 unsigned int using_extphy
;
99 unsigned int gpio_setting
;
100 unsigned int gpio_orig_setting
;
101 struct net_device
*dev
;
102 struct napi_struct napi
;
104 unsigned int software_irq_signal
;
106 #ifdef USE_PHY_WORK_AROUND
107 #define MIN_PACKET_SIZE (64)
108 char loopback_tx_pkt
[MIN_PACKET_SIZE
];
109 char loopback_rx_pkt
[MIN_PACKET_SIZE
];
110 unsigned int resetcount
;
113 /* Members for Multicast filter workaround */
114 unsigned int multicast_update_pending
;
115 unsigned int set_bits_mask
;
116 unsigned int clear_bits_mask
;
121 /* The 16-bit access functions are significantly slower, due to the locking
122 * necessary. If your bus hardware can be configured to do this for you
123 * (in response to a single 32-bit operation from software), you should use
124 * the 32-bit access functions instead. */
126 static inline u32
smsc911x_reg_read(struct smsc911x_data
*pdata
, u32 reg
)
128 if (pdata
->config
.flags
& SMSC911X_USE_32BIT
)
129 return readl(pdata
->ioaddr
+ reg
);
131 if (pdata
->config
.flags
& SMSC911X_USE_16BIT
) {
135 /* these two 16-bit reads must be performed consecutively, so
136 * must not be interrupted by our own ISR (which would start
137 * another read operation) */
138 spin_lock_irqsave(&pdata
->dev_lock
, flags
);
139 data
= ((readw(pdata
->ioaddr
+ reg
) & 0xFFFF) |
140 ((readw(pdata
->ioaddr
+ reg
+ 2) & 0xFFFF) << 16));
141 spin_unlock_irqrestore(&pdata
->dev_lock
, flags
);
150 static inline void smsc911x_reg_write(struct smsc911x_data
*pdata
, u32 reg
,
153 if (pdata
->config
.flags
& SMSC911X_USE_32BIT
) {
154 writel(val
, pdata
->ioaddr
+ reg
);
158 if (pdata
->config
.flags
& SMSC911X_USE_16BIT
) {
161 /* these two 16-bit writes must be performed consecutively, so
162 * must not be interrupted by our own ISR (which would start
163 * another read operation) */
164 spin_lock_irqsave(&pdata
->dev_lock
, flags
);
165 writew(val
& 0xFFFF, pdata
->ioaddr
+ reg
);
166 writew((val
>> 16) & 0xFFFF, pdata
->ioaddr
+ reg
+ 2);
167 spin_unlock_irqrestore(&pdata
->dev_lock
, flags
);
174 /* Writes a packet to the TX_DATA_FIFO */
176 smsc911x_tx_writefifo(struct smsc911x_data
*pdata
, unsigned int *buf
,
177 unsigned int wordcount
)
179 if (pdata
->config
.flags
& SMSC911X_USE_32BIT
) {
180 writesl(pdata
->ioaddr
+ TX_DATA_FIFO
, buf
, wordcount
);
184 if (pdata
->config
.flags
& SMSC911X_USE_16BIT
) {
186 smsc911x_reg_write(pdata
, TX_DATA_FIFO
, *buf
++);
193 /* Reads a packet out of the RX_DATA_FIFO */
195 smsc911x_rx_readfifo(struct smsc911x_data
*pdata
, unsigned int *buf
,
196 unsigned int wordcount
)
198 if (pdata
->config
.flags
& SMSC911X_USE_32BIT
) {
199 readsl(pdata
->ioaddr
+ RX_DATA_FIFO
, buf
, wordcount
);
203 if (pdata
->config
.flags
& SMSC911X_USE_16BIT
) {
205 *buf
++ = smsc911x_reg_read(pdata
, RX_DATA_FIFO
);
212 /* waits for MAC not busy, with timeout. Only called by smsc911x_mac_read
213 * and smsc911x_mac_write, so assumes mac_lock is held */
214 static int smsc911x_mac_complete(struct smsc911x_data
*pdata
)
219 SMSC_ASSERT_MAC_LOCK(pdata
);
221 for (i
= 0; i
< 40; i
++) {
222 val
= smsc911x_reg_read(pdata
, MAC_CSR_CMD
);
223 if (!(val
& MAC_CSR_CMD_CSR_BUSY_
))
226 SMSC_WARNING(HW
, "Timed out waiting for MAC not BUSY. "
227 "MAC_CSR_CMD: 0x%08X", val
);
231 /* Fetches a MAC register value. Assumes mac_lock is acquired */
232 static u32
smsc911x_mac_read(struct smsc911x_data
*pdata
, unsigned int offset
)
236 SMSC_ASSERT_MAC_LOCK(pdata
);
238 temp
= smsc911x_reg_read(pdata
, MAC_CSR_CMD
);
239 if (unlikely(temp
& MAC_CSR_CMD_CSR_BUSY_
)) {
240 SMSC_WARNING(HW
, "MAC busy at entry");
244 /* Send the MAC cmd */
245 smsc911x_reg_write(pdata
, MAC_CSR_CMD
, ((offset
& 0xFF) |
246 MAC_CSR_CMD_CSR_BUSY_
| MAC_CSR_CMD_R_NOT_W_
));
248 /* Workaround for hardware read-after-write restriction */
249 temp
= smsc911x_reg_read(pdata
, BYTE_TEST
);
251 /* Wait for the read to complete */
252 if (likely(smsc911x_mac_complete(pdata
) == 0))
253 return smsc911x_reg_read(pdata
, MAC_CSR_DATA
);
255 SMSC_WARNING(HW
, "MAC busy after read");
259 /* Set a mac register, mac_lock must be acquired before calling */
260 static void smsc911x_mac_write(struct smsc911x_data
*pdata
,
261 unsigned int offset
, u32 val
)
265 SMSC_ASSERT_MAC_LOCK(pdata
);
267 temp
= smsc911x_reg_read(pdata
, MAC_CSR_CMD
);
268 if (unlikely(temp
& MAC_CSR_CMD_CSR_BUSY_
)) {
270 "smsc911x_mac_write failed, MAC busy at entry");
274 /* Send data to write */
275 smsc911x_reg_write(pdata
, MAC_CSR_DATA
, val
);
277 /* Write the actual data */
278 smsc911x_reg_write(pdata
, MAC_CSR_CMD
, ((offset
& 0xFF) |
279 MAC_CSR_CMD_CSR_BUSY_
));
281 /* Workaround for hardware read-after-write restriction */
282 temp
= smsc911x_reg_read(pdata
, BYTE_TEST
);
284 /* Wait for the write to complete */
285 if (likely(smsc911x_mac_complete(pdata
) == 0))
289 "smsc911x_mac_write failed, MAC busy after write");
292 /* Get a phy register */
293 static int smsc911x_mii_read(struct mii_bus
*bus
, int phyaddr
, int regidx
)
295 struct smsc911x_data
*pdata
= (struct smsc911x_data
*)bus
->priv
;
300 spin_lock_irqsave(&pdata
->mac_lock
, flags
);
302 /* Confirm MII not busy */
303 if (unlikely(smsc911x_mac_read(pdata
, MII_ACC
) & MII_ACC_MII_BUSY_
)) {
305 "MII is busy in smsc911x_mii_read???");
310 /* Set the address, index & direction (read from PHY) */
311 addr
= ((phyaddr
& 0x1F) << 11) | ((regidx
& 0x1F) << 6);
312 smsc911x_mac_write(pdata
, MII_ACC
, addr
);
314 /* Wait for read to complete w/ timeout */
315 for (i
= 0; i
< 100; i
++)
316 if (!(smsc911x_mac_read(pdata
, MII_ACC
) & MII_ACC_MII_BUSY_
)) {
317 reg
= smsc911x_mac_read(pdata
, MII_DATA
);
321 SMSC_WARNING(HW
, "Timed out waiting for MII write to finish");
325 spin_unlock_irqrestore(&pdata
->mac_lock
, flags
);
329 /* Set a phy register */
330 static int smsc911x_mii_write(struct mii_bus
*bus
, int phyaddr
, int regidx
,
333 struct smsc911x_data
*pdata
= (struct smsc911x_data
*)bus
->priv
;
338 spin_lock_irqsave(&pdata
->mac_lock
, flags
);
340 /* Confirm MII not busy */
341 if (unlikely(smsc911x_mac_read(pdata
, MII_ACC
) & MII_ACC_MII_BUSY_
)) {
343 "MII is busy in smsc911x_mii_write???");
348 /* Put the data to write in the MAC */
349 smsc911x_mac_write(pdata
, MII_DATA
, val
);
351 /* Set the address, index & direction (write to PHY) */
352 addr
= ((phyaddr
& 0x1F) << 11) | ((regidx
& 0x1F) << 6) |
354 smsc911x_mac_write(pdata
, MII_ACC
, addr
);
356 /* Wait for write to complete w/ timeout */
357 for (i
= 0; i
< 100; i
++)
358 if (!(smsc911x_mac_read(pdata
, MII_ACC
) & MII_ACC_MII_BUSY_
)) {
363 SMSC_WARNING(HW
, "Timed out waiting for MII write to finish");
367 spin_unlock_irqrestore(&pdata
->mac_lock
, flags
);
371 /* Switch to external phy. Assumes tx and rx are stopped. */
372 static void smsc911x_phy_enable_external(struct smsc911x_data
*pdata
)
374 unsigned int hwcfg
= smsc911x_reg_read(pdata
, HW_CFG
);
376 /* Disable phy clocks to the MAC */
377 hwcfg
&= (~HW_CFG_PHY_CLK_SEL_
);
378 hwcfg
|= HW_CFG_PHY_CLK_SEL_CLK_DIS_
;
379 smsc911x_reg_write(pdata
, HW_CFG
, hwcfg
);
380 udelay(10); /* Enough time for clocks to stop */
382 /* Switch to external phy */
383 hwcfg
|= HW_CFG_EXT_PHY_EN_
;
384 smsc911x_reg_write(pdata
, HW_CFG
, hwcfg
);
386 /* Enable phy clocks to the MAC */
387 hwcfg
&= (~HW_CFG_PHY_CLK_SEL_
);
388 hwcfg
|= HW_CFG_PHY_CLK_SEL_EXT_PHY_
;
389 smsc911x_reg_write(pdata
, HW_CFG
, hwcfg
);
390 udelay(10); /* Enough time for clocks to restart */
392 hwcfg
|= HW_CFG_SMI_SEL_
;
393 smsc911x_reg_write(pdata
, HW_CFG
, hwcfg
);
396 /* Autodetects and enables external phy if present on supported chips.
397 * autodetection can be overridden by specifying SMSC911X_FORCE_INTERNAL_PHY
398 * or SMSC911X_FORCE_EXTERNAL_PHY in the platform_data flags. */
399 static void smsc911x_phy_initialise_external(struct smsc911x_data
*pdata
)
401 unsigned int hwcfg
= smsc911x_reg_read(pdata
, HW_CFG
);
403 if (pdata
->config
.flags
& SMSC911X_FORCE_INTERNAL_PHY
) {
404 SMSC_TRACE(HW
, "Forcing internal PHY");
405 pdata
->using_extphy
= 0;
406 } else if (pdata
->config
.flags
& SMSC911X_FORCE_EXTERNAL_PHY
) {
407 SMSC_TRACE(HW
, "Forcing external PHY");
408 smsc911x_phy_enable_external(pdata
);
409 pdata
->using_extphy
= 1;
410 } else if (hwcfg
& HW_CFG_EXT_PHY_DET_
) {
411 SMSC_TRACE(HW
, "HW_CFG EXT_PHY_DET set, using external PHY");
412 smsc911x_phy_enable_external(pdata
);
413 pdata
->using_extphy
= 1;
415 SMSC_TRACE(HW
, "HW_CFG EXT_PHY_DET clear, using internal PHY");
416 pdata
->using_extphy
= 0;
420 /* Fetches a tx status out of the status fifo */
421 static unsigned int smsc911x_tx_get_txstatus(struct smsc911x_data
*pdata
)
423 unsigned int result
=
424 smsc911x_reg_read(pdata
, TX_FIFO_INF
) & TX_FIFO_INF_TSUSED_
;
427 result
= smsc911x_reg_read(pdata
, TX_STATUS_FIFO
);
432 /* Fetches the next rx status */
433 static unsigned int smsc911x_rx_get_rxstatus(struct smsc911x_data
*pdata
)
435 unsigned int result
=
436 smsc911x_reg_read(pdata
, RX_FIFO_INF
) & RX_FIFO_INF_RXSUSED_
;
439 result
= smsc911x_reg_read(pdata
, RX_STATUS_FIFO
);
444 #ifdef USE_PHY_WORK_AROUND
445 static int smsc911x_phy_check_loopbackpkt(struct smsc911x_data
*pdata
)
452 for (tries
= 0; tries
< 10; tries
++) {
453 unsigned int txcmd_a
;
454 unsigned int txcmd_b
;
456 unsigned int pktlength
;
459 /* Zero-out rx packet memory */
460 memset(pdata
->loopback_rx_pkt
, 0, MIN_PACKET_SIZE
);
462 /* Write tx packet to 118 */
463 txcmd_a
= (u32
)((ulong
)pdata
->loopback_tx_pkt
& 0x03) << 16;
464 txcmd_a
|= TX_CMD_A_FIRST_SEG_
| TX_CMD_A_LAST_SEG_
;
465 txcmd_a
|= MIN_PACKET_SIZE
;
467 txcmd_b
= MIN_PACKET_SIZE
<< 16 | MIN_PACKET_SIZE
;
469 smsc911x_reg_write(pdata
, TX_DATA_FIFO
, txcmd_a
);
470 smsc911x_reg_write(pdata
, TX_DATA_FIFO
, txcmd_b
);
472 bufp
= (ulong
)pdata
->loopback_tx_pkt
& (~0x3);
473 wrsz
= MIN_PACKET_SIZE
+ 3;
474 wrsz
+= (u32
)((ulong
)pdata
->loopback_tx_pkt
& 0x3);
477 smsc911x_tx_writefifo(pdata
, (unsigned int *)bufp
, wrsz
);
479 /* Wait till transmit is done */
483 status
= smsc911x_tx_get_txstatus(pdata
);
484 } while ((i
--) && (!status
));
487 SMSC_WARNING(HW
, "Failed to transmit "
488 "during loopback test");
491 if (status
& TX_STS_ES_
) {
492 SMSC_WARNING(HW
, "Transmit encountered "
493 "errors during loopback test");
497 /* Wait till receive is done */
501 status
= smsc911x_rx_get_rxstatus(pdata
);
502 } while ((i
--) && (!status
));
506 "Failed to receive during loopback test");
509 if (status
& RX_STS_ES_
) {
510 SMSC_WARNING(HW
, "Receive encountered "
511 "errors during loopback test");
515 pktlength
= ((status
& 0x3FFF0000UL
) >> 16);
516 bufp
= (ulong
)pdata
->loopback_rx_pkt
;
517 rdsz
= pktlength
+ 3;
518 rdsz
+= (u32
)((ulong
)pdata
->loopback_rx_pkt
& 0x3);
521 smsc911x_rx_readfifo(pdata
, (unsigned int *)bufp
, rdsz
);
523 if (pktlength
!= (MIN_PACKET_SIZE
+ 4)) {
524 SMSC_WARNING(HW
, "Unexpected packet size "
525 "during loop back test, size=%d, will retry",
530 for (j
= 0; j
< MIN_PACKET_SIZE
; j
++) {
531 if (pdata
->loopback_tx_pkt
[j
]
532 != pdata
->loopback_rx_pkt
[j
]) {
538 SMSC_TRACE(HW
, "Successfully verified "
542 SMSC_WARNING(HW
, "Data mismatch "
543 "during loop back test, will retry");
551 static int smsc911x_phy_reset(struct smsc911x_data
*pdata
)
553 struct phy_device
*phy_dev
= pdata
->phy_dev
;
555 unsigned int i
= 100000;
558 BUG_ON(!phy_dev
->bus
);
560 SMSC_TRACE(HW
, "Performing PHY BCR Reset");
561 smsc911x_mii_write(phy_dev
->bus
, phy_dev
->addr
, MII_BMCR
, BMCR_RESET
);
564 temp
= smsc911x_mii_read(phy_dev
->bus
, phy_dev
->addr
,
566 } while ((i
--) && (temp
& BMCR_RESET
));
568 if (temp
& BMCR_RESET
) {
569 SMSC_WARNING(HW
, "PHY reset failed to complete.");
572 /* Extra delay required because the phy may not be completed with
573 * its reset when BMCR_RESET is cleared. Specs say 256 uS is
574 * enough delay but using 1ms here to be safe */
580 static int smsc911x_phy_loopbacktest(struct net_device
*dev
)
582 struct smsc911x_data
*pdata
= netdev_priv(dev
);
583 struct phy_device
*phy_dev
= pdata
->phy_dev
;
588 /* Initialise tx packet using broadcast destination address */
589 memset(pdata
->loopback_tx_pkt
, 0xff, ETH_ALEN
);
591 /* Use incrementing source address */
592 for (i
= 6; i
< 12; i
++)
593 pdata
->loopback_tx_pkt
[i
] = (char)i
;
595 /* Set length type field */
596 pdata
->loopback_tx_pkt
[12] = 0x00;
597 pdata
->loopback_tx_pkt
[13] = 0x00;
599 for (i
= 14; i
< MIN_PACKET_SIZE
; i
++)
600 pdata
->loopback_tx_pkt
[i
] = (char)i
;
602 val
= smsc911x_reg_read(pdata
, HW_CFG
);
603 val
&= HW_CFG_TX_FIF_SZ_
;
605 smsc911x_reg_write(pdata
, HW_CFG
, val
);
607 smsc911x_reg_write(pdata
, TX_CFG
, TX_CFG_TX_ON_
);
608 smsc911x_reg_write(pdata
, RX_CFG
,
609 (u32
)((ulong
)pdata
->loopback_rx_pkt
& 0x03) << 8);
611 for (i
= 0; i
< 10; i
++) {
612 /* Set PHY to 10/FD, no ANEG, and loopback mode */
613 smsc911x_mii_write(phy_dev
->bus
, phy_dev
->addr
, MII_BMCR
,
614 BMCR_LOOPBACK
| BMCR_FULLDPLX
);
616 /* Enable MAC tx/rx, FD */
617 spin_lock_irqsave(&pdata
->mac_lock
, flags
);
618 smsc911x_mac_write(pdata
, MAC_CR
, MAC_CR_FDPX_
619 | MAC_CR_TXEN_
| MAC_CR_RXEN_
);
620 spin_unlock_irqrestore(&pdata
->mac_lock
, flags
);
622 if (smsc911x_phy_check_loopbackpkt(pdata
) == 0) {
629 spin_lock_irqsave(&pdata
->mac_lock
, flags
);
630 smsc911x_mac_write(pdata
, MAC_CR
, 0);
631 spin_unlock_irqrestore(&pdata
->mac_lock
, flags
);
633 smsc911x_phy_reset(pdata
);
637 spin_lock_irqsave(&pdata
->mac_lock
, flags
);
638 smsc911x_mac_write(pdata
, MAC_CR
, 0);
639 spin_unlock_irqrestore(&pdata
->mac_lock
, flags
);
641 /* Cancel PHY loopback mode */
642 smsc911x_mii_write(phy_dev
->bus
, phy_dev
->addr
, MII_BMCR
, 0);
644 smsc911x_reg_write(pdata
, TX_CFG
, 0);
645 smsc911x_reg_write(pdata
, RX_CFG
, 0);
649 #endif /* USE_PHY_WORK_AROUND */
651 static void smsc911x_phy_update_flowcontrol(struct smsc911x_data
*pdata
)
653 struct phy_device
*phy_dev
= pdata
->phy_dev
;
654 u32 afc
= smsc911x_reg_read(pdata
, AFC_CFG
);
658 if (phy_dev
->duplex
== DUPLEX_FULL
) {
659 u16 lcladv
= phy_read(phy_dev
, MII_ADVERTISE
);
660 u16 rmtadv
= phy_read(phy_dev
, MII_LPA
);
661 u8 cap
= mii_resolve_flowctrl_fdx(lcladv
, rmtadv
);
663 if (cap
& FLOW_CTRL_RX
)
668 if (cap
& FLOW_CTRL_TX
)
673 SMSC_TRACE(HW
, "rx pause %s, tx pause %s",
674 (cap
& FLOW_CTRL_RX
? "enabled" : "disabled"),
675 (cap
& FLOW_CTRL_TX
? "enabled" : "disabled"));
677 SMSC_TRACE(HW
, "half duplex");
682 spin_lock_irqsave(&pdata
->mac_lock
, flags
);
683 smsc911x_mac_write(pdata
, FLOW
, flow
);
684 spin_unlock_irqrestore(&pdata
->mac_lock
, flags
);
686 smsc911x_reg_write(pdata
, AFC_CFG
, afc
);
689 /* Update link mode if anything has changed. Called periodically when the
690 * PHY is in polling mode, even if nothing has changed. */
691 static void smsc911x_phy_adjust_link(struct net_device
*dev
)
693 struct smsc911x_data
*pdata
= netdev_priv(dev
);
694 struct phy_device
*phy_dev
= pdata
->phy_dev
;
698 if (phy_dev
->duplex
!= pdata
->last_duplex
) {
700 SMSC_TRACE(HW
, "duplex state has changed");
702 spin_lock_irqsave(&pdata
->mac_lock
, flags
);
703 mac_cr
= smsc911x_mac_read(pdata
, MAC_CR
);
704 if (phy_dev
->duplex
) {
706 "configuring for full duplex mode");
707 mac_cr
|= MAC_CR_FDPX_
;
710 "configuring for half duplex mode");
711 mac_cr
&= ~MAC_CR_FDPX_
;
713 smsc911x_mac_write(pdata
, MAC_CR
, mac_cr
);
714 spin_unlock_irqrestore(&pdata
->mac_lock
, flags
);
716 smsc911x_phy_update_flowcontrol(pdata
);
717 pdata
->last_duplex
= phy_dev
->duplex
;
720 carrier
= netif_carrier_ok(dev
);
721 if (carrier
!= pdata
->last_carrier
) {
722 SMSC_TRACE(HW
, "carrier state has changed");
724 SMSC_TRACE(HW
, "configuring for carrier OK");
725 if ((pdata
->gpio_orig_setting
& GPIO_CFG_LED1_EN_
) &&
726 (!pdata
->using_extphy
)) {
727 /* Restore orginal GPIO configuration */
728 pdata
->gpio_setting
= pdata
->gpio_orig_setting
;
729 smsc911x_reg_write(pdata
, GPIO_CFG
,
730 pdata
->gpio_setting
);
733 SMSC_TRACE(HW
, "configuring for no carrier");
734 /* Check global setting that LED1
735 * usage is 10/100 indicator */
736 pdata
->gpio_setting
= smsc911x_reg_read(pdata
,
738 if ((pdata
->gpio_setting
& GPIO_CFG_LED1_EN_
)
739 && (!pdata
->using_extphy
)) {
740 /* Force 10/100 LED off, after saving
741 * orginal GPIO configuration */
742 pdata
->gpio_orig_setting
= pdata
->gpio_setting
;
744 pdata
->gpio_setting
&= ~GPIO_CFG_LED1_EN_
;
745 pdata
->gpio_setting
|= (GPIO_CFG_GPIOBUF0_
748 smsc911x_reg_write(pdata
, GPIO_CFG
,
749 pdata
->gpio_setting
);
752 pdata
->last_carrier
= carrier
;
756 static int smsc911x_mii_probe(struct net_device
*dev
)
758 struct smsc911x_data
*pdata
= netdev_priv(dev
);
759 struct phy_device
*phydev
= NULL
;
762 /* find the first phy */
763 for (phy_addr
= 0; phy_addr
< PHY_MAX_ADDR
; phy_addr
++) {
764 if (pdata
->mii_bus
->phy_map
[phy_addr
]) {
765 phydev
= pdata
->mii_bus
->phy_map
[phy_addr
];
766 SMSC_TRACE(PROBE
, "PHY %d: addr %d, phy_id 0x%08X",
767 phy_addr
, phydev
->addr
, phydev
->phy_id
);
773 pr_err("%s: no PHY found\n", dev
->name
);
777 phydev
= phy_connect(dev
, dev_name(&phydev
->dev
),
778 &smsc911x_phy_adjust_link
, 0, pdata
->config
.phy_interface
);
780 if (IS_ERR(phydev
)) {
781 pr_err("%s: Could not attach to PHY\n", dev
->name
);
782 return PTR_ERR(phydev
);
785 pr_info("%s: attached PHY driver [%s] (mii_bus:phy_addr=%s, irq=%d)\n",
786 dev
->name
, phydev
->drv
->name
,
787 dev_name(&phydev
->dev
), phydev
->irq
);
789 /* mask with MAC supported features */
790 phydev
->supported
&= (PHY_BASIC_FEATURES
| SUPPORTED_Pause
|
791 SUPPORTED_Asym_Pause
);
792 phydev
->advertising
= phydev
->supported
;
794 pdata
->phy_dev
= phydev
;
795 pdata
->last_duplex
= -1;
796 pdata
->last_carrier
= -1;
798 #ifdef USE_PHY_WORK_AROUND
799 if (smsc911x_phy_loopbacktest(dev
) < 0) {
800 SMSC_WARNING(HW
, "Failed Loop Back Test");
803 SMSC_TRACE(HW
, "Passed Loop Back Test");
804 #endif /* USE_PHY_WORK_AROUND */
806 SMSC_TRACE(HW
, "phy initialised succesfully");
810 static int __devinit
smsc911x_mii_init(struct platform_device
*pdev
,
811 struct net_device
*dev
)
813 struct smsc911x_data
*pdata
= netdev_priv(dev
);
816 pdata
->mii_bus
= mdiobus_alloc();
817 if (!pdata
->mii_bus
) {
822 pdata
->mii_bus
->name
= SMSC_MDIONAME
;
823 snprintf(pdata
->mii_bus
->id
, MII_BUS_ID_SIZE
, "%x", pdev
->id
);
824 pdata
->mii_bus
->priv
= pdata
;
825 pdata
->mii_bus
->read
= smsc911x_mii_read
;
826 pdata
->mii_bus
->write
= smsc911x_mii_write
;
827 pdata
->mii_bus
->irq
= pdata
->phy_irq
;
828 for (i
= 0; i
< PHY_MAX_ADDR
; ++i
)
829 pdata
->mii_bus
->irq
[i
] = PHY_POLL
;
831 pdata
->mii_bus
->parent
= &pdev
->dev
;
833 switch (pdata
->idrev
& 0xFFFF0000) {
838 /* External PHY supported, try to autodetect */
839 smsc911x_phy_initialise_external(pdata
);
842 SMSC_TRACE(HW
, "External PHY is not supported, "
843 "using internal PHY");
844 pdata
->using_extphy
= 0;
848 if (!pdata
->using_extphy
) {
849 /* Mask all PHYs except ID 1 (internal) */
850 pdata
->mii_bus
->phy_mask
= ~(1 << 1);
853 if (mdiobus_register(pdata
->mii_bus
)) {
854 SMSC_WARNING(PROBE
, "Error registering mii bus");
855 goto err_out_free_bus_2
;
858 if (smsc911x_mii_probe(dev
) < 0) {
859 SMSC_WARNING(PROBE
, "Error registering mii bus");
860 goto err_out_unregister_bus_3
;
865 err_out_unregister_bus_3
:
866 mdiobus_unregister(pdata
->mii_bus
);
868 mdiobus_free(pdata
->mii_bus
);
873 /* Gets the number of tx statuses in the fifo */
874 static unsigned int smsc911x_tx_get_txstatcount(struct smsc911x_data
*pdata
)
876 return (smsc911x_reg_read(pdata
, TX_FIFO_INF
)
877 & TX_FIFO_INF_TSUSED_
) >> 16;
880 /* Reads tx statuses and increments counters where necessary */
881 static void smsc911x_tx_update_txcounters(struct net_device
*dev
)
883 struct smsc911x_data
*pdata
= netdev_priv(dev
);
884 unsigned int tx_stat
;
886 while ((tx_stat
= smsc911x_tx_get_txstatus(pdata
)) != 0) {
887 if (unlikely(tx_stat
& 0x80000000)) {
888 /* In this driver the packet tag is used as the packet
889 * length. Since a packet length can never reach the
890 * size of 0x8000, this bit is reserved. It is worth
891 * noting that the "reserved bit" in the warning above
892 * does not reference a hardware defined reserved bit
893 * but rather a driver defined one.
896 "Packet tag reserved bit is high");
898 if (unlikely(tx_stat
& 0x00008000)) {
899 dev
->stats
.tx_errors
++;
901 dev
->stats
.tx_packets
++;
902 dev
->stats
.tx_bytes
+= (tx_stat
>> 16);
904 if (unlikely(tx_stat
& 0x00000100)) {
905 dev
->stats
.collisions
+= 16;
906 dev
->stats
.tx_aborted_errors
+= 1;
908 dev
->stats
.collisions
+=
909 ((tx_stat
>> 3) & 0xF);
911 if (unlikely(tx_stat
& 0x00000800))
912 dev
->stats
.tx_carrier_errors
+= 1;
913 if (unlikely(tx_stat
& 0x00000200)) {
914 dev
->stats
.collisions
++;
915 dev
->stats
.tx_aborted_errors
++;
921 /* Increments the Rx error counters */
923 smsc911x_rx_counterrors(struct net_device
*dev
, unsigned int rxstat
)
927 if (unlikely(rxstat
& 0x00008000)) {
928 dev
->stats
.rx_errors
++;
929 if (unlikely(rxstat
& 0x00000002)) {
930 dev
->stats
.rx_crc_errors
++;
934 if (likely(!crc_err
)) {
935 if (unlikely((rxstat
& 0x00001020) == 0x00001020)) {
936 /* Frame type indicates length,
937 * and length error is set */
938 dev
->stats
.rx_length_errors
++;
940 if (rxstat
& RX_STS_MCAST_
)
941 dev
->stats
.multicast
++;
945 /* Quickly dumps bad packets */
947 smsc911x_rx_fastforward(struct smsc911x_data
*pdata
, unsigned int pktbytes
)
949 unsigned int pktwords
= (pktbytes
+ NET_IP_ALIGN
+ 3) >> 2;
951 if (likely(pktwords
>= 4)) {
952 unsigned int timeout
= 500;
954 smsc911x_reg_write(pdata
, RX_DP_CTRL
, RX_DP_CTRL_RX_FFWD_
);
957 val
= smsc911x_reg_read(pdata
, RX_DP_CTRL
);
958 } while ((val
& RX_DP_CTRL_RX_FFWD_
) && --timeout
);
960 if (unlikely(timeout
== 0))
961 SMSC_WARNING(HW
, "Timed out waiting for "
962 "RX FFWD to finish, RX_DP_CTRL: 0x%08X", val
);
966 temp
= smsc911x_reg_read(pdata
, RX_DATA_FIFO
);
970 /* NAPI poll function */
971 static int smsc911x_poll(struct napi_struct
*napi
, int budget
)
973 struct smsc911x_data
*pdata
=
974 container_of(napi
, struct smsc911x_data
, napi
);
975 struct net_device
*dev
= pdata
->dev
;
978 while (likely(netif_running(dev
)) && (npackets
< budget
)) {
979 unsigned int pktlength
;
980 unsigned int pktwords
;
982 unsigned int rxstat
= smsc911x_rx_get_rxstatus(pdata
);
986 /* We processed all packets available. Tell NAPI it can
987 * stop polling then re-enable rx interrupts */
988 smsc911x_reg_write(pdata
, INT_STS
, INT_STS_RSFL_
);
990 temp
= smsc911x_reg_read(pdata
, INT_EN
);
991 temp
|= INT_EN_RSFL_EN_
;
992 smsc911x_reg_write(pdata
, INT_EN
, temp
);
996 /* Count packet for NAPI scheduling, even if it has an error.
997 * Error packets still require cycles to discard */
1000 pktlength
= ((rxstat
& 0x3FFF0000) >> 16);
1001 pktwords
= (pktlength
+ NET_IP_ALIGN
+ 3) >> 2;
1002 smsc911x_rx_counterrors(dev
, rxstat
);
1004 if (unlikely(rxstat
& RX_STS_ES_
)) {
1005 SMSC_WARNING(RX_ERR
,
1006 "Discarding packet with error bit set");
1007 /* Packet has an error, discard it and continue with
1009 smsc911x_rx_fastforward(pdata
, pktwords
);
1010 dev
->stats
.rx_dropped
++;
1014 skb
= netdev_alloc_skb(dev
, pktlength
+ NET_IP_ALIGN
);
1015 if (unlikely(!skb
)) {
1016 SMSC_WARNING(RX_ERR
,
1017 "Unable to allocate skb for rx packet");
1018 /* Drop the packet and stop this polling iteration */
1019 smsc911x_rx_fastforward(pdata
, pktwords
);
1020 dev
->stats
.rx_dropped
++;
1024 skb
->data
= skb
->head
;
1025 skb_reset_tail_pointer(skb
);
1027 /* Align IP on 16B boundary */
1028 skb_reserve(skb
, NET_IP_ALIGN
);
1029 skb_put(skb
, pktlength
- 4);
1030 smsc911x_rx_readfifo(pdata
, (unsigned int *)skb
->head
,
1032 skb
->protocol
= eth_type_trans(skb
, dev
);
1033 skb
->ip_summed
= CHECKSUM_NONE
;
1034 netif_receive_skb(skb
);
1036 /* Update counters */
1037 dev
->stats
.rx_packets
++;
1038 dev
->stats
.rx_bytes
+= (pktlength
- 4);
1039 dev
->last_rx
= jiffies
;
1042 /* Return total received packets */
1046 /* Returns hash bit number for given MAC address
1048 * 01 00 5E 00 00 01 -> returns bit number 31 */
1049 static unsigned int smsc911x_hash(char addr
[ETH_ALEN
])
1051 return (ether_crc(ETH_ALEN
, addr
) >> 26) & 0x3f;
1054 static void smsc911x_rx_multicast_update(struct smsc911x_data
*pdata
)
1056 /* Performs the multicast & mac_cr update. This is called when
1057 * safe on the current hardware, and with the mac_lock held */
1058 unsigned int mac_cr
;
1060 SMSC_ASSERT_MAC_LOCK(pdata
);
1062 mac_cr
= smsc911x_mac_read(pdata
, MAC_CR
);
1063 mac_cr
|= pdata
->set_bits_mask
;
1064 mac_cr
&= ~(pdata
->clear_bits_mask
);
1065 smsc911x_mac_write(pdata
, MAC_CR
, mac_cr
);
1066 smsc911x_mac_write(pdata
, HASHH
, pdata
->hashhi
);
1067 smsc911x_mac_write(pdata
, HASHL
, pdata
->hashlo
);
1068 SMSC_TRACE(HW
, "maccr 0x%08X, HASHH 0x%08X, HASHL 0x%08X",
1069 mac_cr
, pdata
->hashhi
, pdata
->hashlo
);
1072 static void smsc911x_rx_multicast_update_workaround(struct smsc911x_data
*pdata
)
1074 unsigned int mac_cr
;
1076 /* This function is only called for older LAN911x devices
1077 * (revA or revB), where MAC_CR, HASHH and HASHL should not
1078 * be modified during Rx - newer devices immediately update the
1081 * This is called from interrupt context */
1083 spin_lock(&pdata
->mac_lock
);
1085 /* Check Rx has stopped */
1086 if (smsc911x_mac_read(pdata
, MAC_CR
) & MAC_CR_RXEN_
)
1087 SMSC_WARNING(DRV
, "Rx not stopped");
1089 /* Perform the update - safe to do now Rx has stopped */
1090 smsc911x_rx_multicast_update(pdata
);
1093 mac_cr
= smsc911x_mac_read(pdata
, MAC_CR
);
1094 mac_cr
|= MAC_CR_RXEN_
;
1095 smsc911x_mac_write(pdata
, MAC_CR
, mac_cr
);
1097 pdata
->multicast_update_pending
= 0;
1099 spin_unlock(&pdata
->mac_lock
);
1102 static int smsc911x_soft_reset(struct smsc911x_data
*pdata
)
1104 unsigned int timeout
;
1107 /* Reset the LAN911x */
1108 smsc911x_reg_write(pdata
, HW_CFG
, HW_CFG_SRST_
);
1112 temp
= smsc911x_reg_read(pdata
, HW_CFG
);
1113 } while ((--timeout
) && (temp
& HW_CFG_SRST_
));
1115 if (unlikely(temp
& HW_CFG_SRST_
)) {
1116 SMSC_WARNING(DRV
, "Failed to complete reset");
1122 /* Sets the device MAC address to dev_addr, called with mac_lock held */
1124 smsc911x_set_mac_address(struct smsc911x_data
*pdata
, u8 dev_addr
[6])
1126 u32 mac_high16
= (dev_addr
[5] << 8) | dev_addr
[4];
1127 u32 mac_low32
= (dev_addr
[3] << 24) | (dev_addr
[2] << 16) |
1128 (dev_addr
[1] << 8) | dev_addr
[0];
1130 SMSC_ASSERT_MAC_LOCK(pdata
);
1132 smsc911x_mac_write(pdata
, ADDRH
, mac_high16
);
1133 smsc911x_mac_write(pdata
, ADDRL
, mac_low32
);
1136 static int smsc911x_open(struct net_device
*dev
)
1138 struct smsc911x_data
*pdata
= netdev_priv(dev
);
1139 unsigned int timeout
;
1141 unsigned int intcfg
;
1143 /* if the phy is not yet registered, retry later*/
1144 if (!pdata
->phy_dev
) {
1145 SMSC_WARNING(HW
, "phy_dev is NULL");
1149 if (!is_valid_ether_addr(dev
->dev_addr
)) {
1150 SMSC_WARNING(HW
, "dev_addr is not a valid MAC address");
1151 return -EADDRNOTAVAIL
;
1154 /* Reset the LAN911x */
1155 if (smsc911x_soft_reset(pdata
)) {
1156 SMSC_WARNING(HW
, "soft reset failed");
1160 smsc911x_reg_write(pdata
, HW_CFG
, 0x00050000);
1161 smsc911x_reg_write(pdata
, AFC_CFG
, 0x006E3740);
1163 /* Make sure EEPROM has finished loading before setting GPIO_CFG */
1165 while ((timeout
--) &&
1166 (smsc911x_reg_read(pdata
, E2P_CMD
) & E2P_CMD_EPC_BUSY_
)) {
1170 if (unlikely(timeout
== 0))
1172 "Timed out waiting for EEPROM busy bit to clear");
1174 smsc911x_reg_write(pdata
, GPIO_CFG
, 0x70070000);
1176 /* The soft reset above cleared the device's MAC address,
1177 * restore it from local copy (set in probe) */
1178 spin_lock_irq(&pdata
->mac_lock
);
1179 smsc911x_set_mac_address(pdata
, dev
->dev_addr
);
1180 spin_unlock_irq(&pdata
->mac_lock
);
1182 /* Initialise irqs, but leave all sources disabled */
1183 smsc911x_reg_write(pdata
, INT_EN
, 0);
1184 smsc911x_reg_write(pdata
, INT_STS
, 0xFFFFFFFF);
1186 /* Set interrupt deassertion to 100uS */
1187 intcfg
= ((10 << 24) | INT_CFG_IRQ_EN_
);
1189 if (pdata
->config
.irq_polarity
) {
1190 SMSC_TRACE(IFUP
, "irq polarity: active high");
1191 intcfg
|= INT_CFG_IRQ_POL_
;
1193 SMSC_TRACE(IFUP
, "irq polarity: active low");
1196 if (pdata
->config
.irq_type
) {
1197 SMSC_TRACE(IFUP
, "irq type: push-pull");
1198 intcfg
|= INT_CFG_IRQ_TYPE_
;
1200 SMSC_TRACE(IFUP
, "irq type: open drain");
1203 smsc911x_reg_write(pdata
, INT_CFG
, intcfg
);
1205 SMSC_TRACE(IFUP
, "Testing irq handler using IRQ %d", dev
->irq
);
1206 pdata
->software_irq_signal
= 0;
1209 temp
= smsc911x_reg_read(pdata
, INT_EN
);
1210 temp
|= INT_EN_SW_INT_EN_
;
1211 smsc911x_reg_write(pdata
, INT_EN
, temp
);
1215 if (pdata
->software_irq_signal
)
1220 if (!pdata
->software_irq_signal
) {
1221 dev_warn(&dev
->dev
, "ISR failed signaling test (IRQ %d)\n",
1225 SMSC_TRACE(IFUP
, "IRQ handler passed test using IRQ %d", dev
->irq
);
1227 dev_info(&dev
->dev
, "SMSC911x/921x identified at %#08lx, IRQ: %d\n",
1228 (unsigned long)pdata
->ioaddr
, dev
->irq
);
1230 /* Bring the PHY up */
1231 phy_start(pdata
->phy_dev
);
1233 temp
= smsc911x_reg_read(pdata
, HW_CFG
);
1234 /* Preserve TX FIFO size and external PHY configuration */
1235 temp
&= (HW_CFG_TX_FIF_SZ_
|0x00000FFF);
1237 smsc911x_reg_write(pdata
, HW_CFG
, temp
);
1239 temp
= smsc911x_reg_read(pdata
, FIFO_INT
);
1240 temp
|= FIFO_INT_TX_AVAIL_LEVEL_
;
1241 temp
&= ~(FIFO_INT_RX_STS_LEVEL_
);
1242 smsc911x_reg_write(pdata
, FIFO_INT
, temp
);
1244 /* set RX Data offset to 2 bytes for alignment */
1245 smsc911x_reg_write(pdata
, RX_CFG
, (2 << 8));
1247 /* enable NAPI polling before enabling RX interrupts */
1248 napi_enable(&pdata
->napi
);
1250 temp
= smsc911x_reg_read(pdata
, INT_EN
);
1251 temp
|= (INT_EN_TDFA_EN_
| INT_EN_RSFL_EN_
| INT_EN_RXSTOP_INT_EN_
);
1252 smsc911x_reg_write(pdata
, INT_EN
, temp
);
1254 spin_lock_irq(&pdata
->mac_lock
);
1255 temp
= smsc911x_mac_read(pdata
, MAC_CR
);
1256 temp
|= (MAC_CR_TXEN_
| MAC_CR_RXEN_
| MAC_CR_HBDIS_
);
1257 smsc911x_mac_write(pdata
, MAC_CR
, temp
);
1258 spin_unlock_irq(&pdata
->mac_lock
);
1260 smsc911x_reg_write(pdata
, TX_CFG
, TX_CFG_TX_ON_
);
1262 netif_start_queue(dev
);
1266 /* Entry point for stopping the interface */
1267 static int smsc911x_stop(struct net_device
*dev
)
1269 struct smsc911x_data
*pdata
= netdev_priv(dev
);
1272 /* Disable all device interrupts */
1273 temp
= smsc911x_reg_read(pdata
, INT_CFG
);
1274 temp
&= ~INT_CFG_IRQ_EN_
;
1275 smsc911x_reg_write(pdata
, INT_CFG
, temp
);
1277 /* Stop Tx and Rx polling */
1278 netif_stop_queue(dev
);
1279 napi_disable(&pdata
->napi
);
1281 /* At this point all Rx and Tx activity is stopped */
1282 dev
->stats
.rx_dropped
+= smsc911x_reg_read(pdata
, RX_DROP
);
1283 smsc911x_tx_update_txcounters(dev
);
1285 /* Bring the PHY down */
1287 phy_stop(pdata
->phy_dev
);
1289 SMSC_TRACE(IFDOWN
, "Interface stopped");
1293 /* Entry point for transmitting a packet */
1294 static int smsc911x_hard_start_xmit(struct sk_buff
*skb
, struct net_device
*dev
)
1296 struct smsc911x_data
*pdata
= netdev_priv(dev
);
1297 unsigned int freespace
;
1298 unsigned int tx_cmd_a
;
1299 unsigned int tx_cmd_b
;
1304 freespace
= smsc911x_reg_read(pdata
, TX_FIFO_INF
) & TX_FIFO_INF_TDFREE_
;
1306 if (unlikely(freespace
< TX_FIFO_LOW_THRESHOLD
))
1307 SMSC_WARNING(TX_ERR
,
1308 "Tx data fifo low, space available: %d", freespace
);
1310 /* Word alignment adjustment */
1311 tx_cmd_a
= (u32
)((ulong
)skb
->data
& 0x03) << 16;
1312 tx_cmd_a
|= TX_CMD_A_FIRST_SEG_
| TX_CMD_A_LAST_SEG_
;
1313 tx_cmd_a
|= (unsigned int)skb
->len
;
1315 tx_cmd_b
= ((unsigned int)skb
->len
) << 16;
1316 tx_cmd_b
|= (unsigned int)skb
->len
;
1318 smsc911x_reg_write(pdata
, TX_DATA_FIFO
, tx_cmd_a
);
1319 smsc911x_reg_write(pdata
, TX_DATA_FIFO
, tx_cmd_b
);
1321 bufp
= (ulong
)skb
->data
& (~0x3);
1322 wrsz
= (u32
)skb
->len
+ 3;
1323 wrsz
+= (u32
)((ulong
)skb
->data
& 0x3);
1326 smsc911x_tx_writefifo(pdata
, (unsigned int *)bufp
, wrsz
);
1327 freespace
-= (skb
->len
+ 32);
1329 dev
->trans_start
= jiffies
;
1331 if (unlikely(smsc911x_tx_get_txstatcount(pdata
) >= 30))
1332 smsc911x_tx_update_txcounters(dev
);
1334 if (freespace
< TX_FIFO_LOW_THRESHOLD
) {
1335 netif_stop_queue(dev
);
1336 temp
= smsc911x_reg_read(pdata
, FIFO_INT
);
1339 smsc911x_reg_write(pdata
, FIFO_INT
, temp
);
1342 return NETDEV_TX_OK
;
1345 /* Entry point for getting status counters */
1346 static struct net_device_stats
*smsc911x_get_stats(struct net_device
*dev
)
1348 struct smsc911x_data
*pdata
= netdev_priv(dev
);
1349 smsc911x_tx_update_txcounters(dev
);
1350 dev
->stats
.rx_dropped
+= smsc911x_reg_read(pdata
, RX_DROP
);
1354 /* Entry point for setting addressing modes */
1355 static void smsc911x_set_multicast_list(struct net_device
*dev
)
1357 struct smsc911x_data
*pdata
= netdev_priv(dev
);
1358 unsigned long flags
;
1360 if (dev
->flags
& IFF_PROMISC
) {
1361 /* Enabling promiscuous mode */
1362 pdata
->set_bits_mask
= MAC_CR_PRMS_
;
1363 pdata
->clear_bits_mask
= (MAC_CR_MCPAS_
| MAC_CR_HPFILT_
);
1366 } else if (dev
->flags
& IFF_ALLMULTI
) {
1367 /* Enabling all multicast mode */
1368 pdata
->set_bits_mask
= MAC_CR_MCPAS_
;
1369 pdata
->clear_bits_mask
= (MAC_CR_PRMS_
| MAC_CR_HPFILT_
);
1372 } else if (dev
->mc_count
> 0) {
1373 /* Enabling specific multicast addresses */
1374 unsigned int hash_high
= 0;
1375 unsigned int hash_low
= 0;
1376 unsigned int count
= 0;
1377 struct dev_mc_list
*mc_list
= dev
->mc_list
;
1379 pdata
->set_bits_mask
= MAC_CR_HPFILT_
;
1380 pdata
->clear_bits_mask
= (MAC_CR_PRMS_
| MAC_CR_MCPAS_
);
1384 if ((mc_list
->dmi_addrlen
) == ETH_ALEN
) {
1385 unsigned int bitnum
=
1386 smsc911x_hash(mc_list
->dmi_addr
);
1387 unsigned int mask
= 0x01 << (bitnum
& 0x1F);
1393 SMSC_WARNING(DRV
, "dmi_addrlen != 6");
1395 mc_list
= mc_list
->next
;
1397 if (count
!= (unsigned int)dev
->mc_count
)
1398 SMSC_WARNING(DRV
, "mc_count != dev->mc_count");
1400 pdata
->hashhi
= hash_high
;
1401 pdata
->hashlo
= hash_low
;
1403 /* Enabling local MAC address only */
1404 pdata
->set_bits_mask
= 0;
1405 pdata
->clear_bits_mask
=
1406 (MAC_CR_PRMS_
| MAC_CR_MCPAS_
| MAC_CR_HPFILT_
);
1411 spin_lock_irqsave(&pdata
->mac_lock
, flags
);
1413 if (pdata
->generation
<= 1) {
1414 /* Older hardware revision - cannot change these flags while
1416 if (!pdata
->multicast_update_pending
) {
1418 SMSC_TRACE(HW
, "scheduling mcast update");
1419 pdata
->multicast_update_pending
= 1;
1421 /* Request the hardware to stop, then perform the
1422 * update when we get an RX_STOP interrupt */
1423 temp
= smsc911x_mac_read(pdata
, MAC_CR
);
1424 temp
&= ~(MAC_CR_RXEN_
);
1425 smsc911x_mac_write(pdata
, MAC_CR
, temp
);
1427 /* There is another update pending, this should now
1428 * use the newer values */
1431 /* Newer hardware revision - can write immediately */
1432 smsc911x_rx_multicast_update(pdata
);
1435 spin_unlock_irqrestore(&pdata
->mac_lock
, flags
);
1438 static irqreturn_t
smsc911x_irqhandler(int irq
, void *dev_id
)
1440 struct net_device
*dev
= dev_id
;
1441 struct smsc911x_data
*pdata
= netdev_priv(dev
);
1442 u32 intsts
= smsc911x_reg_read(pdata
, INT_STS
);
1443 u32 inten
= smsc911x_reg_read(pdata
, INT_EN
);
1444 int serviced
= IRQ_NONE
;
1447 if (unlikely(intsts
& inten
& INT_STS_SW_INT_
)) {
1448 temp
= smsc911x_reg_read(pdata
, INT_EN
);
1449 temp
&= (~INT_EN_SW_INT_EN_
);
1450 smsc911x_reg_write(pdata
, INT_EN
, temp
);
1451 smsc911x_reg_write(pdata
, INT_STS
, INT_STS_SW_INT_
);
1452 pdata
->software_irq_signal
= 1;
1454 serviced
= IRQ_HANDLED
;
1457 if (unlikely(intsts
& inten
& INT_STS_RXSTOP_INT_
)) {
1458 /* Called when there is a multicast update scheduled and
1459 * it is now safe to complete the update */
1460 SMSC_TRACE(INTR
, "RX Stop interrupt");
1461 smsc911x_reg_write(pdata
, INT_STS
, INT_STS_RXSTOP_INT_
);
1462 if (pdata
->multicast_update_pending
)
1463 smsc911x_rx_multicast_update_workaround(pdata
);
1464 serviced
= IRQ_HANDLED
;
1467 if (intsts
& inten
& INT_STS_TDFA_
) {
1468 temp
= smsc911x_reg_read(pdata
, FIFO_INT
);
1469 temp
|= FIFO_INT_TX_AVAIL_LEVEL_
;
1470 smsc911x_reg_write(pdata
, FIFO_INT
, temp
);
1471 smsc911x_reg_write(pdata
, INT_STS
, INT_STS_TDFA_
);
1472 netif_wake_queue(dev
);
1473 serviced
= IRQ_HANDLED
;
1476 if (unlikely(intsts
& inten
& INT_STS_RXE_
)) {
1477 SMSC_TRACE(INTR
, "RX Error interrupt");
1478 smsc911x_reg_write(pdata
, INT_STS
, INT_STS_RXE_
);
1479 serviced
= IRQ_HANDLED
;
1482 if (likely(intsts
& inten
& INT_STS_RSFL_
)) {
1483 if (likely(napi_schedule_prep(&pdata
->napi
))) {
1484 /* Disable Rx interrupts */
1485 temp
= smsc911x_reg_read(pdata
, INT_EN
);
1486 temp
&= (~INT_EN_RSFL_EN_
);
1487 smsc911x_reg_write(pdata
, INT_EN
, temp
);
1488 /* Schedule a NAPI poll */
1489 __napi_schedule(&pdata
->napi
);
1491 SMSC_WARNING(RX_ERR
,
1492 "napi_schedule_prep failed");
1494 serviced
= IRQ_HANDLED
;
1500 #ifdef CONFIG_NET_POLL_CONTROLLER
1501 static void smsc911x_poll_controller(struct net_device
*dev
)
1503 disable_irq(dev
->irq
);
1504 smsc911x_irqhandler(0, dev
);
1505 enable_irq(dev
->irq
);
1507 #endif /* CONFIG_NET_POLL_CONTROLLER */
1509 /* Standard ioctls for mii-tool */
1510 static int smsc911x_do_ioctl(struct net_device
*dev
, struct ifreq
*ifr
, int cmd
)
1512 struct smsc911x_data
*pdata
= netdev_priv(dev
);
1514 if (!netif_running(dev
) || !pdata
->phy_dev
)
1517 return phy_mii_ioctl(pdata
->phy_dev
, if_mii(ifr
), cmd
);
1521 smsc911x_ethtool_getsettings(struct net_device
*dev
, struct ethtool_cmd
*cmd
)
1523 struct smsc911x_data
*pdata
= netdev_priv(dev
);
1527 return phy_ethtool_gset(pdata
->phy_dev
, cmd
);
1531 smsc911x_ethtool_setsettings(struct net_device
*dev
, struct ethtool_cmd
*cmd
)
1533 struct smsc911x_data
*pdata
= netdev_priv(dev
);
1535 return phy_ethtool_sset(pdata
->phy_dev
, cmd
);
1538 static void smsc911x_ethtool_getdrvinfo(struct net_device
*dev
,
1539 struct ethtool_drvinfo
*info
)
1541 strlcpy(info
->driver
, SMSC_CHIPNAME
, sizeof(info
->driver
));
1542 strlcpy(info
->version
, SMSC_DRV_VERSION
, sizeof(info
->version
));
1543 strlcpy(info
->bus_info
, dev_name(dev
->dev
.parent
),
1544 sizeof(info
->bus_info
));
1547 static int smsc911x_ethtool_nwayreset(struct net_device
*dev
)
1549 struct smsc911x_data
*pdata
= netdev_priv(dev
);
1551 return phy_start_aneg(pdata
->phy_dev
);
1554 static u32
smsc911x_ethtool_getmsglevel(struct net_device
*dev
)
1556 struct smsc911x_data
*pdata
= netdev_priv(dev
);
1557 return pdata
->msg_enable
;
1560 static void smsc911x_ethtool_setmsglevel(struct net_device
*dev
, u32 level
)
1562 struct smsc911x_data
*pdata
= netdev_priv(dev
);
1563 pdata
->msg_enable
= level
;
1566 static int smsc911x_ethtool_getregslen(struct net_device
*dev
)
1568 return (((E2P_DATA
- ID_REV
) / 4 + 1) + (WUCSR
- MAC_CR
) + 1 + 32) *
1573 smsc911x_ethtool_getregs(struct net_device
*dev
, struct ethtool_regs
*regs
,
1576 struct smsc911x_data
*pdata
= netdev_priv(dev
);
1577 struct phy_device
*phy_dev
= pdata
->phy_dev
;
1578 unsigned long flags
;
1583 regs
->version
= pdata
->idrev
;
1584 for (i
= ID_REV
; i
<= E2P_DATA
; i
+= (sizeof(u32
)))
1585 data
[j
++] = smsc911x_reg_read(pdata
, i
);
1587 for (i
= MAC_CR
; i
<= WUCSR
; i
++) {
1588 spin_lock_irqsave(&pdata
->mac_lock
, flags
);
1589 data
[j
++] = smsc911x_mac_read(pdata
, i
);
1590 spin_unlock_irqrestore(&pdata
->mac_lock
, flags
);
1593 for (i
= 0; i
<= 31; i
++)
1594 data
[j
++] = smsc911x_mii_read(phy_dev
->bus
, phy_dev
->addr
, i
);
1597 static void smsc911x_eeprom_enable_access(struct smsc911x_data
*pdata
)
1599 unsigned int temp
= smsc911x_reg_read(pdata
, GPIO_CFG
);
1600 temp
&= ~GPIO_CFG_EEPR_EN_
;
1601 smsc911x_reg_write(pdata
, GPIO_CFG
, temp
);
1605 static int smsc911x_eeprom_send_cmd(struct smsc911x_data
*pdata
, u32 op
)
1610 SMSC_TRACE(DRV
, "op 0x%08x", op
);
1611 if (smsc911x_reg_read(pdata
, E2P_CMD
) & E2P_CMD_EPC_BUSY_
) {
1612 SMSC_WARNING(DRV
, "Busy at start");
1616 e2cmd
= op
| E2P_CMD_EPC_BUSY_
;
1617 smsc911x_reg_write(pdata
, E2P_CMD
, e2cmd
);
1621 e2cmd
= smsc911x_reg_read(pdata
, E2P_CMD
);
1622 } while ((e2cmd
& E2P_CMD_EPC_BUSY_
) && (--timeout
));
1625 SMSC_TRACE(DRV
, "TIMED OUT");
1629 if (e2cmd
& E2P_CMD_EPC_TIMEOUT_
) {
1630 SMSC_TRACE(DRV
, "Error occured during eeprom operation");
1637 static int smsc911x_eeprom_read_location(struct smsc911x_data
*pdata
,
1638 u8 address
, u8
*data
)
1640 u32 op
= E2P_CMD_EPC_CMD_READ_
| address
;
1643 SMSC_TRACE(DRV
, "address 0x%x", address
);
1644 ret
= smsc911x_eeprom_send_cmd(pdata
, op
);
1647 data
[address
] = smsc911x_reg_read(pdata
, E2P_DATA
);
1652 static int smsc911x_eeprom_write_location(struct smsc911x_data
*pdata
,
1653 u8 address
, u8 data
)
1655 u32 op
= E2P_CMD_EPC_CMD_ERASE_
| address
;
1658 SMSC_TRACE(DRV
, "address 0x%x, data 0x%x", address
, data
);
1659 ret
= smsc911x_eeprom_send_cmd(pdata
, op
);
1662 op
= E2P_CMD_EPC_CMD_WRITE_
| address
;
1663 smsc911x_reg_write(pdata
, E2P_DATA
, (u32
)data
);
1664 ret
= smsc911x_eeprom_send_cmd(pdata
, op
);
1670 static int smsc911x_ethtool_get_eeprom_len(struct net_device
*dev
)
1672 return SMSC911X_EEPROM_SIZE
;
1675 static int smsc911x_ethtool_get_eeprom(struct net_device
*dev
,
1676 struct ethtool_eeprom
*eeprom
, u8
*data
)
1678 struct smsc911x_data
*pdata
= netdev_priv(dev
);
1679 u8 eeprom_data
[SMSC911X_EEPROM_SIZE
];
1683 smsc911x_eeprom_enable_access(pdata
);
1685 len
= min(eeprom
->len
, SMSC911X_EEPROM_SIZE
);
1686 for (i
= 0; i
< len
; i
++) {
1687 int ret
= smsc911x_eeprom_read_location(pdata
, i
, eeprom_data
);
1694 memcpy(data
, &eeprom_data
[eeprom
->offset
], len
);
1699 static int smsc911x_ethtool_set_eeprom(struct net_device
*dev
,
1700 struct ethtool_eeprom
*eeprom
, u8
*data
)
1703 struct smsc911x_data
*pdata
= netdev_priv(dev
);
1705 smsc911x_eeprom_enable_access(pdata
);
1706 smsc911x_eeprom_send_cmd(pdata
, E2P_CMD_EPC_CMD_EWEN_
);
1707 ret
= smsc911x_eeprom_write_location(pdata
, eeprom
->offset
, *data
);
1708 smsc911x_eeprom_send_cmd(pdata
, E2P_CMD_EPC_CMD_EWDS_
);
1710 /* Single byte write, according to man page */
1716 static const struct ethtool_ops smsc911x_ethtool_ops
= {
1717 .get_settings
= smsc911x_ethtool_getsettings
,
1718 .set_settings
= smsc911x_ethtool_setsettings
,
1719 .get_link
= ethtool_op_get_link
,
1720 .get_drvinfo
= smsc911x_ethtool_getdrvinfo
,
1721 .nway_reset
= smsc911x_ethtool_nwayreset
,
1722 .get_msglevel
= smsc911x_ethtool_getmsglevel
,
1723 .set_msglevel
= smsc911x_ethtool_setmsglevel
,
1724 .get_regs_len
= smsc911x_ethtool_getregslen
,
1725 .get_regs
= smsc911x_ethtool_getregs
,
1726 .get_eeprom_len
= smsc911x_ethtool_get_eeprom_len
,
1727 .get_eeprom
= smsc911x_ethtool_get_eeprom
,
1728 .set_eeprom
= smsc911x_ethtool_set_eeprom
,
1731 static const struct net_device_ops smsc911x_netdev_ops
= {
1732 .ndo_open
= smsc911x_open
,
1733 .ndo_stop
= smsc911x_stop
,
1734 .ndo_start_xmit
= smsc911x_hard_start_xmit
,
1735 .ndo_get_stats
= smsc911x_get_stats
,
1736 .ndo_set_multicast_list
= smsc911x_set_multicast_list
,
1737 .ndo_do_ioctl
= smsc911x_do_ioctl
,
1738 .ndo_validate_addr
= eth_validate_addr
,
1739 .ndo_set_mac_address
= eth_mac_addr
,
1740 #ifdef CONFIG_NET_POLL_CONTROLLER
1741 .ndo_poll_controller
= smsc911x_poll_controller
,
1745 /* copies the current mac address from hardware to dev->dev_addr */
1746 static void __devinit
smsc911x_read_mac_address(struct net_device
*dev
)
1748 struct smsc911x_data
*pdata
= netdev_priv(dev
);
1749 u32 mac_high16
= smsc911x_mac_read(pdata
, ADDRH
);
1750 u32 mac_low32
= smsc911x_mac_read(pdata
, ADDRL
);
1752 dev
->dev_addr
[0] = (u8
)(mac_low32
);
1753 dev
->dev_addr
[1] = (u8
)(mac_low32
>> 8);
1754 dev
->dev_addr
[2] = (u8
)(mac_low32
>> 16);
1755 dev
->dev_addr
[3] = (u8
)(mac_low32
>> 24);
1756 dev
->dev_addr
[4] = (u8
)(mac_high16
);
1757 dev
->dev_addr
[5] = (u8
)(mac_high16
>> 8);
1760 /* Initializing private device structures, only called from probe */
1761 static int __devinit
smsc911x_init(struct net_device
*dev
)
1763 struct smsc911x_data
*pdata
= netdev_priv(dev
);
1764 unsigned int byte_test
;
1766 SMSC_TRACE(PROBE
, "Driver Parameters:");
1767 SMSC_TRACE(PROBE
, "LAN base: 0x%08lX",
1768 (unsigned long)pdata
->ioaddr
);
1769 SMSC_TRACE(PROBE
, "IRQ: %d", dev
->irq
);
1770 SMSC_TRACE(PROBE
, "PHY will be autodetected.");
1772 spin_lock_init(&pdata
->dev_lock
);
1774 if (pdata
->ioaddr
== 0) {
1775 SMSC_WARNING(PROBE
, "pdata->ioaddr: 0x00000000");
1779 /* Check byte ordering */
1780 byte_test
= smsc911x_reg_read(pdata
, BYTE_TEST
);
1781 SMSC_TRACE(PROBE
, "BYTE_TEST: 0x%08X", byte_test
);
1782 if (byte_test
== 0x43218765) {
1783 SMSC_TRACE(PROBE
, "BYTE_TEST looks swapped, "
1784 "applying WORD_SWAP");
1785 smsc911x_reg_write(pdata
, WORD_SWAP
, 0xffffffff);
1787 /* 1 dummy read of BYTE_TEST is needed after a write to
1788 * WORD_SWAP before its contents are valid */
1789 byte_test
= smsc911x_reg_read(pdata
, BYTE_TEST
);
1791 byte_test
= smsc911x_reg_read(pdata
, BYTE_TEST
);
1794 if (byte_test
!= 0x87654321) {
1795 SMSC_WARNING(DRV
, "BYTE_TEST: 0x%08X", byte_test
);
1796 if (((byte_test
>> 16) & 0xFFFF) == (byte_test
& 0xFFFF)) {
1798 "top 16 bits equal to bottom 16 bits");
1799 SMSC_TRACE(PROBE
, "This may mean the chip is set "
1800 "for 32 bit while the bus is reading 16 bit");
1805 /* Default generation to zero (all workarounds apply) */
1806 pdata
->generation
= 0;
1808 pdata
->idrev
= smsc911x_reg_read(pdata
, ID_REV
);
1809 switch (pdata
->idrev
& 0xFFFF0000) {
1814 /* LAN911[5678] family */
1815 pdata
->generation
= pdata
->idrev
& 0x0000FFFF;
1822 /* LAN921[5678] family */
1823 pdata
->generation
= 3;
1830 /* LAN9210/LAN9211/LAN9220/LAN9221 */
1831 pdata
->generation
= 4;
1835 SMSC_WARNING(PROBE
, "LAN911x not identified, idrev: 0x%08X",
1840 SMSC_TRACE(PROBE
, "LAN911x identified, idrev: 0x%08X, generation: %d",
1841 pdata
->idrev
, pdata
->generation
);
1843 if (pdata
->generation
== 0)
1845 "This driver is not intended for this chip revision");
1847 /* workaround for platforms without an eeprom, where the mac address
1848 * is stored elsewhere and set by the bootloader. This saves the
1849 * mac address before resetting the device */
1850 if (pdata
->config
.flags
& SMSC911X_SAVE_MAC_ADDRESS
)
1851 smsc911x_read_mac_address(dev
);
1853 /* Reset the LAN911x */
1854 if (smsc911x_soft_reset(pdata
))
1857 /* Disable all interrupt sources until we bring the device up */
1858 smsc911x_reg_write(pdata
, INT_EN
, 0);
1861 dev
->flags
|= IFF_MULTICAST
;
1862 netif_napi_add(dev
, &pdata
->napi
, smsc911x_poll
, SMSC_NAPI_WEIGHT
);
1863 dev
->netdev_ops
= &smsc911x_netdev_ops
;
1864 dev
->ethtool_ops
= &smsc911x_ethtool_ops
;
1869 static int __devexit
smsc911x_drv_remove(struct platform_device
*pdev
)
1871 struct net_device
*dev
;
1872 struct smsc911x_data
*pdata
;
1873 struct resource
*res
;
1875 dev
= platform_get_drvdata(pdev
);
1877 pdata
= netdev_priv(dev
);
1879 BUG_ON(!pdata
->ioaddr
);
1880 BUG_ON(!pdata
->phy_dev
);
1882 SMSC_TRACE(IFDOWN
, "Stopping driver.");
1884 phy_disconnect(pdata
->phy_dev
);
1885 pdata
->phy_dev
= NULL
;
1886 mdiobus_unregister(pdata
->mii_bus
);
1887 mdiobus_free(pdata
->mii_bus
);
1889 platform_set_drvdata(pdev
, NULL
);
1890 unregister_netdev(dev
);
1891 free_irq(dev
->irq
, dev
);
1892 res
= platform_get_resource_byname(pdev
, IORESOURCE_MEM
,
1895 res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
1897 release_mem_region(res
->start
, res
->end
- res
->start
);
1899 iounmap(pdata
->ioaddr
);
1906 static int __devinit
smsc911x_drv_probe(struct platform_device
*pdev
)
1908 struct net_device
*dev
;
1909 struct smsc911x_data
*pdata
;
1910 struct smsc911x_platform_config
*config
= pdev
->dev
.platform_data
;
1911 struct resource
*res
, *irq_res
;
1912 unsigned int intcfg
= 0;
1913 int res_size
, irq_flags
;
1915 DECLARE_MAC_BUF(mac
);
1917 pr_info("%s: Driver version %s.\n", SMSC_CHIPNAME
, SMSC_DRV_VERSION
);
1919 /* platform data specifies irq & dynamic bus configuration */
1920 if (!pdev
->dev
.platform_data
) {
1921 pr_warning("%s: platform_data not provided\n", SMSC_CHIPNAME
);
1926 res
= platform_get_resource_byname(pdev
, IORESOURCE_MEM
,
1929 res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
1931 pr_warning("%s: Could not allocate resource.\n",
1936 res_size
= res
->end
- res
->start
;
1938 irq_res
= platform_get_resource(pdev
, IORESOURCE_IRQ
, 0);
1940 pr_warning("%s: Could not allocate irq resource.\n",
1946 if (!request_mem_region(res
->start
, res_size
, SMSC_CHIPNAME
)) {
1951 dev
= alloc_etherdev(sizeof(struct smsc911x_data
));
1953 pr_warning("%s: Could not allocate device.\n", SMSC_CHIPNAME
);
1955 goto out_release_io_1
;
1958 SET_NETDEV_DEV(dev
, &pdev
->dev
);
1960 pdata
= netdev_priv(dev
);
1962 dev
->irq
= irq_res
->start
;
1963 irq_flags
= irq_res
->flags
& IRQF_TRIGGER_MASK
;
1964 pdata
->ioaddr
= ioremap_nocache(res
->start
, res_size
);
1966 /* copy config parameters across to pdata */
1967 memcpy(&pdata
->config
, config
, sizeof(pdata
->config
));
1970 pdata
->msg_enable
= ((1 << debug
) - 1);
1972 if (pdata
->ioaddr
== NULL
) {
1974 "Error smsc911x base address invalid");
1976 goto out_free_netdev_2
;
1979 retval
= smsc911x_init(dev
);
1981 goto out_unmap_io_3
;
1983 /* configure irq polarity and type before connecting isr */
1984 if (pdata
->config
.irq_polarity
== SMSC911X_IRQ_POLARITY_ACTIVE_HIGH
)
1985 intcfg
|= INT_CFG_IRQ_POL_
;
1987 if (pdata
->config
.irq_type
== SMSC911X_IRQ_TYPE_PUSH_PULL
)
1988 intcfg
|= INT_CFG_IRQ_TYPE_
;
1990 smsc911x_reg_write(pdata
, INT_CFG
, intcfg
);
1992 /* Ensure interrupts are globally disabled before connecting ISR */
1993 smsc911x_reg_write(pdata
, INT_EN
, 0);
1994 smsc911x_reg_write(pdata
, INT_STS
, 0xFFFFFFFF);
1996 retval
= request_irq(dev
->irq
, smsc911x_irqhandler
,
1997 irq_flags
| IRQF_SHARED
, dev
->name
, dev
);
2000 "Unable to claim requested irq: %d", dev
->irq
);
2001 goto out_unmap_io_3
;
2004 platform_set_drvdata(pdev
, dev
);
2006 retval
= register_netdev(dev
);
2009 "Error %i registering device", retval
);
2010 goto out_unset_drvdata_4
;
2012 SMSC_TRACE(PROBE
, "Network interface: \"%s\"", dev
->name
);
2015 spin_lock_init(&pdata
->mac_lock
);
2017 retval
= smsc911x_mii_init(pdev
, dev
);
2020 "Error %i initialising mii", retval
);
2021 goto out_unregister_netdev_5
;
2024 spin_lock_irq(&pdata
->mac_lock
);
2026 /* Check if mac address has been specified when bringing interface up */
2027 if (is_valid_ether_addr(dev
->dev_addr
)) {
2028 smsc911x_set_mac_address(pdata
, dev
->dev_addr
);
2029 SMSC_TRACE(PROBE
, "MAC Address is specified by configuration");
2031 /* Try reading mac address from device. if EEPROM is present
2032 * it will already have been set */
2033 smsc911x_read_mac_address(dev
);
2035 if (is_valid_ether_addr(dev
->dev_addr
)) {
2036 /* eeprom values are valid so use them */
2038 "Mac Address is read from LAN911x EEPROM");
2040 /* eeprom values are invalid, generate random MAC */
2041 random_ether_addr(dev
->dev_addr
);
2042 smsc911x_set_mac_address(pdata
, dev
->dev_addr
);
2044 "MAC Address is set to random_ether_addr");
2048 spin_unlock_irq(&pdata
->mac_lock
);
2050 dev_info(&dev
->dev
, "MAC Address: %s\n",
2051 print_mac(mac
, dev
->dev_addr
));
2055 out_unregister_netdev_5
:
2056 unregister_netdev(dev
);
2057 out_unset_drvdata_4
:
2058 platform_set_drvdata(pdev
, NULL
);
2059 free_irq(dev
->irq
, dev
);
2061 iounmap(pdata
->ioaddr
);
2065 release_mem_region(res
->start
, res
->end
- res
->start
);
2070 static struct platform_driver smsc911x_driver
= {
2071 .probe
= smsc911x_drv_probe
,
2072 .remove
= smsc911x_drv_remove
,
2074 .name
= SMSC_CHIPNAME
,
2078 /* Entry point for loading the module */
2079 static int __init
smsc911x_init_module(void)
2081 return platform_driver_register(&smsc911x_driver
);
2084 /* entry point for unloading the module */
2085 static void __exit
smsc911x_cleanup_module(void)
2087 platform_driver_unregister(&smsc911x_driver
);
2090 module_init(smsc911x_init_module
);
2091 module_exit(smsc911x_cleanup_module
);