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net/core: Remove unnecessary casts of private_data
[linux-2.6/x86.git] / drivers / s390 / net / qeth_core_main.c
blobb7019066c303af489d9cd4cfe52dcb50976b9dd4
1 /*
2 * drivers/s390/net/qeth_core_main.c
3 *
4 * Copyright IBM Corp. 2007, 2009
5 * Author(s): Utz Bacher <utz.bacher@de.ibm.com>,
6 * Frank Pavlic <fpavlic@de.ibm.com>,
7 * Thomas Spatzier <tspat@de.ibm.com>,
8 * Frank Blaschka <frank.blaschka@de.ibm.com>
9 */
10
11 #define KMSG_COMPONENT "qeth"
12 #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
13
14 #include <linux/module.h>
15 #include <linux/moduleparam.h>
16 #include <linux/string.h>
17 #include <linux/errno.h>
18 #include <linux/kernel.h>
19 #include <linux/ip.h>
20 #include <linux/tcp.h>
21 #include <linux/mii.h>
22 #include <linux/kthread.h>
23 #include <linux/slab.h>
24
25 #include <asm/ebcdic.h>
26 #include <asm/io.h>
27
28 #include "qeth_core.h"
29
30 struct qeth_dbf_info qeth_dbf[QETH_DBF_INFOS] = {
31 /* define dbf - Name, Pages, Areas, Maxlen, Level, View, Handle */
32 /* N P A M L V H */
33 [QETH_DBF_SETUP] = {"qeth_setup",
34 8, 1, 8, 5, &debug_hex_ascii_view, NULL},
35 [QETH_DBF_MSG] = {"qeth_msg",
36 8, 1, 128, 3, &debug_sprintf_view, NULL},
37 [QETH_DBF_CTRL] = {"qeth_control",
38 8, 1, QETH_DBF_CTRL_LEN, 5, &debug_hex_ascii_view, NULL},
39 };
40 EXPORT_SYMBOL_GPL(qeth_dbf);
41
42 struct qeth_card_list_struct qeth_core_card_list;
43 EXPORT_SYMBOL_GPL(qeth_core_card_list);
44 struct kmem_cache *qeth_core_header_cache;
45 EXPORT_SYMBOL_GPL(qeth_core_header_cache);
46
47 static struct device *qeth_core_root_dev;
48 static unsigned int known_devices[][6] = QETH_MODELLIST_ARRAY;
49 static struct lock_class_key qdio_out_skb_queue_key;
50
51 static void qeth_send_control_data_cb(struct qeth_channel *,
52 struct qeth_cmd_buffer *);
53 static int qeth_issue_next_read(struct qeth_card *);
54 static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *);
55 static void qeth_setup_ccw(struct qeth_channel *, unsigned char *, __u32);
56 static void qeth_free_buffer_pool(struct qeth_card *);
57 static int qeth_qdio_establish(struct qeth_card *);
58
59
60 static inline const char *qeth_get_cardname(struct qeth_card *card)
61 {
62 if (card->info.guestlan) {
63 switch (card->info.type) {
64 case QETH_CARD_TYPE_OSD:
65 return " Guest LAN QDIO";
66 case QETH_CARD_TYPE_IQD:
67 return " Guest LAN Hiper";
68 case QETH_CARD_TYPE_OSM:
69 return " Guest LAN QDIO - OSM";
70 case QETH_CARD_TYPE_OSX:
71 return " Guest LAN QDIO - OSX";
72 default:
73 return " unknown";
74 }
75 } else {
76 switch (card->info.type) {
77 case QETH_CARD_TYPE_OSD:
78 return " OSD Express";
79 case QETH_CARD_TYPE_IQD:
80 return " HiperSockets";
81 case QETH_CARD_TYPE_OSN:
82 return " OSN QDIO";
83 case QETH_CARD_TYPE_OSM:
84 return " OSM QDIO";
85 case QETH_CARD_TYPE_OSX:
86 return " OSX QDIO";
87 default:
88 return " unknown";
89 }
90 }
91 return " n/a";
92 }
93
94 /* max length to be returned: 14 */
95 const char *qeth_get_cardname_short(struct qeth_card *card)
96 {
97 if (card->info.guestlan) {
98 switch (card->info.type) {
99 case QETH_CARD_TYPE_OSD:
100 return "GuestLAN QDIO";
101 case QETH_CARD_TYPE_IQD:
102 return "GuestLAN Hiper";
103 case QETH_CARD_TYPE_OSM:
104 return "GuestLAN OSM";
105 case QETH_CARD_TYPE_OSX:
106 return "GuestLAN OSX";
107 default:
108 return "unknown";
109 }
110 } else {
111 switch (card->info.type) {
112 case QETH_CARD_TYPE_OSD:
113 switch (card->info.link_type) {
114 case QETH_LINK_TYPE_FAST_ETH:
115 return "OSD_100";
116 case QETH_LINK_TYPE_HSTR:
117 return "HSTR";
118 case QETH_LINK_TYPE_GBIT_ETH:
119 return "OSD_1000";
120 case QETH_LINK_TYPE_10GBIT_ETH:
121 return "OSD_10GIG";
122 case QETH_LINK_TYPE_LANE_ETH100:
123 return "OSD_FE_LANE";
124 case QETH_LINK_TYPE_LANE_TR:
125 return "OSD_TR_LANE";
126 case QETH_LINK_TYPE_LANE_ETH1000:
127 return "OSD_GbE_LANE";
128 case QETH_LINK_TYPE_LANE:
129 return "OSD_ATM_LANE";
130 default:
131 return "OSD_Express";
132 }
133 case QETH_CARD_TYPE_IQD:
134 return "HiperSockets";
135 case QETH_CARD_TYPE_OSN:
136 return "OSN";
137 case QETH_CARD_TYPE_OSM:
138 return "OSM_1000";
139 case QETH_CARD_TYPE_OSX:
140 return "OSX_10GIG";
141 default:
142 return "unknown";
143 }
144 }
145 return "n/a";
146 }
147
148 void qeth_set_allowed_threads(struct qeth_card *card, unsigned long threads,
149 int clear_start_mask)
150 {
151 unsigned long flags;
152
153 spin_lock_irqsave(&card->thread_mask_lock, flags);
154 card->thread_allowed_mask = threads;
155 if (clear_start_mask)
156 card->thread_start_mask &= threads;
157 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
158 wake_up(&card->wait_q);
159 }
160 EXPORT_SYMBOL_GPL(qeth_set_allowed_threads);
161
162 int qeth_threads_running(struct qeth_card *card, unsigned long threads)
163 {
164 unsigned long flags;
165 int rc = 0;
166
167 spin_lock_irqsave(&card->thread_mask_lock, flags);
168 rc = (card->thread_running_mask & threads);
169 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
170 return rc;
171 }
172 EXPORT_SYMBOL_GPL(qeth_threads_running);
173
174 int qeth_wait_for_threads(struct qeth_card *card, unsigned long threads)
175 {
176 return wait_event_interruptible(card->wait_q,
177 qeth_threads_running(card, threads) == 0);
178 }
179 EXPORT_SYMBOL_GPL(qeth_wait_for_threads);
180
181 void qeth_clear_working_pool_list(struct qeth_card *card)
182 {
183 struct qeth_buffer_pool_entry *pool_entry, *tmp;
184
185 QETH_CARD_TEXT(card, 5, "clwrklst");
186 list_for_each_entry_safe(pool_entry, tmp,
187 &card->qdio.in_buf_pool.entry_list, list){
188 list_del(&pool_entry->list);
189 }
190 }
191 EXPORT_SYMBOL_GPL(qeth_clear_working_pool_list);
192
193 static int qeth_alloc_buffer_pool(struct qeth_card *card)
194 {
195 struct qeth_buffer_pool_entry *pool_entry;
196 void *ptr;
197 int i, j;
198
199 QETH_CARD_TEXT(card, 5, "alocpool");
200 for (i = 0; i < card->qdio.init_pool.buf_count; ++i) {
201 pool_entry = kmalloc(sizeof(*pool_entry), GFP_KERNEL);
202 if (!pool_entry) {
203 qeth_free_buffer_pool(card);
204 return -ENOMEM;
205 }
206 for (j = 0; j < QETH_MAX_BUFFER_ELEMENTS(card); ++j) {
207 ptr = (void *) __get_free_page(GFP_KERNEL);
208 if (!ptr) {
209 while (j > 0)
210 free_page((unsigned long)
211 pool_entry->elements[--j]);
212 kfree(pool_entry);
213 qeth_free_buffer_pool(card);
214 return -ENOMEM;
215 }
216 pool_entry->elements[j] = ptr;
217 }
218 list_add(&pool_entry->init_list,
219 &card->qdio.init_pool.entry_list);
220 }
221 return 0;
222 }
223
224 int qeth_realloc_buffer_pool(struct qeth_card *card, int bufcnt)
225 {
226 QETH_CARD_TEXT(card, 2, "realcbp");
227
228 if ((card->state != CARD_STATE_DOWN) &&
229 (card->state != CARD_STATE_RECOVER))
230 return -EPERM;
231
232 /* TODO: steel/add buffers from/to a running card's buffer pool (?) */
233 qeth_clear_working_pool_list(card);
234 qeth_free_buffer_pool(card);
235 card->qdio.in_buf_pool.buf_count = bufcnt;
236 card->qdio.init_pool.buf_count = bufcnt;
237 return qeth_alloc_buffer_pool(card);
238 }
239 EXPORT_SYMBOL_GPL(qeth_realloc_buffer_pool);
240
241 static int qeth_issue_next_read(struct qeth_card *card)
242 {
243 int rc;
244 struct qeth_cmd_buffer *iob;
245
246 QETH_CARD_TEXT(card, 5, "issnxrd");
247 if (card->read.state != CH_STATE_UP)
248 return -EIO;
249 iob = qeth_get_buffer(&card->read);
250 if (!iob) {
251 dev_warn(&card->gdev->dev, "The qeth device driver "
252 "failed to recover an error on the device\n");
253 QETH_DBF_MESSAGE(2, "%s issue_next_read failed: no iob "
254 "available\n", dev_name(&card->gdev->dev));
255 return -ENOMEM;
256 }
257 qeth_setup_ccw(&card->read, iob->data, QETH_BUFSIZE);
258 QETH_CARD_TEXT(card, 6, "noirqpnd");
259 rc = ccw_device_start(card->read.ccwdev, &card->read.ccw,
260 (addr_t) iob, 0, 0);
261 if (rc) {
262 QETH_DBF_MESSAGE(2, "%s error in starting next read ccw! "
263 "rc=%i\n", dev_name(&card->gdev->dev), rc);
264 atomic_set(&card->read.irq_pending, 0);
265 qeth_schedule_recovery(card);
266 wake_up(&card->wait_q);
267 }
268 return rc;
269 }
270
271 static struct qeth_reply *qeth_alloc_reply(struct qeth_card *card)
272 {
273 struct qeth_reply *reply;
274
275 reply = kzalloc(sizeof(struct qeth_reply), GFP_ATOMIC);
276 if (reply) {
277 atomic_set(&reply->refcnt, 1);
278 atomic_set(&reply->received, 0);
279 reply->card = card;
280 };
281 return reply;
282 }
283
284 static void qeth_get_reply(struct qeth_reply *reply)
285 {
286 WARN_ON(atomic_read(&reply->refcnt) <= 0);
287 atomic_inc(&reply->refcnt);
288 }
289
290 static void qeth_put_reply(struct qeth_reply *reply)
291 {
292 WARN_ON(atomic_read(&reply->refcnt) <= 0);
293 if (atomic_dec_and_test(&reply->refcnt))
294 kfree(reply);
295 }
296
297 static void qeth_issue_ipa_msg(struct qeth_ipa_cmd *cmd, int rc,
298 struct qeth_card *card)
299 {
300 char *ipa_name;
301 int com = cmd->hdr.command;
302 ipa_name = qeth_get_ipa_cmd_name(com);
303 if (rc)
304 QETH_DBF_MESSAGE(2, "IPA: %s(x%X) for %s returned x%X \"%s\"\n",
305 ipa_name, com, QETH_CARD_IFNAME(card),
306 rc, qeth_get_ipa_msg(rc));
307 else
308 QETH_DBF_MESSAGE(5, "IPA: %s(x%X) for %s succeeded\n",
309 ipa_name, com, QETH_CARD_IFNAME(card));
310 }
311
312 static struct qeth_ipa_cmd *qeth_check_ipa_data(struct qeth_card *card,
313 struct qeth_cmd_buffer *iob)
314 {
315 struct qeth_ipa_cmd *cmd = NULL;
316
317 QETH_CARD_TEXT(card, 5, "chkipad");
318 if (IS_IPA(iob->data)) {
319 cmd = (struct qeth_ipa_cmd *) PDU_ENCAPSULATION(iob->data);
320 if (IS_IPA_REPLY(cmd)) {
321 if (cmd->hdr.command != IPA_CMD_SETCCID &&
322 cmd->hdr.command != IPA_CMD_DELCCID &&
323 cmd->hdr.command != IPA_CMD_MODCCID &&
324 cmd->hdr.command != IPA_CMD_SET_DIAG_ASS)
325 qeth_issue_ipa_msg(cmd,
326 cmd->hdr.return_code, card);
327 return cmd;
328 } else {
329 switch (cmd->hdr.command) {
330 case IPA_CMD_STOPLAN:
331 dev_warn(&card->gdev->dev,
332 "The link for interface %s on CHPID"
333 " 0x%X failed\n",
334 QETH_CARD_IFNAME(card),
335 card->info.chpid);
336 card->lan_online = 0;
337 if (card->dev && netif_carrier_ok(card->dev))
338 netif_carrier_off(card->dev);
339 return NULL;
340 case IPA_CMD_STARTLAN:
341 dev_info(&card->gdev->dev,
342 "The link for %s on CHPID 0x%X has"
343 " been restored\n",
344 QETH_CARD_IFNAME(card),
345 card->info.chpid);
346 netif_carrier_on(card->dev);
347 card->lan_online = 1;
348 qeth_schedule_recovery(card);
349 return NULL;
350 case IPA_CMD_MODCCID:
351 return cmd;
352 case IPA_CMD_REGISTER_LOCAL_ADDR:
353 QETH_CARD_TEXT(card, 3, "irla");
354 break;
355 case IPA_CMD_UNREGISTER_LOCAL_ADDR:
356 QETH_CARD_TEXT(card, 3, "urla");
357 break;
358 default:
359 QETH_DBF_MESSAGE(2, "Received data is IPA "
360 "but not a reply!\n");
361 break;
362 }
363 }
364 }
365 return cmd;
366 }
367
368 void qeth_clear_ipacmd_list(struct qeth_card *card)
369 {
370 struct qeth_reply *reply, *r;
371 unsigned long flags;
372
373 QETH_CARD_TEXT(card, 4, "clipalst");
374
375 spin_lock_irqsave(&card->lock, flags);
376 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
377 qeth_get_reply(reply);
378 reply->rc = -EIO;
379 atomic_inc(&reply->received);
380 list_del_init(&reply->list);
381 wake_up(&reply->wait_q);
382 qeth_put_reply(reply);
383 }
384 spin_unlock_irqrestore(&card->lock, flags);
385 }
386 EXPORT_SYMBOL_GPL(qeth_clear_ipacmd_list);
387
388 static int qeth_check_idx_response(struct qeth_card *card,
389 unsigned char *buffer)
390 {
391 if (!buffer)
392 return 0;
393
394 QETH_DBF_HEX(CTRL, 2, buffer, QETH_DBF_CTRL_LEN);
395 if ((buffer[2] & 0xc0) == 0xc0) {
396 QETH_DBF_MESSAGE(2, "received an IDX TERMINATE "
397 "with cause code 0x%02x%s\n",
398 buffer[4],
399 ((buffer[4] == 0x22) ?
400 " -- try another portname" : ""));
401 QETH_CARD_TEXT(card, 2, "ckidxres");
402 QETH_CARD_TEXT(card, 2, " idxterm");
403 QETH_CARD_TEXT_(card, 2, " rc%d", -EIO);
404 if (buffer[4] == 0xf6) {
405 dev_err(&card->gdev->dev,
406 "The qeth device is not configured "
407 "for the OSI layer required by z/VM\n");
408 return -EPERM;
409 }
410 return -EIO;
411 }
412 return 0;
413 }
414
415 static void qeth_setup_ccw(struct qeth_channel *channel, unsigned char *iob,
416 __u32 len)
417 {
418 struct qeth_card *card;
419
420 card = CARD_FROM_CDEV(channel->ccwdev);
421 QETH_CARD_TEXT(card, 4, "setupccw");
422 if (channel == &card->read)
423 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
424 else
425 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
426 channel->ccw.count = len;
427 channel->ccw.cda = (__u32) __pa(iob);
428 }
429
430 static struct qeth_cmd_buffer *__qeth_get_buffer(struct qeth_channel *channel)
431 {
432 __u8 index;
433
434 QETH_CARD_TEXT(CARD_FROM_CDEV(channel->ccwdev), 6, "getbuff");
435 index = channel->io_buf_no;
436 do {
437 if (channel->iob[index].state == BUF_STATE_FREE) {
438 channel->iob[index].state = BUF_STATE_LOCKED;
439 channel->io_buf_no = (channel->io_buf_no + 1) %
440 QETH_CMD_BUFFER_NO;
441 memset(channel->iob[index].data, 0, QETH_BUFSIZE);
442 return channel->iob + index;
443 }
444 index = (index + 1) % QETH_CMD_BUFFER_NO;
445 } while (index != channel->io_buf_no);
446
447 return NULL;
448 }
449
450 void qeth_release_buffer(struct qeth_channel *channel,
451 struct qeth_cmd_buffer *iob)
452 {
453 unsigned long flags;
454
455 QETH_CARD_TEXT(CARD_FROM_CDEV(channel->ccwdev), 6, "relbuff");
456 spin_lock_irqsave(&channel->iob_lock, flags);
457 memset(iob->data, 0, QETH_BUFSIZE);
458 iob->state = BUF_STATE_FREE;
459 iob->callback = qeth_send_control_data_cb;
460 iob->rc = 0;
461 spin_unlock_irqrestore(&channel->iob_lock, flags);
462 }
463 EXPORT_SYMBOL_GPL(qeth_release_buffer);
464
465 static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *channel)
466 {
467 struct qeth_cmd_buffer *buffer = NULL;
468 unsigned long flags;
469
470 spin_lock_irqsave(&channel->iob_lock, flags);
471 buffer = __qeth_get_buffer(channel);
472 spin_unlock_irqrestore(&channel->iob_lock, flags);
473 return buffer;
474 }
475
476 struct qeth_cmd_buffer *qeth_wait_for_buffer(struct qeth_channel *channel)
477 {
478 struct qeth_cmd_buffer *buffer;
479 wait_event(channel->wait_q,
480 ((buffer = qeth_get_buffer(channel)) != NULL));
481 return buffer;
482 }
483 EXPORT_SYMBOL_GPL(qeth_wait_for_buffer);
484
485 void qeth_clear_cmd_buffers(struct qeth_channel *channel)
486 {
487 int cnt;
488
489 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
490 qeth_release_buffer(channel, &channel->iob[cnt]);
491 channel->buf_no = 0;
492 channel->io_buf_no = 0;
493 }
494 EXPORT_SYMBOL_GPL(qeth_clear_cmd_buffers);
495
496 static void qeth_send_control_data_cb(struct qeth_channel *channel,
497 struct qeth_cmd_buffer *iob)
498 {
499 struct qeth_card *card;
500 struct qeth_reply *reply, *r;
501 struct qeth_ipa_cmd *cmd;
502 unsigned long flags;
503 int keep_reply;
504 int rc = 0;
505
506 card = CARD_FROM_CDEV(channel->ccwdev);
507 QETH_CARD_TEXT(card, 4, "sndctlcb");
508 rc = qeth_check_idx_response(card, iob->data);
509 switch (rc) {
510 case 0:
511 break;
512 case -EIO:
513 qeth_clear_ipacmd_list(card);
514 qeth_schedule_recovery(card);
515 /* fall through */
516 default:
517 goto out;
518 }
519
520 cmd = qeth_check_ipa_data(card, iob);
521 if ((cmd == NULL) && (card->state != CARD_STATE_DOWN))
522 goto out;
523 /*in case of OSN : check if cmd is set */
524 if (card->info.type == QETH_CARD_TYPE_OSN &&
525 cmd &&
526 cmd->hdr.command != IPA_CMD_STARTLAN &&
527 card->osn_info.assist_cb != NULL) {
528 card->osn_info.assist_cb(card->dev, cmd);
529 goto out;
530 }
531
532 spin_lock_irqsave(&card->lock, flags);
533 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
534 if ((reply->seqno == QETH_IDX_COMMAND_SEQNO) ||
535 ((cmd) && (reply->seqno == cmd->hdr.seqno))) {
536 qeth_get_reply(reply);
537 list_del_init(&reply->list);
538 spin_unlock_irqrestore(&card->lock, flags);
539 keep_reply = 0;
540 if (reply->callback != NULL) {
541 if (cmd) {
542 reply->offset = (__u16)((char *)cmd -
543 (char *)iob->data);
544 keep_reply = reply->callback(card,
545 reply,
546 (unsigned long)cmd);
547 } else
548 keep_reply = reply->callback(card,
549 reply,
550 (unsigned long)iob);
551 }
552 if (cmd)
553 reply->rc = (u16) cmd->hdr.return_code;
554 else if (iob->rc)
555 reply->rc = iob->rc;
556 if (keep_reply) {
557 spin_lock_irqsave(&card->lock, flags);
558 list_add_tail(&reply->list,
559 &card->cmd_waiter_list);
560 spin_unlock_irqrestore(&card->lock, flags);
561 } else {
562 atomic_inc(&reply->received);
563 wake_up(&reply->wait_q);
564 }
565 qeth_put_reply(reply);
566 goto out;
567 }
568 }
569 spin_unlock_irqrestore(&card->lock, flags);
570 out:
571 memcpy(&card->seqno.pdu_hdr_ack,
572 QETH_PDU_HEADER_SEQ_NO(iob->data),
573 QETH_SEQ_NO_LENGTH);
574 qeth_release_buffer(channel, iob);
575 }
576
577 static int qeth_setup_channel(struct qeth_channel *channel)
578 {
579 int cnt;
580
581 QETH_DBF_TEXT(SETUP, 2, "setupch");
582 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) {
583 channel->iob[cnt].data =
584 kmalloc(QETH_BUFSIZE, GFP_DMA|GFP_KERNEL);
585 if (channel->iob[cnt].data == NULL)
586 break;
587 channel->iob[cnt].state = BUF_STATE_FREE;
588 channel->iob[cnt].channel = channel;
589 channel->iob[cnt].callback = qeth_send_control_data_cb;
590 channel->iob[cnt].rc = 0;
591 }
592 if (cnt < QETH_CMD_BUFFER_NO) {
593 while (cnt-- > 0)
594 kfree(channel->iob[cnt].data);
595 return -ENOMEM;
596 }
597 channel->buf_no = 0;
598 channel->io_buf_no = 0;
599 atomic_set(&channel->irq_pending, 0);
600 spin_lock_init(&channel->iob_lock);
601
602 init_waitqueue_head(&channel->wait_q);
603 return 0;
604 }
605
606 static int qeth_set_thread_start_bit(struct qeth_card *card,
607 unsigned long thread)
608 {
609 unsigned long flags;
610
611 spin_lock_irqsave(&card->thread_mask_lock, flags);
612 if (!(card->thread_allowed_mask & thread) ||
613 (card->thread_start_mask & thread)) {
614 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
615 return -EPERM;
616 }
617 card->thread_start_mask |= thread;
618 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
619 return 0;
620 }
621
622 void qeth_clear_thread_start_bit(struct qeth_card *card, unsigned long thread)
623 {
624 unsigned long flags;
625
626 spin_lock_irqsave(&card->thread_mask_lock, flags);
627 card->thread_start_mask &= ~thread;
628 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
629 wake_up(&card->wait_q);
630 }
631 EXPORT_SYMBOL_GPL(qeth_clear_thread_start_bit);
632
633 void qeth_clear_thread_running_bit(struct qeth_card *card, unsigned long thread)
634 {
635 unsigned long flags;
636
637 spin_lock_irqsave(&card->thread_mask_lock, flags);
638 card->thread_running_mask &= ~thread;
639 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
640 wake_up(&card->wait_q);
641 }
642 EXPORT_SYMBOL_GPL(qeth_clear_thread_running_bit);
643
644 static int __qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
645 {
646 unsigned long flags;
647 int rc = 0;
648
649 spin_lock_irqsave(&card->thread_mask_lock, flags);
650 if (card->thread_start_mask & thread) {
651 if ((card->thread_allowed_mask & thread) &&
652 !(card->thread_running_mask & thread)) {
653 rc = 1;
654 card->thread_start_mask &= ~thread;
655 card->thread_running_mask |= thread;
656 } else
657 rc = -EPERM;
658 }
659 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
660 return rc;
661 }
662
663 int qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
664 {
665 int rc = 0;
666
667 wait_event(card->wait_q,
668 (rc = __qeth_do_run_thread(card, thread)) >= 0);
669 return rc;
670 }
671 EXPORT_SYMBOL_GPL(qeth_do_run_thread);
672
673 void qeth_schedule_recovery(struct qeth_card *card)
674 {
675 QETH_CARD_TEXT(card, 2, "startrec");
676 if (qeth_set_thread_start_bit(card, QETH_RECOVER_THREAD) == 0)
677 schedule_work(&card->kernel_thread_starter);
678 }
679 EXPORT_SYMBOL_GPL(qeth_schedule_recovery);
680
681 static int qeth_get_problem(struct ccw_device *cdev, struct irb *irb)
682 {
683 int dstat, cstat;
684 char *sense;
685 struct qeth_card *card;
686
687 sense = (char *) irb->ecw;
688 cstat = irb->scsw.cmd.cstat;
689 dstat = irb->scsw.cmd.dstat;
690 card = CARD_FROM_CDEV(cdev);
691
692 if (cstat & (SCHN_STAT_CHN_CTRL_CHK | SCHN_STAT_INTF_CTRL_CHK |
693 SCHN_STAT_CHN_DATA_CHK | SCHN_STAT_CHAIN_CHECK |
694 SCHN_STAT_PROT_CHECK | SCHN_STAT_PROG_CHECK)) {
695 QETH_CARD_TEXT(card, 2, "CGENCHK");
696 dev_warn(&cdev->dev, "The qeth device driver "
697 "failed to recover an error on the device\n");
698 QETH_DBF_MESSAGE(2, "%s check on device dstat=x%x, cstat=x%x\n",
699 dev_name(&cdev->dev), dstat, cstat);
700 print_hex_dump(KERN_WARNING, "qeth: irb ", DUMP_PREFIX_OFFSET,
701 16, 1, irb, 64, 1);
702 return 1;
703 }
704
705 if (dstat & DEV_STAT_UNIT_CHECK) {
706 if (sense[SENSE_RESETTING_EVENT_BYTE] &
707 SENSE_RESETTING_EVENT_FLAG) {
708 QETH_CARD_TEXT(card, 2, "REVIND");
709 return 1;
710 }
711 if (sense[SENSE_COMMAND_REJECT_BYTE] &
712 SENSE_COMMAND_REJECT_FLAG) {
713 QETH_CARD_TEXT(card, 2, "CMDREJi");
714 return 1;
715 }
716 if ((sense[2] == 0xaf) && (sense[3] == 0xfe)) {
717 QETH_CARD_TEXT(card, 2, "AFFE");
718 return 1;
719 }
720 if ((!sense[0]) && (!sense[1]) && (!sense[2]) && (!sense[3])) {
721 QETH_CARD_TEXT(card, 2, "ZEROSEN");
722 return 0;
723 }
724 QETH_CARD_TEXT(card, 2, "DGENCHK");
725 return 1;
726 }
727 return 0;
728 }
729
730 static long __qeth_check_irb_error(struct ccw_device *cdev,
731 unsigned long intparm, struct irb *irb)
732 {
733 struct qeth_card *card;
734
735 card = CARD_FROM_CDEV(cdev);
736
737 if (!IS_ERR(irb))
738 return 0;
739
740 switch (PTR_ERR(irb)) {
741 case -EIO:
742 QETH_DBF_MESSAGE(2, "%s i/o-error on device\n",
743 dev_name(&cdev->dev));
744 QETH_CARD_TEXT(card, 2, "ckirberr");
745 QETH_CARD_TEXT_(card, 2, " rc%d", -EIO);
746 break;
747 case -ETIMEDOUT:
748 dev_warn(&cdev->dev, "A hardware operation timed out"
749 " on the device\n");
750 QETH_CARD_TEXT(card, 2, "ckirberr");
751 QETH_CARD_TEXT_(card, 2, " rc%d", -ETIMEDOUT);
752 if (intparm == QETH_RCD_PARM) {
753 if (card && (card->data.ccwdev == cdev)) {
754 card->data.state = CH_STATE_DOWN;
755 wake_up(&card->wait_q);
756 }
757 }
758 break;
759 default:
760 QETH_DBF_MESSAGE(2, "%s unknown error %ld on device\n",
761 dev_name(&cdev->dev), PTR_ERR(irb));
762 QETH_CARD_TEXT(card, 2, "ckirberr");
763 QETH_CARD_TEXT(card, 2, " rc???");
764 }
765 return PTR_ERR(irb);
766 }
767
768 static void qeth_irq(struct ccw_device *cdev, unsigned long intparm,
769 struct irb *irb)
770 {
771 int rc;
772 int cstat, dstat;
773 struct qeth_cmd_buffer *buffer;
774 struct qeth_channel *channel;
775 struct qeth_card *card;
776 struct qeth_cmd_buffer *iob;
777 __u8 index;
778
779 if (__qeth_check_irb_error(cdev, intparm, irb))
780 return;
781 cstat = irb->scsw.cmd.cstat;
782 dstat = irb->scsw.cmd.dstat;
783
784 card = CARD_FROM_CDEV(cdev);
785 if (!card)
786 return;
787
788 QETH_CARD_TEXT(card, 5, "irq");
789
790 if (card->read.ccwdev == cdev) {
791 channel = &card->read;
792 QETH_CARD_TEXT(card, 5, "read");
793 } else if (card->write.ccwdev == cdev) {
794 channel = &card->write;
795 QETH_CARD_TEXT(card, 5, "write");
796 } else {
797 channel = &card->data;
798 QETH_CARD_TEXT(card, 5, "data");
799 }
800 atomic_set(&channel->irq_pending, 0);
801
802 if (irb->scsw.cmd.fctl & (SCSW_FCTL_CLEAR_FUNC))
803 channel->state = CH_STATE_STOPPED;
804
805 if (irb->scsw.cmd.fctl & (SCSW_FCTL_HALT_FUNC))
806 channel->state = CH_STATE_HALTED;
807
808 /*let's wake up immediately on data channel*/
809 if ((channel == &card->data) && (intparm != 0) &&
810 (intparm != QETH_RCD_PARM))
811 goto out;
812
813 if (intparm == QETH_CLEAR_CHANNEL_PARM) {
814 QETH_CARD_TEXT(card, 6, "clrchpar");
815 /* we don't have to handle this further */
816 intparm = 0;
817 }
818 if (intparm == QETH_HALT_CHANNEL_PARM) {
819 QETH_CARD_TEXT(card, 6, "hltchpar");
820 /* we don't have to handle this further */
821 intparm = 0;
822 }
823 if ((dstat & DEV_STAT_UNIT_EXCEP) ||
824 (dstat & DEV_STAT_UNIT_CHECK) ||
825 (cstat)) {
826 if (irb->esw.esw0.erw.cons) {
827 dev_warn(&channel->ccwdev->dev,
828 "The qeth device driver failed to recover "
829 "an error on the device\n");
830 QETH_DBF_MESSAGE(2, "%s sense data available. cstat "
831 "0x%X dstat 0x%X\n",
832 dev_name(&channel->ccwdev->dev), cstat, dstat);
833 print_hex_dump(KERN_WARNING, "qeth: irb ",
834 DUMP_PREFIX_OFFSET, 16, 1, irb, 32, 1);
835 print_hex_dump(KERN_WARNING, "qeth: sense data ",
836 DUMP_PREFIX_OFFSET, 16, 1, irb->ecw, 32, 1);
837 }
838 if (intparm == QETH_RCD_PARM) {
839 channel->state = CH_STATE_DOWN;
840 goto out;
841 }
842 rc = qeth_get_problem(cdev, irb);
843 if (rc) {
844 qeth_clear_ipacmd_list(card);
845 qeth_schedule_recovery(card);
846 goto out;
847 }
848 }
849
850 if (intparm == QETH_RCD_PARM) {
851 channel->state = CH_STATE_RCD_DONE;
852 goto out;
853 }
854 if (intparm) {
855 buffer = (struct qeth_cmd_buffer *) __va((addr_t)intparm);
856 buffer->state = BUF_STATE_PROCESSED;
857 }
858 if (channel == &card->data)
859 return;
860 if (channel == &card->read &&
861 channel->state == CH_STATE_UP)
862 qeth_issue_next_read(card);
863
864 iob = channel->iob;
865 index = channel->buf_no;
866 while (iob[index].state == BUF_STATE_PROCESSED) {
867 if (iob[index].callback != NULL)
868 iob[index].callback(channel, iob + index);
869
870 index = (index + 1) % QETH_CMD_BUFFER_NO;
871 }
872 channel->buf_no = index;
873 out:
874 wake_up(&card->wait_q);
875 return;
876 }
877
878 static void __qeth_clear_output_buffer(struct qeth_qdio_out_q *queue,
879 struct qeth_qdio_out_buffer *buf, unsigned int qeth_skip_skb)
880 {
881 int i;
882 struct sk_buff *skb;
883
884 /* is PCI flag set on buffer? */
885 if (buf->buffer->element[0].flags & 0x40)
886 atomic_dec(&queue->set_pci_flags_count);
887
888 if (!qeth_skip_skb) {
889 skb = skb_dequeue(&buf->skb_list);
890 while (skb) {
891 atomic_dec(&skb->users);
892 dev_kfree_skb_any(skb);
893 skb = skb_dequeue(&buf->skb_list);
894 }
895 }
896 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(queue->card); ++i) {
897 if (buf->buffer->element[i].addr && buf->is_header[i])
898 kmem_cache_free(qeth_core_header_cache,
899 buf->buffer->element[i].addr);
900 buf->is_header[i] = 0;
901 buf->buffer->element[i].length = 0;
902 buf->buffer->element[i].addr = NULL;
903 buf->buffer->element[i].flags = 0;
904 }
905 buf->buffer->element[15].flags = 0;
906 buf->next_element_to_fill = 0;
907 atomic_set(&buf->state, QETH_QDIO_BUF_EMPTY);
908 }
909
910 static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue,
911 struct qeth_qdio_out_buffer *buf)
912 {
913 __qeth_clear_output_buffer(queue, buf, 0);
914 }
915
916 void qeth_clear_qdio_buffers(struct qeth_card *card)
917 {
918 int i, j;
919
920 QETH_CARD_TEXT(card, 2, "clearqdbf");
921 /* clear outbound buffers to free skbs */
922 for (i = 0; i < card->qdio.no_out_queues; ++i)
923 if (card->qdio.out_qs[i]) {
924 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j)
925 qeth_clear_output_buffer(card->qdio.out_qs[i],
926 &card->qdio.out_qs[i]->bufs[j]);
927 }
928 }
929 EXPORT_SYMBOL_GPL(qeth_clear_qdio_buffers);
930
931 static void qeth_free_buffer_pool(struct qeth_card *card)
932 {
933 struct qeth_buffer_pool_entry *pool_entry, *tmp;
934 int i = 0;
935 list_for_each_entry_safe(pool_entry, tmp,
936 &card->qdio.init_pool.entry_list, init_list){
937 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i)
938 free_page((unsigned long)pool_entry->elements[i]);
939 list_del(&pool_entry->init_list);
940 kfree(pool_entry);
941 }
942 }
943
944 static void qeth_free_qdio_buffers(struct qeth_card *card)
945 {
946 int i, j;
947
948 if (atomic_xchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED) ==
949 QETH_QDIO_UNINITIALIZED)
950 return;
951 kfree(card->qdio.in_q);
952 card->qdio.in_q = NULL;
953 /* inbound buffer pool */
954 qeth_free_buffer_pool(card);
955 /* free outbound qdio_qs */
956 if (card->qdio.out_qs) {
957 for (i = 0; i < card->qdio.no_out_queues; ++i) {
958 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j)
959 qeth_clear_output_buffer(card->qdio.out_qs[i],
960 &card->qdio.out_qs[i]->bufs[j]);
961 kfree(card->qdio.out_qs[i]);
962 }
963 kfree(card->qdio.out_qs);
964 card->qdio.out_qs = NULL;
965 }
966 }
967
968 static void qeth_clean_channel(struct qeth_channel *channel)
969 {
970 int cnt;
971
972 QETH_DBF_TEXT(SETUP, 2, "freech");
973 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
974 kfree(channel->iob[cnt].data);
975 }
976
977 static void qeth_get_channel_path_desc(struct qeth_card *card)
978 {
979 struct ccw_device *ccwdev;
980 struct channelPath_dsc {
981 u8 flags;
982 u8 lsn;
983 u8 desc;
984 u8 chpid;
985 u8 swla;
986 u8 zeroes;
987 u8 chla;
988 u8 chpp;
989 } *chp_dsc;
990
991 QETH_DBF_TEXT(SETUP, 2, "chp_desc");
992
993 ccwdev = card->data.ccwdev;
994 chp_dsc = (struct channelPath_dsc *)ccw_device_get_chp_desc(ccwdev, 0);
995 if (chp_dsc != NULL) {
996 /* CHPP field bit 6 == 1 -> single queue */
997 if ((chp_dsc->chpp & 0x02) == 0x02)
998 card->qdio.no_out_queues = 1;
999 card->info.func_level = 0x4100 + chp_dsc->desc;
1000 kfree(chp_dsc);
1001 }
1002 if (card->qdio.no_out_queues == 1) {
1003 card->qdio.default_out_queue = 0;
1004 dev_info(&card->gdev->dev,
1005 "Priority Queueing not supported\n");
1006 }
1007 QETH_DBF_TEXT_(SETUP, 2, "nr:%x", card->qdio.no_out_queues);
1008 QETH_DBF_TEXT_(SETUP, 2, "lvl:%02x", card->info.func_level);
1009 return;
1010 }
1011
1012 static void qeth_init_qdio_info(struct qeth_card *card)
1013 {
1014 QETH_DBF_TEXT(SETUP, 4, "intqdinf");
1015 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
1016 /* inbound */
1017 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
1018 card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_DEFAULT;
1019 card->qdio.in_buf_pool.buf_count = card->qdio.init_pool.buf_count;
1020 INIT_LIST_HEAD(&card->qdio.in_buf_pool.entry_list);
1021 INIT_LIST_HEAD(&card->qdio.init_pool.entry_list);
1022 }
1023
1024 static void qeth_set_intial_options(struct qeth_card *card)
1025 {
1026 card->options.route4.type = NO_ROUTER;
1027 card->options.route6.type = NO_ROUTER;
1028 card->options.checksum_type = QETH_CHECKSUM_DEFAULT;
1029 card->options.broadcast_mode = QETH_TR_BROADCAST_ALLRINGS;
1030 card->options.macaddr_mode = QETH_TR_MACADDR_NONCANONICAL;
1031 card->options.fake_broadcast = 0;
1032 card->options.add_hhlen = DEFAULT_ADD_HHLEN;
1033 card->options.performance_stats = 0;
1034 card->options.rx_sg_cb = QETH_RX_SG_CB;
1035 card->options.isolation = ISOLATION_MODE_NONE;
1036 }
1037
1038 static int qeth_do_start_thread(struct qeth_card *card, unsigned long thread)
1039 {
1040 unsigned long flags;
1041 int rc = 0;
1042
1043 spin_lock_irqsave(&card->thread_mask_lock, flags);
1044 QETH_CARD_TEXT_(card, 4, " %02x%02x%02x",
1045 (u8) card->thread_start_mask,
1046 (u8) card->thread_allowed_mask,
1047 (u8) card->thread_running_mask);
1048 rc = (card->thread_start_mask & thread);
1049 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
1050 return rc;
1051 }
1052
1053 static void qeth_start_kernel_thread(struct work_struct *work)
1054 {
1055 struct qeth_card *card = container_of(work, struct qeth_card,
1056 kernel_thread_starter);
1057 QETH_CARD_TEXT(card , 2, "strthrd");
1058
1059 if (card->read.state != CH_STATE_UP &&
1060 card->write.state != CH_STATE_UP)
1061 return;
1062 if (qeth_do_start_thread(card, QETH_RECOVER_THREAD))
1063 kthread_run(card->discipline.recover, (void *) card,
1064 "qeth_recover");
1065 }
1066
1067 static int qeth_setup_card(struct qeth_card *card)
1068 {
1069
1070 QETH_DBF_TEXT(SETUP, 2, "setupcrd");
1071 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
1072
1073 card->read.state = CH_STATE_DOWN;
1074 card->write.state = CH_STATE_DOWN;
1075 card->data.state = CH_STATE_DOWN;
1076 card->state = CARD_STATE_DOWN;
1077 card->lan_online = 0;
1078 card->use_hard_stop = 0;
1079 card->dev = NULL;
1080 spin_lock_init(&card->vlanlock);
1081 spin_lock_init(&card->mclock);
1082 card->vlangrp = NULL;
1083 spin_lock_init(&card->lock);
1084 spin_lock_init(&card->ip_lock);
1085 spin_lock_init(&card->thread_mask_lock);
1086 mutex_init(&card->conf_mutex);
1087 card->thread_start_mask = 0;
1088 card->thread_allowed_mask = 0;
1089 card->thread_running_mask = 0;
1090 INIT_WORK(&card->kernel_thread_starter, qeth_start_kernel_thread);
1091 INIT_LIST_HEAD(&card->ip_list);
1092 INIT_LIST_HEAD(card->ip_tbd_list);
1093 INIT_LIST_HEAD(&card->cmd_waiter_list);
1094 init_waitqueue_head(&card->wait_q);
1095 /* intial options */
1096 qeth_set_intial_options(card);
1097 /* IP address takeover */
1098 INIT_LIST_HEAD(&card->ipato.entries);
1099 card->ipato.enabled = 0;
1100 card->ipato.invert4 = 0;
1101 card->ipato.invert6 = 0;
1102 /* init QDIO stuff */
1103 qeth_init_qdio_info(card);
1104 return 0;
1105 }
1106
1107 static void qeth_core_sl_print(struct seq_file *m, struct service_level *slr)
1108 {
1109 struct qeth_card *card = container_of(slr, struct qeth_card,
1110 qeth_service_level);
1111 if (card->info.mcl_level[0])
1112 seq_printf(m, "qeth: %s firmware level %s\n",
1113 CARD_BUS_ID(card), card->info.mcl_level);
1114 }
1115
1116 static struct qeth_card *qeth_alloc_card(void)
1117 {
1118 struct qeth_card *card;
1119
1120 QETH_DBF_TEXT(SETUP, 2, "alloccrd");
1121 card = kzalloc(sizeof(struct qeth_card), GFP_DMA|GFP_KERNEL);
1122 if (!card)
1123 goto out;
1124 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
1125 card->ip_tbd_list = kmalloc(sizeof(struct list_head), GFP_KERNEL);
1126 if (!card->ip_tbd_list) {
1127 QETH_DBF_TEXT(SETUP, 0, "iptbdnom");
1128 goto out_card;
1129 }
1130 if (qeth_setup_channel(&card->read))
1131 goto out_ip;
1132 if (qeth_setup_channel(&card->write))
1133 goto out_channel;
1134 card->options.layer2 = -1;
1135 card->qeth_service_level.seq_print = qeth_core_sl_print;
1136 register_service_level(&card->qeth_service_level);
1137 return card;
1138
1139 out_channel:
1140 qeth_clean_channel(&card->read);
1141 out_ip:
1142 kfree(card->ip_tbd_list);
1143 out_card:
1144 kfree(card);
1145 out:
1146 return NULL;
1147 }
1148
1149 static int qeth_determine_card_type(struct qeth_card *card)
1150 {
1151 int i = 0;
1152
1153 QETH_DBF_TEXT(SETUP, 2, "detcdtyp");
1154
1155 card->qdio.do_prio_queueing = QETH_PRIOQ_DEFAULT;
1156 card->qdio.default_out_queue = QETH_DEFAULT_QUEUE;
1157 while (known_devices[i][QETH_DEV_MODEL_IND]) {
1158 if ((CARD_RDEV(card)->id.dev_type ==
1159 known_devices[i][QETH_DEV_TYPE_IND]) &&
1160 (CARD_RDEV(card)->id.dev_model ==
1161 known_devices[i][QETH_DEV_MODEL_IND])) {
1162 card->info.type = known_devices[i][QETH_DEV_MODEL_IND];
1163 card->qdio.no_out_queues =
1164 known_devices[i][QETH_QUEUE_NO_IND];
1165 card->info.is_multicast_different =
1166 known_devices[i][QETH_MULTICAST_IND];
1167 qeth_get_channel_path_desc(card);
1168 return 0;
1169 }
1170 i++;
1171 }
1172 card->info.type = QETH_CARD_TYPE_UNKNOWN;
1173 dev_err(&card->gdev->dev, "The adapter hardware is of an "
1174 "unknown type\n");
1175 return -ENOENT;
1176 }
1177
1178 static int qeth_clear_channel(struct qeth_channel *channel)
1179 {
1180 unsigned long flags;
1181 struct qeth_card *card;
1182 int rc;
1183
1184 card = CARD_FROM_CDEV(channel->ccwdev);
1185 QETH_CARD_TEXT(card, 3, "clearch");
1186 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1187 rc = ccw_device_clear(channel->ccwdev, QETH_CLEAR_CHANNEL_PARM);
1188 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1189
1190 if (rc)
1191 return rc;
1192 rc = wait_event_interruptible_timeout(card->wait_q,
1193 channel->state == CH_STATE_STOPPED, QETH_TIMEOUT);
1194 if (rc == -ERESTARTSYS)
1195 return rc;
1196 if (channel->state != CH_STATE_STOPPED)
1197 return -ETIME;
1198 channel->state = CH_STATE_DOWN;
1199 return 0;
1200 }
1201
1202 static int qeth_halt_channel(struct qeth_channel *channel)
1203 {
1204 unsigned long flags;
1205 struct qeth_card *card;
1206 int rc;
1207
1208 card = CARD_FROM_CDEV(channel->ccwdev);
1209 QETH_CARD_TEXT(card, 3, "haltch");
1210 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1211 rc = ccw_device_halt(channel->ccwdev, QETH_HALT_CHANNEL_PARM);
1212 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1213
1214 if (rc)
1215 return rc;
1216 rc = wait_event_interruptible_timeout(card->wait_q,
1217 channel->state == CH_STATE_HALTED, QETH_TIMEOUT);
1218 if (rc == -ERESTARTSYS)
1219 return rc;
1220 if (channel->state != CH_STATE_HALTED)
1221 return -ETIME;
1222 return 0;
1223 }
1224
1225 static int qeth_halt_channels(struct qeth_card *card)
1226 {
1227 int rc1 = 0, rc2 = 0, rc3 = 0;
1228
1229 QETH_CARD_TEXT(card, 3, "haltchs");
1230 rc1 = qeth_halt_channel(&card->read);
1231 rc2 = qeth_halt_channel(&card->write);
1232 rc3 = qeth_halt_channel(&card->data);
1233 if (rc1)
1234 return rc1;
1235 if (rc2)
1236 return rc2;
1237 return rc3;
1238 }
1239
1240 static int qeth_clear_channels(struct qeth_card *card)
1241 {
1242 int rc1 = 0, rc2 = 0, rc3 = 0;
1243
1244 QETH_CARD_TEXT(card, 3, "clearchs");
1245 rc1 = qeth_clear_channel(&card->read);
1246 rc2 = qeth_clear_channel(&card->write);
1247 rc3 = qeth_clear_channel(&card->data);
1248 if (rc1)
1249 return rc1;
1250 if (rc2)
1251 return rc2;
1252 return rc3;
1253 }
1254
1255 static int qeth_clear_halt_card(struct qeth_card *card, int halt)
1256 {
1257 int rc = 0;
1258
1259 QETH_CARD_TEXT(card, 3, "clhacrd");
1260
1261 if (halt)
1262 rc = qeth_halt_channels(card);
1263 if (rc)
1264 return rc;
1265 return qeth_clear_channels(card);
1266 }
1267
1268 int qeth_qdio_clear_card(struct qeth_card *card, int use_halt)
1269 {
1270 int rc = 0;
1271
1272 QETH_CARD_TEXT(card, 3, "qdioclr");
1273 switch (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ESTABLISHED,
1274 QETH_QDIO_CLEANING)) {
1275 case QETH_QDIO_ESTABLISHED:
1276 if (card->info.type == QETH_CARD_TYPE_IQD)
1277 rc = qdio_shutdown(CARD_DDEV(card),
1278 QDIO_FLAG_CLEANUP_USING_HALT);
1279 else
1280 rc = qdio_shutdown(CARD_DDEV(card),
1281 QDIO_FLAG_CLEANUP_USING_CLEAR);
1282 if (rc)
1283 QETH_CARD_TEXT_(card, 3, "1err%d", rc);
1284 qdio_free(CARD_DDEV(card));
1285 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
1286 break;
1287 case QETH_QDIO_CLEANING:
1288 return rc;
1289 default:
1290 break;
1291 }
1292 rc = qeth_clear_halt_card(card, use_halt);
1293 if (rc)
1294 QETH_CARD_TEXT_(card, 3, "2err%d", rc);
1295 card->state = CARD_STATE_DOWN;
1296 return rc;
1297 }
1298 EXPORT_SYMBOL_GPL(qeth_qdio_clear_card);
1299
1300 static int qeth_read_conf_data(struct qeth_card *card, void **buffer,
1301 int *length)
1302 {
1303 struct ciw *ciw;
1304 char *rcd_buf;
1305 int ret;
1306 struct qeth_channel *channel = &card->data;
1307 unsigned long flags;
1308
1309 /*
1310 * scan for RCD command in extended SenseID data
1311 */
1312 ciw = ccw_device_get_ciw(channel->ccwdev, CIW_TYPE_RCD);
1313 if (!ciw || ciw->cmd == 0)
1314 return -EOPNOTSUPP;
1315 rcd_buf = kzalloc(ciw->count, GFP_KERNEL | GFP_DMA);
1316 if (!rcd_buf)
1317 return -ENOMEM;
1318
1319 channel->ccw.cmd_code = ciw->cmd;
1320 channel->ccw.cda = (__u32) __pa(rcd_buf);
1321 channel->ccw.count = ciw->count;
1322 channel->ccw.flags = CCW_FLAG_SLI;
1323 channel->state = CH_STATE_RCD;
1324 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1325 ret = ccw_device_start_timeout(channel->ccwdev, &channel->ccw,
1326 QETH_RCD_PARM, LPM_ANYPATH, 0,
1327 QETH_RCD_TIMEOUT);
1328 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1329 if (!ret)
1330 wait_event(card->wait_q,
1331 (channel->state == CH_STATE_RCD_DONE ||
1332 channel->state == CH_STATE_DOWN));
1333 if (channel->state == CH_STATE_DOWN)
1334 ret = -EIO;
1335 else
1336 channel->state = CH_STATE_DOWN;
1337 if (ret) {
1338 kfree(rcd_buf);
1339 *buffer = NULL;
1340 *length = 0;
1341 } else {
1342 *length = ciw->count;
1343 *buffer = rcd_buf;
1344 }
1345 return ret;
1346 }
1347
1348 static void qeth_configure_unitaddr(struct qeth_card *card, char *prcd)
1349 {
1350 QETH_DBF_TEXT(SETUP, 2, "cfgunit");
1351 card->info.chpid = prcd[30];
1352 card->info.unit_addr2 = prcd[31];
1353 card->info.cula = prcd[63];
1354 card->info.guestlan = ((prcd[0x10] == _ascebc['V']) &&
1355 (prcd[0x11] == _ascebc['M']));
1356 }
1357
1358 static void qeth_configure_blkt_default(struct qeth_card *card, char *prcd)
1359 {
1360 QETH_DBF_TEXT(SETUP, 2, "cfgblkt");
1361
1362 if (prcd[74] == 0xF0 && prcd[75] == 0xF0 && prcd[76] == 0xF5) {
1363 card->info.blkt.time_total = 250;
1364 card->info.blkt.inter_packet = 5;
1365 card->info.blkt.inter_packet_jumbo = 15;
1366 } else {
1367 card->info.blkt.time_total = 0;
1368 card->info.blkt.inter_packet = 0;
1369 card->info.blkt.inter_packet_jumbo = 0;
1370 }
1371 }
1372
1373 static void qeth_init_tokens(struct qeth_card *card)
1374 {
1375 card->token.issuer_rm_w = 0x00010103UL;
1376 card->token.cm_filter_w = 0x00010108UL;
1377 card->token.cm_connection_w = 0x0001010aUL;
1378 card->token.ulp_filter_w = 0x0001010bUL;
1379 card->token.ulp_connection_w = 0x0001010dUL;
1380 }
1381
1382 static void qeth_init_func_level(struct qeth_card *card)
1383 {
1384 switch (card->info.type) {
1385 case QETH_CARD_TYPE_IQD:
1386 if (card->ipato.enabled)
1387 card->info.func_level =
1388 QETH_IDX_FUNC_LEVEL_IQD_ENA_IPAT;
1389 else
1390 card->info.func_level =
1391 QETH_IDX_FUNC_LEVEL_IQD_DIS_IPAT;
1392 break;
1393 case QETH_CARD_TYPE_OSD:
1394 case QETH_CARD_TYPE_OSN:
1395 card->info.func_level = QETH_IDX_FUNC_LEVEL_OSD;
1396 break;
1397 default:
1398 break;
1399 }
1400 }
1401
1402 static int qeth_idx_activate_get_answer(struct qeth_channel *channel,
1403 void (*idx_reply_cb)(struct qeth_channel *,
1404 struct qeth_cmd_buffer *))
1405 {
1406 struct qeth_cmd_buffer *iob;
1407 unsigned long flags;
1408 int rc;
1409 struct qeth_card *card;
1410
1411 QETH_DBF_TEXT(SETUP, 2, "idxanswr");
1412 card = CARD_FROM_CDEV(channel->ccwdev);
1413 iob = qeth_get_buffer(channel);
1414 iob->callback = idx_reply_cb;
1415 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
1416 channel->ccw.count = QETH_BUFSIZE;
1417 channel->ccw.cda = (__u32) __pa(iob->data);
1418
1419 wait_event(card->wait_q,
1420 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
1421 QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
1422 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1423 rc = ccw_device_start(channel->ccwdev,
1424 &channel->ccw, (addr_t) iob, 0, 0);
1425 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1426
1427 if (rc) {
1428 QETH_DBF_MESSAGE(2, "Error2 in activating channel rc=%d\n", rc);
1429 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
1430 atomic_set(&channel->irq_pending, 0);
1431 wake_up(&card->wait_q);
1432 return rc;
1433 }
1434 rc = wait_event_interruptible_timeout(card->wait_q,
1435 channel->state == CH_STATE_UP, QETH_TIMEOUT);
1436 if (rc == -ERESTARTSYS)
1437 return rc;
1438 if (channel->state != CH_STATE_UP) {
1439 rc = -ETIME;
1440 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
1441 qeth_clear_cmd_buffers(channel);
1442 } else
1443 rc = 0;
1444 return rc;
1445 }
1446
1447 static int qeth_idx_activate_channel(struct qeth_channel *channel,
1448 void (*idx_reply_cb)(struct qeth_channel *,
1449 struct qeth_cmd_buffer *))
1450 {
1451 struct qeth_card *card;
1452 struct qeth_cmd_buffer *iob;
1453 unsigned long flags;
1454 __u16 temp;
1455 __u8 tmp;
1456 int rc;
1457 struct ccw_dev_id temp_devid;
1458
1459 card = CARD_FROM_CDEV(channel->ccwdev);
1460
1461 QETH_DBF_TEXT(SETUP, 2, "idxactch");
1462
1463 iob = qeth_get_buffer(channel);
1464 iob->callback = idx_reply_cb;
1465 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
1466 channel->ccw.count = IDX_ACTIVATE_SIZE;
1467 channel->ccw.cda = (__u32) __pa(iob->data);
1468 if (channel == &card->write) {
1469 memcpy(iob->data, IDX_ACTIVATE_WRITE, IDX_ACTIVATE_SIZE);
1470 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1471 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1472 card->seqno.trans_hdr++;
1473 } else {
1474 memcpy(iob->data, IDX_ACTIVATE_READ, IDX_ACTIVATE_SIZE);
1475 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1476 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1477 }
1478 tmp = ((__u8)card->info.portno) | 0x80;
1479 memcpy(QETH_IDX_ACT_PNO(iob->data), &tmp, 1);
1480 memcpy(QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
1481 &card->token.issuer_rm_w, QETH_MPC_TOKEN_LENGTH);
1482 memcpy(QETH_IDX_ACT_FUNC_LEVEL(iob->data),
1483 &card->info.func_level, sizeof(__u16));
1484 ccw_device_get_id(CARD_DDEV(card), &temp_devid);
1485 memcpy(QETH_IDX_ACT_QDIO_DEV_CUA(iob->data), &temp_devid.devno, 2);
1486 temp = (card->info.cula << 8) + card->info.unit_addr2;
1487 memcpy(QETH_IDX_ACT_QDIO_DEV_REALADDR(iob->data), &temp, 2);
1488
1489 wait_event(card->wait_q,
1490 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
1491 QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
1492 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1493 rc = ccw_device_start(channel->ccwdev,
1494 &channel->ccw, (addr_t) iob, 0, 0);
1495 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1496
1497 if (rc) {
1498 QETH_DBF_MESSAGE(2, "Error1 in activating channel. rc=%d\n",
1499 rc);
1500 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
1501 atomic_set(&channel->irq_pending, 0);
1502 wake_up(&card->wait_q);
1503 return rc;
1504 }
1505 rc = wait_event_interruptible_timeout(card->wait_q,
1506 channel->state == CH_STATE_ACTIVATING, QETH_TIMEOUT);
1507 if (rc == -ERESTARTSYS)
1508 return rc;
1509 if (channel->state != CH_STATE_ACTIVATING) {
1510 dev_warn(&channel->ccwdev->dev, "The qeth device driver"
1511 " failed to recover an error on the device\n");
1512 QETH_DBF_MESSAGE(2, "%s IDX activate timed out\n",
1513 dev_name(&channel->ccwdev->dev));
1514 QETH_DBF_TEXT_(SETUP, 2, "2err%d", -ETIME);
1515 qeth_clear_cmd_buffers(channel);
1516 return -ETIME;
1517 }
1518 return qeth_idx_activate_get_answer(channel, idx_reply_cb);
1519 }
1520
1521 static int qeth_peer_func_level(int level)
1522 {
1523 if ((level & 0xff) == 8)
1524 return (level & 0xff) + 0x400;
1525 if (((level >> 8) & 3) == 1)
1526 return (level & 0xff) + 0x200;
1527 return level;
1528 }
1529
1530 static void qeth_idx_write_cb(struct qeth_channel *channel,
1531 struct qeth_cmd_buffer *iob)
1532 {
1533 struct qeth_card *card;
1534 __u16 temp;
1535
1536 QETH_DBF_TEXT(SETUP , 2, "idxwrcb");
1537
1538 if (channel->state == CH_STATE_DOWN) {
1539 channel->state = CH_STATE_ACTIVATING;
1540 goto out;
1541 }
1542 card = CARD_FROM_CDEV(channel->ccwdev);
1543
1544 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
1545 if (QETH_IDX_ACT_CAUSE_CODE(iob->data) == QETH_IDX_ACT_ERR_EXCL)
1546 dev_err(&card->write.ccwdev->dev,
1547 "The adapter is used exclusively by another "
1548 "host\n");
1549 else
1550 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel:"
1551 " negative reply\n",
1552 dev_name(&card->write.ccwdev->dev));
1553 goto out;
1554 }
1555 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
1556 if ((temp & ~0x0100) != qeth_peer_func_level(card->info.func_level)) {
1557 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel: "
1558 "function level mismatch (sent: 0x%x, received: "
1559 "0x%x)\n", dev_name(&card->write.ccwdev->dev),
1560 card->info.func_level, temp);
1561 goto out;
1562 }
1563 channel->state = CH_STATE_UP;
1564 out:
1565 qeth_release_buffer(channel, iob);
1566 }
1567
1568 static void qeth_idx_read_cb(struct qeth_channel *channel,
1569 struct qeth_cmd_buffer *iob)
1570 {
1571 struct qeth_card *card;
1572 __u16 temp;
1573
1574 QETH_DBF_TEXT(SETUP , 2, "idxrdcb");
1575 if (channel->state == CH_STATE_DOWN) {
1576 channel->state = CH_STATE_ACTIVATING;
1577 goto out;
1578 }
1579
1580 card = CARD_FROM_CDEV(channel->ccwdev);
1581 if (qeth_check_idx_response(card, iob->data))
1582 goto out;
1583
1584 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
1585 switch (QETH_IDX_ACT_CAUSE_CODE(iob->data)) {
1586 case QETH_IDX_ACT_ERR_EXCL:
1587 dev_err(&card->write.ccwdev->dev,
1588 "The adapter is used exclusively by another "
1589 "host\n");
1590 break;
1591 case QETH_IDX_ACT_ERR_AUTH:
1592 case QETH_IDX_ACT_ERR_AUTH_USER:
1593 dev_err(&card->read.ccwdev->dev,
1594 "Setting the device online failed because of "
1595 "insufficient authorization\n");
1596 break;
1597 default:
1598 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel:"
1599 " negative reply\n",
1600 dev_name(&card->read.ccwdev->dev));
1601 }
1602 QETH_CARD_TEXT_(card, 2, "idxread%c",
1603 QETH_IDX_ACT_CAUSE_CODE(iob->data));
1604 goto out;
1605 }
1606
1607 /**
1608 * * temporary fix for microcode bug
1609 * * to revert it,replace OR by AND
1610 * */
1611 if ((!QETH_IDX_NO_PORTNAME_REQUIRED(iob->data)) ||
1612 (card->info.type == QETH_CARD_TYPE_OSD))
1613 card->info.portname_required = 1;
1614
1615 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
1616 if (temp != qeth_peer_func_level(card->info.func_level)) {
1617 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel: function "
1618 "level mismatch (sent: 0x%x, received: 0x%x)\n",
1619 dev_name(&card->read.ccwdev->dev),
1620 card->info.func_level, temp);
1621 goto out;
1622 }
1623 memcpy(&card->token.issuer_rm_r,
1624 QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
1625 QETH_MPC_TOKEN_LENGTH);
1626 memcpy(&card->info.mcl_level[0],
1627 QETH_IDX_REPLY_LEVEL(iob->data), QETH_MCL_LENGTH);
1628 channel->state = CH_STATE_UP;
1629 out:
1630 qeth_release_buffer(channel, iob);
1631 }
1632
1633 void qeth_prepare_control_data(struct qeth_card *card, int len,
1634 struct qeth_cmd_buffer *iob)
1635 {
1636 qeth_setup_ccw(&card->write, iob->data, len);
1637 iob->callback = qeth_release_buffer;
1638
1639 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1640 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1641 card->seqno.trans_hdr++;
1642 memcpy(QETH_PDU_HEADER_SEQ_NO(iob->data),
1643 &card->seqno.pdu_hdr, QETH_SEQ_NO_LENGTH);
1644 card->seqno.pdu_hdr++;
1645 memcpy(QETH_PDU_HEADER_ACK_SEQ_NO(iob->data),
1646 &card->seqno.pdu_hdr_ack, QETH_SEQ_NO_LENGTH);
1647 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN);
1648 }
1649 EXPORT_SYMBOL_GPL(qeth_prepare_control_data);
1650
1651 int qeth_send_control_data(struct qeth_card *card, int len,
1652 struct qeth_cmd_buffer *iob,
1653 int (*reply_cb)(struct qeth_card *, struct qeth_reply *,
1654 unsigned long),
1655 void *reply_param)
1656 {
1657 int rc;
1658 unsigned long flags;
1659 struct qeth_reply *reply = NULL;
1660 unsigned long timeout, event_timeout;
1661 struct qeth_ipa_cmd *cmd;
1662
1663 QETH_CARD_TEXT(card, 2, "sendctl");
1664
1665 reply = qeth_alloc_reply(card);
1666 if (!reply) {
1667 return -ENOMEM;
1668 }
1669 reply->callback = reply_cb;
1670 reply->param = reply_param;
1671 if (card->state == CARD_STATE_DOWN)
1672 reply->seqno = QETH_IDX_COMMAND_SEQNO;
1673 else
1674 reply->seqno = card->seqno.ipa++;
1675 init_waitqueue_head(&reply->wait_q);
1676 spin_lock_irqsave(&card->lock, flags);
1677 list_add_tail(&reply->list, &card->cmd_waiter_list);
1678 spin_unlock_irqrestore(&card->lock, flags);
1679 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN);
1680
1681 while (atomic_cmpxchg(&card->write.irq_pending, 0, 1)) ;
1682 qeth_prepare_control_data(card, len, iob);
1683
1684 if (IS_IPA(iob->data))
1685 event_timeout = QETH_IPA_TIMEOUT;
1686 else
1687 event_timeout = QETH_TIMEOUT;
1688 timeout = jiffies + event_timeout;
1689
1690 QETH_CARD_TEXT(card, 6, "noirqpnd");
1691 spin_lock_irqsave(get_ccwdev_lock(card->write.ccwdev), flags);
1692 rc = ccw_device_start(card->write.ccwdev, &card->write.ccw,
1693 (addr_t) iob, 0, 0);
1694 spin_unlock_irqrestore(get_ccwdev_lock(card->write.ccwdev), flags);
1695 if (rc) {
1696 QETH_DBF_MESSAGE(2, "%s qeth_send_control_data: "
1697 "ccw_device_start rc = %i\n",
1698 dev_name(&card->write.ccwdev->dev), rc);
1699 QETH_CARD_TEXT_(card, 2, " err%d", rc);
1700 spin_lock_irqsave(&card->lock, flags);
1701 list_del_init(&reply->list);
1702 qeth_put_reply(reply);
1703 spin_unlock_irqrestore(&card->lock, flags);
1704 qeth_release_buffer(iob->channel, iob);
1705 atomic_set(&card->write.irq_pending, 0);
1706 wake_up(&card->wait_q);
1707 return rc;
1708 }
1709
1710 /* we have only one long running ipassist, since we can ensure
1711 process context of this command we can sleep */
1712 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
1713 if ((cmd->hdr.command == IPA_CMD_SETIP) &&
1714 (cmd->hdr.prot_version == QETH_PROT_IPV4)) {
1715 if (!wait_event_timeout(reply->wait_q,
1716 atomic_read(&reply->received), event_timeout))
1717 goto time_err;
1718 } else {
1719 while (!atomic_read(&reply->received)) {
1720 if (time_after(jiffies, timeout))
1721 goto time_err;
1722 cpu_relax();
1723 };
1724 }
1725
1726 rc = reply->rc;
1727 qeth_put_reply(reply);
1728 return rc;
1729
1730 time_err:
1731 spin_lock_irqsave(&reply->card->lock, flags);
1732 list_del_init(&reply->list);
1733 spin_unlock_irqrestore(&reply->card->lock, flags);
1734 reply->rc = -ETIME;
1735 atomic_inc(&reply->received);
1736 wake_up(&reply->wait_q);
1737 rc = reply->rc;
1738 qeth_put_reply(reply);
1739 return rc;
1740 }
1741 EXPORT_SYMBOL_GPL(qeth_send_control_data);
1742
1743 static int qeth_cm_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
1744 unsigned long data)
1745 {
1746 struct qeth_cmd_buffer *iob;
1747
1748 QETH_DBF_TEXT(SETUP, 2, "cmenblcb");
1749
1750 iob = (struct qeth_cmd_buffer *) data;
1751 memcpy(&card->token.cm_filter_r,
1752 QETH_CM_ENABLE_RESP_FILTER_TOKEN(iob->data),
1753 QETH_MPC_TOKEN_LENGTH);
1754 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
1755 return 0;
1756 }
1757
1758 static int qeth_cm_enable(struct qeth_card *card)
1759 {
1760 int rc;
1761 struct qeth_cmd_buffer *iob;
1762
1763 QETH_DBF_TEXT(SETUP, 2, "cmenable");
1764
1765 iob = qeth_wait_for_buffer(&card->write);
1766 memcpy(iob->data, CM_ENABLE, CM_ENABLE_SIZE);
1767 memcpy(QETH_CM_ENABLE_ISSUER_RM_TOKEN(iob->data),
1768 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
1769 memcpy(QETH_CM_ENABLE_FILTER_TOKEN(iob->data),
1770 &card->token.cm_filter_w, QETH_MPC_TOKEN_LENGTH);
1771
1772 rc = qeth_send_control_data(card, CM_ENABLE_SIZE, iob,
1773 qeth_cm_enable_cb, NULL);
1774 return rc;
1775 }
1776
1777 static int qeth_cm_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
1778 unsigned long data)
1779 {
1780
1781 struct qeth_cmd_buffer *iob;
1782
1783 QETH_DBF_TEXT(SETUP, 2, "cmsetpcb");
1784
1785 iob = (struct qeth_cmd_buffer *) data;
1786 memcpy(&card->token.cm_connection_r,
1787 QETH_CM_SETUP_RESP_DEST_ADDR(iob->data),
1788 QETH_MPC_TOKEN_LENGTH);
1789 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
1790 return 0;
1791 }
1792
1793 static int qeth_cm_setup(struct qeth_card *card)
1794 {
1795 int rc;
1796 struct qeth_cmd_buffer *iob;
1797
1798 QETH_DBF_TEXT(SETUP, 2, "cmsetup");
1799
1800 iob = qeth_wait_for_buffer(&card->write);
1801 memcpy(iob->data, CM_SETUP, CM_SETUP_SIZE);
1802 memcpy(QETH_CM_SETUP_DEST_ADDR(iob->data),
1803 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
1804 memcpy(QETH_CM_SETUP_CONNECTION_TOKEN(iob->data),
1805 &card->token.cm_connection_w, QETH_MPC_TOKEN_LENGTH);
1806 memcpy(QETH_CM_SETUP_FILTER_TOKEN(iob->data),
1807 &card->token.cm_filter_r, QETH_MPC_TOKEN_LENGTH);
1808 rc = qeth_send_control_data(card, CM_SETUP_SIZE, iob,
1809 qeth_cm_setup_cb, NULL);
1810 return rc;
1811
1812 }
1813
1814 static inline int qeth_get_initial_mtu_for_card(struct qeth_card *card)
1815 {
1816 switch (card->info.type) {
1817 case QETH_CARD_TYPE_UNKNOWN:
1818 return 1500;
1819 case QETH_CARD_TYPE_IQD:
1820 return card->info.max_mtu;
1821 case QETH_CARD_TYPE_OSD:
1822 switch (card->info.link_type) {
1823 case QETH_LINK_TYPE_HSTR:
1824 case QETH_LINK_TYPE_LANE_TR:
1825 return 2000;
1826 default:
1827 return 1492;
1828 }
1829 case QETH_CARD_TYPE_OSM:
1830 case QETH_CARD_TYPE_OSX:
1831 return 1492;
1832 default:
1833 return 1500;
1834 }
1835 }
1836
1837 static inline int qeth_get_max_mtu_for_card(int cardtype)
1838 {
1839 switch (cardtype) {
1840
1841 case QETH_CARD_TYPE_UNKNOWN:
1842 case QETH_CARD_TYPE_OSD:
1843 case QETH_CARD_TYPE_OSN:
1844 case QETH_CARD_TYPE_OSM:
1845 case QETH_CARD_TYPE_OSX:
1846 return 61440;
1847 case QETH_CARD_TYPE_IQD:
1848 return 57344;
1849 default:
1850 return 1500;
1851 }
1852 }
1853
1854 static inline int qeth_get_mtu_out_of_mpc(int cardtype)
1855 {
1856 switch (cardtype) {
1857 case QETH_CARD_TYPE_IQD:
1858 return 1;
1859 default:
1860 return 0;
1861 }
1862 }
1863
1864 static inline int qeth_get_mtu_outof_framesize(int framesize)
1865 {
1866 switch (framesize) {
1867 case 0x4000:
1868 return 8192;
1869 case 0x6000:
1870 return 16384;
1871 case 0xa000:
1872 return 32768;
1873 case 0xffff:
1874 return 57344;
1875 default:
1876 return 0;
1877 }
1878 }
1879
1880 static inline int qeth_mtu_is_valid(struct qeth_card *card, int mtu)
1881 {
1882 switch (card->info.type) {
1883 case QETH_CARD_TYPE_OSD:
1884 case QETH_CARD_TYPE_OSM:
1885 case QETH_CARD_TYPE_OSX:
1886 return ((mtu >= 576) && (mtu <= 61440));
1887 case QETH_CARD_TYPE_IQD:
1888 return ((mtu >= 576) &&
1889 (mtu <= card->info.max_mtu + 4096 - 32));
1890 case QETH_CARD_TYPE_OSN:
1891 case QETH_CARD_TYPE_UNKNOWN:
1892 default:
1893 return 1;
1894 }
1895 }
1896
1897 static int qeth_ulp_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
1898 unsigned long data)
1899 {
1900
1901 __u16 mtu, framesize;
1902 __u16 len;
1903 __u8 link_type;
1904 struct qeth_cmd_buffer *iob;
1905
1906 QETH_DBF_TEXT(SETUP, 2, "ulpenacb");
1907
1908 iob = (struct qeth_cmd_buffer *) data;
1909 memcpy(&card->token.ulp_filter_r,
1910 QETH_ULP_ENABLE_RESP_FILTER_TOKEN(iob->data),
1911 QETH_MPC_TOKEN_LENGTH);
1912 if (qeth_get_mtu_out_of_mpc(card->info.type)) {
1913 memcpy(&framesize, QETH_ULP_ENABLE_RESP_MAX_MTU(iob->data), 2);
1914 mtu = qeth_get_mtu_outof_framesize(framesize);
1915 if (!mtu) {
1916 iob->rc = -EINVAL;
1917 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
1918 return 0;
1919 }
1920 card->info.max_mtu = mtu;
1921 card->info.initial_mtu = mtu;
1922 card->qdio.in_buf_size = mtu + 2 * PAGE_SIZE;
1923 } else {
1924 card->info.initial_mtu = qeth_get_initial_mtu_for_card(card);
1925 card->info.max_mtu = qeth_get_max_mtu_for_card(card->info.type);
1926 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
1927 }
1928
1929 memcpy(&len, QETH_ULP_ENABLE_RESP_DIFINFO_LEN(iob->data), 2);
1930 if (len >= QETH_MPC_DIFINFO_LEN_INDICATES_LINK_TYPE) {
1931 memcpy(&link_type,
1932 QETH_ULP_ENABLE_RESP_LINK_TYPE(iob->data), 1);
1933 card->info.link_type = link_type;
1934 } else
1935 card->info.link_type = 0;
1936 QETH_DBF_TEXT_(SETUP, 2, "link%d", card->info.link_type);
1937 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
1938 return 0;
1939 }
1940
1941 static int qeth_ulp_enable(struct qeth_card *card)
1942 {
1943 int rc;
1944 char prot_type;
1945 struct qeth_cmd_buffer *iob;
1946
1947 /*FIXME: trace view callbacks*/
1948 QETH_DBF_TEXT(SETUP, 2, "ulpenabl");
1949
1950 iob = qeth_wait_for_buffer(&card->write);
1951 memcpy(iob->data, ULP_ENABLE, ULP_ENABLE_SIZE);
1952
1953 *(QETH_ULP_ENABLE_LINKNUM(iob->data)) =
1954 (__u8) card->info.portno;
1955 if (card->options.layer2)
1956 if (card->info.type == QETH_CARD_TYPE_OSN)
1957 prot_type = QETH_PROT_OSN2;
1958 else
1959 prot_type = QETH_PROT_LAYER2;
1960 else
1961 prot_type = QETH_PROT_TCPIP;
1962
1963 memcpy(QETH_ULP_ENABLE_PROT_TYPE(iob->data), &prot_type, 1);
1964 memcpy(QETH_ULP_ENABLE_DEST_ADDR(iob->data),
1965 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
1966 memcpy(QETH_ULP_ENABLE_FILTER_TOKEN(iob->data),
1967 &card->token.ulp_filter_w, QETH_MPC_TOKEN_LENGTH);
1968 memcpy(QETH_ULP_ENABLE_PORTNAME_AND_LL(iob->data),
1969 card->info.portname, 9);
1970 rc = qeth_send_control_data(card, ULP_ENABLE_SIZE, iob,
1971 qeth_ulp_enable_cb, NULL);
1972 return rc;
1973
1974 }
1975
1976 static int qeth_ulp_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
1977 unsigned long data)
1978 {
1979 struct qeth_cmd_buffer *iob;
1980 int rc = 0;
1981
1982 QETH_DBF_TEXT(SETUP, 2, "ulpstpcb");
1983
1984 iob = (struct qeth_cmd_buffer *) data;
1985 memcpy(&card->token.ulp_connection_r,
1986 QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
1987 QETH_MPC_TOKEN_LENGTH);
1988 if (!strncmp("00S", QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
1989 3)) {
1990 QETH_DBF_TEXT(SETUP, 2, "olmlimit");
1991 dev_err(&card->gdev->dev, "A connection could not be "
1992 "established because of an OLM limit\n");
1993 rc = -EMLINK;
1994 }
1995 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
1996 return rc;
1997 }
1998
1999 static int qeth_ulp_setup(struct qeth_card *card)
2000 {
2001 int rc;
2002 __u16 temp;
2003 struct qeth_cmd_buffer *iob;
2004 struct ccw_dev_id dev_id;
2005
2006 QETH_DBF_TEXT(SETUP, 2, "ulpsetup");
2007
2008 iob = qeth_wait_for_buffer(&card->write);
2009 memcpy(iob->data, ULP_SETUP, ULP_SETUP_SIZE);
2010
2011 memcpy(QETH_ULP_SETUP_DEST_ADDR(iob->data),
2012 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2013 memcpy(QETH_ULP_SETUP_CONNECTION_TOKEN(iob->data),
2014 &card->token.ulp_connection_w, QETH_MPC_TOKEN_LENGTH);
2015 memcpy(QETH_ULP_SETUP_FILTER_TOKEN(iob->data),
2016 &card->token.ulp_filter_r, QETH_MPC_TOKEN_LENGTH);
2017
2018 ccw_device_get_id(CARD_DDEV(card), &dev_id);
2019 memcpy(QETH_ULP_SETUP_CUA(iob->data), &dev_id.devno, 2);
2020 temp = (card->info.cula << 8) + card->info.unit_addr2;
2021 memcpy(QETH_ULP_SETUP_REAL_DEVADDR(iob->data), &temp, 2);
2022 rc = qeth_send_control_data(card, ULP_SETUP_SIZE, iob,
2023 qeth_ulp_setup_cb, NULL);
2024 return rc;
2025 }
2026
2027 static int qeth_alloc_qdio_buffers(struct qeth_card *card)
2028 {
2029 int i, j;
2030
2031 QETH_DBF_TEXT(SETUP, 2, "allcqdbf");
2032
2033 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED,
2034 QETH_QDIO_ALLOCATED) != QETH_QDIO_UNINITIALIZED)
2035 return 0;
2036
2037 card->qdio.in_q = kmalloc(sizeof(struct qeth_qdio_q),
2038 GFP_KERNEL);
2039 if (!card->qdio.in_q)
2040 goto out_nomem;
2041 QETH_DBF_TEXT(SETUP, 2, "inq");
2042 QETH_DBF_HEX(SETUP, 2, &card->qdio.in_q, sizeof(void *));
2043 memset(card->qdio.in_q, 0, sizeof(struct qeth_qdio_q));
2044 /* give inbound qeth_qdio_buffers their qdio_buffers */
2045 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i)
2046 card->qdio.in_q->bufs[i].buffer =
2047 &card->qdio.in_q->qdio_bufs[i];
2048 /* inbound buffer pool */
2049 if (qeth_alloc_buffer_pool(card))
2050 goto out_freeinq;
2051 /* outbound */
2052 card->qdio.out_qs =
2053 kmalloc(card->qdio.no_out_queues *
2054 sizeof(struct qeth_qdio_out_q *), GFP_KERNEL);
2055 if (!card->qdio.out_qs)
2056 goto out_freepool;
2057 for (i = 0; i < card->qdio.no_out_queues; ++i) {
2058 card->qdio.out_qs[i] = kmalloc(sizeof(struct qeth_qdio_out_q),
2059 GFP_KERNEL);
2060 if (!card->qdio.out_qs[i])
2061 goto out_freeoutq;
2062 QETH_DBF_TEXT_(SETUP, 2, "outq %i", i);
2063 QETH_DBF_HEX(SETUP, 2, &card->qdio.out_qs[i], sizeof(void *));
2064 memset(card->qdio.out_qs[i], 0, sizeof(struct qeth_qdio_out_q));
2065 card->qdio.out_qs[i]->queue_no = i;
2066 /* give outbound qeth_qdio_buffers their qdio_buffers */
2067 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
2068 card->qdio.out_qs[i]->bufs[j].buffer =
2069 &card->qdio.out_qs[i]->qdio_bufs[j];
2070 skb_queue_head_init(&card->qdio.out_qs[i]->bufs[j].
2071 skb_list);
2072 lockdep_set_class(
2073 &card->qdio.out_qs[i]->bufs[j].skb_list.lock,
2074 &qdio_out_skb_queue_key);
2075 INIT_LIST_HEAD(&card->qdio.out_qs[i]->bufs[j].ctx_list);
2076 }
2077 }
2078 return 0;
2079
2080 out_freeoutq:
2081 while (i > 0)
2082 kfree(card->qdio.out_qs[--i]);
2083 kfree(card->qdio.out_qs);
2084 card->qdio.out_qs = NULL;
2085 out_freepool:
2086 qeth_free_buffer_pool(card);
2087 out_freeinq:
2088 kfree(card->qdio.in_q);
2089 card->qdio.in_q = NULL;
2090 out_nomem:
2091 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
2092 return -ENOMEM;
2093 }
2094
2095 static void qeth_create_qib_param_field(struct qeth_card *card,
2096 char *param_field)
2097 {
2098
2099 param_field[0] = _ascebc['P'];
2100 param_field[1] = _ascebc['C'];
2101 param_field[2] = _ascebc['I'];
2102 param_field[3] = _ascebc['T'];
2103 *((unsigned int *) (&param_field[4])) = QETH_PCI_THRESHOLD_A(card);
2104 *((unsigned int *) (&param_field[8])) = QETH_PCI_THRESHOLD_B(card);
2105 *((unsigned int *) (&param_field[12])) = QETH_PCI_TIMER_VALUE(card);
2106 }
2107
2108 static void qeth_create_qib_param_field_blkt(struct qeth_card *card,
2109 char *param_field)
2110 {
2111 param_field[16] = _ascebc['B'];
2112 param_field[17] = _ascebc['L'];
2113 param_field[18] = _ascebc['K'];
2114 param_field[19] = _ascebc['T'];
2115 *((unsigned int *) (&param_field[20])) = card->info.blkt.time_total;
2116 *((unsigned int *) (&param_field[24])) = card->info.blkt.inter_packet;
2117 *((unsigned int *) (&param_field[28])) =
2118 card->info.blkt.inter_packet_jumbo;
2119 }
2120
2121 static int qeth_qdio_activate(struct qeth_card *card)
2122 {
2123 QETH_DBF_TEXT(SETUP, 3, "qdioact");
2124 return qdio_activate(CARD_DDEV(card));
2125 }
2126
2127 static int qeth_dm_act(struct qeth_card *card)
2128 {
2129 int rc;
2130 struct qeth_cmd_buffer *iob;
2131
2132 QETH_DBF_TEXT(SETUP, 2, "dmact");
2133
2134 iob = qeth_wait_for_buffer(&card->write);
2135 memcpy(iob->data, DM_ACT, DM_ACT_SIZE);
2136
2137 memcpy(QETH_DM_ACT_DEST_ADDR(iob->data),
2138 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2139 memcpy(QETH_DM_ACT_CONNECTION_TOKEN(iob->data),
2140 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
2141 rc = qeth_send_control_data(card, DM_ACT_SIZE, iob, NULL, NULL);
2142 return rc;
2143 }
2144
2145 static int qeth_mpc_initialize(struct qeth_card *card)
2146 {
2147 int rc;
2148
2149 QETH_DBF_TEXT(SETUP, 2, "mpcinit");
2150
2151 rc = qeth_issue_next_read(card);
2152 if (rc) {
2153 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
2154 return rc;
2155 }
2156 rc = qeth_cm_enable(card);
2157 if (rc) {
2158 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
2159 goto out_qdio;
2160 }
2161 rc = qeth_cm_setup(card);
2162 if (rc) {
2163 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
2164 goto out_qdio;
2165 }
2166 rc = qeth_ulp_enable(card);
2167 if (rc) {
2168 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
2169 goto out_qdio;
2170 }
2171 rc = qeth_ulp_setup(card);
2172 if (rc) {
2173 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
2174 goto out_qdio;
2175 }
2176 rc = qeth_alloc_qdio_buffers(card);
2177 if (rc) {
2178 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
2179 goto out_qdio;
2180 }
2181 rc = qeth_qdio_establish(card);
2182 if (rc) {
2183 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
2184 qeth_free_qdio_buffers(card);
2185 goto out_qdio;
2186 }
2187 rc = qeth_qdio_activate(card);
2188 if (rc) {
2189 QETH_DBF_TEXT_(SETUP, 2, "7err%d", rc);
2190 goto out_qdio;
2191 }
2192 rc = qeth_dm_act(card);
2193 if (rc) {
2194 QETH_DBF_TEXT_(SETUP, 2, "8err%d", rc);
2195 goto out_qdio;
2196 }
2197
2198 return 0;
2199 out_qdio:
2200 qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
2201 return rc;
2202 }
2203
2204 static void qeth_print_status_with_portname(struct qeth_card *card)
2205 {
2206 char dbf_text[15];
2207 int i;
2208
2209 sprintf(dbf_text, "%s", card->info.portname + 1);
2210 for (i = 0; i < 8; i++)
2211 dbf_text[i] =
2212 (char) _ebcasc[(__u8) dbf_text[i]];
2213 dbf_text[8] = 0;
2214 dev_info(&card->gdev->dev, "Device is a%s card%s%s%s\n"
2215 "with link type %s (portname: %s)\n",
2216 qeth_get_cardname(card),
2217 (card->info.mcl_level[0]) ? " (level: " : "",
2218 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2219 (card->info.mcl_level[0]) ? ")" : "",
2220 qeth_get_cardname_short(card),
2221 dbf_text);
2222
2223 }
2224
2225 static void qeth_print_status_no_portname(struct qeth_card *card)
2226 {
2227 if (card->info.portname[0])
2228 dev_info(&card->gdev->dev, "Device is a%s "
2229 "card%s%s%s\nwith link type %s "
2230 "(no portname needed by interface).\n",
2231 qeth_get_cardname(card),
2232 (card->info.mcl_level[0]) ? " (level: " : "",
2233 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2234 (card->info.mcl_level[0]) ? ")" : "",
2235 qeth_get_cardname_short(card));
2236 else
2237 dev_info(&card->gdev->dev, "Device is a%s "
2238 "card%s%s%s\nwith link type %s.\n",
2239 qeth_get_cardname(card),
2240 (card->info.mcl_level[0]) ? " (level: " : "",
2241 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2242 (card->info.mcl_level[0]) ? ")" : "",
2243 qeth_get_cardname_short(card));
2244 }
2245
2246 void qeth_print_status_message(struct qeth_card *card)
2247 {
2248 switch (card->info.type) {
2249 case QETH_CARD_TYPE_OSD:
2250 case QETH_CARD_TYPE_OSM:
2251 case QETH_CARD_TYPE_OSX:
2252 /* VM will use a non-zero first character
2253 * to indicate a HiperSockets like reporting
2254 * of the level OSA sets the first character to zero
2255 * */
2256 if (!card->info.mcl_level[0]) {
2257 sprintf(card->info.mcl_level, "%02x%02x",
2258 card->info.mcl_level[2],
2259 card->info.mcl_level[3]);
2260
2261 card->info.mcl_level[QETH_MCL_LENGTH] = 0;
2262 break;
2263 }
2264 /* fallthrough */
2265 case QETH_CARD_TYPE_IQD:
2266 if ((card->info.guestlan) ||
2267 (card->info.mcl_level[0] & 0x80)) {
2268 card->info.mcl_level[0] = (char) _ebcasc[(__u8)
2269 card->info.mcl_level[0]];
2270 card->info.mcl_level[1] = (char) _ebcasc[(__u8)
2271 card->info.mcl_level[1]];
2272 card->info.mcl_level[2] = (char) _ebcasc[(__u8)
2273 card->info.mcl_level[2]];
2274 card->info.mcl_level[3] = (char) _ebcasc[(__u8)
2275 card->info.mcl_level[3]];
2276 card->info.mcl_level[QETH_MCL_LENGTH] = 0;
2277 }
2278 break;
2279 default:
2280 memset(&card->info.mcl_level[0], 0, QETH_MCL_LENGTH + 1);
2281 }
2282 if (card->info.portname_required)
2283 qeth_print_status_with_portname(card);
2284 else
2285 qeth_print_status_no_portname(card);
2286 }
2287 EXPORT_SYMBOL_GPL(qeth_print_status_message);
2288
2289 static void qeth_initialize_working_pool_list(struct qeth_card *card)
2290 {
2291 struct qeth_buffer_pool_entry *entry;
2292
2293 QETH_CARD_TEXT(card, 5, "inwrklst");
2294
2295 list_for_each_entry(entry,
2296 &card->qdio.init_pool.entry_list, init_list) {
2297 qeth_put_buffer_pool_entry(card, entry);
2298 }
2299 }
2300
2301 static inline struct qeth_buffer_pool_entry *qeth_find_free_buffer_pool_entry(
2302 struct qeth_card *card)
2303 {
2304 struct list_head *plh;
2305 struct qeth_buffer_pool_entry *entry;
2306 int i, free;
2307 struct page *page;
2308
2309 if (list_empty(&card->qdio.in_buf_pool.entry_list))
2310 return NULL;
2311
2312 list_for_each(plh, &card->qdio.in_buf_pool.entry_list) {
2313 entry = list_entry(plh, struct qeth_buffer_pool_entry, list);
2314 free = 1;
2315 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2316 if (page_count(virt_to_page(entry->elements[i])) > 1) {
2317 free = 0;
2318 break;
2319 }
2320 }
2321 if (free) {
2322 list_del_init(&entry->list);
2323 return entry;
2324 }
2325 }
2326
2327 /* no free buffer in pool so take first one and swap pages */
2328 entry = list_entry(card->qdio.in_buf_pool.entry_list.next,
2329 struct qeth_buffer_pool_entry, list);
2330 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2331 if (page_count(virt_to_page(entry->elements[i])) > 1) {
2332 page = alloc_page(GFP_ATOMIC);
2333 if (!page) {
2334 return NULL;
2335 } else {
2336 free_page((unsigned long)entry->elements[i]);
2337 entry->elements[i] = page_address(page);
2338 if (card->options.performance_stats)
2339 card->perf_stats.sg_alloc_page_rx++;
2340 }
2341 }
2342 }
2343 list_del_init(&entry->list);
2344 return entry;
2345 }
2346
2347 static int qeth_init_input_buffer(struct qeth_card *card,
2348 struct qeth_qdio_buffer *buf)
2349 {
2350 struct qeth_buffer_pool_entry *pool_entry;
2351 int i;
2352
2353 pool_entry = qeth_find_free_buffer_pool_entry(card);
2354 if (!pool_entry)
2355 return 1;
2356
2357 /*
2358 * since the buffer is accessed only from the input_tasklet
2359 * there shouldn't be a need to synchronize; also, since we use
2360 * the QETH_IN_BUF_REQUEUE_THRESHOLD we should never run out off
2361 * buffers
2362 */
2363
2364 buf->pool_entry = pool_entry;
2365 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2366 buf->buffer->element[i].length = PAGE_SIZE;
2367 buf->buffer->element[i].addr = pool_entry->elements[i];
2368 if (i == QETH_MAX_BUFFER_ELEMENTS(card) - 1)
2369 buf->buffer->element[i].flags = SBAL_FLAGS_LAST_ENTRY;
2370 else
2371 buf->buffer->element[i].flags = 0;
2372 }
2373 return 0;
2374 }
2375
2376 int qeth_init_qdio_queues(struct qeth_card *card)
2377 {
2378 int i, j;
2379 int rc;
2380
2381 QETH_DBF_TEXT(SETUP, 2, "initqdqs");
2382
2383 /* inbound queue */
2384 memset(card->qdio.in_q->qdio_bufs, 0,
2385 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer));
2386 qeth_initialize_working_pool_list(card);
2387 /*give only as many buffers to hardware as we have buffer pool entries*/
2388 for (i = 0; i < card->qdio.in_buf_pool.buf_count - 1; ++i)
2389 qeth_init_input_buffer(card, &card->qdio.in_q->bufs[i]);
2390 card->qdio.in_q->next_buf_to_init =
2391 card->qdio.in_buf_pool.buf_count - 1;
2392 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0, 0,
2393 card->qdio.in_buf_pool.buf_count - 1);
2394 if (rc) {
2395 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
2396 return rc;
2397 }
2398 /* outbound queue */
2399 for (i = 0; i < card->qdio.no_out_queues; ++i) {
2400 memset(card->qdio.out_qs[i]->qdio_bufs, 0,
2401 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer));
2402 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
2403 qeth_clear_output_buffer(card->qdio.out_qs[i],
2404 &card->qdio.out_qs[i]->bufs[j]);
2405 }
2406 card->qdio.out_qs[i]->card = card;
2407 card->qdio.out_qs[i]->next_buf_to_fill = 0;
2408 card->qdio.out_qs[i]->do_pack = 0;
2409 atomic_set(&card->qdio.out_qs[i]->used_buffers, 0);
2410 atomic_set(&card->qdio.out_qs[i]->set_pci_flags_count, 0);
2411 atomic_set(&card->qdio.out_qs[i]->state,
2412 QETH_OUT_Q_UNLOCKED);
2413 }
2414 return 0;
2415 }
2416 EXPORT_SYMBOL_GPL(qeth_init_qdio_queues);
2417
2418 static inline __u8 qeth_get_ipa_adp_type(enum qeth_link_types link_type)
2419 {
2420 switch (link_type) {
2421 case QETH_LINK_TYPE_HSTR:
2422 return 2;
2423 default:
2424 return 1;
2425 }
2426 }
2427
2428 static void qeth_fill_ipacmd_header(struct qeth_card *card,
2429 struct qeth_ipa_cmd *cmd, __u8 command,
2430 enum qeth_prot_versions prot)
2431 {
2432 memset(cmd, 0, sizeof(struct qeth_ipa_cmd));
2433 cmd->hdr.command = command;
2434 cmd->hdr.initiator = IPA_CMD_INITIATOR_HOST;
2435 cmd->hdr.seqno = card->seqno.ipa;
2436 cmd->hdr.adapter_type = qeth_get_ipa_adp_type(card->info.link_type);
2437 cmd->hdr.rel_adapter_no = (__u8) card->info.portno;
2438 if (card->options.layer2)
2439 cmd->hdr.prim_version_no = 2;
2440 else
2441 cmd->hdr.prim_version_no = 1;
2442 cmd->hdr.param_count = 1;
2443 cmd->hdr.prot_version = prot;
2444 cmd->hdr.ipa_supported = 0;
2445 cmd->hdr.ipa_enabled = 0;
2446 }
2447
2448 struct qeth_cmd_buffer *qeth_get_ipacmd_buffer(struct qeth_card *card,
2449 enum qeth_ipa_cmds ipacmd, enum qeth_prot_versions prot)
2450 {
2451 struct qeth_cmd_buffer *iob;
2452 struct qeth_ipa_cmd *cmd;
2453
2454 iob = qeth_wait_for_buffer(&card->write);
2455 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2456 qeth_fill_ipacmd_header(card, cmd, ipacmd, prot);
2457
2458 return iob;
2459 }
2460 EXPORT_SYMBOL_GPL(qeth_get_ipacmd_buffer);
2461
2462 void qeth_prepare_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
2463 char prot_type)
2464 {
2465 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
2466 memcpy(QETH_IPA_CMD_PROT_TYPE(iob->data), &prot_type, 1);
2467 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
2468 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
2469 }
2470 EXPORT_SYMBOL_GPL(qeth_prepare_ipa_cmd);
2471
2472 int qeth_send_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
2473 int (*reply_cb)(struct qeth_card *, struct qeth_reply*,
2474 unsigned long),
2475 void *reply_param)
2476 {
2477 int rc;
2478 char prot_type;
2479
2480 QETH_CARD_TEXT(card, 4, "sendipa");
2481
2482 if (card->options.layer2)
2483 if (card->info.type == QETH_CARD_TYPE_OSN)
2484 prot_type = QETH_PROT_OSN2;
2485 else
2486 prot_type = QETH_PROT_LAYER2;
2487 else
2488 prot_type = QETH_PROT_TCPIP;
2489 qeth_prepare_ipa_cmd(card, iob, prot_type);
2490 rc = qeth_send_control_data(card, IPA_CMD_LENGTH,
2491 iob, reply_cb, reply_param);
2492 return rc;
2493 }
2494 EXPORT_SYMBOL_GPL(qeth_send_ipa_cmd);
2495
2496 static int qeth_send_startstoplan(struct qeth_card *card,
2497 enum qeth_ipa_cmds ipacmd, enum qeth_prot_versions prot)
2498 {
2499 int rc;
2500 struct qeth_cmd_buffer *iob;
2501
2502 iob = qeth_get_ipacmd_buffer(card, ipacmd, prot);
2503 rc = qeth_send_ipa_cmd(card, iob, NULL, NULL);
2504
2505 return rc;
2506 }
2507
2508 int qeth_send_startlan(struct qeth_card *card)
2509 {
2510 int rc;
2511
2512 QETH_DBF_TEXT(SETUP, 2, "strtlan");
2513
2514 rc = qeth_send_startstoplan(card, IPA_CMD_STARTLAN, 0);
2515 return rc;
2516 }
2517 EXPORT_SYMBOL_GPL(qeth_send_startlan);
2518
2519 int qeth_send_stoplan(struct qeth_card *card)
2520 {
2521 int rc = 0;
2522
2523 /*
2524 * TODO: according to the IPA format document page 14,
2525 * TCP/IP (we!) never issue a STOPLAN
2526 * is this right ?!?
2527 */
2528 QETH_DBF_TEXT(SETUP, 2, "stoplan");
2529
2530 rc = qeth_send_startstoplan(card, IPA_CMD_STOPLAN, 0);
2531 return rc;
2532 }
2533 EXPORT_SYMBOL_GPL(qeth_send_stoplan);
2534
2535 int qeth_default_setadapterparms_cb(struct qeth_card *card,
2536 struct qeth_reply *reply, unsigned long data)
2537 {
2538 struct qeth_ipa_cmd *cmd;
2539
2540 QETH_CARD_TEXT(card, 4, "defadpcb");
2541
2542 cmd = (struct qeth_ipa_cmd *) data;
2543 if (cmd->hdr.return_code == 0)
2544 cmd->hdr.return_code =
2545 cmd->data.setadapterparms.hdr.return_code;
2546 return 0;
2547 }
2548 EXPORT_SYMBOL_GPL(qeth_default_setadapterparms_cb);
2549
2550 static int qeth_query_setadapterparms_cb(struct qeth_card *card,
2551 struct qeth_reply *reply, unsigned long data)
2552 {
2553 struct qeth_ipa_cmd *cmd;
2554
2555 QETH_CARD_TEXT(card, 3, "quyadpcb");
2556
2557 cmd = (struct qeth_ipa_cmd *) data;
2558 if (cmd->data.setadapterparms.data.query_cmds_supp.lan_type & 0x7f) {
2559 card->info.link_type =
2560 cmd->data.setadapterparms.data.query_cmds_supp.lan_type;
2561 QETH_DBF_TEXT_(SETUP, 2, "lnk %d", card->info.link_type);
2562 }
2563 card->options.adp.supported_funcs =
2564 cmd->data.setadapterparms.data.query_cmds_supp.supported_cmds;
2565 return qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd);
2566 }
2567
2568 struct qeth_cmd_buffer *qeth_get_adapter_cmd(struct qeth_card *card,
2569 __u32 command, __u32 cmdlen)
2570 {
2571 struct qeth_cmd_buffer *iob;
2572 struct qeth_ipa_cmd *cmd;
2573
2574 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SETADAPTERPARMS,
2575 QETH_PROT_IPV4);
2576 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2577 cmd->data.setadapterparms.hdr.cmdlength = cmdlen;
2578 cmd->data.setadapterparms.hdr.command_code = command;
2579 cmd->data.setadapterparms.hdr.used_total = 1;
2580 cmd->data.setadapterparms.hdr.seq_no = 1;
2581
2582 return iob;
2583 }
2584 EXPORT_SYMBOL_GPL(qeth_get_adapter_cmd);
2585
2586 int qeth_query_setadapterparms(struct qeth_card *card)
2587 {
2588 int rc;
2589 struct qeth_cmd_buffer *iob;
2590
2591 QETH_CARD_TEXT(card, 3, "queryadp");
2592 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_COMMANDS_SUPPORTED,
2593 sizeof(struct qeth_ipacmd_setadpparms));
2594 rc = qeth_send_ipa_cmd(card, iob, qeth_query_setadapterparms_cb, NULL);
2595 return rc;
2596 }
2597 EXPORT_SYMBOL_GPL(qeth_query_setadapterparms);
2598
2599 int qeth_check_qdio_errors(struct qeth_card *card, struct qdio_buffer *buf,
2600 unsigned int qdio_error, const char *dbftext)
2601 {
2602 if (qdio_error) {
2603 QETH_CARD_TEXT(card, 2, dbftext);
2604 QETH_CARD_TEXT_(card, 2, " F15=%02X",
2605 buf->element[15].flags & 0xff);
2606 QETH_CARD_TEXT_(card, 2, " F14=%02X",
2607 buf->element[14].flags & 0xff);
2608 QETH_CARD_TEXT_(card, 2, " qerr=%X", qdio_error);
2609 if ((buf->element[15].flags & 0xff) == 0x12) {
2610 card->stats.rx_dropped++;
2611 return 0;
2612 } else
2613 return 1;
2614 }
2615 return 0;
2616 }
2617 EXPORT_SYMBOL_GPL(qeth_check_qdio_errors);
2618
2619 void qeth_queue_input_buffer(struct qeth_card *card, int index)
2620 {
2621 struct qeth_qdio_q *queue = card->qdio.in_q;
2622 int count;
2623 int i;
2624 int rc;
2625 int newcount = 0;
2626
2627 count = (index < queue->next_buf_to_init)?
2628 card->qdio.in_buf_pool.buf_count -
2629 (queue->next_buf_to_init - index) :
2630 card->qdio.in_buf_pool.buf_count -
2631 (queue->next_buf_to_init + QDIO_MAX_BUFFERS_PER_Q - index);
2632 /* only requeue at a certain threshold to avoid SIGAs */
2633 if (count >= QETH_IN_BUF_REQUEUE_THRESHOLD(card)) {
2634 for (i = queue->next_buf_to_init;
2635 i < queue->next_buf_to_init + count; ++i) {
2636 if (qeth_init_input_buffer(card,
2637 &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q])) {
2638 break;
2639 } else {
2640 newcount++;
2641 }
2642 }
2643
2644 if (newcount < count) {
2645 /* we are in memory shortage so we switch back to
2646 traditional skb allocation and drop packages */
2647 atomic_set(&card->force_alloc_skb, 3);
2648 count = newcount;
2649 } else {
2650 atomic_add_unless(&card->force_alloc_skb, -1, 0);
2651 }
2652
2653 /*
2654 * according to old code it should be avoided to requeue all
2655 * 128 buffers in order to benefit from PCI avoidance.
2656 * this function keeps at least one buffer (the buffer at
2657 * 'index') un-requeued -> this buffer is the first buffer that
2658 * will be requeued the next time
2659 */
2660 if (card->options.performance_stats) {
2661 card->perf_stats.inbound_do_qdio_cnt++;
2662 card->perf_stats.inbound_do_qdio_start_time =
2663 qeth_get_micros();
2664 }
2665 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0,
2666 queue->next_buf_to_init, count);
2667 if (card->options.performance_stats)
2668 card->perf_stats.inbound_do_qdio_time +=
2669 qeth_get_micros() -
2670 card->perf_stats.inbound_do_qdio_start_time;
2671 if (rc) {
2672 dev_warn(&card->gdev->dev,
2673 "QDIO reported an error, rc=%i\n", rc);
2674 QETH_CARD_TEXT(card, 2, "qinberr");
2675 }
2676 queue->next_buf_to_init = (queue->next_buf_to_init + count) %
2677 QDIO_MAX_BUFFERS_PER_Q;
2678 }
2679 }
2680 EXPORT_SYMBOL_GPL(qeth_queue_input_buffer);
2681
2682 static int qeth_handle_send_error(struct qeth_card *card,
2683 struct qeth_qdio_out_buffer *buffer, unsigned int qdio_err)
2684 {
2685 int sbalf15 = buffer->buffer->element[15].flags & 0xff;
2686
2687 QETH_CARD_TEXT(card, 6, "hdsnderr");
2688 if (card->info.type == QETH_CARD_TYPE_IQD) {
2689 if (sbalf15 == 0) {
2690 qdio_err = 0;
2691 } else {
2692 qdio_err = 1;
2693 }
2694 }
2695 qeth_check_qdio_errors(card, buffer->buffer, qdio_err, "qouterr");
2696
2697 if (!qdio_err)
2698 return QETH_SEND_ERROR_NONE;
2699
2700 if ((sbalf15 >= 15) && (sbalf15 <= 31))
2701 return QETH_SEND_ERROR_RETRY;
2702
2703 QETH_CARD_TEXT(card, 1, "lnkfail");
2704 QETH_CARD_TEXT_(card, 1, "%04x %02x",
2705 (u16)qdio_err, (u8)sbalf15);
2706 return QETH_SEND_ERROR_LINK_FAILURE;
2707 }
2708
2709 /*
2710 * Switched to packing state if the number of used buffers on a queue
2711 * reaches a certain limit.
2712 */
2713 static void qeth_switch_to_packing_if_needed(struct qeth_qdio_out_q *queue)
2714 {
2715 if (!queue->do_pack) {
2716 if (atomic_read(&queue->used_buffers)
2717 >= QETH_HIGH_WATERMARK_PACK){
2718 /* switch non-PACKING -> PACKING */
2719 QETH_CARD_TEXT(queue->card, 6, "np->pack");
2720 if (queue->card->options.performance_stats)
2721 queue->card->perf_stats.sc_dp_p++;
2722 queue->do_pack = 1;
2723 }
2724 }
2725 }
2726
2727 /*
2728 * Switches from packing to non-packing mode. If there is a packing
2729 * buffer on the queue this buffer will be prepared to be flushed.
2730 * In that case 1 is returned to inform the caller. If no buffer
2731 * has to be flushed, zero is returned.
2732 */
2733 static int qeth_switch_to_nonpacking_if_needed(struct qeth_qdio_out_q *queue)
2734 {
2735 struct qeth_qdio_out_buffer *buffer;
2736 int flush_count = 0;
2737
2738 if (queue->do_pack) {
2739 if (atomic_read(&queue->used_buffers)
2740 <= QETH_LOW_WATERMARK_PACK) {
2741 /* switch PACKING -> non-PACKING */
2742 QETH_CARD_TEXT(queue->card, 6, "pack->np");
2743 if (queue->card->options.performance_stats)
2744 queue->card->perf_stats.sc_p_dp++;
2745 queue->do_pack = 0;
2746 /* flush packing buffers */
2747 buffer = &queue->bufs[queue->next_buf_to_fill];
2748 if ((atomic_read(&buffer->state) ==
2749 QETH_QDIO_BUF_EMPTY) &&
2750 (buffer->next_element_to_fill > 0)) {
2751 atomic_set(&buffer->state,
2752 QETH_QDIO_BUF_PRIMED);
2753 flush_count++;
2754 queue->next_buf_to_fill =
2755 (queue->next_buf_to_fill + 1) %
2756 QDIO_MAX_BUFFERS_PER_Q;
2757 }
2758 }
2759 }
2760 return flush_count;
2761 }
2762
2763 /*
2764 * Called to flush a packing buffer if no more pci flags are on the queue.
2765 * Checks if there is a packing buffer and prepares it to be flushed.
2766 * In that case returns 1, otherwise zero.
2767 */
2768 static int qeth_flush_buffers_on_no_pci(struct qeth_qdio_out_q *queue)
2769 {
2770 struct qeth_qdio_out_buffer *buffer;
2771
2772 buffer = &queue->bufs[queue->next_buf_to_fill];
2773 if ((atomic_read(&buffer->state) == QETH_QDIO_BUF_EMPTY) &&
2774 (buffer->next_element_to_fill > 0)) {
2775 /* it's a packing buffer */
2776 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
2777 queue->next_buf_to_fill =
2778 (queue->next_buf_to_fill + 1) % QDIO_MAX_BUFFERS_PER_Q;
2779 return 1;
2780 }
2781 return 0;
2782 }
2783
2784 static void qeth_flush_buffers(struct qeth_qdio_out_q *queue, int index,
2785 int count)
2786 {
2787 struct qeth_qdio_out_buffer *buf;
2788 int rc;
2789 int i;
2790 unsigned int qdio_flags;
2791
2792 for (i = index; i < index + count; ++i) {
2793 buf = &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q];
2794 buf->buffer->element[buf->next_element_to_fill - 1].flags |=
2795 SBAL_FLAGS_LAST_ENTRY;
2796
2797 if (queue->card->info.type == QETH_CARD_TYPE_IQD)
2798 continue;
2799
2800 if (!queue->do_pack) {
2801 if ((atomic_read(&queue->used_buffers) >=
2802 (QETH_HIGH_WATERMARK_PACK -
2803 QETH_WATERMARK_PACK_FUZZ)) &&
2804 !atomic_read(&queue->set_pci_flags_count)) {
2805 /* it's likely that we'll go to packing
2806 * mode soon */
2807 atomic_inc(&queue->set_pci_flags_count);
2808 buf->buffer->element[0].flags |= 0x40;
2809 }
2810 } else {
2811 if (!atomic_read(&queue->set_pci_flags_count)) {
2812 /*
2813 * there's no outstanding PCI any more, so we
2814 * have to request a PCI to be sure the the PCI
2815 * will wake at some time in the future then we
2816 * can flush packed buffers that might still be
2817 * hanging around, which can happen if no
2818 * further send was requested by the stack
2819 */
2820 atomic_inc(&queue->set_pci_flags_count);
2821 buf->buffer->element[0].flags |= 0x40;
2822 }
2823 }
2824 }
2825
2826 queue->sync_iqdio_error = 0;
2827 queue->card->dev->trans_start = jiffies;
2828 if (queue->card->options.performance_stats) {
2829 queue->card->perf_stats.outbound_do_qdio_cnt++;
2830 queue->card->perf_stats.outbound_do_qdio_start_time =
2831 qeth_get_micros();
2832 }
2833 qdio_flags = QDIO_FLAG_SYNC_OUTPUT;
2834 if (atomic_read(&queue->set_pci_flags_count))
2835 qdio_flags |= QDIO_FLAG_PCI_OUT;
2836 rc = do_QDIO(CARD_DDEV(queue->card), qdio_flags,
2837 queue->queue_no, index, count);
2838 if (queue->card->options.performance_stats)
2839 queue->card->perf_stats.outbound_do_qdio_time +=
2840 qeth_get_micros() -
2841 queue->card->perf_stats.outbound_do_qdio_start_time;
2842 if (rc > 0) {
2843 if (!(rc & QDIO_ERROR_SIGA_BUSY))
2844 queue->sync_iqdio_error = rc & 3;
2845 }
2846 if (rc) {
2847 queue->card->stats.tx_errors += count;
2848 /* ignore temporary SIGA errors without busy condition */
2849 if (rc == QDIO_ERROR_SIGA_TARGET)
2850 return;
2851 QETH_CARD_TEXT(queue->card, 2, "flushbuf");
2852 QETH_CARD_TEXT_(queue->card, 2, " err%d", rc);
2853
2854 /* this must not happen under normal circumstances. if it
2855 * happens something is really wrong -> recover */
2856 qeth_schedule_recovery(queue->card);
2857 return;
2858 }
2859 atomic_add(count, &queue->used_buffers);
2860 if (queue->card->options.performance_stats)
2861 queue->card->perf_stats.bufs_sent += count;
2862 }
2863
2864 static void qeth_check_outbound_queue(struct qeth_qdio_out_q *queue)
2865 {
2866 int index;
2867 int flush_cnt = 0;
2868 int q_was_packing = 0;
2869
2870 /*
2871 * check if weed have to switch to non-packing mode or if
2872 * we have to get a pci flag out on the queue
2873 */
2874 if ((atomic_read(&queue->used_buffers) <= QETH_LOW_WATERMARK_PACK) ||
2875 !atomic_read(&queue->set_pci_flags_count)) {
2876 if (atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH) ==
2877 QETH_OUT_Q_UNLOCKED) {
2878 /*
2879 * If we get in here, there was no action in
2880 * do_send_packet. So, we check if there is a
2881 * packing buffer to be flushed here.
2882 */
2883 netif_stop_queue(queue->card->dev);
2884 index = queue->next_buf_to_fill;
2885 q_was_packing = queue->do_pack;
2886 /* queue->do_pack may change */
2887 barrier();
2888 flush_cnt += qeth_switch_to_nonpacking_if_needed(queue);
2889 if (!flush_cnt &&
2890 !atomic_read(&queue->set_pci_flags_count))
2891 flush_cnt +=
2892 qeth_flush_buffers_on_no_pci(queue);
2893 if (queue->card->options.performance_stats &&
2894 q_was_packing)
2895 queue->card->perf_stats.bufs_sent_pack +=
2896 flush_cnt;
2897 if (flush_cnt)
2898 qeth_flush_buffers(queue, index, flush_cnt);
2899 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
2900 }
2901 }
2902 }
2903
2904 void qeth_qdio_output_handler(struct ccw_device *ccwdev,
2905 unsigned int qdio_error, int __queue, int first_element,
2906 int count, unsigned long card_ptr)
2907 {
2908 struct qeth_card *card = (struct qeth_card *) card_ptr;
2909 struct qeth_qdio_out_q *queue = card->qdio.out_qs[__queue];
2910 struct qeth_qdio_out_buffer *buffer;
2911 int i;
2912 unsigned qeth_send_err;
2913
2914 QETH_CARD_TEXT(card, 6, "qdouhdl");
2915 if (qdio_error & QDIO_ERROR_ACTIVATE_CHECK_CONDITION) {
2916 QETH_CARD_TEXT(card, 2, "achkcond");
2917 netif_stop_queue(card->dev);
2918 qeth_schedule_recovery(card);
2919 return;
2920 }
2921 if (card->options.performance_stats) {
2922 card->perf_stats.outbound_handler_cnt++;
2923 card->perf_stats.outbound_handler_start_time =
2924 qeth_get_micros();
2925 }
2926 for (i = first_element; i < (first_element + count); ++i) {
2927 buffer = &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q];
2928 qeth_send_err = qeth_handle_send_error(card, buffer, qdio_error);
2929 __qeth_clear_output_buffer(queue, buffer,
2930 (qeth_send_err == QETH_SEND_ERROR_RETRY) ? 1 : 0);
2931 }
2932 atomic_sub(count, &queue->used_buffers);
2933 /* check if we need to do something on this outbound queue */
2934 if (card->info.type != QETH_CARD_TYPE_IQD)
2935 qeth_check_outbound_queue(queue);
2936
2937 netif_wake_queue(queue->card->dev);
2938 if (card->options.performance_stats)
2939 card->perf_stats.outbound_handler_time += qeth_get_micros() -
2940 card->perf_stats.outbound_handler_start_time;
2941 }
2942 EXPORT_SYMBOL_GPL(qeth_qdio_output_handler);
2943
2944 int qeth_get_priority_queue(struct qeth_card *card, struct sk_buff *skb,
2945 int ipv, int cast_type)
2946 {
2947 if (!ipv && (card->info.type == QETH_CARD_TYPE_OSD ||
2948 card->info.type == QETH_CARD_TYPE_OSX))
2949 return card->qdio.default_out_queue;
2950 switch (card->qdio.no_out_queues) {
2951 case 4:
2952 if (cast_type && card->info.is_multicast_different)
2953 return card->info.is_multicast_different &
2954 (card->qdio.no_out_queues - 1);
2955 if (card->qdio.do_prio_queueing && (ipv == 4)) {
2956 const u8 tos = ip_hdr(skb)->tos;
2957
2958 if (card->qdio.do_prio_queueing ==
2959 QETH_PRIO_Q_ING_TOS) {
2960 if (tos & IP_TOS_NOTIMPORTANT)
2961 return 3;
2962 if (tos & IP_TOS_HIGHRELIABILITY)
2963 return 2;
2964 if (tos & IP_TOS_HIGHTHROUGHPUT)
2965 return 1;
2966 if (tos & IP_TOS_LOWDELAY)
2967 return 0;
2968 }
2969 if (card->qdio.do_prio_queueing ==
2970 QETH_PRIO_Q_ING_PREC)
2971 return 3 - (tos >> 6);
2972 } else if (card->qdio.do_prio_queueing && (ipv == 6)) {
2973 /* TODO: IPv6!!! */
2974 }
2975 return card->qdio.default_out_queue;
2976 case 1: /* fallthrough for single-out-queue 1920-device */
2977 default:
2978 return card->qdio.default_out_queue;
2979 }
2980 }
2981 EXPORT_SYMBOL_GPL(qeth_get_priority_queue);
2982
2983 int qeth_get_elements_no(struct qeth_card *card, void *hdr,
2984 struct sk_buff *skb, int elems)
2985 {
2986 int dlen = skb->len - skb->data_len;
2987 int elements_needed = PFN_UP((unsigned long)skb->data + dlen - 1) -
2988 PFN_DOWN((unsigned long)skb->data);
2989
2990 elements_needed += skb_shinfo(skb)->nr_frags;
2991 if ((elements_needed + elems) > QETH_MAX_BUFFER_ELEMENTS(card)) {
2992 QETH_DBF_MESSAGE(2, "Invalid size of IP packet "
2993 "(Number=%d / Length=%d). Discarded.\n",
2994 (elements_needed+elems), skb->len);
2995 return 0;
2996 }
2997 return elements_needed;
2998 }
2999 EXPORT_SYMBOL_GPL(qeth_get_elements_no);
3000
3001 int qeth_hdr_chk_and_bounce(struct sk_buff *skb, int len)
3002 {
3003 int hroom, inpage, rest;
3004
3005 if (((unsigned long)skb->data & PAGE_MASK) !=
3006 (((unsigned long)skb->data + len - 1) & PAGE_MASK)) {
3007 hroom = skb_headroom(skb);
3008 inpage = PAGE_SIZE - ((unsigned long) skb->data % PAGE_SIZE);
3009 rest = len - inpage;
3010 if (rest > hroom)
3011 return 1;
3012 memmove(skb->data - rest, skb->data, skb->len - skb->data_len);
3013 skb->data -= rest;
3014 QETH_DBF_MESSAGE(2, "skb bounce len: %d rest: %d\n", len, rest);
3015 }
3016 return 0;
3017 }
3018 EXPORT_SYMBOL_GPL(qeth_hdr_chk_and_bounce);
3019
3020 static inline void __qeth_fill_buffer(struct sk_buff *skb,
3021 struct qdio_buffer *buffer, int is_tso, int *next_element_to_fill,
3022 int offset)
3023 {
3024 int length = skb->len - skb->data_len;
3025 int length_here;
3026 int element;
3027 char *data;
3028 int first_lap, cnt;
3029 struct skb_frag_struct *frag;
3030
3031 element = *next_element_to_fill;
3032 data = skb->data;
3033 first_lap = (is_tso == 0 ? 1 : 0);
3034
3035 if (offset >= 0) {
3036 data = skb->data + offset;
3037 length -= offset;
3038 first_lap = 0;
3039 }
3040
3041 while (length > 0) {
3042 /* length_here is the remaining amount of data in this page */
3043 length_here = PAGE_SIZE - ((unsigned long) data % PAGE_SIZE);
3044 if (length < length_here)
3045 length_here = length;
3046
3047 buffer->element[element].addr = data;
3048 buffer->element[element].length = length_here;
3049 length -= length_here;
3050 if (!length) {
3051 if (first_lap)
3052 if (skb_shinfo(skb)->nr_frags)
3053 buffer->element[element].flags =
3054 SBAL_FLAGS_FIRST_FRAG;
3055 else
3056 buffer->element[element].flags = 0;
3057 else
3058 buffer->element[element].flags =
3059 SBAL_FLAGS_MIDDLE_FRAG;
3060 } else {
3061 if (first_lap)
3062 buffer->element[element].flags =
3063 SBAL_FLAGS_FIRST_FRAG;
3064 else
3065 buffer->element[element].flags =
3066 SBAL_FLAGS_MIDDLE_FRAG;
3067 }
3068 data += length_here;
3069 element++;
3070 first_lap = 0;
3071 }
3072
3073 for (cnt = 0; cnt < skb_shinfo(skb)->nr_frags; cnt++) {
3074 frag = &skb_shinfo(skb)->frags[cnt];
3075 buffer->element[element].addr = (char *)page_to_phys(frag->page)
3076 + frag->page_offset;
3077 buffer->element[element].length = frag->size;
3078 buffer->element[element].flags = SBAL_FLAGS_MIDDLE_FRAG;
3079 element++;
3080 }
3081
3082 if (buffer->element[element - 1].flags)
3083 buffer->element[element - 1].flags = SBAL_FLAGS_LAST_FRAG;
3084 *next_element_to_fill = element;
3085 }
3086
3087 static inline int qeth_fill_buffer(struct qeth_qdio_out_q *queue,
3088 struct qeth_qdio_out_buffer *buf, struct sk_buff *skb,
3089 struct qeth_hdr *hdr, int offset, int hd_len)
3090 {
3091 struct qdio_buffer *buffer;
3092 int flush_cnt = 0, hdr_len, large_send = 0;
3093
3094 buffer = buf->buffer;
3095 atomic_inc(&skb->users);
3096 skb_queue_tail(&buf->skb_list, skb);
3097
3098 /*check first on TSO ....*/
3099 if (hdr->hdr.l3.id == QETH_HEADER_TYPE_TSO) {
3100 int element = buf->next_element_to_fill;
3101
3102 hdr_len = sizeof(struct qeth_hdr_tso) +
3103 ((struct qeth_hdr_tso *)hdr)->ext.dg_hdr_len;
3104 /*fill first buffer entry only with header information */
3105 buffer->element[element].addr = skb->data;
3106 buffer->element[element].length = hdr_len;
3107 buffer->element[element].flags = SBAL_FLAGS_FIRST_FRAG;
3108 buf->next_element_to_fill++;
3109 skb->data += hdr_len;
3110 skb->len -= hdr_len;
3111 large_send = 1;
3112 }
3113
3114 if (offset >= 0) {
3115 int element = buf->next_element_to_fill;
3116 buffer->element[element].addr = hdr;
3117 buffer->element[element].length = sizeof(struct qeth_hdr) +
3118 hd_len;
3119 buffer->element[element].flags = SBAL_FLAGS_FIRST_FRAG;
3120 buf->is_header[element] = 1;
3121 buf->next_element_to_fill++;
3122 }
3123
3124 __qeth_fill_buffer(skb, buffer, large_send,
3125 (int *)&buf->next_element_to_fill, offset);
3126
3127 if (!queue->do_pack) {
3128 QETH_CARD_TEXT(queue->card, 6, "fillbfnp");
3129 /* set state to PRIMED -> will be flushed */
3130 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
3131 flush_cnt = 1;
3132 } else {
3133 QETH_CARD_TEXT(queue->card, 6, "fillbfpa");
3134 if (queue->card->options.performance_stats)
3135 queue->card->perf_stats.skbs_sent_pack++;
3136 if (buf->next_element_to_fill >=
3137 QETH_MAX_BUFFER_ELEMENTS(queue->card)) {
3138 /*
3139 * packed buffer if full -> set state PRIMED
3140 * -> will be flushed
3141 */
3142 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
3143 flush_cnt = 1;
3144 }
3145 }
3146 return flush_cnt;
3147 }
3148
3149 int qeth_do_send_packet_fast(struct qeth_card *card,
3150 struct qeth_qdio_out_q *queue, struct sk_buff *skb,
3151 struct qeth_hdr *hdr, int elements_needed,
3152 int offset, int hd_len)
3153 {
3154 struct qeth_qdio_out_buffer *buffer;
3155 struct sk_buff *skb1;
3156 struct qeth_skb_data *retry_ctrl;
3157 int index;
3158 int rc;
3159
3160 /* spin until we get the queue ... */
3161 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
3162 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
3163 /* ... now we've got the queue */
3164 index = queue->next_buf_to_fill;
3165 buffer = &queue->bufs[queue->next_buf_to_fill];
3166 /*
3167 * check if buffer is empty to make sure that we do not 'overtake'
3168 * ourselves and try to fill a buffer that is already primed
3169 */
3170 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY)
3171 goto out;
3172 queue->next_buf_to_fill = (queue->next_buf_to_fill + 1) %
3173 QDIO_MAX_BUFFERS_PER_Q;
3174 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3175 qeth_fill_buffer(queue, buffer, skb, hdr, offset, hd_len);
3176 qeth_flush_buffers(queue, index, 1);
3177 if (queue->sync_iqdio_error == 2) {
3178 skb1 = skb_dequeue(&buffer->skb_list);
3179 while (skb1) {
3180 atomic_dec(&skb1->users);
3181 skb1 = skb_dequeue(&buffer->skb_list);
3182 }
3183 retry_ctrl = (struct qeth_skb_data *) &skb->cb[16];
3184 if (retry_ctrl->magic != QETH_SKB_MAGIC) {
3185 retry_ctrl->magic = QETH_SKB_MAGIC;
3186 retry_ctrl->count = 0;
3187 }
3188 if (retry_ctrl->count < QETH_SIGA_CC2_RETRIES) {
3189 retry_ctrl->count++;
3190 rc = dev_queue_xmit(skb);
3191 } else {
3192 dev_kfree_skb_any(skb);
3193 QETH_CARD_TEXT(card, 2, "qrdrop");
3194 }
3195 }
3196 return 0;
3197 out:
3198 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3199 return -EBUSY;
3200 }
3201 EXPORT_SYMBOL_GPL(qeth_do_send_packet_fast);
3202
3203 int qeth_do_send_packet(struct qeth_card *card, struct qeth_qdio_out_q *queue,
3204 struct sk_buff *skb, struct qeth_hdr *hdr,
3205 int elements_needed)
3206 {
3207 struct qeth_qdio_out_buffer *buffer;
3208 int start_index;
3209 int flush_count = 0;
3210 int do_pack = 0;
3211 int tmp;
3212 int rc = 0;
3213
3214 /* spin until we get the queue ... */
3215 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
3216 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
3217 start_index = queue->next_buf_to_fill;
3218 buffer = &queue->bufs[queue->next_buf_to_fill];
3219 /*
3220 * check if buffer is empty to make sure that we do not 'overtake'
3221 * ourselves and try to fill a buffer that is already primed
3222 */
3223 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY) {
3224 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3225 return -EBUSY;
3226 }
3227 /* check if we need to switch packing state of this queue */
3228 qeth_switch_to_packing_if_needed(queue);
3229 if (queue->do_pack) {
3230 do_pack = 1;
3231 /* does packet fit in current buffer? */
3232 if ((QETH_MAX_BUFFER_ELEMENTS(card) -
3233 buffer->next_element_to_fill) < elements_needed) {
3234 /* ... no -> set state PRIMED */
3235 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
3236 flush_count++;
3237 queue->next_buf_to_fill =
3238 (queue->next_buf_to_fill + 1) %
3239 QDIO_MAX_BUFFERS_PER_Q;
3240 buffer = &queue->bufs[queue->next_buf_to_fill];
3241 /* we did a step forward, so check buffer state
3242 * again */
3243 if (atomic_read(&buffer->state) !=
3244 QETH_QDIO_BUF_EMPTY) {
3245 qeth_flush_buffers(queue, start_index,
3246 flush_count);
3247 atomic_set(&queue->state,
3248 QETH_OUT_Q_UNLOCKED);
3249 return -EBUSY;
3250 }
3251 }
3252 }
3253 tmp = qeth_fill_buffer(queue, buffer, skb, hdr, -1, 0);
3254 queue->next_buf_to_fill = (queue->next_buf_to_fill + tmp) %
3255 QDIO_MAX_BUFFERS_PER_Q;
3256 flush_count += tmp;
3257 if (flush_count)
3258 qeth_flush_buffers(queue, start_index, flush_count);
3259 else if (!atomic_read(&queue->set_pci_flags_count))
3260 atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH);
3261 /*
3262 * queue->state will go from LOCKED -> UNLOCKED or from
3263 * LOCKED_FLUSH -> LOCKED if output_handler wanted to 'notify' us
3264 * (switch packing state or flush buffer to get another pci flag out).
3265 * In that case we will enter this loop
3266 */
3267 while (atomic_dec_return(&queue->state)) {
3268 flush_count = 0;
3269 start_index = queue->next_buf_to_fill;
3270 /* check if we can go back to non-packing state */
3271 flush_count += qeth_switch_to_nonpacking_if_needed(queue);
3272 /*
3273 * check if we need to flush a packing buffer to get a pci
3274 * flag out on the queue
3275 */
3276 if (!flush_count && !atomic_read(&queue->set_pci_flags_count))
3277 flush_count += qeth_flush_buffers_on_no_pci(queue);
3278 if (flush_count)
3279 qeth_flush_buffers(queue, start_index, flush_count);
3280 }
3281 /* at this point the queue is UNLOCKED again */
3282 if (queue->card->options.performance_stats && do_pack)
3283 queue->card->perf_stats.bufs_sent_pack += flush_count;
3284
3285 return rc;
3286 }
3287 EXPORT_SYMBOL_GPL(qeth_do_send_packet);
3288
3289 static int qeth_setadp_promisc_mode_cb(struct qeth_card *card,
3290 struct qeth_reply *reply, unsigned long data)
3291 {
3292 struct qeth_ipa_cmd *cmd;
3293 struct qeth_ipacmd_setadpparms *setparms;
3294
3295 QETH_CARD_TEXT(card, 4, "prmadpcb");
3296
3297 cmd = (struct qeth_ipa_cmd *) data;
3298 setparms = &(cmd->data.setadapterparms);
3299
3300 qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd);
3301 if (cmd->hdr.return_code) {
3302 QETH_CARD_TEXT_(card, 4, "prmrc%2.2x", cmd->hdr.return_code);
3303 setparms->data.mode = SET_PROMISC_MODE_OFF;
3304 }
3305 card->info.promisc_mode = setparms->data.mode;
3306 return 0;
3307 }
3308
3309 void qeth_setadp_promisc_mode(struct qeth_card *card)
3310 {
3311 enum qeth_ipa_promisc_modes mode;
3312 struct net_device *dev = card->dev;
3313 struct qeth_cmd_buffer *iob;
3314 struct qeth_ipa_cmd *cmd;
3315
3316 QETH_CARD_TEXT(card, 4, "setprom");
3317
3318 if (((dev->flags & IFF_PROMISC) &&
3319 (card->info.promisc_mode == SET_PROMISC_MODE_ON)) ||
3320 (!(dev->flags & IFF_PROMISC) &&
3321 (card->info.promisc_mode == SET_PROMISC_MODE_OFF)))
3322 return;
3323 mode = SET_PROMISC_MODE_OFF;
3324 if (dev->flags & IFF_PROMISC)
3325 mode = SET_PROMISC_MODE_ON;
3326 QETH_CARD_TEXT_(card, 4, "mode:%x", mode);
3327
3328 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_PROMISC_MODE,
3329 sizeof(struct qeth_ipacmd_setadpparms));
3330 cmd = (struct qeth_ipa_cmd *)(iob->data + IPA_PDU_HEADER_SIZE);
3331 cmd->data.setadapterparms.data.mode = mode;
3332 qeth_send_ipa_cmd(card, iob, qeth_setadp_promisc_mode_cb, NULL);
3333 }
3334 EXPORT_SYMBOL_GPL(qeth_setadp_promisc_mode);
3335
3336 int qeth_change_mtu(struct net_device *dev, int new_mtu)
3337 {
3338 struct qeth_card *card;
3339 char dbf_text[15];
3340
3341 card = dev->ml_priv;
3342
3343 QETH_CARD_TEXT(card, 4, "chgmtu");
3344 sprintf(dbf_text, "%8x", new_mtu);
3345 QETH_CARD_TEXT(card, 4, dbf_text);
3346
3347 if (new_mtu < 64)
3348 return -EINVAL;
3349 if (new_mtu > 65535)
3350 return -EINVAL;
3351 if ((!qeth_is_supported(card, IPA_IP_FRAGMENTATION)) &&
3352 (!qeth_mtu_is_valid(card, new_mtu)))
3353 return -EINVAL;
3354 dev->mtu = new_mtu;
3355 return 0;
3356 }
3357 EXPORT_SYMBOL_GPL(qeth_change_mtu);
3358
3359 struct net_device_stats *qeth_get_stats(struct net_device *dev)
3360 {
3361 struct qeth_card *card;
3362
3363 card = dev->ml_priv;
3364
3365 QETH_CARD_TEXT(card, 5, "getstat");
3366
3367 return &card->stats;
3368 }
3369 EXPORT_SYMBOL_GPL(qeth_get_stats);
3370
3371 static int qeth_setadpparms_change_macaddr_cb(struct qeth_card *card,
3372 struct qeth_reply *reply, unsigned long data)
3373 {
3374 struct qeth_ipa_cmd *cmd;
3375
3376 QETH_CARD_TEXT(card, 4, "chgmaccb");
3377
3378 cmd = (struct qeth_ipa_cmd *) data;
3379 if (!card->options.layer2 ||
3380 !(card->info.mac_bits & QETH_LAYER2_MAC_READ)) {
3381 memcpy(card->dev->dev_addr,
3382 &cmd->data.setadapterparms.data.change_addr.addr,
3383 OSA_ADDR_LEN);
3384 card->info.mac_bits |= QETH_LAYER2_MAC_READ;
3385 }
3386 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
3387 return 0;
3388 }
3389
3390 int qeth_setadpparms_change_macaddr(struct qeth_card *card)
3391 {
3392 int rc;
3393 struct qeth_cmd_buffer *iob;
3394 struct qeth_ipa_cmd *cmd;
3395
3396 QETH_CARD_TEXT(card, 4, "chgmac");
3397
3398 iob = qeth_get_adapter_cmd(card, IPA_SETADP_ALTER_MAC_ADDRESS,
3399 sizeof(struct qeth_ipacmd_setadpparms));
3400 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
3401 cmd->data.setadapterparms.data.change_addr.cmd = CHANGE_ADDR_READ_MAC;
3402 cmd->data.setadapterparms.data.change_addr.addr_size = OSA_ADDR_LEN;
3403 memcpy(&cmd->data.setadapterparms.data.change_addr.addr,
3404 card->dev->dev_addr, OSA_ADDR_LEN);
3405 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_change_macaddr_cb,
3406 NULL);
3407 return rc;
3408 }
3409 EXPORT_SYMBOL_GPL(qeth_setadpparms_change_macaddr);
3410
3411 static int qeth_setadpparms_set_access_ctrl_cb(struct qeth_card *card,
3412 struct qeth_reply *reply, unsigned long data)
3413 {
3414 struct qeth_ipa_cmd *cmd;
3415 struct qeth_set_access_ctrl *access_ctrl_req;
3416 int rc;
3417
3418 QETH_CARD_TEXT(card, 4, "setaccb");
3419
3420 cmd = (struct qeth_ipa_cmd *) data;
3421 access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl;
3422 QETH_DBF_TEXT_(SETUP, 2, "setaccb");
3423 QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name);
3424 QETH_DBF_TEXT_(SETUP, 2, "rc=%d",
3425 cmd->data.setadapterparms.hdr.return_code);
3426 switch (cmd->data.setadapterparms.hdr.return_code) {
3427 case SET_ACCESS_CTRL_RC_SUCCESS:
3428 case SET_ACCESS_CTRL_RC_ALREADY_NOT_ISOLATED:
3429 case SET_ACCESS_CTRL_RC_ALREADY_ISOLATED:
3430 {
3431 card->options.isolation = access_ctrl_req->subcmd_code;
3432 if (card->options.isolation == ISOLATION_MODE_NONE) {
3433 dev_info(&card->gdev->dev,
3434 "QDIO data connection isolation is deactivated\n");
3435 } else {
3436 dev_info(&card->gdev->dev,
3437 "QDIO data connection isolation is activated\n");
3438 }
3439 QETH_DBF_MESSAGE(3, "OK:SET_ACCESS_CTRL(%s, %d)==%d\n",
3440 card->gdev->dev.kobj.name,
3441 access_ctrl_req->subcmd_code,
3442 cmd->data.setadapterparms.hdr.return_code);
3443 rc = 0;
3444 break;
3445 }
3446 case SET_ACCESS_CTRL_RC_NOT_SUPPORTED:
3447 {
3448 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_CTRL(%s,%d)==%d\n",
3449 card->gdev->dev.kobj.name,
3450 access_ctrl_req->subcmd_code,
3451 cmd->data.setadapterparms.hdr.return_code);
3452 dev_err(&card->gdev->dev, "Adapter does not "
3453 "support QDIO data connection isolation\n");
3454
3455 /* ensure isolation mode is "none" */
3456 card->options.isolation = ISOLATION_MODE_NONE;
3457 rc = -EOPNOTSUPP;
3458 break;
3459 }
3460 case SET_ACCESS_CTRL_RC_NONE_SHARED_ADAPTER:
3461 {
3462 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_MODE(%s,%d)==%d\n",
3463 card->gdev->dev.kobj.name,
3464 access_ctrl_req->subcmd_code,
3465 cmd->data.setadapterparms.hdr.return_code);
3466 dev_err(&card->gdev->dev,
3467 "Adapter is dedicated. "
3468 "QDIO data connection isolation not supported\n");
3469
3470 /* ensure isolation mode is "none" */
3471 card->options.isolation = ISOLATION_MODE_NONE;
3472 rc = -EOPNOTSUPP;
3473 break;
3474 }
3475 case SET_ACCESS_CTRL_RC_ACTIVE_CHECKSUM_OFF:
3476 {
3477 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_MODE(%s,%d)==%d\n",
3478 card->gdev->dev.kobj.name,
3479 access_ctrl_req->subcmd_code,
3480 cmd->data.setadapterparms.hdr.return_code);
3481 dev_err(&card->gdev->dev,
3482 "TSO does not permit QDIO data connection isolation\n");
3483
3484 /* ensure isolation mode is "none" */
3485 card->options.isolation = ISOLATION_MODE_NONE;
3486 rc = -EPERM;
3487 break;
3488 }
3489 default:
3490 {
3491 /* this should never happen */
3492 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_MODE(%s,%d)==%d"
3493 "==UNKNOWN\n",
3494 card->gdev->dev.kobj.name,
3495 access_ctrl_req->subcmd_code,
3496 cmd->data.setadapterparms.hdr.return_code);
3497
3498 /* ensure isolation mode is "none" */
3499 card->options.isolation = ISOLATION_MODE_NONE;
3500 rc = 0;
3501 break;
3502 }
3503 }
3504 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
3505 return rc;
3506 }
3507
3508 static int qeth_setadpparms_set_access_ctrl(struct qeth_card *card,
3509 enum qeth_ipa_isolation_modes isolation)
3510 {
3511 int rc;
3512 struct qeth_cmd_buffer *iob;
3513 struct qeth_ipa_cmd *cmd;
3514 struct qeth_set_access_ctrl *access_ctrl_req;
3515
3516 QETH_CARD_TEXT(card, 4, "setacctl");
3517
3518 QETH_DBF_TEXT_(SETUP, 2, "setacctl");
3519 QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name);
3520
3521 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_ACCESS_CONTROL,
3522 sizeof(struct qeth_ipacmd_setadpparms_hdr) +
3523 sizeof(struct qeth_set_access_ctrl));
3524 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
3525 access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl;
3526 access_ctrl_req->subcmd_code = isolation;
3527
3528 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_set_access_ctrl_cb,
3529 NULL);
3530 QETH_DBF_TEXT_(SETUP, 2, "rc=%d", rc);
3531 return rc;
3532 }
3533
3534 int qeth_set_access_ctrl_online(struct qeth_card *card)
3535 {
3536 int rc = 0;
3537
3538 QETH_CARD_TEXT(card, 4, "setactlo");
3539
3540 if ((card->info.type == QETH_CARD_TYPE_OSD ||
3541 card->info.type == QETH_CARD_TYPE_OSX) &&
3542 qeth_adp_supported(card, IPA_SETADP_SET_ACCESS_CONTROL)) {
3543 rc = qeth_setadpparms_set_access_ctrl(card,
3544 card->options.isolation);
3545 if (rc) {
3546 QETH_DBF_MESSAGE(3,
3547 "IPA(SET_ACCESS_CTRL,%s,%d) sent failed\n",
3548 card->gdev->dev.kobj.name,
3549 rc);
3550 }
3551 } else if (card->options.isolation != ISOLATION_MODE_NONE) {
3552 card->options.isolation = ISOLATION_MODE_NONE;
3553
3554 dev_err(&card->gdev->dev, "Adapter does not "
3555 "support QDIO data connection isolation\n");
3556 rc = -EOPNOTSUPP;
3557 }
3558 return rc;
3559 }
3560 EXPORT_SYMBOL_GPL(qeth_set_access_ctrl_online);
3561
3562 void qeth_tx_timeout(struct net_device *dev)
3563 {
3564 struct qeth_card *card;
3565
3566 card = dev->ml_priv;
3567 QETH_CARD_TEXT(card, 4, "txtimeo");
3568 card->stats.tx_errors++;
3569 qeth_schedule_recovery(card);
3570 }
3571 EXPORT_SYMBOL_GPL(qeth_tx_timeout);
3572
3573 int qeth_mdio_read(struct net_device *dev, int phy_id, int regnum)
3574 {
3575 struct qeth_card *card = dev->ml_priv;
3576 int rc = 0;
3577
3578 switch (regnum) {
3579 case MII_BMCR: /* Basic mode control register */
3580 rc = BMCR_FULLDPLX;
3581 if ((card->info.link_type != QETH_LINK_TYPE_GBIT_ETH) &&
3582 (card->info.link_type != QETH_LINK_TYPE_OSN) &&
3583 (card->info.link_type != QETH_LINK_TYPE_10GBIT_ETH))
3584 rc |= BMCR_SPEED100;
3585 break;
3586 case MII_BMSR: /* Basic mode status register */
3587 rc = BMSR_ERCAP | BMSR_ANEGCOMPLETE | BMSR_LSTATUS |
3588 BMSR_10HALF | BMSR_10FULL | BMSR_100HALF | BMSR_100FULL |
3589 BMSR_100BASE4;
3590 break;
3591 case MII_PHYSID1: /* PHYS ID 1 */
3592 rc = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 8) |
3593 dev->dev_addr[2];
3594 rc = (rc >> 5) & 0xFFFF;
3595 break;
3596 case MII_PHYSID2: /* PHYS ID 2 */
3597 rc = (dev->dev_addr[2] << 10) & 0xFFFF;
3598 break;
3599 case MII_ADVERTISE: /* Advertisement control reg */
3600 rc = ADVERTISE_ALL;
3601 break;
3602 case MII_LPA: /* Link partner ability reg */
3603 rc = LPA_10HALF | LPA_10FULL | LPA_100HALF | LPA_100FULL |
3604 LPA_100BASE4 | LPA_LPACK;
3605 break;
3606 case MII_EXPANSION: /* Expansion register */
3607 break;
3608 case MII_DCOUNTER: /* disconnect counter */
3609 break;
3610 case MII_FCSCOUNTER: /* false carrier counter */
3611 break;
3612 case MII_NWAYTEST: /* N-way auto-neg test register */
3613 break;
3614 case MII_RERRCOUNTER: /* rx error counter */
3615 rc = card->stats.rx_errors;
3616 break;
3617 case MII_SREVISION: /* silicon revision */
3618 break;
3619 case MII_RESV1: /* reserved 1 */
3620 break;
3621 case MII_LBRERROR: /* loopback, rx, bypass error */
3622 break;
3623 case MII_PHYADDR: /* physical address */
3624 break;
3625 case MII_RESV2: /* reserved 2 */
3626 break;
3627 case MII_TPISTATUS: /* TPI status for 10mbps */
3628 break;
3629 case MII_NCONFIG: /* network interface config */
3630 break;
3631 default:
3632 break;
3633 }
3634 return rc;
3635 }
3636 EXPORT_SYMBOL_GPL(qeth_mdio_read);
3637
3638 static int qeth_send_ipa_snmp_cmd(struct qeth_card *card,
3639 struct qeth_cmd_buffer *iob, int len,
3640 int (*reply_cb)(struct qeth_card *, struct qeth_reply *,
3641 unsigned long),
3642 void *reply_param)
3643 {
3644 u16 s1, s2;
3645
3646 QETH_CARD_TEXT(card, 4, "sendsnmp");
3647
3648 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
3649 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
3650 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
3651 /* adjust PDU length fields in IPA_PDU_HEADER */
3652 s1 = (u32) IPA_PDU_HEADER_SIZE + len;
3653 s2 = (u32) len;
3654 memcpy(QETH_IPA_PDU_LEN_TOTAL(iob->data), &s1, 2);
3655 memcpy(QETH_IPA_PDU_LEN_PDU1(iob->data), &s2, 2);
3656 memcpy(QETH_IPA_PDU_LEN_PDU2(iob->data), &s2, 2);
3657 memcpy(QETH_IPA_PDU_LEN_PDU3(iob->data), &s2, 2);
3658 return qeth_send_control_data(card, IPA_PDU_HEADER_SIZE + len, iob,
3659 reply_cb, reply_param);
3660 }
3661
3662 static int qeth_snmp_command_cb(struct qeth_card *card,
3663 struct qeth_reply *reply, unsigned long sdata)
3664 {
3665 struct qeth_ipa_cmd *cmd;
3666 struct qeth_arp_query_info *qinfo;
3667 struct qeth_snmp_cmd *snmp;
3668 unsigned char *data;
3669 __u16 data_len;
3670
3671 QETH_CARD_TEXT(card, 3, "snpcmdcb");
3672
3673 cmd = (struct qeth_ipa_cmd *) sdata;
3674 data = (unsigned char *)((char *)cmd - reply->offset);
3675 qinfo = (struct qeth_arp_query_info *) reply->param;
3676 snmp = &cmd->data.setadapterparms.data.snmp;
3677
3678 if (cmd->hdr.return_code) {
3679 QETH_CARD_TEXT_(card, 4, "scer1%i", cmd->hdr.return_code);
3680 return 0;
3681 }
3682 if (cmd->data.setadapterparms.hdr.return_code) {
3683 cmd->hdr.return_code =
3684 cmd->data.setadapterparms.hdr.return_code;
3685 QETH_CARD_TEXT_(card, 4, "scer2%i", cmd->hdr.return_code);
3686 return 0;
3687 }
3688 data_len = *((__u16 *)QETH_IPA_PDU_LEN_PDU1(data));
3689 if (cmd->data.setadapterparms.hdr.seq_no == 1)
3690 data_len -= (__u16)((char *)&snmp->data - (char *)cmd);
3691 else
3692 data_len -= (__u16)((char *)&snmp->request - (char *)cmd);
3693
3694 /* check if there is enough room in userspace */
3695 if ((qinfo->udata_len - qinfo->udata_offset) < data_len) {
3696 QETH_CARD_TEXT_(card, 4, "scer3%i", -ENOMEM);
3697 cmd->hdr.return_code = -ENOMEM;
3698 return 0;
3699 }
3700 QETH_CARD_TEXT_(card, 4, "snore%i",
3701 cmd->data.setadapterparms.hdr.used_total);
3702 QETH_CARD_TEXT_(card, 4, "sseqn%i",
3703 cmd->data.setadapterparms.hdr.seq_no);
3704 /*copy entries to user buffer*/
3705 if (cmd->data.setadapterparms.hdr.seq_no == 1) {
3706 memcpy(qinfo->udata + qinfo->udata_offset,
3707 (char *)snmp,
3708 data_len + offsetof(struct qeth_snmp_cmd, data));
3709 qinfo->udata_offset += offsetof(struct qeth_snmp_cmd, data);
3710 } else {
3711 memcpy(qinfo->udata + qinfo->udata_offset,
3712 (char *)&snmp->request, data_len);
3713 }
3714 qinfo->udata_offset += data_len;
3715 /* check if all replies received ... */
3716 QETH_CARD_TEXT_(card, 4, "srtot%i",
3717 cmd->data.setadapterparms.hdr.used_total);
3718 QETH_CARD_TEXT_(card, 4, "srseq%i",
3719 cmd->data.setadapterparms.hdr.seq_no);
3720 if (cmd->data.setadapterparms.hdr.seq_no <
3721 cmd->data.setadapterparms.hdr.used_total)
3722 return 1;
3723 return 0;
3724 }
3725
3726 int qeth_snmp_command(struct qeth_card *card, char __user *udata)
3727 {
3728 struct qeth_cmd_buffer *iob;
3729 struct qeth_ipa_cmd *cmd;
3730 struct qeth_snmp_ureq *ureq;
3731 int req_len;
3732 struct qeth_arp_query_info qinfo = {0, };
3733 int rc = 0;
3734
3735 QETH_CARD_TEXT(card, 3, "snmpcmd");
3736
3737 if (card->info.guestlan)
3738 return -EOPNOTSUPP;
3739
3740 if ((!qeth_adp_supported(card, IPA_SETADP_SET_SNMP_CONTROL)) &&
3741 (!card->options.layer2)) {
3742 return -EOPNOTSUPP;
3743 }
3744 /* skip 4 bytes (data_len struct member) to get req_len */
3745 if (copy_from_user(&req_len, udata + sizeof(int), sizeof(int)))
3746 return -EFAULT;
3747 ureq = kmalloc(req_len+sizeof(struct qeth_snmp_ureq_hdr), GFP_KERNEL);
3748 if (!ureq) {
3749 QETH_CARD_TEXT(card, 2, "snmpnome");
3750 return -ENOMEM;
3751 }
3752 if (copy_from_user(ureq, udata,
3753 req_len + sizeof(struct qeth_snmp_ureq_hdr))) {
3754 kfree(ureq);
3755 return -EFAULT;
3756 }
3757 qinfo.udata_len = ureq->hdr.data_len;
3758 qinfo.udata = kzalloc(qinfo.udata_len, GFP_KERNEL);
3759 if (!qinfo.udata) {
3760 kfree(ureq);
3761 return -ENOMEM;
3762 }
3763 qinfo.udata_offset = sizeof(struct qeth_snmp_ureq_hdr);
3764
3765 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_SNMP_CONTROL,
3766 QETH_SNMP_SETADP_CMDLENGTH + req_len);
3767 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
3768 memcpy(&cmd->data.setadapterparms.data.snmp, &ureq->cmd, req_len);
3769 rc = qeth_send_ipa_snmp_cmd(card, iob, QETH_SETADP_BASE_LEN + req_len,
3770 qeth_snmp_command_cb, (void *)&qinfo);
3771 if (rc)
3772 QETH_DBF_MESSAGE(2, "SNMP command failed on %s: (0x%x)\n",
3773 QETH_CARD_IFNAME(card), rc);
3774 else {
3775 if (copy_to_user(udata, qinfo.udata, qinfo.udata_len))
3776 rc = -EFAULT;
3777 }
3778
3779 kfree(ureq);
3780 kfree(qinfo.udata);
3781 return rc;
3782 }
3783 EXPORT_SYMBOL_GPL(qeth_snmp_command);
3784
3785 static inline int qeth_get_qdio_q_format(struct qeth_card *card)
3786 {
3787 switch (card->info.type) {
3788 case QETH_CARD_TYPE_IQD:
3789 return 2;
3790 default:
3791 return 0;
3792 }
3793 }
3794
3795 static int qeth_qdio_establish(struct qeth_card *card)
3796 {
3797 struct qdio_initialize init_data;
3798 char *qib_param_field;
3799 struct qdio_buffer **in_sbal_ptrs;
3800 struct qdio_buffer **out_sbal_ptrs;
3801 int i, j, k;
3802 int rc = 0;
3803
3804 QETH_DBF_TEXT(SETUP, 2, "qdioest");
3805
3806 qib_param_field = kzalloc(QDIO_MAX_BUFFERS_PER_Q * sizeof(char),
3807 GFP_KERNEL);
3808 if (!qib_param_field)
3809 return -ENOMEM;
3810
3811 qeth_create_qib_param_field(card, qib_param_field);
3812 qeth_create_qib_param_field_blkt(card, qib_param_field);
3813
3814 in_sbal_ptrs = kmalloc(QDIO_MAX_BUFFERS_PER_Q * sizeof(void *),
3815 GFP_KERNEL);
3816 if (!in_sbal_ptrs) {
3817 kfree(qib_param_field);
3818 return -ENOMEM;
3819 }
3820 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i)
3821 in_sbal_ptrs[i] = (struct qdio_buffer *)
3822 virt_to_phys(card->qdio.in_q->bufs[i].buffer);
3823
3824 out_sbal_ptrs =
3825 kmalloc(card->qdio.no_out_queues * QDIO_MAX_BUFFERS_PER_Q *
3826 sizeof(void *), GFP_KERNEL);
3827 if (!out_sbal_ptrs) {
3828 kfree(in_sbal_ptrs);
3829 kfree(qib_param_field);
3830 return -ENOMEM;
3831 }
3832 for (i = 0, k = 0; i < card->qdio.no_out_queues; ++i)
3833 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j, ++k) {
3834 out_sbal_ptrs[k] = (struct qdio_buffer *)virt_to_phys(
3835 card->qdio.out_qs[i]->bufs[j].buffer);
3836 }
3837
3838 memset(&init_data, 0, sizeof(struct qdio_initialize));
3839 init_data.cdev = CARD_DDEV(card);
3840 init_data.q_format = qeth_get_qdio_q_format(card);
3841 init_data.qib_param_field_format = 0;
3842 init_data.qib_param_field = qib_param_field;
3843 init_data.no_input_qs = 1;
3844 init_data.no_output_qs = card->qdio.no_out_queues;
3845 init_data.input_handler = card->discipline.input_handler;
3846 init_data.output_handler = card->discipline.output_handler;
3847 init_data.int_parm = (unsigned long) card;
3848 init_data.input_sbal_addr_array = (void **) in_sbal_ptrs;
3849 init_data.output_sbal_addr_array = (void **) out_sbal_ptrs;
3850
3851 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ALLOCATED,
3852 QETH_QDIO_ESTABLISHED) == QETH_QDIO_ALLOCATED) {
3853 rc = qdio_allocate(&init_data);
3854 if (rc) {
3855 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
3856 goto out;
3857 }
3858 rc = qdio_establish(&init_data);
3859 if (rc) {
3860 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
3861 qdio_free(CARD_DDEV(card));
3862 }
3863 }
3864 out:
3865 kfree(out_sbal_ptrs);
3866 kfree(in_sbal_ptrs);
3867 kfree(qib_param_field);
3868 return rc;
3869 }
3870
3871 static void qeth_core_free_card(struct qeth_card *card)
3872 {
3873
3874 QETH_DBF_TEXT(SETUP, 2, "freecrd");
3875 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
3876 qeth_clean_channel(&card->read);
3877 qeth_clean_channel(&card->write);
3878 if (card->dev)
3879 free_netdev(card->dev);
3880 kfree(card->ip_tbd_list);
3881 qeth_free_qdio_buffers(card);
3882 unregister_service_level(&card->qeth_service_level);
3883 kfree(card);
3884 }
3885
3886 static struct ccw_device_id qeth_ids[] = {
3887 {CCW_DEVICE_DEVTYPE(0x1731, 0x01, 0x1732, 0x01),
3888 .driver_info = QETH_CARD_TYPE_OSD},
3889 {CCW_DEVICE_DEVTYPE(0x1731, 0x05, 0x1732, 0x05),
3890 .driver_info = QETH_CARD_TYPE_IQD},
3891 {CCW_DEVICE_DEVTYPE(0x1731, 0x06, 0x1732, 0x06),
3892 .driver_info = QETH_CARD_TYPE_OSN},
3893 {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x03),
3894 .driver_info = QETH_CARD_TYPE_OSM},
3895 {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x02),
3896 .driver_info = QETH_CARD_TYPE_OSX},
3897 {},
3898 };
3899 MODULE_DEVICE_TABLE(ccw, qeth_ids);
3900
3901 static struct ccw_driver qeth_ccw_driver = {
3902 .name = "qeth",
3903 .ids = qeth_ids,
3904 .probe = ccwgroup_probe_ccwdev,
3905 .remove = ccwgroup_remove_ccwdev,
3906 };
3907
3908 static int qeth_core_driver_group(const char *buf, struct device *root_dev,
3909 unsigned long driver_id)
3910 {
3911 return ccwgroup_create_from_string(root_dev, driver_id,
3912 &qeth_ccw_driver, 3, buf);
3913 }
3914
3915 int qeth_core_hardsetup_card(struct qeth_card *card)
3916 {
3917 int retries = 0;
3918 int rc;
3919
3920 QETH_DBF_TEXT(SETUP, 2, "hrdsetup");
3921 atomic_set(&card->force_alloc_skb, 0);
3922 retry:
3923 if (retries)
3924 QETH_DBF_MESSAGE(2, "%s Retrying to do IDX activates.\n",
3925 dev_name(&card->gdev->dev));
3926 ccw_device_set_offline(CARD_DDEV(card));
3927 ccw_device_set_offline(CARD_WDEV(card));
3928 ccw_device_set_offline(CARD_RDEV(card));
3929 rc = ccw_device_set_online(CARD_RDEV(card));
3930 if (rc)
3931 goto retriable;
3932 rc = ccw_device_set_online(CARD_WDEV(card));
3933 if (rc)
3934 goto retriable;
3935 rc = ccw_device_set_online(CARD_DDEV(card));
3936 if (rc)
3937 goto retriable;
3938 rc = qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
3939 retriable:
3940 if (rc == -ERESTARTSYS) {
3941 QETH_DBF_TEXT(SETUP, 2, "break1");
3942 return rc;
3943 } else if (rc) {
3944 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
3945 if (++retries > 3)
3946 goto out;
3947 else
3948 goto retry;
3949 }
3950 qeth_init_tokens(card);
3951 qeth_init_func_level(card);
3952 rc = qeth_idx_activate_channel(&card->read, qeth_idx_read_cb);
3953 if (rc == -ERESTARTSYS) {
3954 QETH_DBF_TEXT(SETUP, 2, "break2");
3955 return rc;
3956 } else if (rc) {
3957 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
3958 if (--retries < 0)
3959 goto out;
3960 else
3961 goto retry;
3962 }
3963 rc = qeth_idx_activate_channel(&card->write, qeth_idx_write_cb);
3964 if (rc == -ERESTARTSYS) {
3965 QETH_DBF_TEXT(SETUP, 2, "break3");
3966 return rc;
3967 } else if (rc) {
3968 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
3969 if (--retries < 0)
3970 goto out;
3971 else
3972 goto retry;
3973 }
3974 rc = qeth_mpc_initialize(card);
3975 if (rc) {
3976 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
3977 goto out;
3978 }
3979 return 0;
3980 out:
3981 dev_warn(&card->gdev->dev, "The qeth device driver failed to recover "
3982 "an error on the device\n");
3983 QETH_DBF_MESSAGE(2, "%s Initialization in hardsetup failed! rc=%d\n",
3984 dev_name(&card->gdev->dev), rc);
3985 return rc;
3986 }
3987 EXPORT_SYMBOL_GPL(qeth_core_hardsetup_card);
3988
3989 static inline int qeth_create_skb_frag(struct qdio_buffer_element *element,
3990 struct sk_buff **pskb, int offset, int *pfrag, int data_len)
3991 {
3992 struct page *page = virt_to_page(element->addr);
3993 if (*pskb == NULL) {
3994 /* the upper protocol layers assume that there is data in the
3995 * skb itself. Copy a small amount (64 bytes) to make them
3996 * happy. */
3997 *pskb = dev_alloc_skb(64 + ETH_HLEN);
3998 if (!(*pskb))
3999 return -ENOMEM;
4000 skb_reserve(*pskb, ETH_HLEN);
4001 if (data_len <= 64) {
4002 memcpy(skb_put(*pskb, data_len), element->addr + offset,
4003 data_len);
4004 } else {
4005 get_page(page);
4006 memcpy(skb_put(*pskb, 64), element->addr + offset, 64);
4007 skb_fill_page_desc(*pskb, *pfrag, page, offset + 64,
4008 data_len - 64);
4009 (*pskb)->data_len += data_len - 64;
4010 (*pskb)->len += data_len - 64;
4011 (*pskb)->truesize += data_len - 64;
4012 (*pfrag)++;
4013 }
4014 } else {
4015 get_page(page);
4016 skb_fill_page_desc(*pskb, *pfrag, page, offset, data_len);
4017 (*pskb)->data_len += data_len;
4018 (*pskb)->len += data_len;
4019 (*pskb)->truesize += data_len;
4020 (*pfrag)++;
4021 }
4022 return 0;
4023 }
4024
4025 struct sk_buff *qeth_core_get_next_skb(struct qeth_card *card,
4026 struct qdio_buffer *buffer,
4027 struct qdio_buffer_element **__element, int *__offset,
4028 struct qeth_hdr **hdr)
4029 {
4030 struct qdio_buffer_element *element = *__element;
4031 int offset = *__offset;
4032 struct sk_buff *skb = NULL;
4033 int skb_len = 0;
4034 void *data_ptr;
4035 int data_len;
4036 int headroom = 0;
4037 int use_rx_sg = 0;
4038 int frag = 0;
4039
4040 /* qeth_hdr must not cross element boundaries */
4041 if (element->length < offset + sizeof(struct qeth_hdr)) {
4042 if (qeth_is_last_sbale(element))
4043 return NULL;
4044 element++;
4045 offset = 0;
4046 if (element->length < sizeof(struct qeth_hdr))
4047 return NULL;
4048 }
4049 *hdr = element->addr + offset;
4050
4051 offset += sizeof(struct qeth_hdr);
4052 switch ((*hdr)->hdr.l2.id) {
4053 case QETH_HEADER_TYPE_LAYER2:
4054 skb_len = (*hdr)->hdr.l2.pkt_length;
4055 break;
4056 case QETH_HEADER_TYPE_LAYER3:
4057 skb_len = (*hdr)->hdr.l3.length;
4058 if ((card->info.link_type == QETH_LINK_TYPE_LANE_TR) ||
4059 (card->info.link_type == QETH_LINK_TYPE_HSTR))
4060 headroom = TR_HLEN;
4061 else
4062 headroom = ETH_HLEN;
4063 break;
4064 case QETH_HEADER_TYPE_OSN:
4065 skb_len = (*hdr)->hdr.osn.pdu_length;
4066 headroom = sizeof(struct qeth_hdr);
4067 break;
4068 default:
4069 break;
4070 }
4071
4072 if (!skb_len)
4073 return NULL;
4074
4075 if ((skb_len >= card->options.rx_sg_cb) &&
4076 (!(card->info.type == QETH_CARD_TYPE_OSN)) &&
4077 (!atomic_read(&card->force_alloc_skb))) {
4078 use_rx_sg = 1;
4079 } else {
4080 skb = dev_alloc_skb(skb_len + headroom);
4081 if (!skb)
4082 goto no_mem;
4083 if (headroom)
4084 skb_reserve(skb, headroom);
4085 }
4086
4087 data_ptr = element->addr + offset;
4088 while (skb_len) {
4089 data_len = min(skb_len, (int)(element->length - offset));
4090 if (data_len) {
4091 if (use_rx_sg) {
4092 if (qeth_create_skb_frag(element, &skb, offset,
4093 &frag, data_len))
4094 goto no_mem;
4095 } else {
4096 memcpy(skb_put(skb, data_len), data_ptr,
4097 data_len);
4098 }
4099 }
4100 skb_len -= data_len;
4101 if (skb_len) {
4102 if (qeth_is_last_sbale(element)) {
4103 QETH_CARD_TEXT(card, 4, "unexeob");
4104 QETH_CARD_HEX(card, 2, buffer, sizeof(void *));
4105 dev_kfree_skb_any(skb);
4106 card->stats.rx_errors++;
4107 return NULL;
4108 }
4109 element++;
4110 offset = 0;
4111 data_ptr = element->addr;
4112 } else {
4113 offset += data_len;
4114 }
4115 }
4116 *__element = element;
4117 *__offset = offset;
4118 if (use_rx_sg && card->options.performance_stats) {
4119 card->perf_stats.sg_skbs_rx++;
4120 card->perf_stats.sg_frags_rx += skb_shinfo(skb)->nr_frags;
4121 }
4122 return skb;
4123 no_mem:
4124 if (net_ratelimit()) {
4125 QETH_CARD_TEXT(card, 2, "noskbmem");
4126 }
4127 card->stats.rx_dropped++;
4128 return NULL;
4129 }
4130 EXPORT_SYMBOL_GPL(qeth_core_get_next_skb);
4131
4132 static void qeth_unregister_dbf_views(void)
4133 {
4134 int x;
4135 for (x = 0; x < QETH_DBF_INFOS; x++) {
4136 debug_unregister(qeth_dbf[x].id);
4137 qeth_dbf[x].id = NULL;
4138 }
4139 }
4140
4141 void qeth_dbf_longtext(debug_info_t *id, int level, char *fmt, ...)
4142 {
4143 char dbf_txt_buf[32];
4144 va_list args;
4145
4146 if (level > id->level)
4147 return;
4148 va_start(args, fmt);
4149 vsnprintf(dbf_txt_buf, sizeof(dbf_txt_buf), fmt, args);
4150 va_end(args);
4151 debug_text_event(id, level, dbf_txt_buf);
4152 }
4153 EXPORT_SYMBOL_GPL(qeth_dbf_longtext);
4154
4155 static int qeth_register_dbf_views(void)
4156 {
4157 int ret;
4158 int x;
4159
4160 for (x = 0; x < QETH_DBF_INFOS; x++) {
4161 /* register the areas */
4162 qeth_dbf[x].id = debug_register(qeth_dbf[x].name,
4163 qeth_dbf[x].pages,
4164 qeth_dbf[x].areas,
4165 qeth_dbf[x].len);
4166 if (qeth_dbf[x].id == NULL) {
4167 qeth_unregister_dbf_views();
4168 return -ENOMEM;
4169 }
4170
4171 /* register a view */
4172 ret = debug_register_view(qeth_dbf[x].id, qeth_dbf[x].view);
4173 if (ret) {
4174 qeth_unregister_dbf_views();
4175 return ret;
4176 }
4177
4178 /* set a passing level */
4179 debug_set_level(qeth_dbf[x].id, qeth_dbf[x].level);
4180 }
4181
4182 return 0;
4183 }
4184
4185 int qeth_core_load_discipline(struct qeth_card *card,
4186 enum qeth_discipline_id discipline)
4187 {
4188 int rc = 0;
4189 switch (discipline) {
4190 case QETH_DISCIPLINE_LAYER3:
4191 card->discipline.ccwgdriver = try_then_request_module(
4192 symbol_get(qeth_l3_ccwgroup_driver),
4193 "qeth_l3");
4194 break;
4195 case QETH_DISCIPLINE_LAYER2:
4196 card->discipline.ccwgdriver = try_then_request_module(
4197 symbol_get(qeth_l2_ccwgroup_driver),
4198 "qeth_l2");
4199 break;
4200 }
4201 if (!card->discipline.ccwgdriver) {
4202 dev_err(&card->gdev->dev, "There is no kernel module to "
4203 "support discipline %d\n", discipline);
4204 rc = -EINVAL;
4205 }
4206 return rc;
4207 }
4208
4209 void qeth_core_free_discipline(struct qeth_card *card)
4210 {
4211 if (card->options.layer2)
4212 symbol_put(qeth_l2_ccwgroup_driver);
4213 else
4214 symbol_put(qeth_l3_ccwgroup_driver);
4215 card->discipline.ccwgdriver = NULL;
4216 }
4217
4218 static void qeth_determine_capabilities(struct qeth_card *card)
4219 {
4220 int rc;
4221 int length;
4222 char *prcd;
4223
4224 QETH_DBF_TEXT(SETUP, 2, "detcapab");
4225 rc = ccw_device_set_online(CARD_DDEV(card));
4226 if (rc) {
4227 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4228 goto out;
4229 }
4230
4231
4232 rc = qeth_read_conf_data(card, (void **) &prcd, &length);
4233 if (rc) {
4234 QETH_DBF_MESSAGE(2, "%s qeth_read_conf_data returned %i\n",
4235 dev_name(&card->gdev->dev), rc);
4236 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4237 goto out_offline;
4238 }
4239 qeth_configure_unitaddr(card, prcd);
4240 qeth_configure_blkt_default(card, prcd);
4241 kfree(prcd);
4242
4243 rc = qdio_get_ssqd_desc(CARD_DDEV(card), &card->ssqd);
4244 if (rc)
4245 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
4246
4247 out_offline:
4248 ccw_device_set_offline(CARD_DDEV(card));
4249 out:
4250 return;
4251 }
4252
4253 static int qeth_core_probe_device(struct ccwgroup_device *gdev)
4254 {
4255 struct qeth_card *card;
4256 struct device *dev;
4257 int rc;
4258 unsigned long flags;
4259 char dbf_name[20];
4260
4261 QETH_DBF_TEXT(SETUP, 2, "probedev");
4262
4263 dev = &gdev->dev;
4264 if (!get_device(dev))
4265 return -ENODEV;
4266
4267 QETH_DBF_TEXT_(SETUP, 2, "%s", dev_name(&gdev->dev));
4268
4269 card = qeth_alloc_card();
4270 if (!card) {
4271 QETH_DBF_TEXT_(SETUP, 2, "1err%d", -ENOMEM);
4272 rc = -ENOMEM;
4273 goto err_dev;
4274 }
4275
4276 snprintf(dbf_name, sizeof(dbf_name), "qeth_card_%s",
4277 dev_name(&gdev->dev));
4278 card->debug = debug_register(dbf_name, 2, 1, 8);
4279 if (!card->debug) {
4280 QETH_DBF_TEXT_(SETUP, 2, "%s", "qcdbf");
4281 rc = -ENOMEM;
4282 goto err_card;
4283 }
4284 debug_register_view(card->debug, &debug_hex_ascii_view);
4285
4286 card->read.ccwdev = gdev->cdev[0];
4287 card->write.ccwdev = gdev->cdev[1];
4288 card->data.ccwdev = gdev->cdev[2];
4289 dev_set_drvdata(&gdev->dev, card);
4290 card->gdev = gdev;
4291 gdev->cdev[0]->handler = qeth_irq;
4292 gdev->cdev[1]->handler = qeth_irq;
4293 gdev->cdev[2]->handler = qeth_irq;
4294
4295 rc = qeth_determine_card_type(card);
4296 if (rc) {
4297 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4298 goto err_dbf;
4299 }
4300 rc = qeth_setup_card(card);
4301 if (rc) {
4302 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
4303 goto err_dbf;
4304 }
4305
4306 if (card->info.type == QETH_CARD_TYPE_OSN)
4307 rc = qeth_core_create_osn_attributes(dev);
4308 else
4309 rc = qeth_core_create_device_attributes(dev);
4310 if (rc)
4311 goto err_dbf;
4312 switch (card->info.type) {
4313 case QETH_CARD_TYPE_OSN:
4314 case QETH_CARD_TYPE_OSM:
4315 rc = qeth_core_load_discipline(card, QETH_DISCIPLINE_LAYER2);
4316 if (rc)
4317 goto err_attr;
4318 rc = card->discipline.ccwgdriver->probe(card->gdev);
4319 if (rc)
4320 goto err_disc;
4321 case QETH_CARD_TYPE_OSD:
4322 case QETH_CARD_TYPE_OSX:
4323 default:
4324 break;
4325 }
4326
4327 write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
4328 list_add_tail(&card->list, &qeth_core_card_list.list);
4329 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
4330
4331 qeth_determine_capabilities(card);
4332 return 0;
4333
4334 err_disc:
4335 qeth_core_free_discipline(card);
4336 err_attr:
4337 if (card->info.type == QETH_CARD_TYPE_OSN)
4338 qeth_core_remove_osn_attributes(dev);
4339 else
4340 qeth_core_remove_device_attributes(dev);
4341 err_dbf:
4342 debug_unregister(card->debug);
4343 err_card:
4344 qeth_core_free_card(card);
4345 err_dev:
4346 put_device(dev);
4347 return rc;
4348 }
4349
4350 static void qeth_core_remove_device(struct ccwgroup_device *gdev)
4351 {
4352 unsigned long flags;
4353 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4354
4355 QETH_DBF_TEXT(SETUP, 2, "removedv");
4356 if (card->discipline.ccwgdriver) {
4357 card->discipline.ccwgdriver->remove(gdev);
4358 qeth_core_free_discipline(card);
4359 }
4360
4361 if (card->info.type == QETH_CARD_TYPE_OSN) {
4362 qeth_core_remove_osn_attributes(&gdev->dev);
4363 } else {
4364 qeth_core_remove_device_attributes(&gdev->dev);
4365 }
4366 debug_unregister(card->debug);
4367 write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
4368 list_del(&card->list);
4369 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
4370 qeth_core_free_card(card);
4371 dev_set_drvdata(&gdev->dev, NULL);
4372 put_device(&gdev->dev);
4373 return;
4374 }
4375
4376 static int qeth_core_set_online(struct ccwgroup_device *gdev)
4377 {
4378 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4379 int rc = 0;
4380 int def_discipline;
4381
4382 if (!card->discipline.ccwgdriver) {
4383 if (card->info.type == QETH_CARD_TYPE_IQD)
4384 def_discipline = QETH_DISCIPLINE_LAYER3;
4385 else
4386 def_discipline = QETH_DISCIPLINE_LAYER2;
4387 rc = qeth_core_load_discipline(card, def_discipline);
4388 if (rc)
4389 goto err;
4390 rc = card->discipline.ccwgdriver->probe(card->gdev);
4391 if (rc)
4392 goto err;
4393 }
4394 rc = card->discipline.ccwgdriver->set_online(gdev);
4395 err:
4396 return rc;
4397 }
4398
4399 static int qeth_core_set_offline(struct ccwgroup_device *gdev)
4400 {
4401 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4402 return card->discipline.ccwgdriver->set_offline(gdev);
4403 }
4404
4405 static void qeth_core_shutdown(struct ccwgroup_device *gdev)
4406 {
4407 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4408 if (card->discipline.ccwgdriver &&
4409 card->discipline.ccwgdriver->shutdown)
4410 card->discipline.ccwgdriver->shutdown(gdev);
4411 }
4412
4413 static int qeth_core_prepare(struct ccwgroup_device *gdev)
4414 {
4415 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4416 if (card->discipline.ccwgdriver &&
4417 card->discipline.ccwgdriver->prepare)
4418 return card->discipline.ccwgdriver->prepare(gdev);
4419 return 0;
4420 }
4421
4422 static void qeth_core_complete(struct ccwgroup_device *gdev)
4423 {
4424 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4425 if (card->discipline.ccwgdriver &&
4426 card->discipline.ccwgdriver->complete)
4427 card->discipline.ccwgdriver->complete(gdev);
4428 }
4429
4430 static int qeth_core_freeze(struct ccwgroup_device *gdev)
4431 {
4432 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4433 if (card->discipline.ccwgdriver &&
4434 card->discipline.ccwgdriver->freeze)
4435 return card->discipline.ccwgdriver->freeze(gdev);
4436 return 0;
4437 }
4438
4439 static int qeth_core_thaw(struct ccwgroup_device *gdev)
4440 {
4441 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4442 if (card->discipline.ccwgdriver &&
4443 card->discipline.ccwgdriver->thaw)
4444 return card->discipline.ccwgdriver->thaw(gdev);
4445 return 0;
4446 }
4447
4448 static int qeth_core_restore(struct ccwgroup_device *gdev)
4449 {
4450 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4451 if (card->discipline.ccwgdriver &&
4452 card->discipline.ccwgdriver->restore)
4453 return card->discipline.ccwgdriver->restore(gdev);
4454 return 0;
4455 }
4456
4457 static struct ccwgroup_driver qeth_core_ccwgroup_driver = {
4458 .owner = THIS_MODULE,
4459 .name = "qeth",
4460 .driver_id = 0xD8C5E3C8,
4461 .probe = qeth_core_probe_device,
4462 .remove = qeth_core_remove_device,
4463 .set_online = qeth_core_set_online,
4464 .set_offline = qeth_core_set_offline,
4465 .shutdown = qeth_core_shutdown,
4466 .prepare = qeth_core_prepare,
4467 .complete = qeth_core_complete,
4468 .freeze = qeth_core_freeze,
4469 .thaw = qeth_core_thaw,
4470 .restore = qeth_core_restore,
4471 };
4472
4473 static ssize_t
4474 qeth_core_driver_group_store(struct device_driver *ddrv, const char *buf,
4475 size_t count)
4476 {
4477 int err;
4478 err = qeth_core_driver_group(buf, qeth_core_root_dev,
4479 qeth_core_ccwgroup_driver.driver_id);
4480 if (err)
4481 return err;
4482 else
4483 return count;
4484 }
4485
4486 static DRIVER_ATTR(group, 0200, NULL, qeth_core_driver_group_store);
4487
4488 static struct {
4489 const char str[ETH_GSTRING_LEN];
4490 } qeth_ethtool_stats_keys[] = {
4491 /* 0 */{"rx skbs"},
4492 {"rx buffers"},
4493 {"tx skbs"},
4494 {"tx buffers"},
4495 {"tx skbs no packing"},
4496 {"tx buffers no packing"},
4497 {"tx skbs packing"},
4498 {"tx buffers packing"},
4499 {"tx sg skbs"},
4500 {"tx sg frags"},
4501 /* 10 */{"rx sg skbs"},
4502 {"rx sg frags"},
4503 {"rx sg page allocs"},
4504 {"tx large kbytes"},
4505 {"tx large count"},
4506 {"tx pk state ch n->p"},
4507 {"tx pk state ch p->n"},
4508 {"tx pk watermark low"},
4509 {"tx pk watermark high"},
4510 {"queue 0 buffer usage"},
4511 /* 20 */{"queue 1 buffer usage"},
4512 {"queue 2 buffer usage"},
4513 {"queue 3 buffer usage"},
4514 {"rx handler time"},
4515 {"rx handler count"},
4516 {"rx do_QDIO time"},
4517 {"rx do_QDIO count"},
4518 {"tx handler time"},
4519 {"tx handler count"},
4520 {"tx time"},
4521 /* 30 */{"tx count"},
4522 {"tx do_QDIO time"},
4523 {"tx do_QDIO count"},
4524 {"tx csum"},
4525 {"tx lin"},
4526 };
4527
4528 int qeth_core_get_sset_count(struct net_device *dev, int stringset)
4529 {
4530 switch (stringset) {
4531 case ETH_SS_STATS:
4532 return (sizeof(qeth_ethtool_stats_keys) / ETH_GSTRING_LEN);
4533 default:
4534 return -EINVAL;
4535 }
4536 }
4537 EXPORT_SYMBOL_GPL(qeth_core_get_sset_count);
4538
4539 void qeth_core_get_ethtool_stats(struct net_device *dev,
4540 struct ethtool_stats *stats, u64 *data)
4541 {
4542 struct qeth_card *card = dev->ml_priv;
4543 data[0] = card->stats.rx_packets -
4544 card->perf_stats.initial_rx_packets;
4545 data[1] = card->perf_stats.bufs_rec;
4546 data[2] = card->stats.tx_packets -
4547 card->perf_stats.initial_tx_packets;
4548 data[3] = card->perf_stats.bufs_sent;
4549 data[4] = card->stats.tx_packets - card->perf_stats.initial_tx_packets
4550 - card->perf_stats.skbs_sent_pack;
4551 data[5] = card->perf_stats.bufs_sent - card->perf_stats.bufs_sent_pack;
4552 data[6] = card->perf_stats.skbs_sent_pack;
4553 data[7] = card->perf_stats.bufs_sent_pack;
4554 data[8] = card->perf_stats.sg_skbs_sent;
4555 data[9] = card->perf_stats.sg_frags_sent;
4556 data[10] = card->perf_stats.sg_skbs_rx;
4557 data[11] = card->perf_stats.sg_frags_rx;
4558 data[12] = card->perf_stats.sg_alloc_page_rx;
4559 data[13] = (card->perf_stats.large_send_bytes >> 10);
4560 data[14] = card->perf_stats.large_send_cnt;
4561 data[15] = card->perf_stats.sc_dp_p;
4562 data[16] = card->perf_stats.sc_p_dp;
4563 data[17] = QETH_LOW_WATERMARK_PACK;
4564 data[18] = QETH_HIGH_WATERMARK_PACK;
4565 data[19] = atomic_read(&card->qdio.out_qs[0]->used_buffers);
4566 data[20] = (card->qdio.no_out_queues > 1) ?
4567 atomic_read(&card->qdio.out_qs[1]->used_buffers) : 0;
4568 data[21] = (card->qdio.no_out_queues > 2) ?
4569 atomic_read(&card->qdio.out_qs[2]->used_buffers) : 0;
4570 data[22] = (card->qdio.no_out_queues > 3) ?
4571 atomic_read(&card->qdio.out_qs[3]->used_buffers) : 0;
4572 data[23] = card->perf_stats.inbound_time;
4573 data[24] = card->perf_stats.inbound_cnt;
4574 data[25] = card->perf_stats.inbound_do_qdio_time;
4575 data[26] = card->perf_stats.inbound_do_qdio_cnt;
4576 data[27] = card->perf_stats.outbound_handler_time;
4577 data[28] = card->perf_stats.outbound_handler_cnt;
4578 data[29] = card->perf_stats.outbound_time;
4579 data[30] = card->perf_stats.outbound_cnt;
4580 data[31] = card->perf_stats.outbound_do_qdio_time;
4581 data[32] = card->perf_stats.outbound_do_qdio_cnt;
4582 data[33] = card->perf_stats.tx_csum;
4583 data[34] = card->perf_stats.tx_lin;
4584 }
4585 EXPORT_SYMBOL_GPL(qeth_core_get_ethtool_stats);
4586
4587 void qeth_core_get_strings(struct net_device *dev, u32 stringset, u8 *data)
4588 {
4589 switch (stringset) {
4590 case ETH_SS_STATS:
4591 memcpy(data, &qeth_ethtool_stats_keys,
4592 sizeof(qeth_ethtool_stats_keys));
4593 break;
4594 default:
4595 WARN_ON(1);
4596 break;
4597 }
4598 }
4599 EXPORT_SYMBOL_GPL(qeth_core_get_strings);
4600
4601 void qeth_core_get_drvinfo(struct net_device *dev,
4602 struct ethtool_drvinfo *info)
4603 {
4604 struct qeth_card *card = dev->ml_priv;
4605 if (card->options.layer2)
4606 strcpy(info->driver, "qeth_l2");
4607 else
4608 strcpy(info->driver, "qeth_l3");
4609
4610 strcpy(info->version, "1.0");
4611 strcpy(info->fw_version, card->info.mcl_level);
4612 sprintf(info->bus_info, "%s/%s/%s",
4613 CARD_RDEV_ID(card),
4614 CARD_WDEV_ID(card),
4615 CARD_DDEV_ID(card));
4616 }
4617 EXPORT_SYMBOL_GPL(qeth_core_get_drvinfo);
4618
4619 int qeth_core_ethtool_get_settings(struct net_device *netdev,
4620 struct ethtool_cmd *ecmd)
4621 {
4622 struct qeth_card *card = netdev->ml_priv;
4623 enum qeth_link_types link_type;
4624
4625 if ((card->info.type == QETH_CARD_TYPE_IQD) || (card->info.guestlan))
4626 link_type = QETH_LINK_TYPE_10GBIT_ETH;
4627 else
4628 link_type = card->info.link_type;
4629
4630 ecmd->transceiver = XCVR_INTERNAL;
4631 ecmd->supported = SUPPORTED_Autoneg;
4632 ecmd->advertising = ADVERTISED_Autoneg;
4633 ecmd->duplex = DUPLEX_FULL;
4634 ecmd->autoneg = AUTONEG_ENABLE;
4635
4636 switch (link_type) {
4637 case QETH_LINK_TYPE_FAST_ETH:
4638 case QETH_LINK_TYPE_LANE_ETH100:
4639 ecmd->supported |= SUPPORTED_10baseT_Half |
4640 SUPPORTED_10baseT_Full |
4641 SUPPORTED_100baseT_Half |
4642 SUPPORTED_100baseT_Full |
4643 SUPPORTED_TP;
4644 ecmd->advertising |= ADVERTISED_10baseT_Half |
4645 ADVERTISED_10baseT_Full |
4646 ADVERTISED_100baseT_Half |
4647 ADVERTISED_100baseT_Full |
4648 ADVERTISED_TP;
4649 ecmd->speed = SPEED_100;
4650 ecmd->port = PORT_TP;
4651 break;
4652
4653 case QETH_LINK_TYPE_GBIT_ETH:
4654 case QETH_LINK_TYPE_LANE_ETH1000:
4655 ecmd->supported |= SUPPORTED_10baseT_Half |
4656 SUPPORTED_10baseT_Full |
4657 SUPPORTED_100baseT_Half |
4658 SUPPORTED_100baseT_Full |
4659 SUPPORTED_1000baseT_Half |
4660 SUPPORTED_1000baseT_Full |
4661 SUPPORTED_FIBRE;
4662 ecmd->advertising |= ADVERTISED_10baseT_Half |
4663 ADVERTISED_10baseT_Full |
4664 ADVERTISED_100baseT_Half |
4665 ADVERTISED_100baseT_Full |
4666 ADVERTISED_1000baseT_Half |
4667 ADVERTISED_1000baseT_Full |
4668 ADVERTISED_FIBRE;
4669 ecmd->speed = SPEED_1000;
4670 ecmd->port = PORT_FIBRE;
4671 break;
4672
4673 case QETH_LINK_TYPE_10GBIT_ETH:
4674 ecmd->supported |= SUPPORTED_10baseT_Half |
4675 SUPPORTED_10baseT_Full |
4676 SUPPORTED_100baseT_Half |
4677 SUPPORTED_100baseT_Full |
4678 SUPPORTED_1000baseT_Half |
4679 SUPPORTED_1000baseT_Full |
4680 SUPPORTED_10000baseT_Full |
4681 SUPPORTED_FIBRE;
4682 ecmd->advertising |= ADVERTISED_10baseT_Half |
4683 ADVERTISED_10baseT_Full |
4684 ADVERTISED_100baseT_Half |
4685 ADVERTISED_100baseT_Full |
4686 ADVERTISED_1000baseT_Half |
4687 ADVERTISED_1000baseT_Full |
4688 ADVERTISED_10000baseT_Full |
4689 ADVERTISED_FIBRE;
4690 ecmd->speed = SPEED_10000;
4691 ecmd->port = PORT_FIBRE;
4692 break;
4693
4694 default:
4695 ecmd->supported |= SUPPORTED_10baseT_Half |
4696 SUPPORTED_10baseT_Full |
4697 SUPPORTED_TP;
4698 ecmd->advertising |= ADVERTISED_10baseT_Half |
4699 ADVERTISED_10baseT_Full |
4700 ADVERTISED_TP;
4701 ecmd->speed = SPEED_10;
4702 ecmd->port = PORT_TP;
4703 }
4704
4705 return 0;
4706 }
4707 EXPORT_SYMBOL_GPL(qeth_core_ethtool_get_settings);
4708
4709 static int __init qeth_core_init(void)
4710 {
4711 int rc;
4712
4713 pr_info("loading core functions\n");
4714 INIT_LIST_HEAD(&qeth_core_card_list.list);
4715 rwlock_init(&qeth_core_card_list.rwlock);
4716
4717 rc = qeth_register_dbf_views();
4718 if (rc)
4719 goto out_err;
4720 rc = ccw_driver_register(&qeth_ccw_driver);
4721 if (rc)
4722 goto ccw_err;
4723 rc = ccwgroup_driver_register(&qeth_core_ccwgroup_driver);
4724 if (rc)
4725 goto ccwgroup_err;
4726 rc = driver_create_file(&qeth_core_ccwgroup_driver.driver,
4727 &driver_attr_group);
4728 if (rc)
4729 goto driver_err;
4730 qeth_core_root_dev = root_device_register("qeth");
4731 rc = IS_ERR(qeth_core_root_dev) ? PTR_ERR(qeth_core_root_dev) : 0;
4732 if (rc)
4733 goto register_err;
4734
4735 qeth_core_header_cache = kmem_cache_create("qeth_hdr",
4736 sizeof(struct qeth_hdr) + ETH_HLEN, 64, 0, NULL);
4737 if (!qeth_core_header_cache) {
4738 rc = -ENOMEM;
4739 goto slab_err;
4740 }
4741
4742 return 0;
4743 slab_err:
4744 root_device_unregister(qeth_core_root_dev);
4745 register_err:
4746 driver_remove_file(&qeth_core_ccwgroup_driver.driver,
4747 &driver_attr_group);
4748 driver_err:
4749 ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver);
4750 ccwgroup_err:
4751 ccw_driver_unregister(&qeth_ccw_driver);
4752 ccw_err:
4753 QETH_DBF_MESSAGE(2, "Initialization failed with code %d\n", rc);
4754 qeth_unregister_dbf_views();
4755 out_err:
4756 pr_err("Initializing the qeth device driver failed\n");
4757 return rc;
4758 }
4759
4760 static void __exit qeth_core_exit(void)
4761 {
4762 root_device_unregister(qeth_core_root_dev);
4763 driver_remove_file(&qeth_core_ccwgroup_driver.driver,
4764 &driver_attr_group);
4765 ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver);
4766 ccw_driver_unregister(&qeth_ccw_driver);
4767 kmem_cache_destroy(qeth_core_header_cache);
4768 qeth_unregister_dbf_views();
4769 pr_info("core functions removed\n");
4770 }
4771
4772 module_init(qeth_core_init);
4773 module_exit(qeth_core_exit);
4774 MODULE_AUTHOR("Frank Blaschka <frank.blaschka@de.ibm.com>");
4775 MODULE_DESCRIPTION("qeth core functions");
4776 MODULE_LICENSE("GPL");
x86 "subsystem" repository