Merge branch 'davinci-next' into davinci-for-linus
[linux-2.6/x86.git] / arch / arm / mach-davinci / devices.c
blob2a9a252327d8d1600368cab1f8b3cf49382f89b3
1 /*
2 * mach-davinci/devices.c
4 * DaVinci platform device setup/initialization
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
12 #include <linux/init.h>
13 #include <linux/platform_device.h>
14 #include <linux/dma-mapping.h>
15 #include <linux/io.h>
17 #include <mach/hardware.h>
18 #include <mach/i2c.h>
19 #include <mach/irqs.h>
20 #include <mach/cputype.h>
21 #include <mach/mux.h>
22 #include <mach/edma.h>
23 #include <mach/mmc.h>
24 #include <mach/time.h>
26 #include "clock.h"
28 #define DAVINCI_I2C_BASE 0x01C21000
29 #define DAVINCI_ATA_BASE 0x01C66000
30 #define DAVINCI_MMCSD0_BASE 0x01E10000
31 #define DM355_MMCSD0_BASE 0x01E11000
32 #define DM355_MMCSD1_BASE 0x01E00000
33 #define DM365_MMCSD0_BASE 0x01D11000
34 #define DM365_MMCSD1_BASE 0x01D00000
36 static struct resource i2c_resources[] = {
38 .start = DAVINCI_I2C_BASE,
39 .end = DAVINCI_I2C_BASE + 0x40,
40 .flags = IORESOURCE_MEM,
43 .start = IRQ_I2C,
44 .flags = IORESOURCE_IRQ,
48 static struct platform_device davinci_i2c_device = {
49 .name = "i2c_davinci",
50 .id = 1,
51 .num_resources = ARRAY_SIZE(i2c_resources),
52 .resource = i2c_resources,
55 void __init davinci_init_i2c(struct davinci_i2c_platform_data *pdata)
57 if (cpu_is_davinci_dm644x())
58 davinci_cfg_reg(DM644X_I2C);
60 davinci_i2c_device.dev.platform_data = pdata;
61 (void) platform_device_register(&davinci_i2c_device);
64 static struct resource ide_resources[] = {
66 .start = DAVINCI_ATA_BASE,
67 .end = DAVINCI_ATA_BASE + 0x7ff,
68 .flags = IORESOURCE_MEM,
71 .start = IRQ_IDE,
72 .end = IRQ_IDE,
73 .flags = IORESOURCE_IRQ,
77 static u64 ide_dma_mask = DMA_BIT_MASK(32);
79 static struct platform_device ide_device = {
80 .name = "palm_bk3710",
81 .id = -1,
82 .resource = ide_resources,
83 .num_resources = ARRAY_SIZE(ide_resources),
84 .dev = {
85 .dma_mask = &ide_dma_mask,
86 .coherent_dma_mask = DMA_BIT_MASK(32),
90 void __init davinci_init_ide(void)
92 if (cpu_is_davinci_dm644x()) {
93 davinci_cfg_reg(DM644X_HPIEN_DISABLE);
94 davinci_cfg_reg(DM644X_ATAEN);
95 davinci_cfg_reg(DM644X_HDIREN);
96 } else if (cpu_is_davinci_dm646x()) {
97 /* IRQ_DM646X_IDE is the same as IRQ_IDE */
98 davinci_cfg_reg(DM646X_ATAEN);
99 } else {
100 WARN_ON(1);
101 return;
104 platform_device_register(&ide_device);
107 #if defined(CONFIG_MMC_DAVINCI) || defined(CONFIG_MMC_DAVINCI_MODULE)
109 static u64 mmcsd0_dma_mask = DMA_BIT_MASK(32);
111 static struct resource mmcsd0_resources[] = {
113 /* different on dm355 */
114 .start = DAVINCI_MMCSD0_BASE,
115 .end = DAVINCI_MMCSD0_BASE + SZ_4K - 1,
116 .flags = IORESOURCE_MEM,
118 /* IRQs: MMC/SD, then SDIO */
120 .start = IRQ_MMCINT,
121 .flags = IORESOURCE_IRQ,
122 }, {
123 /* different on dm355 */
124 .start = IRQ_SDIOINT,
125 .flags = IORESOURCE_IRQ,
127 /* DMA channels: RX, then TX */
129 .start = EDMA_CTLR_CHAN(0, DAVINCI_DMA_MMCRXEVT),
130 .flags = IORESOURCE_DMA,
131 }, {
132 .start = EDMA_CTLR_CHAN(0, DAVINCI_DMA_MMCTXEVT),
133 .flags = IORESOURCE_DMA,
137 static struct platform_device davinci_mmcsd0_device = {
138 .name = "davinci_mmc",
139 .id = 0,
140 .dev = {
141 .dma_mask = &mmcsd0_dma_mask,
142 .coherent_dma_mask = DMA_BIT_MASK(32),
144 .num_resources = ARRAY_SIZE(mmcsd0_resources),
145 .resource = mmcsd0_resources,
148 static u64 mmcsd1_dma_mask = DMA_BIT_MASK(32);
150 static struct resource mmcsd1_resources[] = {
152 .start = DM355_MMCSD1_BASE,
153 .end = DM355_MMCSD1_BASE + SZ_4K - 1,
154 .flags = IORESOURCE_MEM,
156 /* IRQs: MMC/SD, then SDIO */
158 .start = IRQ_DM355_MMCINT1,
159 .flags = IORESOURCE_IRQ,
160 }, {
161 .start = IRQ_DM355_SDIOINT1,
162 .flags = IORESOURCE_IRQ,
164 /* DMA channels: RX, then TX */
166 .start = EDMA_CTLR_CHAN(0, 30), /* rx */
167 .flags = IORESOURCE_DMA,
168 }, {
169 .start = EDMA_CTLR_CHAN(0, 31), /* tx */
170 .flags = IORESOURCE_DMA,
174 static struct platform_device davinci_mmcsd1_device = {
175 .name = "davinci_mmc",
176 .id = 1,
177 .dev = {
178 .dma_mask = &mmcsd1_dma_mask,
179 .coherent_dma_mask = DMA_BIT_MASK(32),
181 .num_resources = ARRAY_SIZE(mmcsd1_resources),
182 .resource = mmcsd1_resources,
186 void __init davinci_setup_mmc(int module, struct davinci_mmc_config *config)
188 struct platform_device *pdev = NULL;
190 if (WARN_ON(cpu_is_davinci_dm646x()))
191 return;
193 /* REVISIT: update PINMUX, ARM_IRQMUX, and EDMA_EVTMUX here too;
194 * for example if MMCSD1 is used for SDIO, maybe DAT2 is unused.
196 * FIXME dm6441 (no MMC/SD), dm357 (one), and dm335 (two) are
197 * not handled right here ...
199 switch (module) {
200 case 1:
201 if (cpu_is_davinci_dm355()) {
202 /* REVISIT we may not need all these pins if e.g. this
203 * is a hard-wired SDIO device...
205 davinci_cfg_reg(DM355_SD1_CMD);
206 davinci_cfg_reg(DM355_SD1_CLK);
207 davinci_cfg_reg(DM355_SD1_DATA0);
208 davinci_cfg_reg(DM355_SD1_DATA1);
209 davinci_cfg_reg(DM355_SD1_DATA2);
210 davinci_cfg_reg(DM355_SD1_DATA3);
211 } else if (cpu_is_davinci_dm365()) {
212 void __iomem *pupdctl1 =
213 IO_ADDRESS(DAVINCI_SYSTEM_MODULE_BASE + 0x7c);
215 /* Configure pull down control */
216 __raw_writel((__raw_readl(pupdctl1) & ~0xfc0),
217 pupdctl1);
219 mmcsd1_resources[0].start = DM365_MMCSD1_BASE;
220 mmcsd1_resources[0].end = DM365_MMCSD1_BASE +
221 SZ_4K - 1;
222 mmcsd1_resources[2].start = IRQ_DM365_SDIOINT1;
223 } else
224 break;
226 pdev = &davinci_mmcsd1_device;
227 break;
228 case 0:
229 if (cpu_is_davinci_dm355()) {
230 mmcsd0_resources[0].start = DM355_MMCSD0_BASE;
231 mmcsd0_resources[0].end = DM355_MMCSD0_BASE + SZ_4K - 1;
232 mmcsd0_resources[2].start = IRQ_DM355_SDIOINT0;
234 /* expose all 6 MMC0 signals: CLK, CMD, DATA[0..3] */
235 davinci_cfg_reg(DM355_MMCSD0);
237 /* enable RX EDMA */
238 davinci_cfg_reg(DM355_EVT26_MMC0_RX);
239 } else if (cpu_is_davinci_dm365()) {
240 mmcsd0_resources[0].start = DM365_MMCSD0_BASE;
241 mmcsd0_resources[0].end = DM365_MMCSD0_BASE +
242 SZ_4K - 1;
243 mmcsd0_resources[2].start = IRQ_DM365_SDIOINT0;
244 } else if (cpu_is_davinci_dm644x()) {
245 /* REVISIT: should this be in board-init code? */
246 void __iomem *base =
247 IO_ADDRESS(DAVINCI_SYSTEM_MODULE_BASE);
249 /* Power-on 3.3V IO cells */
250 __raw_writel(0, base + DM64XX_VDD3P3V_PWDN);
251 /*Set up the pull regiter for MMC */
252 davinci_cfg_reg(DM644X_MSTK);
255 pdev = &davinci_mmcsd0_device;
256 break;
259 if (WARN_ON(!pdev))
260 return;
262 pdev->dev.platform_data = config;
263 platform_device_register(pdev);
266 #else
268 void __init davinci_setup_mmc(int module, struct davinci_mmc_config *config)
272 #endif
274 /*-------------------------------------------------------------------------*/
276 static struct resource wdt_resources[] = {
278 .start = DAVINCI_WDOG_BASE,
279 .end = DAVINCI_WDOG_BASE + SZ_1K - 1,
280 .flags = IORESOURCE_MEM,
284 struct platform_device davinci_wdt_device = {
285 .name = "watchdog",
286 .id = -1,
287 .num_resources = ARRAY_SIZE(wdt_resources),
288 .resource = wdt_resources,
291 static void davinci_init_wdt(void)
293 platform_device_register(&davinci_wdt_device);
296 /*-------------------------------------------------------------------------*/
298 struct davinci_timer_instance davinci_timer_instance[2] = {
300 .base = DAVINCI_TIMER0_BASE,
301 .bottom_irq = IRQ_TINT0_TINT12,
302 .top_irq = IRQ_TINT0_TINT34,
305 .base = DAVINCI_TIMER1_BASE,
306 .bottom_irq = IRQ_TINT1_TINT12,
307 .top_irq = IRQ_TINT1_TINT34,
311 /*-------------------------------------------------------------------------*/
313 static int __init davinci_init_devices(void)
315 /* please keep these calls, and their implementations above,
316 * in alphabetical order so they're easier to sort through.
318 davinci_init_wdt();
320 return 0;
322 arch_initcall(davinci_init_devices);