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hwmon: New driver for the W83795G/ADG monitoring chips
[linux-2.6/x86.git] / drivers / hwmon / w83795.c
blobc6984c817067a2cabbe7416a96bb037ffd5cb610
1 /*
2 * w83795.c - Linux kernel driver for hardware monitoring
3 * Copyright (C) 2008 Nuvoton Technology Corp.
4 * Wei Song
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation - version 2.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
18 * 02110-1301 USA.
19 *
20 * Supports following chips:
21 *
22 * Chip #vin #fanin #pwm #temp #dts wchipid vendid i2c ISA
23 * w83795g 21 14 8 6 8 0x79 0x5ca3 yes no
24 * w83795adg 18 14 2 6 8 0x79 0x5ca3 yes no
25 */
26
27 #include <linux/kernel.h>
28 #include <linux/module.h>
29 #include <linux/init.h>
30 #include <linux/slab.h>
31 #include <linux/i2c.h>
32 #include <linux/hwmon.h>
33 #include <linux/hwmon-sysfs.h>
34 #include <linux/err.h>
35 #include <linux/mutex.h>
36 #include <linux/delay.h>
37
38 /* Addresses to scan */
39 static unsigned short normal_i2c[] = { 0x2c, 0x2d, 0x2e, 0x2f, I2C_CLIENT_END };
40
41 enum chips { w83795 };
42
43
44 static int reset;
45 module_param(reset, bool, 0);
46 MODULE_PARM_DESC(reset, "Set to 1 to reset chip, not recommended");
47
48
49 #define W83795_REG_BANKSEL 0x00
50 #define W83795_REG_VENDORID 0xfd
51 #define W83795_REG_CHIPID 0xfe
52 #define W83795_REG_DEVICEID 0xfb
53
54 #define W83795_REG_I2C_ADDR 0xfc
55 #define W83795_REG_CONFIG 0x01
56 #define W83795_REG_CONFIG_CONFIG48 0x04
57
58 /* Multi-Function Pin Ctrl Registers */
59 #define W83795_REG_VOLT_CTRL1 0x02
60 #define W83795_REG_VOLT_CTRL2 0x03
61 #define W83795_REG_TEMP_CTRL1 0x04
62 #define W83795_REG_TEMP_CTRL2 0x05
63 #define W83795_REG_FANIN_CTRL1 0x06
64 #define W83795_REG_FANIN_CTRL2 0x07
65 #define W83795_REG_VMIGB_CTRL 0x08
66
67 #define TEMP_CTRL_DISABLE 0
68 #define TEMP_CTRL_TD 1
69 #define TEMP_CTRL_VSEN 2
70 #define TEMP_CTRL_TR 3
71 #define TEMP_CTRL_SHIFT 4
72 #define TEMP_CTRL_HASIN_SHIFT 5
73 /* temp mode may effect VSEN17-12 (in20-15) */
74 static u16 W83795_REG_TEMP_CTRL[][6] = {
75 /* Disable, TD, VSEN, TR, register shift value, has_in shift num */
76 {0x00, 0x01, 0x02, 0x03, 0, 17}, /* TR1 */
77 {0x00, 0x04, 0x08, 0x0C, 2, 18}, /* TR2 */
78 {0x00, 0x10, 0x20, 0x30, 4, 19}, /* TR3 */
79 {0x00, 0x40, 0x80, 0xC0, 6, 20}, /* TR4 */
80 {0x00, 0x00, 0x02, 0x03, 0, 15}, /* TR5 */
81 {0x00, 0x00, 0x08, 0x0C, 2, 16}, /* TR6 */
82 };
83
84 #define TEMP_READ 0
85 #define TEMP_CRIT 1
86 #define TEMP_CRIT_HYST 2
87 #define TEMP_WARN 3
88 #define TEMP_WARN_HYST 4
89 /* only crit and crit_hyst affect real-time alarm status
90 * current crit crit_hyst warn warn_hyst */
91 static u16 W83795_REG_TEMP[][5] = {
92 {0x21, 0x96, 0x97, 0x98, 0x99}, /* TD1/TR1 */
93 {0x22, 0x9a, 0x9b, 0x9c, 0x9d}, /* TD2/TR2 */
94 {0x23, 0x9e, 0x9f, 0xa0, 0xa1}, /* TD3/TR3 */
95 {0x24, 0xa2, 0xa3, 0xa4, 0xa5}, /* TD4/TR4 */
96 {0x1f, 0xa6, 0xa7, 0xa8, 0xa9}, /* TR5 */
97 {0x20, 0xaa, 0xab, 0xac, 0xad}, /* TR6 */
98 };
99
100 #define IN_READ 0
101 #define IN_MAX 1
102 #define IN_LOW 2
103 static const u16 W83795_REG_IN[][3] = {
104 /* Current, HL, LL */
105 {0x10, 0x70, 0x71}, /* VSEN1 */
106 {0x11, 0x72, 0x73}, /* VSEN2 */
107 {0x12, 0x74, 0x75}, /* VSEN3 */
108 {0x13, 0x76, 0x77}, /* VSEN4 */
109 {0x14, 0x78, 0x79}, /* VSEN5 */
110 {0x15, 0x7a, 0x7b}, /* VSEN6 */
111 {0x16, 0x7c, 0x7d}, /* VSEN7 */
112 {0x17, 0x7e, 0x7f}, /* VSEN8 */
113 {0x18, 0x80, 0x81}, /* VSEN9 */
114 {0x19, 0x82, 0x83}, /* VSEN10 */
115 {0x1A, 0x84, 0x85}, /* VSEN11 */
116 {0x1B, 0x86, 0x87}, /* VTT */
117 {0x1C, 0x88, 0x89}, /* 3VDD */
118 {0x1D, 0x8a, 0x8b}, /* 3VSB */
119 {0x1E, 0x8c, 0x8d}, /* VBAT */
120 {0x1F, 0xa6, 0xa7}, /* VSEN12 */
121 {0x20, 0xaa, 0xab}, /* VSEN13 */
122 {0x21, 0x96, 0x97}, /* VSEN14 */
123 {0x22, 0x9a, 0x9b}, /* VSEN15 */
124 {0x23, 0x9e, 0x9f}, /* VSEN16 */
125 {0x24, 0xa2, 0xa3}, /* VSEN17 */
126 };
127 #define W83795_REG_VRLSB 0x3C
128 #define VRLSB_SHIFT 6
129
130 static const u8 W83795_REG_IN_HL_LSB[] = {
131 0x8e, /* VSEN1-4 */
132 0x90, /* VSEN5-8 */
133 0x92, /* VSEN9-11 */
134 0x94, /* VTT, 3VDD, 3VSB, 3VBAT */
135 0xa8, /* VSEN12 */
136 0xac, /* VSEN13 */
137 0x98, /* VSEN14 */
138 0x9c, /* VSEN15 */
139 0xa0, /* VSEN16 */
140 0xa4, /* VSEN17 */
141 };
142
143 #define IN_LSB_REG(index, type) \
144 (((type) == 1) ? W83795_REG_IN_HL_LSB[(index)] \
145 : (W83795_REG_IN_HL_LSB[(index)] + 1))
146
147 #define IN_LSB_REG_NUM 10
148
149 #define IN_LSB_SHIFT 0
150 #define IN_LSB_IDX 1
151 static const u8 IN_LSB_SHIFT_IDX[][2] = {
152 /* High/Low LSB shift, LSB No. */
153 {0x00, 0x00}, /* VSEN1 */
154 {0x02, 0x00}, /* VSEN2 */
155 {0x04, 0x00}, /* VSEN3 */
156 {0x06, 0x00}, /* VSEN4 */
157 {0x00, 0x01}, /* VSEN5 */
158 {0x02, 0x01}, /* VSEN6 */
159 {0x04, 0x01}, /* VSEN7 */
160 {0x06, 0x01}, /* VSEN8 */
161 {0x00, 0x02}, /* VSEN9 */
162 {0x02, 0x02}, /* VSEN10 */
163 {0x04, 0x02}, /* VSEN11 */
164 {0x00, 0x03}, /* VTT */
165 {0x02, 0x03}, /* 3VDD */
166 {0x04, 0x03}, /* 3VSB */
167 {0x06, 0x03}, /* VBAT */
168 {0x06, 0x04}, /* VSEN12 */
169 {0x06, 0x05}, /* VSEN13 */
170 {0x06, 0x06}, /* VSEN14 */
171 {0x06, 0x07}, /* VSEN15 */
172 {0x06, 0x08}, /* VSEN16 */
173 {0x06, 0x09}, /* VSEN17 */
174 };
175
176
177 /* 3VDD, 3VSB, VBAT * 0.006 */
178 #define REST_VLT_BEGIN 12 /* the 13th volt to 15th */
179 #define REST_VLT_END 14 /* the 13th volt to 15th */
180
181 #define W83795_REG_FAN(index) (0x2E + (index))
182 #define W83795_REG_FAN_MIN_HL(index) (0xB6 + (index))
183 #define W83795_REG_FAN_MIN_LSB(index) (0xC4 + (index) / 2)
184 #define W83795_REG_FAN_MIN_LSB_SHIFT(index) \
185 (((index) % 1) ? 4 : 0)
186 #define W83795_REG_FAN_CTRL_SHIFT(index) \
187 (((index) > 7) ? ((index) - 8) : (index))
188
189 #define W83795_REG_VID_CTRL 0x6A
190
191 #define ALARM_BEEP_REG_NUM 6
192 #define W83795_REG_ALARM(index) (0x41 + (index))
193 #define W83795_REG_BEEP(index) (0x50 + (index))
194
195 #define W83795_REG_CLR_CHASSIS 0x4D
196
197
198 #define W83795_REG_TEMP_NUM 6
199 #define W83795_REG_FCMS1 0x201
200 #define W83795_REG_FCMS2 0x208
201 #define W83795_REG_TFMR(index) (0x202 + (index))
202 #define W83795_REG_FOMC 0x20F
203 #define W83795_REG_FOPFP(index) (0x218 + (index))
204
205 #define W83795_REG_TSS(index) (0x209 + (index))
206
207 #define PWM_OUTPUT 0
208 #define PWM_START 1
209 #define PWM_NONSTOP 2
210 #define PWM_STOP_TIME 3
211 #define PWM_DIV 4
212 #define W83795_REG_PWM(index, nr) \
213 (((nr) == 0 ? 0x210 : \
214 (nr) == 1 ? 0x220 : \
215 (nr) == 2 ? 0x228 : \
216 (nr) == 3 ? 0x230 : 0x218) + (index))
217
218 #define W83795_REG_FOPFP_DIV(index) \
219 (((index) < 8) ? ((index) + 1) : \
220 ((index) == 8) ? 12 : \
221 (16 << ((index) - 9)))
222
223 #define W83795_REG_FTSH(index) (0x240 + (index) * 2)
224 #define W83795_REG_FTSL(index) (0x241 + (index) * 2)
225 #define W83795_REG_TFTS 0x250
226
227 #define TEMP_PWM_TTTI 0
228 #define TEMP_PWM_CTFS 1
229 #define TEMP_PWM_HCT 2
230 #define TEMP_PWM_HOT 3
231 #define W83795_REG_TTTI(index) (0x260 + (index))
232 #define W83795_REG_CTFS(index) (0x268 + (index))
233 #define W83795_REG_HT(index) (0x270 + (index))
234
235 #define SF4_TEMP 0
236 #define SF4_PWM 1
237 #define W83795_REG_SF4_TEMP(temp_num, index) \
238 (0x280 + 0x10 * (temp_num) + (index))
239 #define W83795_REG_SF4_PWM(temp_num, index) \
240 (0x288 + 0x10 * (temp_num) + (index))
241
242 #define W83795_REG_DTSC 0x301
243 #define W83795_REG_DTSE 0x302
244 #define W83795_REG_DTS(index) (0x26 + (index))
245
246 #define DTS_CRIT 0
247 #define DTS_CRIT_HYST 1
248 #define DTS_WARN 2
249 #define DTS_WARN_HYST 3
250 #define W83795_REG_DTS_EXT(index) (0xB2 + (index))
251
252 #define SETUP_PWM_DEFAULT 0
253 #define SETUP_PWM_UPTIME 1
254 #define SETUP_PWM_DOWNTIME 2
255 #define W83795_REG_SETUP_PWM(index) (0x20C + (index))
256
257 static inline u16 in_from_reg(u8 index, u16 val)
258 {
259 if ((index >= REST_VLT_BEGIN) && (index <= REST_VLT_END))
260 return val * 6;
261 else
262 return val * 2;
263 }
264
265 static inline u16 in_to_reg(u8 index, u16 val)
266 {
267 if ((index >= REST_VLT_BEGIN) && (index <= REST_VLT_END))
268 return val / 6;
269 else
270 return val / 2;
271 }
272
273 static inline unsigned long fan_from_reg(u16 val)
274 {
275 if ((val >= 0xff0) || (val == 0))
276 return 0;
277 return 1350000UL / val;
278 }
279
280 static inline u16 fan_to_reg(long rpm)
281 {
282 if (rpm <= 0)
283 return 0x0fff;
284 return SENSORS_LIMIT((1350000 + (rpm >> 1)) / rpm, 1, 0xffe);
285 }
286
287 static inline unsigned long time_from_reg(u8 reg)
288 {
289 return reg * 100;
290 }
291
292 static inline u8 time_to_reg(unsigned long val)
293 {
294 return SENSORS_LIMIT((val + 50) / 100, 0, 0xff);
295 }
296
297 static inline long temp_from_reg(s8 reg)
298 {
299 return reg * 1000;
300 }
301
302 static inline s8 temp_to_reg(long val, s8 min, s8 max)
303 {
304 return SENSORS_LIMIT((val < 0 ? -val : val) / 1000, min, max);
305 }
306
307
308 enum chip_types {w83795g, w83795adg};
309
310 struct w83795_data {
311 struct device *hwmon_dev;
312 struct mutex update_lock;
313 unsigned long last_updated; /* In jiffies */
314 enum chip_types chip_type;
315
316 u8 bank;
317
318 u32 has_in; /* Enable monitor VIN or not */
319 u16 in[21][3]; /* Register value, read/high/low */
320 u8 in_lsb[10][3]; /* LSB Register value, high/low */
321 u8 has_gain; /* has gain: in17-20 * 8 */
322
323 u16 has_fan; /* Enable fan14-1 or not */
324 u16 fan[14]; /* Register value combine */
325 u16 fan_min[14]; /* Register value combine */
326
327 u8 has_temp; /* Enable monitor temp6-1 or not */
328 u8 temp[6][5]; /* current, crit, crit_hyst, warn, warn_hyst */
329 u8 temp_read_vrlsb[6];
330 u8 temp_mode; /* bit 0: TR mode, bit 1: TD mode */
331 u8 temp_src[3]; /* Register value */
332
333 u8 enable_dts; /* Enable PECI and SB-TSI,
334 * bit 0: =1 enable, =0 disable,
335 * bit 1: =1 AMD SB-TSI, =0 Intel PECI */
336 u8 has_dts; /* Enable monitor DTS temp */
337 u8 dts[8]; /* Register value */
338 u8 dts_read_vrlsb[8]; /* Register value */
339 u8 dts_ext[4]; /* Register value */
340
341 u8 has_pwm; /* 795g supports 8 pwm, 795adg only supports 2,
342 * no config register, only affected by chip
343 * type */
344 u8 pwm[8][5]; /* Register value, output, start, non stop, stop
345 * time, div */
346 u8 pwm_fcms[2]; /* Register value */
347 u8 pwm_tfmr[6]; /* Register value */
348 u8 pwm_fomc; /* Register value */
349
350 u16 target_speed[8]; /* Register value, target speed for speed
351 * cruise */
352 u8 tol_speed; /* tolerance of target speed */
353 u8 pwm_temp[6][4]; /* TTTI, CTFS, HCT, HOT */
354 u8 sf4_reg[6][2][7]; /* 6 temp, temp/dcpwm, 7 registers */
355
356 u8 setup_pwm[3]; /* Register value */
357
358 u8 alarms[6]; /* Register value */
359 u8 beeps[6]; /* Register value */
360 u8 beep_enable;
361
362 char valid;
363 };
364
365 /*
366 * Hardware access
367 */
368
369 /* Ignore the possibility that somebody change bank outside the driver
370 * Must be called with data->update_lock held, except during initialization */
371 static u8 w83795_read(struct i2c_client *client, u16 reg)
372 {
373 struct w83795_data *data = i2c_get_clientdata(client);
374 u8 res = 0xff;
375 u8 new_bank = reg >> 8;
376
377 new_bank |= data->bank & 0xfc;
378 if (data->bank != new_bank) {
379 if (i2c_smbus_write_byte_data
380 (client, W83795_REG_BANKSEL, new_bank) >= 0)
381 data->bank = new_bank;
382 else {
383 dev_err(&client->dev,
384 "set bank to %d failed, fall back "
385 "to bank %d, read reg 0x%x error\n",
386 new_bank, data->bank, reg);
387 res = 0x0; /* read 0x0 from the chip */
388 goto END;
389 }
390 }
391 res = i2c_smbus_read_byte_data(client, reg & 0xff);
392 END:
393 return res;
394 }
395
396 /* Must be called with data->update_lock held, except during initialization */
397 static int w83795_write(struct i2c_client *client, u16 reg, u8 value)
398 {
399 struct w83795_data *data = i2c_get_clientdata(client);
400 int res;
401 u8 new_bank = reg >> 8;
402
403 new_bank |= data->bank & 0xfc;
404 if (data->bank != new_bank) {
405 res = i2c_smbus_write_byte_data(client, W83795_REG_BANKSEL,
406 new_bank);
407 if (res >= 0)
408 data->bank = new_bank;
409 else {
410 dev_err(&client->dev,
411 "set bank to %d failed, fall back "
412 "to bank %d, write reg 0x%x error\n",
413 new_bank, data->bank, reg);
414 goto END;
415 }
416 }
417
418 res = i2c_smbus_write_byte_data(client, reg & 0xff, value);
419 END:
420 return res;
421 }
422
423 static struct w83795_data *w83795_update_device(struct device *dev)
424 {
425 struct i2c_client *client = to_i2c_client(dev);
426 struct w83795_data *data = i2c_get_clientdata(client);
427 u16 tmp;
428 int i;
429
430 mutex_lock(&data->update_lock);
431
432 if (!(time_after(jiffies, data->last_updated + HZ * 2)
433 || !data->valid))
434 goto END;
435
436 /* Update the voltages value */
437 for (i = 0; i < ARRAY_SIZE(data->in); i++) {
438 if (!(data->has_in & (1 << i)))
439 continue;
440 tmp = w83795_read(client, W83795_REG_IN[i][IN_READ]) << 2;
441 tmp |= (w83795_read(client, W83795_REG_VRLSB)
442 >> VRLSB_SHIFT) & 0x03;
443 data->in[i][IN_READ] = tmp;
444 }
445
446 /* Update fan */
447 for (i = 0; i < ARRAY_SIZE(data->fan); i++) {
448 if (!(data->has_fan & (1 << i)))
449 continue;
450 data->fan[i] = w83795_read(client, W83795_REG_FAN(i)) << 4;
451 data->fan[i] |=
452 (w83795_read(client, W83795_REG_VRLSB >> 4)) & 0x0F;
453 }
454
455 /* Update temperature */
456 for (i = 0; i < ARRAY_SIZE(data->temp); i++) {
457 /* even stop monitor, register still keep value, just read out
458 * it */
459 if (!(data->has_temp & (1 << i))) {
460 data->temp[i][TEMP_READ] = 0;
461 data->temp_read_vrlsb[i] = 0;
462 continue;
463 }
464 data->temp[i][TEMP_READ] =
465 w83795_read(client, W83795_REG_TEMP[i][TEMP_READ]);
466 data->temp_read_vrlsb[i] =
467 w83795_read(client, W83795_REG_VRLSB);
468 }
469
470 /* Update dts temperature */
471 if (data->enable_dts != 0) {
472 for (i = 0; i < ARRAY_SIZE(data->dts); i++) {
473 if (!(data->has_dts & (1 << i)))
474 continue;
475 data->dts[i] =
476 w83795_read(client, W83795_REG_DTS(i));
477 data->dts_read_vrlsb[i] =
478 w83795_read(client, W83795_REG_VRLSB);
479 }
480 }
481
482 /* Update pwm output */
483 for (i = 0; i < data->has_pwm; i++) {
484 data->pwm[i][PWM_OUTPUT] =
485 w83795_read(client, W83795_REG_PWM(i, PWM_OUTPUT));
486 }
487
488 /* update alarm */
489 for (i = 0; i < ALARM_BEEP_REG_NUM; i++)
490 data->alarms[i] = w83795_read(client, W83795_REG_ALARM(i));
491
492 data->last_updated = jiffies;
493 data->valid = 1;
494
495 END:
496 mutex_unlock(&data->update_lock);
497 return data;
498 }
499
500 /*
501 * Sysfs attributes
502 */
503
504 #define ALARM_STATUS 0
505 #define BEEP_ENABLE 1
506 static ssize_t
507 show_alarm_beep(struct device *dev, struct device_attribute *attr, char *buf)
508 {
509 struct w83795_data *data = w83795_update_device(dev);
510 struct sensor_device_attribute_2 *sensor_attr =
511 to_sensor_dev_attr_2(attr);
512 int nr = sensor_attr->nr;
513 int index = sensor_attr->index >> 3;
514 int bit = sensor_attr->index & 0x07;
515 u8 val;
516
517 if (ALARM_STATUS == nr) {
518 val = (data->alarms[index] >> (bit)) & 1;
519 } else { /* BEEP_ENABLE */
520 val = (data->beeps[index] >> (bit)) & 1;
521 }
522
523 return sprintf(buf, "%u\n", val);
524 }
525
526 static ssize_t
527 store_beep(struct device *dev, struct device_attribute *attr,
528 const char *buf, size_t count)
529 {
530 struct i2c_client *client = to_i2c_client(dev);
531 struct w83795_data *data = i2c_get_clientdata(client);
532 struct sensor_device_attribute_2 *sensor_attr =
533 to_sensor_dev_attr_2(attr);
534 int index = sensor_attr->index >> 3;
535 int shift = sensor_attr->index & 0x07;
536 u8 beep_bit = 1 << shift;
537 unsigned long val;
538
539 if (strict_strtoul(buf, 10, &val) < 0)
540 return -EINVAL;
541 if (val != 0 && val != 1)
542 return -EINVAL;
543
544 mutex_lock(&data->update_lock);
545 data->beeps[index] = w83795_read(client, W83795_REG_BEEP(index));
546 data->beeps[index] &= ~beep_bit;
547 data->beeps[index] |= val << shift;
548 w83795_write(client, W83795_REG_BEEP(index), data->beeps[index]);
549 mutex_unlock(&data->update_lock);
550
551 return count;
552 }
553
554 static ssize_t
555 show_beep_enable(struct device *dev, struct device_attribute *attr, char *buf)
556 {
557 struct i2c_client *client = to_i2c_client(dev);
558 struct w83795_data *data = i2c_get_clientdata(client);
559 return sprintf(buf, "%u\n", data->beep_enable);
560 }
561
562 static ssize_t
563 store_beep_enable(struct device *dev, struct device_attribute *attr,
564 const char *buf, size_t count)
565 {
566 struct i2c_client *client = to_i2c_client(dev);
567 struct w83795_data *data = i2c_get_clientdata(client);
568 unsigned long val;
569 u8 tmp;
570
571 if (strict_strtoul(buf, 10, &val) < 0)
572 return -EINVAL;
573 if (val != 0 && val != 1)
574 return -EINVAL;
575
576 mutex_lock(&data->update_lock);
577 data->beep_enable = val;
578 tmp = w83795_read(client, W83795_REG_BEEP(5));
579 tmp &= 0x7f;
580 tmp |= val << 7;
581 w83795_write(client, W83795_REG_BEEP(5), tmp);
582 mutex_unlock(&data->update_lock);
583
584 return count;
585 }
586
587 /* Write any value to clear chassis alarm */
588 static ssize_t
589 store_chassis_clear(struct device *dev,
590 struct device_attribute *attr, const char *buf,
591 size_t count)
592 {
593 struct i2c_client *client = to_i2c_client(dev);
594 struct w83795_data *data = i2c_get_clientdata(client);
595 u8 val;
596
597 mutex_lock(&data->update_lock);
598 val = w83795_read(client, W83795_REG_CLR_CHASSIS);
599 val |= 0x80;
600 w83795_write(client, W83795_REG_CLR_CHASSIS, val);
601 mutex_unlock(&data->update_lock);
602 return count;
603 }
604
605 #define FAN_INPUT 0
606 #define FAN_MIN 1
607 static ssize_t
608 show_fan(struct device *dev, struct device_attribute *attr, char *buf)
609 {
610 struct sensor_device_attribute_2 *sensor_attr =
611 to_sensor_dev_attr_2(attr);
612 int nr = sensor_attr->nr;
613 int index = sensor_attr->index;
614 struct w83795_data *data = w83795_update_device(dev);
615 u16 val;
616
617 if (FAN_INPUT == nr)
618 val = data->fan[index] & 0x0fff;
619 else
620 val = data->fan_min[index] & 0x0fff;
621
622 return sprintf(buf, "%lu\n", fan_from_reg(val));
623 }
624
625 static ssize_t
626 store_fan_min(struct device *dev, struct device_attribute *attr,
627 const char *buf, size_t count)
628 {
629 struct sensor_device_attribute_2 *sensor_attr =
630 to_sensor_dev_attr_2(attr);
631 int index = sensor_attr->index;
632 struct i2c_client *client = to_i2c_client(dev);
633 struct w83795_data *data = i2c_get_clientdata(client);
634 unsigned long val;
635
636 if (strict_strtoul(buf, 10, &val))
637 return -EINVAL;
638 val = fan_to_reg(val);
639
640 mutex_lock(&data->update_lock);
641 data->fan_min[index] = val;
642 w83795_write(client, W83795_REG_FAN_MIN_HL(index), (val >> 4) & 0xff);
643 val &= 0x0f;
644 if (index % 1) {
645 val <<= 4;
646 val |= w83795_read(client, W83795_REG_FAN_MIN_LSB(index))
647 & 0x0f;
648 } else {
649 val |= w83795_read(client, W83795_REG_FAN_MIN_LSB(index))
650 & 0xf0;
651 }
652 w83795_write(client, W83795_REG_FAN_MIN_LSB(index), val & 0xff);
653 mutex_unlock(&data->update_lock);
654
655 return count;
656 }
657
658 static ssize_t
659 show_pwm(struct device *dev, struct device_attribute *attr, char *buf)
660 {
661 struct w83795_data *data = w83795_update_device(dev);
662 struct sensor_device_attribute_2 *sensor_attr =
663 to_sensor_dev_attr_2(attr);
664 int nr = sensor_attr->nr;
665 int index = sensor_attr->index;
666 u16 val;
667
668 switch (nr) {
669 case PWM_STOP_TIME:
670 val = time_from_reg(data->pwm[index][nr]);
671 break;
672 case PWM_DIV:
673 val = W83795_REG_FOPFP_DIV(data->pwm[index][nr] & 0x0f);
674 break;
675 default:
676 val = data->pwm[index][nr];
677 break;
678 }
679
680 return sprintf(buf, "%u\n", val);
681 }
682
683 static ssize_t
684 store_pwm(struct device *dev, struct device_attribute *attr,
685 const char *buf, size_t count)
686 {
687 struct i2c_client *client = to_i2c_client(dev);
688 struct w83795_data *data = i2c_get_clientdata(client);
689 struct sensor_device_attribute_2 *sensor_attr =
690 to_sensor_dev_attr_2(attr);
691 int nr = sensor_attr->nr;
692 int index = sensor_attr->index;
693 unsigned long val;
694 int i;
695
696 if (strict_strtoul(buf, 10, &val) < 0)
697 return -EINVAL;
698
699 mutex_lock(&data->update_lock);
700 switch (nr) {
701 case PWM_STOP_TIME:
702 val = time_to_reg(val);
703 break;
704 case PWM_DIV:
705 for (i = 0; i < 16; i++) {
706 if (W83795_REG_FOPFP_DIV(i) == val) {
707 val = i;
708 break;
709 }
710 }
711 if (i >= 16)
712 goto err_end;
713 val |= w83795_read(client, W83795_REG_PWM(index, nr)) & 0x80;
714 break;
715 default:
716 val = SENSORS_LIMIT(val, 0, 0xff);
717 break;
718 }
719 w83795_write(client, W83795_REG_PWM(index, nr), val);
720 data->pwm[index][nr] = val & 0xff;
721 mutex_unlock(&data->update_lock);
722 return count;
723 err_end:
724 mutex_unlock(&data->update_lock);
725 return -EINVAL;
726 }
727
728 static ssize_t
729 show_pwm_enable(struct device *dev, struct device_attribute *attr, char *buf)
730 {
731 struct sensor_device_attribute_2 *sensor_attr =
732 to_sensor_dev_attr_2(attr);
733 struct i2c_client *client = to_i2c_client(dev);
734 struct w83795_data *data = i2c_get_clientdata(client);
735 int index = sensor_attr->index;
736 u8 tmp;
737
738 if (1 == (data->pwm_fcms[0] & (1 << index))) {
739 tmp = 2;
740 goto out;
741 }
742 for (tmp = 0; tmp < 6; tmp++) {
743 if (data->pwm_tfmr[tmp] & (1 << index)) {
744 tmp = 3;
745 goto out;
746 }
747 }
748 if (data->pwm_fomc & (1 << index))
749 tmp = 0;
750 else
751 tmp = 1;
752
753 out:
754 return sprintf(buf, "%u\n", tmp);
755 }
756
757 static ssize_t
758 store_pwm_enable(struct device *dev, struct device_attribute *attr,
759 const char *buf, size_t count)
760 {
761 struct i2c_client *client = to_i2c_client(dev);
762 struct w83795_data *data = i2c_get_clientdata(client);
763 struct sensor_device_attribute_2 *sensor_attr =
764 to_sensor_dev_attr_2(attr);
765 int index = sensor_attr->index;
766 unsigned long val;
767 int i;
768
769 if (strict_strtoul(buf, 10, &val) < 0)
770 return -EINVAL;
771 if (val > 2)
772 return -EINVAL;
773
774 mutex_lock(&data->update_lock);
775 switch (val) {
776 case 0:
777 case 1:
778 data->pwm_fcms[0] &= ~(1 << index);
779 w83795_write(client, W83795_REG_FCMS1, data->pwm_fcms[0]);
780 for (i = 0; i < 6; i++) {
781 data->pwm_tfmr[i] &= ~(1 << index);
782 w83795_write(client, W83795_REG_TFMR(i),
783 data->pwm_tfmr[i]);
784 }
785 data->pwm_fomc |= 1 << index;
786 data->pwm_fomc ^= val << index;
787 w83795_write(client, W83795_REG_FOMC, data->pwm_fomc);
788 break;
789 case 2:
790 data->pwm_fcms[0] |= (1 << index);
791 w83795_write(client, W83795_REG_FCMS1, data->pwm_fcms[0]);
792 break;
793 }
794 mutex_unlock(&data->update_lock);
795 return count;
796
797 mutex_unlock(&data->update_lock);
798 return -EINVAL;
799 }
800
801 static ssize_t
802 show_temp_src(struct device *dev, struct device_attribute *attr, char *buf)
803 {
804 struct sensor_device_attribute_2 *sensor_attr =
805 to_sensor_dev_attr_2(attr);
806 struct i2c_client *client = to_i2c_client(dev);
807 struct w83795_data *data = i2c_get_clientdata(client);
808 int index = sensor_attr->index;
809 u8 val = index / 2;
810 u8 tmp = data->temp_src[val];
811
812 if (index % 1)
813 val = 4;
814 else
815 val = 0;
816 tmp >>= val;
817 tmp &= 0x0f;
818
819 return sprintf(buf, "%u\n", tmp);
820 }
821
822 static ssize_t
823 store_temp_src(struct device *dev, struct device_attribute *attr,
824 const char *buf, size_t count)
825 {
826 struct i2c_client *client = to_i2c_client(dev);
827 struct w83795_data *data = i2c_get_clientdata(client);
828 struct sensor_device_attribute_2 *sensor_attr =
829 to_sensor_dev_attr_2(attr);
830 int index = sensor_attr->index;
831 unsigned long tmp;
832 u8 val = index / 2;
833
834 if (strict_strtoul(buf, 10, &tmp) < 0)
835 return -EINVAL;
836 tmp = SENSORS_LIMIT(tmp, 0, 15);
837
838 mutex_lock(&data->update_lock);
839 if (index % 1) {
840 tmp <<= 4;
841 data->temp_src[val] &= 0x0f;
842 } else {
843 data->temp_src[val] &= 0xf0;
844 }
845 data->temp_src[val] |= tmp;
846 w83795_write(client, W83795_REG_TSS(val), data->temp_src[val]);
847 mutex_unlock(&data->update_lock);
848
849 return count;
850 }
851
852 #define TEMP_PWM_ENABLE 0
853 #define TEMP_PWM_FAN_MAP 1
854 static ssize_t
855 show_temp_pwm_enable(struct device *dev, struct device_attribute *attr,
856 char *buf)
857 {
858 struct i2c_client *client = to_i2c_client(dev);
859 struct w83795_data *data = i2c_get_clientdata(client);
860 struct sensor_device_attribute_2 *sensor_attr =
861 to_sensor_dev_attr_2(attr);
862 int nr = sensor_attr->nr;
863 int index = sensor_attr->index;
864 u8 tmp = 0xff;
865
866 switch (nr) {
867 case TEMP_PWM_ENABLE:
868 tmp = (data->pwm_fcms[1] >> index) & 1;
869 if (tmp)
870 tmp = 4;
871 else
872 tmp = 3;
873 break;
874 case TEMP_PWM_FAN_MAP:
875 tmp = data->pwm_tfmr[index];
876 break;
877 }
878
879 return sprintf(buf, "%u\n", tmp);
880 }
881
882 static ssize_t
883 store_temp_pwm_enable(struct device *dev, struct device_attribute *attr,
884 const char *buf, size_t count)
885 {
886 struct i2c_client *client = to_i2c_client(dev);
887 struct w83795_data *data = i2c_get_clientdata(client);
888 struct sensor_device_attribute_2 *sensor_attr =
889 to_sensor_dev_attr_2(attr);
890 int nr = sensor_attr->nr;
891 int index = sensor_attr->index;
892 unsigned long tmp;
893
894 if (strict_strtoul(buf, 10, &tmp) < 0)
895 return -EINVAL;
896
897 switch (nr) {
898 case TEMP_PWM_ENABLE:
899 if ((tmp != 3) && (tmp != 4))
900 return -EINVAL;
901 tmp -= 3;
902 mutex_lock(&data->update_lock);
903 data->pwm_fcms[1] &= ~(1 << index);
904 data->pwm_fcms[1] |= tmp << index;
905 w83795_write(client, W83795_REG_FCMS2, data->pwm_fcms[1]);
906 mutex_unlock(&data->update_lock);
907 break;
908 case TEMP_PWM_FAN_MAP:
909 mutex_lock(&data->update_lock);
910 tmp = SENSORS_LIMIT(tmp, 0, 0xff);
911 w83795_write(client, W83795_REG_TFMR(index), tmp);
912 data->pwm_tfmr[index] = tmp;
913 mutex_unlock(&data->update_lock);
914 break;
915 }
916 return count;
917 }
918
919 #define FANIN_TARGET 0
920 #define FANIN_TOL 1
921 static ssize_t
922 show_fanin(struct device *dev, struct device_attribute *attr, char *buf)
923 {
924 struct i2c_client *client = to_i2c_client(dev);
925 struct w83795_data *data = i2c_get_clientdata(client);
926 struct sensor_device_attribute_2 *sensor_attr =
927 to_sensor_dev_attr_2(attr);
928 int nr = sensor_attr->nr;
929 int index = sensor_attr->index;
930 u16 tmp = 0;
931
932 switch (nr) {
933 case FANIN_TARGET:
934 tmp = fan_from_reg(data->target_speed[index]);
935 break;
936 case FANIN_TOL:
937 tmp = data->tol_speed;
938 break;
939 }
940
941 return sprintf(buf, "%u\n", tmp);
942 }
943
944 static ssize_t
945 store_fanin(struct device *dev, struct device_attribute *attr,
946 const char *buf, size_t count)
947 {
948 struct i2c_client *client = to_i2c_client(dev);
949 struct w83795_data *data = i2c_get_clientdata(client);
950 struct sensor_device_attribute_2 *sensor_attr =
951 to_sensor_dev_attr_2(attr);
952 int nr = sensor_attr->nr;
953 int index = sensor_attr->index;
954 unsigned long val;
955
956 if (strict_strtoul(buf, 10, &val) < 0)
957 return -EINVAL;
958
959 mutex_lock(&data->update_lock);
960 switch (nr) {
961 case FANIN_TARGET:
962 val = fan_to_reg(SENSORS_LIMIT(val, 0, 0xfff));
963 w83795_write(client, W83795_REG_FTSH(index), (val >> 4) & 0xff);
964 w83795_write(client, W83795_REG_FTSL(index), (val << 4) & 0xf0);
965 data->target_speed[index] = val;
966 break;
967 case FANIN_TOL:
968 val = SENSORS_LIMIT(val, 0, 0x3f);
969 w83795_write(client, W83795_REG_TFTS, val);
970 data->tol_speed = val;
971 break;
972 }
973 mutex_unlock(&data->update_lock);
974
975 return count;
976 }
977
978
979 static ssize_t
980 show_temp_pwm(struct device *dev, struct device_attribute *attr, char *buf)
981 {
982 struct i2c_client *client = to_i2c_client(dev);
983 struct w83795_data *data = i2c_get_clientdata(client);
984 struct sensor_device_attribute_2 *sensor_attr =
985 to_sensor_dev_attr_2(attr);
986 int nr = sensor_attr->nr;
987 int index = sensor_attr->index;
988 long tmp = temp_from_reg(data->pwm_temp[index][nr]);
989
990 return sprintf(buf, "%ld\n", tmp);
991 }
992
993 static ssize_t
994 store_temp_pwm(struct device *dev, struct device_attribute *attr,
995 const char *buf, size_t count)
996 {
997 struct i2c_client *client = to_i2c_client(dev);
998 struct w83795_data *data = i2c_get_clientdata(client);
999 struct sensor_device_attribute_2 *sensor_attr =
1000 to_sensor_dev_attr_2(attr);
1001 int nr = sensor_attr->nr;
1002 int index = sensor_attr->index;
1003 unsigned long val;
1004 u8 tmp;
1005
1006 if (strict_strtoul(buf, 10, &val) < 0)
1007 return -EINVAL;
1008 val /= 1000;
1009
1010 mutex_lock(&data->update_lock);
1011 switch (nr) {
1012 case TEMP_PWM_TTTI:
1013 val = SENSORS_LIMIT(val, 0, 0x7f);
1014 w83795_write(client, W83795_REG_TTTI(index), val);
1015 break;
1016 case TEMP_PWM_CTFS:
1017 val = SENSORS_LIMIT(val, 0, 0x7f);
1018 w83795_write(client, W83795_REG_CTFS(index), val);
1019 break;
1020 case TEMP_PWM_HCT:
1021 val = SENSORS_LIMIT(val, 0, 0x0f);
1022 tmp = w83795_read(client, W83795_REG_HT(index));
1023 tmp &= 0x0f;
1024 tmp |= (val << 4) & 0xf0;
1025 w83795_write(client, W83795_REG_HT(index), tmp);
1026 break;
1027 case TEMP_PWM_HOT:
1028 val = SENSORS_LIMIT(val, 0, 0x0f);
1029 tmp = w83795_read(client, W83795_REG_HT(index));
1030 tmp &= 0xf0;
1031 tmp |= val & 0x0f;
1032 w83795_write(client, W83795_REG_HT(index), tmp);
1033 break;
1034 }
1035 data->pwm_temp[index][nr] = val;
1036 mutex_unlock(&data->update_lock);
1037
1038 return count;
1039 }
1040
1041 static ssize_t
1042 show_sf4_pwm(struct device *dev, struct device_attribute *attr, char *buf)
1043 {
1044 struct i2c_client *client = to_i2c_client(dev);
1045 struct w83795_data *data = i2c_get_clientdata(client);
1046 struct sensor_device_attribute_2 *sensor_attr =
1047 to_sensor_dev_attr_2(attr);
1048 int nr = sensor_attr->nr;
1049 int index = sensor_attr->index;
1050
1051 return sprintf(buf, "%u\n", data->sf4_reg[index][SF4_PWM][nr]);
1052 }
1053
1054 static ssize_t
1055 store_sf4_pwm(struct device *dev, struct device_attribute *attr,
1056 const char *buf, size_t count)
1057 {
1058 struct i2c_client *client = to_i2c_client(dev);
1059 struct w83795_data *data = i2c_get_clientdata(client);
1060 struct sensor_device_attribute_2 *sensor_attr =
1061 to_sensor_dev_attr_2(attr);
1062 int nr = sensor_attr->nr;
1063 int index = sensor_attr->index;
1064 unsigned long val;
1065
1066 if (strict_strtoul(buf, 10, &val) < 0)
1067 return -EINVAL;
1068
1069 mutex_lock(&data->update_lock);
1070 w83795_write(client, W83795_REG_SF4_PWM(index, nr), val);
1071 data->sf4_reg[index][SF4_PWM][nr] = val;
1072 mutex_unlock(&data->update_lock);
1073
1074 return count;
1075 }
1076
1077 static ssize_t
1078 show_sf4_temp(struct device *dev, struct device_attribute *attr, char *buf)
1079 {
1080 struct i2c_client *client = to_i2c_client(dev);
1081 struct w83795_data *data = i2c_get_clientdata(client);
1082 struct sensor_device_attribute_2 *sensor_attr =
1083 to_sensor_dev_attr_2(attr);
1084 int nr = sensor_attr->nr;
1085 int index = sensor_attr->index;
1086
1087 return sprintf(buf, "%u\n",
1088 (data->sf4_reg[index][SF4_TEMP][nr]) * 1000);
1089 }
1090
1091 static ssize_t
1092 store_sf4_temp(struct device *dev, struct device_attribute *attr,
1093 const char *buf, size_t count)
1094 {
1095 struct i2c_client *client = to_i2c_client(dev);
1096 struct w83795_data *data = i2c_get_clientdata(client);
1097 struct sensor_device_attribute_2 *sensor_attr =
1098 to_sensor_dev_attr_2(attr);
1099 int nr = sensor_attr->nr;
1100 int index = sensor_attr->index;
1101 unsigned long val;
1102
1103 if (strict_strtoul(buf, 10, &val) < 0)
1104 return -EINVAL;
1105 val /= 1000;
1106
1107 mutex_lock(&data->update_lock);
1108 w83795_write(client, W83795_REG_SF4_TEMP(index, nr), val);
1109 data->sf4_reg[index][SF4_TEMP][nr] = val;
1110 mutex_unlock(&data->update_lock);
1111
1112 return count;
1113 }
1114
1115
1116 static ssize_t
1117 show_temp(struct device *dev, struct device_attribute *attr, char *buf)
1118 {
1119 struct sensor_device_attribute_2 *sensor_attr =
1120 to_sensor_dev_attr_2(attr);
1121 int nr = sensor_attr->nr;
1122 int index = sensor_attr->index;
1123 struct w83795_data *data = w83795_update_device(dev);
1124 long temp = temp_from_reg(data->temp[index][nr] & 0x7f);
1125
1126 if (TEMP_READ == nr)
1127 temp += ((data->temp_read_vrlsb[index] >> VRLSB_SHIFT) & 0x03)
1128 * 250;
1129 if (data->temp[index][nr] & 0x80)
1130 temp = -temp;
1131 return sprintf(buf, "%ld\n", temp);
1132 }
1133
1134 static ssize_t
1135 store_temp(struct device *dev, struct device_attribute *attr,
1136 const char *buf, size_t count)
1137 {
1138 struct sensor_device_attribute_2 *sensor_attr =
1139 to_sensor_dev_attr_2(attr);
1140 int nr = sensor_attr->nr;
1141 int index = sensor_attr->index;
1142 struct i2c_client *client = to_i2c_client(dev);
1143 struct w83795_data *data = i2c_get_clientdata(client);
1144 long tmp;
1145
1146 if (strict_strtol(buf, 10, &tmp) < 0)
1147 return -EINVAL;
1148
1149 mutex_lock(&data->update_lock);
1150 data->temp[index][nr] = temp_to_reg(tmp, -128, 127);
1151 w83795_write(client, W83795_REG_TEMP[index][nr], data->temp[index][nr]);
1152 mutex_unlock(&data->update_lock);
1153 return count;
1154 }
1155
1156
1157 static ssize_t
1158 show_dts_mode(struct device *dev, struct device_attribute *attr, char *buf)
1159 {
1160 struct i2c_client *client = to_i2c_client(dev);
1161 struct w83795_data *data = i2c_get_clientdata(client);
1162 struct sensor_device_attribute_2 *sensor_attr =
1163 to_sensor_dev_attr_2(attr);
1164 int index = sensor_attr->index;
1165 u8 tmp;
1166
1167 if (data->enable_dts == 0)
1168 return sprintf(buf, "%d\n", 0);
1169
1170 if ((data->has_dts >> index) & 0x01) {
1171 if (data->enable_dts & 2)
1172 tmp = 5;
1173 else
1174 tmp = 6;
1175 } else {
1176 tmp = 0;
1177 }
1178
1179 return sprintf(buf, "%d\n", tmp);
1180 }
1181
1182 static ssize_t
1183 show_dts(struct device *dev, struct device_attribute *attr, char *buf)
1184 {
1185 struct sensor_device_attribute_2 *sensor_attr =
1186 to_sensor_dev_attr_2(attr);
1187 int index = sensor_attr->index;
1188 struct w83795_data *data = w83795_update_device(dev);
1189 long temp = temp_from_reg(data->dts[index] & 0x7f);
1190
1191 temp += ((data->dts_read_vrlsb[index] >> VRLSB_SHIFT) & 0x03) * 250;
1192 if (data->dts[index] & 0x80)
1193 temp = -temp;
1194 return sprintf(buf, "%ld\n", temp);
1195 }
1196
1197 static ssize_t
1198 show_dts_ext(struct device *dev, struct device_attribute *attr, char *buf)
1199 {
1200 struct sensor_device_attribute_2 *sensor_attr =
1201 to_sensor_dev_attr_2(attr);
1202 int nr = sensor_attr->nr;
1203 struct i2c_client *client = to_i2c_client(dev);
1204 struct w83795_data *data = i2c_get_clientdata(client);
1205 long temp = temp_from_reg(data->dts_ext[nr] & 0x7f);
1206
1207 if (data->dts_ext[nr] & 0x80)
1208 temp = -temp;
1209 return sprintf(buf, "%ld\n", temp);
1210 }
1211
1212 static ssize_t
1213 store_dts_ext(struct device *dev, struct device_attribute *attr,
1214 const char *buf, size_t count)
1215 {
1216 struct sensor_device_attribute_2 *sensor_attr =
1217 to_sensor_dev_attr_2(attr);
1218 int nr = sensor_attr->nr;
1219 struct i2c_client *client = to_i2c_client(dev);
1220 struct w83795_data *data = i2c_get_clientdata(client);
1221 long tmp;
1222
1223 if (strict_strtol(buf, 10, &tmp) < 0)
1224 return -EINVAL;
1225
1226 mutex_lock(&data->update_lock);
1227 data->dts_ext[nr] = temp_to_reg(tmp, -128, 127);
1228 w83795_write(client, W83795_REG_DTS_EXT(nr), data->dts_ext[nr]);
1229 mutex_unlock(&data->update_lock);
1230 return count;
1231 }
1232
1233
1234 /*
1235 Type 3: Thermal diode
1236 Type 4: Thermistor
1237
1238 Temp5-6, default TR
1239 Temp1-4, default TD
1240 */
1241
1242 static ssize_t
1243 show_temp_mode(struct device *dev, struct device_attribute *attr, char *buf)
1244 {
1245 struct i2c_client *client = to_i2c_client(dev);
1246 struct w83795_data *data = i2c_get_clientdata(client);
1247 struct sensor_device_attribute_2 *sensor_attr =
1248 to_sensor_dev_attr_2(attr);
1249 int index = sensor_attr->index;
1250 u8 tmp;
1251
1252 if (data->has_temp >> index & 0x01) {
1253 if (data->temp_mode >> index & 0x01)
1254 tmp = 3;
1255 else
1256 tmp = 4;
1257 } else {
1258 tmp = 0;
1259 }
1260
1261 return sprintf(buf, "%d\n", tmp);
1262 }
1263
1264 static ssize_t
1265 store_temp_mode(struct device *dev, struct device_attribute *attr,
1266 const char *buf, size_t count)
1267 {
1268 struct i2c_client *client = to_i2c_client(dev);
1269 struct w83795_data *data = i2c_get_clientdata(client);
1270 struct sensor_device_attribute_2 *sensor_attr =
1271 to_sensor_dev_attr_2(attr);
1272 int index = sensor_attr->index;
1273 unsigned long val;
1274 u8 tmp;
1275 u32 mask;
1276
1277 if (strict_strtoul(buf, 10, &val) < 0)
1278 return -EINVAL;
1279 if ((val != 4) && (val != 3))
1280 return -EINVAL;
1281 if ((index > 3) && (val == 3))
1282 return -EINVAL;
1283
1284 mutex_lock(&data->update_lock);
1285 if (val == 3) {
1286 val = TEMP_CTRL_TD;
1287 data->has_temp |= 1 << index;
1288 data->temp_mode |= 1 << index;
1289 } else if (val == 4) {
1290 val = TEMP_CTRL_TR;
1291 data->has_temp |= 1 << index;
1292 tmp = 1 << index;
1293 data->temp_mode &= ~tmp;
1294 }
1295
1296 if (index > 3)
1297 tmp = w83795_read(client, W83795_REG_TEMP_CTRL1);
1298 else
1299 tmp = w83795_read(client, W83795_REG_TEMP_CTRL2);
1300
1301 mask = 0x03 << W83795_REG_TEMP_CTRL[index][TEMP_CTRL_SHIFT];
1302 tmp &= ~mask;
1303 tmp |= W83795_REG_TEMP_CTRL[index][val];
1304
1305 mask = 1 << W83795_REG_TEMP_CTRL[index][TEMP_CTRL_HASIN_SHIFT];
1306 data->has_in &= ~mask;
1307
1308 if (index > 3)
1309 w83795_write(client, W83795_REG_TEMP_CTRL1, tmp);
1310 else
1311 w83795_write(client, W83795_REG_TEMP_CTRL2, tmp);
1312
1313 mutex_unlock(&data->update_lock);
1314 return count;
1315 }
1316
1317
1318 /* show/store VIN */
1319 static ssize_t
1320 show_in(struct device *dev, struct device_attribute *attr, char *buf)
1321 {
1322 struct sensor_device_attribute_2 *sensor_attr =
1323 to_sensor_dev_attr_2(attr);
1324 int nr = sensor_attr->nr;
1325 int index = sensor_attr->index;
1326 struct w83795_data *data = w83795_update_device(dev);
1327 u16 val = data->in[index][nr];
1328 u8 lsb_idx;
1329
1330 switch (nr) {
1331 case IN_READ:
1332 /* calculate this value again by sensors as sensors3.conf */
1333 if ((index >= 17) &&
1334 ((data->has_gain >> (index - 17)) & 1))
1335 val *= 8;
1336 break;
1337 case IN_MAX:
1338 case IN_LOW:
1339 lsb_idx = IN_LSB_SHIFT_IDX[index][IN_LSB_IDX];
1340 val <<= 2;
1341 val |= (data->in_lsb[lsb_idx][nr] >>
1342 IN_LSB_SHIFT_IDX[lsb_idx][IN_LSB_SHIFT]) & 0x03;
1343 if ((index >= 17) &&
1344 ((data->has_gain >> (index - 17)) & 1))
1345 val *= 8;
1346 break;
1347 }
1348 val = in_from_reg(index, val);
1349
1350 return sprintf(buf, "%d\n", val);
1351 }
1352
1353 static ssize_t
1354 store_in(struct device *dev, struct device_attribute *attr,
1355 const char *buf, size_t count)
1356 {
1357 struct sensor_device_attribute_2 *sensor_attr =
1358 to_sensor_dev_attr_2(attr);
1359 int nr = sensor_attr->nr;
1360 int index = sensor_attr->index;
1361 struct i2c_client *client = to_i2c_client(dev);
1362 struct w83795_data *data = i2c_get_clientdata(client);
1363 unsigned long val;
1364 u8 tmp;
1365 u8 lsb_idx;
1366
1367 if (strict_strtoul(buf, 10, &val) < 0)
1368 return -EINVAL;
1369 val = in_to_reg(index, val);
1370
1371 if ((index >= 17) &&
1372 ((data->has_gain >> (index - 17)) & 1))
1373 val /= 8;
1374 val = SENSORS_LIMIT(val, 0, 0x3FF);
1375 mutex_lock(&data->update_lock);
1376
1377 lsb_idx = IN_LSB_SHIFT_IDX[index][IN_LSB_IDX];
1378 tmp = w83795_read(client, IN_LSB_REG(lsb_idx, nr));
1379 tmp &= ~(0x03 << IN_LSB_SHIFT_IDX[index][IN_LSB_SHIFT]);
1380 tmp |= (val & 0x03) << IN_LSB_SHIFT_IDX[index][IN_LSB_SHIFT];
1381 w83795_write(client, IN_LSB_REG(lsb_idx, nr), tmp);
1382 data->in_lsb[lsb_idx][nr] = tmp;
1383
1384 tmp = (val >> 2) & 0xff;
1385 w83795_write(client, W83795_REG_IN[index][nr], tmp);
1386 data->in[index][nr] = tmp;
1387
1388 mutex_unlock(&data->update_lock);
1389 return count;
1390 }
1391
1392
1393 static ssize_t
1394 show_sf_setup(struct device *dev, struct device_attribute *attr, char *buf)
1395 {
1396 struct sensor_device_attribute_2 *sensor_attr =
1397 to_sensor_dev_attr_2(attr);
1398 int nr = sensor_attr->nr;
1399 struct i2c_client *client = to_i2c_client(dev);
1400 struct w83795_data *data = i2c_get_clientdata(client);
1401 u16 val = data->setup_pwm[nr];
1402
1403 switch (nr) {
1404 case SETUP_PWM_UPTIME:
1405 case SETUP_PWM_DOWNTIME:
1406 val = time_from_reg(val);
1407 break;
1408 }
1409
1410 return sprintf(buf, "%d\n", val);
1411 }
1412
1413 static ssize_t
1414 store_sf_setup(struct device *dev, struct device_attribute *attr,
1415 const char *buf, size_t count)
1416 {
1417 struct sensor_device_attribute_2 *sensor_attr =
1418 to_sensor_dev_attr_2(attr);
1419 int nr = sensor_attr->nr;
1420 struct i2c_client *client = to_i2c_client(dev);
1421 struct w83795_data *data = i2c_get_clientdata(client);
1422 unsigned long val;
1423
1424 if (strict_strtoul(buf, 10, &val) < 0)
1425 return -EINVAL;
1426
1427 switch (nr) {
1428 case SETUP_PWM_DEFAULT:
1429 val = SENSORS_LIMIT(val, 0, 0xff);
1430 break;
1431 case SETUP_PWM_UPTIME:
1432 case SETUP_PWM_DOWNTIME:
1433 val = time_to_reg(val);
1434 if (val == 0)
1435 return -EINVAL;
1436 break;
1437 }
1438
1439 mutex_lock(&data->update_lock);
1440 data->setup_pwm[nr] = val;
1441 w83795_write(client, W83795_REG_SETUP_PWM(nr), val);
1442 mutex_unlock(&data->update_lock);
1443 return count;
1444 }
1445
1446
1447 #define NOT_USED -1
1448
1449 #define SENSOR_ATTR_IN(index) \
1450 SENSOR_ATTR_2(in##index##_input, S_IRUGO, show_in, NULL, \
1451 IN_READ, index), \
1452 SENSOR_ATTR_2(in##index##_max, S_IRUGO | S_IWUSR, show_in, \
1453 store_in, IN_MAX, index), \
1454 SENSOR_ATTR_2(in##index##_min, S_IRUGO | S_IWUSR, show_in, \
1455 store_in, IN_LOW, index), \
1456 SENSOR_ATTR_2(in##index##_alarm, S_IRUGO, show_alarm_beep, \
1457 NULL, ALARM_STATUS, index + ((index > 14) ? 1 : 0)), \
1458 SENSOR_ATTR_2(in##index##_beep, S_IWUSR | S_IRUGO, \
1459 show_alarm_beep, store_beep, BEEP_ENABLE, \
1460 index + ((index > 14) ? 1 : 0))
1461
1462 #define SENSOR_ATTR_FAN(index) \
1463 SENSOR_ATTR_2(fan##index##_input, S_IRUGO, show_fan, \
1464 NULL, FAN_INPUT, index - 1), \
1465 SENSOR_ATTR_2(fan##index##_min, S_IWUSR | S_IRUGO, \
1466 show_fan, store_fan_min, FAN_MIN, index - 1), \
1467 SENSOR_ATTR_2(fan##index##_alarm, S_IRUGO, show_alarm_beep, \
1468 NULL, ALARM_STATUS, index + 31), \
1469 SENSOR_ATTR_2(fan##index##_beep, S_IWUSR | S_IRUGO, \
1470 show_alarm_beep, store_beep, BEEP_ENABLE, index + 31)
1471
1472 #define SENSOR_ATTR_PWM(index) \
1473 SENSOR_ATTR_2(pwm##index, S_IWUSR | S_IRUGO, show_pwm, \
1474 store_pwm, PWM_OUTPUT, index - 1), \
1475 SENSOR_ATTR_2(pwm##index##_nonstop, S_IWUSR | S_IRUGO, \
1476 show_pwm, store_pwm, PWM_NONSTOP, index - 1), \
1477 SENSOR_ATTR_2(pwm##index##_start, S_IWUSR | S_IRUGO, \
1478 show_pwm, store_pwm, PWM_START, index - 1), \
1479 SENSOR_ATTR_2(pwm##index##_stop_time, S_IWUSR | S_IRUGO, \
1480 show_pwm, store_pwm, PWM_STOP_TIME, index - 1), \
1481 SENSOR_ATTR_2(fan##index##_div, S_IWUSR | S_IRUGO, \
1482 show_pwm, store_pwm, PWM_DIV, index - 1), \
1483 SENSOR_ATTR_2(pwm##index##_enable, S_IWUSR | S_IRUGO, \
1484 show_pwm_enable, store_pwm_enable, NOT_USED, index - 1)
1485
1486 #define SENSOR_ATTR_FANIN_TARGET(index) \
1487 SENSOR_ATTR_2(speed_cruise##index##_target, S_IWUSR | S_IRUGO, \
1488 show_fanin, store_fanin, FANIN_TARGET, index - 1)
1489
1490 #define SENSOR_ATTR_DTS(index) \
1491 SENSOR_ATTR_2(temp##index##_type, S_IRUGO , \
1492 show_dts_mode, NULL, NOT_USED, index - 7), \
1493 SENSOR_ATTR_2(temp##index##_input, S_IRUGO, show_dts, \
1494 NULL, NOT_USED, index - 7), \
1495 SENSOR_ATTR_2(temp##index##_max, S_IRUGO | S_IWUSR, show_dts_ext, \
1496 store_dts_ext, DTS_CRIT, NOT_USED), \
1497 SENSOR_ATTR_2(temp##index##_max_hyst, S_IRUGO | S_IWUSR, \
1498 show_dts_ext, store_dts_ext, DTS_CRIT_HYST, NOT_USED), \
1499 SENSOR_ATTR_2(temp##index##_warn, S_IRUGO | S_IWUSR, show_dts_ext, \
1500 store_dts_ext, DTS_WARN, NOT_USED), \
1501 SENSOR_ATTR_2(temp##index##_warn_hyst, S_IRUGO | S_IWUSR, \
1502 show_dts_ext, store_dts_ext, DTS_WARN_HYST, NOT_USED), \
1503 SENSOR_ATTR_2(temp##index##_alarm, S_IRUGO, \
1504 show_alarm_beep, NULL, ALARM_STATUS, index + 17), \
1505 SENSOR_ATTR_2(temp##index##_beep, S_IWUSR | S_IRUGO, \
1506 show_alarm_beep, store_beep, BEEP_ENABLE, index + 17)
1507
1508 #define SENSOR_ATTR_TEMP(index) \
1509 SENSOR_ATTR_2(temp##index##_type, S_IRUGO | S_IWUSR, \
1510 show_temp_mode, store_temp_mode, NOT_USED, index - 1), \
1511 SENSOR_ATTR_2(temp##index##_input, S_IRUGO, show_temp, \
1512 NULL, TEMP_READ, index - 1), \
1513 SENSOR_ATTR_2(temp##index##_max, S_IRUGO | S_IWUSR, show_temp, \
1514 store_temp, TEMP_CRIT, index - 1), \
1515 SENSOR_ATTR_2(temp##index##_max_hyst, S_IRUGO | S_IWUSR, \
1516 show_temp, store_temp, TEMP_CRIT_HYST, index - 1), \
1517 SENSOR_ATTR_2(temp##index##_warn, S_IRUGO | S_IWUSR, show_temp, \
1518 store_temp, TEMP_WARN, index - 1), \
1519 SENSOR_ATTR_2(temp##index##_warn_hyst, S_IRUGO | S_IWUSR, \
1520 show_temp, store_temp, TEMP_WARN_HYST, index - 1), \
1521 SENSOR_ATTR_2(temp##index##_alarm, S_IRUGO, \
1522 show_alarm_beep, NULL, ALARM_STATUS, \
1523 index + (index > 4 ? 11 : 17)), \
1524 SENSOR_ATTR_2(temp##index##_beep, S_IWUSR | S_IRUGO, \
1525 show_alarm_beep, store_beep, BEEP_ENABLE, \
1526 index + (index > 4 ? 11 : 17)), \
1527 SENSOR_ATTR_2(temp##index##_source_sel, S_IWUSR | S_IRUGO, \
1528 show_temp_src, store_temp_src, NOT_USED, index - 1), \
1529 SENSOR_ATTR_2(temp##index##_pwm_enable, S_IWUSR | S_IRUGO, \
1530 show_temp_pwm_enable, store_temp_pwm_enable, \
1531 TEMP_PWM_ENABLE, index - 1), \
1532 SENSOR_ATTR_2(temp##index##_auto_channels_pwm, S_IWUSR | S_IRUGO, \
1533 show_temp_pwm_enable, store_temp_pwm_enable, \
1534 TEMP_PWM_FAN_MAP, index - 1), \
1535 SENSOR_ATTR_2(thermal_cruise##index, S_IWUSR | S_IRUGO, \
1536 show_temp_pwm, store_temp_pwm, TEMP_PWM_TTTI, index - 1), \
1537 SENSOR_ATTR_2(temp##index##_crit, S_IWUSR | S_IRUGO, \
1538 show_temp_pwm, store_temp_pwm, TEMP_PWM_CTFS, index - 1), \
1539 SENSOR_ATTR_2(temp##index##_crit_hyst, S_IWUSR | S_IRUGO, \
1540 show_temp_pwm, store_temp_pwm, TEMP_PWM_HCT, index - 1), \
1541 SENSOR_ATTR_2(temp##index##_operation_hyst, S_IWUSR | S_IRUGO, \
1542 show_temp_pwm, store_temp_pwm, TEMP_PWM_HOT, index - 1), \
1543 SENSOR_ATTR_2(temp##index##_auto_point1_pwm, S_IRUGO | S_IWUSR, \
1544 show_sf4_pwm, store_sf4_pwm, 0, index - 1), \
1545 SENSOR_ATTR_2(temp##index##_auto_point2_pwm, S_IRUGO | S_IWUSR, \
1546 show_sf4_pwm, store_sf4_pwm, 1, index - 1), \
1547 SENSOR_ATTR_2(temp##index##_auto_point3_pwm, S_IRUGO | S_IWUSR, \
1548 show_sf4_pwm, store_sf4_pwm, 2, index - 1), \
1549 SENSOR_ATTR_2(temp##index##_auto_point4_pwm, S_IRUGO | S_IWUSR, \
1550 show_sf4_pwm, store_sf4_pwm, 3, index - 1), \
1551 SENSOR_ATTR_2(temp##index##_auto_point5_pwm, S_IRUGO | S_IWUSR, \
1552 show_sf4_pwm, store_sf4_pwm, 4, index - 1), \
1553 SENSOR_ATTR_2(temp##index##_auto_point6_pwm, S_IRUGO | S_IWUSR, \
1554 show_sf4_pwm, store_sf4_pwm, 5, index - 1), \
1555 SENSOR_ATTR_2(temp##index##_auto_point7_pwm, S_IRUGO | S_IWUSR, \
1556 show_sf4_pwm, store_sf4_pwm, 6, index - 1), \
1557 SENSOR_ATTR_2(temp##index##_auto_point1_temp, S_IRUGO | S_IWUSR,\
1558 show_sf4_temp, store_sf4_temp, 0, index - 1), \
1559 SENSOR_ATTR_2(temp##index##_auto_point2_temp, S_IRUGO | S_IWUSR,\
1560 show_sf4_temp, store_sf4_temp, 1, index - 1), \
1561 SENSOR_ATTR_2(temp##index##_auto_point3_temp, S_IRUGO | S_IWUSR,\
1562 show_sf4_temp, store_sf4_temp, 2, index - 1), \
1563 SENSOR_ATTR_2(temp##index##_auto_point4_temp, S_IRUGO | S_IWUSR,\
1564 show_sf4_temp, store_sf4_temp, 3, index - 1), \
1565 SENSOR_ATTR_2(temp##index##_auto_point5_temp, S_IRUGO | S_IWUSR,\
1566 show_sf4_temp, store_sf4_temp, 4, index - 1), \
1567 SENSOR_ATTR_2(temp##index##_auto_point6_temp, S_IRUGO | S_IWUSR,\
1568 show_sf4_temp, store_sf4_temp, 5, index - 1), \
1569 SENSOR_ATTR_2(temp##index##_auto_point7_temp, S_IRUGO | S_IWUSR,\
1570 show_sf4_temp, store_sf4_temp, 6, index - 1)
1571
1572
1573 static struct sensor_device_attribute_2 w83795_in[] = {
1574 SENSOR_ATTR_IN(0),
1575 SENSOR_ATTR_IN(1),
1576 SENSOR_ATTR_IN(2),
1577 SENSOR_ATTR_IN(3),
1578 SENSOR_ATTR_IN(4),
1579 SENSOR_ATTR_IN(5),
1580 SENSOR_ATTR_IN(6),
1581 SENSOR_ATTR_IN(7),
1582 SENSOR_ATTR_IN(8),
1583 SENSOR_ATTR_IN(9),
1584 SENSOR_ATTR_IN(10),
1585 SENSOR_ATTR_IN(11),
1586 SENSOR_ATTR_IN(12),
1587 SENSOR_ATTR_IN(13),
1588 SENSOR_ATTR_IN(14),
1589 SENSOR_ATTR_IN(15),
1590 SENSOR_ATTR_IN(16),
1591 SENSOR_ATTR_IN(17),
1592 SENSOR_ATTR_IN(18),
1593 SENSOR_ATTR_IN(19),
1594 SENSOR_ATTR_IN(20),
1595 };
1596
1597 static struct sensor_device_attribute_2 w83795_fan[] = {
1598 SENSOR_ATTR_FAN(1),
1599 SENSOR_ATTR_FAN(2),
1600 SENSOR_ATTR_FAN(3),
1601 SENSOR_ATTR_FAN(4),
1602 SENSOR_ATTR_FAN(5),
1603 SENSOR_ATTR_FAN(6),
1604 SENSOR_ATTR_FAN(7),
1605 SENSOR_ATTR_FAN(8),
1606 SENSOR_ATTR_FAN(9),
1607 SENSOR_ATTR_FAN(10),
1608 SENSOR_ATTR_FAN(11),
1609 SENSOR_ATTR_FAN(12),
1610 SENSOR_ATTR_FAN(13),
1611 SENSOR_ATTR_FAN(14),
1612 };
1613
1614 static struct sensor_device_attribute_2 w83795_temp[] = {
1615 SENSOR_ATTR_TEMP(1),
1616 SENSOR_ATTR_TEMP(2),
1617 SENSOR_ATTR_TEMP(3),
1618 SENSOR_ATTR_TEMP(4),
1619 SENSOR_ATTR_TEMP(5),
1620 SENSOR_ATTR_TEMP(6),
1621 };
1622
1623 static struct sensor_device_attribute_2 w83795_dts[] = {
1624 SENSOR_ATTR_DTS(7),
1625 SENSOR_ATTR_DTS(8),
1626 SENSOR_ATTR_DTS(9),
1627 SENSOR_ATTR_DTS(10),
1628 SENSOR_ATTR_DTS(11),
1629 SENSOR_ATTR_DTS(12),
1630 SENSOR_ATTR_DTS(13),
1631 SENSOR_ATTR_DTS(14),
1632 };
1633
1634 static struct sensor_device_attribute_2 w83795_static[] = {
1635 SENSOR_ATTR_FANIN_TARGET(1),
1636 SENSOR_ATTR_FANIN_TARGET(2),
1637 SENSOR_ATTR_FANIN_TARGET(3),
1638 SENSOR_ATTR_FANIN_TARGET(4),
1639 SENSOR_ATTR_FANIN_TARGET(5),
1640 SENSOR_ATTR_FANIN_TARGET(6),
1641 SENSOR_ATTR_FANIN_TARGET(7),
1642 SENSOR_ATTR_FANIN_TARGET(8),
1643 SENSOR_ATTR_PWM(1),
1644 SENSOR_ATTR_PWM(2),
1645 };
1646
1647 /* all registers existed in 795g than 795adg,
1648 * like PWM3 - PWM8 */
1649 static struct sensor_device_attribute_2 w83795_left_reg[] = {
1650 SENSOR_ATTR_PWM(3),
1651 SENSOR_ATTR_PWM(4),
1652 SENSOR_ATTR_PWM(5),
1653 SENSOR_ATTR_PWM(6),
1654 SENSOR_ATTR_PWM(7),
1655 SENSOR_ATTR_PWM(8),
1656 };
1657
1658 static struct sensor_device_attribute_2 sda_single_files[] = {
1659 SENSOR_ATTR_2(chassis, S_IWUSR | S_IRUGO, show_alarm_beep,
1660 store_chassis_clear, ALARM_STATUS, 46),
1661 SENSOR_ATTR_2(beep_enable, S_IWUSR | S_IRUGO, show_beep_enable,
1662 store_beep_enable, NOT_USED, NOT_USED),
1663 SENSOR_ATTR_2(speed_cruise_tolerance, S_IWUSR | S_IRUGO, show_fanin,
1664 store_fanin, FANIN_TOL, NOT_USED),
1665 SENSOR_ATTR_2(pwm_default, S_IWUSR | S_IRUGO, show_sf_setup,
1666 store_sf_setup, SETUP_PWM_DEFAULT, NOT_USED),
1667 SENSOR_ATTR_2(pwm_uptime, S_IWUSR | S_IRUGO, show_sf_setup,
1668 store_sf_setup, SETUP_PWM_UPTIME, NOT_USED),
1669 SENSOR_ATTR_2(pwm_downtime, S_IWUSR | S_IRUGO, show_sf_setup,
1670 store_sf_setup, SETUP_PWM_DOWNTIME, NOT_USED),
1671 };
1672
1673 /*
1674 * Driver interface
1675 */
1676
1677 static void w83795_init_client(struct i2c_client *client)
1678 {
1679 if (reset)
1680 w83795_write(client, W83795_REG_CONFIG, 0x80);
1681
1682 /* Start monitoring */
1683 w83795_write(client, W83795_REG_CONFIG,
1684 w83795_read(client, W83795_REG_CONFIG) | 0x01);
1685 }
1686
1687 /* Return 0 if detection is successful, -ENODEV otherwise */
1688 static int w83795_detect(struct i2c_client *client,
1689 struct i2c_board_info *info)
1690 {
1691 u8 tmp, bank;
1692 struct i2c_adapter *adapter = client->adapter;
1693 unsigned short address = client->addr;
1694
1695 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
1696 return -ENODEV;
1697 bank = i2c_smbus_read_byte_data(client, W83795_REG_BANKSEL);
1698
1699 tmp = bank & 0x80 ? 0x5c : 0xa3;
1700 /* Check Nuvoton vendor ID */
1701 if (tmp != i2c_smbus_read_byte_data(client,
1702 W83795_REG_VENDORID)) {
1703 pr_debug("w83795: Detection failed at check "
1704 "vendor id\n");
1705 return -ENODEV;
1706 }
1707
1708 /* If Nuvoton chip, address of chip and W83795_REG_I2C_ADDR
1709 should match */
1710 if ((bank & 0x07) == 0
1711 && (i2c_smbus_read_byte_data(client, W83795_REG_I2C_ADDR) & 0x7f) !=
1712 address) {
1713 pr_debug("w83795: Detection failed at check "
1714 "i2c addr\n");
1715 return -ENODEV;
1716 }
1717
1718 /* Determine the chip type now */
1719 if (0x79 != i2c_smbus_read_byte_data(client,
1720 W83795_REG_CHIPID)) {
1721 pr_debug("w83795: Detection failed at check "
1722 "chip id\n");
1723 return -ENODEV;
1724 }
1725
1726 #if 0
1727 /* Check 795 chip type: 795G or 795ADG */
1728 if (W83795_REG_CONFIG_CONFIG48 &
1729 w83795_read(client, W83795_REG_CONFIG)) {
1730 data->chip_type = w83795adg;
1731 } else {
1732 data->chip_type = w83795g;
1733 }
1734 #endif
1735
1736 /* Fill in the remaining client fields and put into the global list */
1737 strlcpy(info->type, "w83795", I2C_NAME_SIZE);
1738
1739 return 0;
1740 }
1741
1742 static int w83795_probe(struct i2c_client *client,
1743 const struct i2c_device_id *id)
1744 {
1745 int i;
1746 u8 tmp;
1747 struct device *dev = &client->dev;
1748 struct w83795_data *data;
1749 int err = 0;
1750
1751 data = kzalloc(sizeof(struct w83795_data), GFP_KERNEL);
1752 if (!data) {
1753 err = -ENOMEM;
1754 goto exit;
1755 }
1756
1757 i2c_set_clientdata(client, data);
1758 data->bank = i2c_smbus_read_byte_data(client, W83795_REG_BANKSEL);
1759 mutex_init(&data->update_lock);
1760
1761 /* Initialize the chip */
1762 w83795_init_client(client);
1763
1764 /* Check 795 chip type: 795G or 795ADG */
1765 if (W83795_REG_CONFIG_CONFIG48 &
1766 w83795_read(client, W83795_REG_CONFIG)) {
1767 data->chip_type = w83795adg;
1768 } else {
1769 data->chip_type = w83795g;
1770 }
1771
1772 data->has_in = w83795_read(client, W83795_REG_VOLT_CTRL1);
1773 data->has_in |= w83795_read(client, W83795_REG_VOLT_CTRL2) << 8;
1774 /* VSEN11-9 not for 795adg */
1775 if (data->chip_type == w83795adg)
1776 data->has_in &= 0xf8ff;
1777 data->has_fan = w83795_read(client, W83795_REG_FANIN_CTRL1);
1778 data->has_fan |= w83795_read(client, W83795_REG_FANIN_CTRL2) << 8;
1779
1780 /* VDSEN12-17 and TR1-6, TD1-4 use same register */
1781 tmp = w83795_read(client, W83795_REG_TEMP_CTRL1);
1782 if (tmp & 0x20)
1783 data->enable_dts = 1;
1784 else
1785 data->enable_dts = 0;
1786 data->has_temp = 0;
1787 data->temp_mode = 0;
1788 if (tmp & 0x08) {
1789 if (tmp & 0x04)
1790 data->has_temp |= 0x20;
1791 else
1792 data->has_in |= 0x10000;
1793 }
1794 if (tmp & 0x02) {
1795 if (tmp & 0x01)
1796 data->has_temp |= 0x10;
1797 else
1798 data->has_in |= 0x8000;
1799 }
1800 tmp = w83795_read(client, W83795_REG_TEMP_CTRL2);
1801 if (tmp & 0x40) {
1802 data->has_temp |= 0x08;
1803 if (!(tmp & 0x80))
1804 data->temp_mode |= 0x08;
1805 } else if (tmp & 0x80) {
1806 data->has_in |= 0x100000;
1807 }
1808 if (tmp & 0x10) {
1809 data->has_temp |= 0x04;
1810 if (!(tmp & 0x20))
1811 data->temp_mode |= 0x04;
1812 } else if (tmp & 0x20) {
1813 data->has_in |= 0x80000;
1814 }
1815 if (tmp & 0x04) {
1816 data->has_temp |= 0x02;
1817 if (!(tmp & 0x08))
1818 data->temp_mode |= 0x02;
1819 } else if (tmp & 0x08) {
1820 data->has_in |= 0x40000;
1821 }
1822 if (tmp & 0x01) {
1823 data->has_temp |= 0x01;
1824 if (!(tmp & 0x02))
1825 data->temp_mode |= 0x01;
1826 } else if (tmp & 0x02) {
1827 data->has_in |= 0x20000;
1828 }
1829
1830 /* Check DTS enable status */
1831 if (data->enable_dts == 0) {
1832 data->has_dts = 0;
1833 } else {
1834 if (1 & w83795_read(client, W83795_REG_DTSC))
1835 data->enable_dts |= 2;
1836 data->has_dts = w83795_read(client, W83795_REG_DTSE);
1837 }
1838
1839 /* First update the voltages measured value and limits */
1840 for (i = 0; i < ARRAY_SIZE(data->in); i++) {
1841 if (!(data->has_in & (1 << i)))
1842 continue;
1843 data->in[i][IN_MAX] =
1844 w83795_read(client, W83795_REG_IN[i][IN_MAX]);
1845 data->in[i][IN_LOW] =
1846 w83795_read(client, W83795_REG_IN[i][IN_LOW]);
1847 tmp = w83795_read(client, W83795_REG_IN[i][IN_READ]) << 2;
1848 tmp |= (w83795_read(client, W83795_REG_VRLSB)
1849 >> VRLSB_SHIFT) & 0x03;
1850 data->in[i][IN_READ] = tmp;
1851 }
1852 for (i = 0; i < IN_LSB_REG_NUM; i++) {
1853 data->in_lsb[i][IN_MAX] =
1854 w83795_read(client, IN_LSB_REG(i, IN_MAX));
1855 data->in_lsb[i][IN_LOW] =
1856 w83795_read(client, IN_LSB_REG(i, IN_LOW));
1857 }
1858 data->has_gain = w83795_read(client, W83795_REG_VMIGB_CTRL) & 0x0f;
1859
1860 /* First update fan and limits */
1861 for (i = 0; i < ARRAY_SIZE(data->fan); i++) {
1862 if (!(data->has_fan & (1 << i)))
1863 continue;
1864 data->fan_min[i] =
1865 w83795_read(client, W83795_REG_FAN_MIN_HL(i)) << 4;
1866 data->fan_min[i] |=
1867 (w83795_read(client, W83795_REG_FAN_MIN_LSB(i) >>
1868 W83795_REG_FAN_MIN_LSB_SHIFT(i))) & 0x0F;
1869 data->fan[i] = w83795_read(client, W83795_REG_FAN(i)) << 4;
1870 data->fan[i] |=
1871 (w83795_read(client, W83795_REG_VRLSB >> 4)) & 0x0F;
1872 }
1873
1874 /* temperature and limits */
1875 for (i = 0; i < ARRAY_SIZE(data->temp); i++) {
1876 if (!(data->has_temp & (1 << i)))
1877 continue;
1878 data->temp[i][TEMP_CRIT] =
1879 w83795_read(client, W83795_REG_TEMP[i][TEMP_CRIT]);
1880 data->temp[i][TEMP_CRIT_HYST] =
1881 w83795_read(client, W83795_REG_TEMP[i][TEMP_CRIT_HYST]);
1882 data->temp[i][TEMP_WARN] =
1883 w83795_read(client, W83795_REG_TEMP[i][TEMP_WARN]);
1884 data->temp[i][TEMP_WARN_HYST] =
1885 w83795_read(client, W83795_REG_TEMP[i][TEMP_WARN_HYST]);
1886 data->temp[i][TEMP_READ] =
1887 w83795_read(client, W83795_REG_TEMP[i][TEMP_READ]);
1888 data->temp_read_vrlsb[i] =
1889 w83795_read(client, W83795_REG_VRLSB);
1890 }
1891
1892 /* dts temperature and limits */
1893 if (data->enable_dts != 0) {
1894 data->dts_ext[DTS_CRIT] =
1895 w83795_read(client, W83795_REG_DTS_EXT(DTS_CRIT));
1896 data->dts_ext[DTS_CRIT_HYST] =
1897 w83795_read(client, W83795_REG_DTS_EXT(DTS_CRIT_HYST));
1898 data->dts_ext[DTS_WARN] =
1899 w83795_read(client, W83795_REG_DTS_EXT(DTS_WARN));
1900 data->dts_ext[DTS_WARN_HYST] =
1901 w83795_read(client, W83795_REG_DTS_EXT(DTS_WARN_HYST));
1902 for (i = 0; i < ARRAY_SIZE(data->dts); i++) {
1903 if (!(data->has_dts & (1 << i)))
1904 continue;
1905 data->dts[i] = w83795_read(client, W83795_REG_DTS(i));
1906 data->dts_read_vrlsb[i] =
1907 w83795_read(client, W83795_REG_VRLSB);
1908 }
1909 }
1910
1911 /* First update temp source selction */
1912 for (i = 0; i < 3; i++)
1913 data->temp_src[i] = w83795_read(client, W83795_REG_TSS(i));
1914
1915 /* pwm and smart fan */
1916 if (data->chip_type == w83795g)
1917 data->has_pwm = 8;
1918 else
1919 data->has_pwm = 2;
1920 data->pwm_fcms[0] = w83795_read(client, W83795_REG_FCMS1);
1921 data->pwm_fcms[1] = w83795_read(client, W83795_REG_FCMS2);
1922 /* w83795adg only support pwm2-0 */
1923 for (i = 0; i < W83795_REG_TEMP_NUM; i++)
1924 data->pwm_tfmr[i] = w83795_read(client, W83795_REG_TFMR(i));
1925 data->pwm_fomc = w83795_read(client, W83795_REG_FOMC);
1926 for (i = 0; i < data->has_pwm; i++) {
1927 for (tmp = 0; tmp < 5; tmp++) {
1928 data->pwm[i][tmp] =
1929 w83795_read(client, W83795_REG_PWM(i, tmp));
1930 }
1931 }
1932 for (i = 0; i < 8; i++) {
1933 data->target_speed[i] =
1934 w83795_read(client, W83795_REG_FTSH(i)) << 4;
1935 data->target_speed[i] |=
1936 w83795_read(client, W83795_REG_FTSL(i)) >> 4;
1937 }
1938 data->tol_speed = w83795_read(client, W83795_REG_TFTS) & 0x3f;
1939
1940 for (i = 0; i < W83795_REG_TEMP_NUM; i++) {
1941 data->pwm_temp[i][TEMP_PWM_TTTI] =
1942 w83795_read(client, W83795_REG_TTTI(i)) & 0x7f;
1943 data->pwm_temp[i][TEMP_PWM_CTFS] =
1944 w83795_read(client, W83795_REG_CTFS(i));
1945 tmp = w83795_read(client, W83795_REG_HT(i));
1946 data->pwm_temp[i][TEMP_PWM_HCT] = (tmp >> 4) & 0x0f;
1947 data->pwm_temp[i][TEMP_PWM_HOT] = tmp & 0x0f;
1948 }
1949 for (i = 0; i < W83795_REG_TEMP_NUM; i++) {
1950 for (tmp = 0; tmp < 7; tmp++) {
1951 data->sf4_reg[i][SF4_TEMP][tmp] =
1952 w83795_read(client,
1953 W83795_REG_SF4_TEMP(i, tmp));
1954 data->sf4_reg[i][SF4_PWM][tmp] =
1955 w83795_read(client, W83795_REG_SF4_PWM(i, tmp));
1956 }
1957 }
1958
1959 /* Setup PWM Register */
1960 for (i = 0; i < 3; i++) {
1961 data->setup_pwm[i] =
1962 w83795_read(client, W83795_REG_SETUP_PWM(i));
1963 }
1964
1965 /* alarm and beep */
1966 for (i = 0; i < ALARM_BEEP_REG_NUM; i++) {
1967 data->alarms[i] = w83795_read(client, W83795_REG_ALARM(i));
1968 data->beeps[i] = w83795_read(client, W83795_REG_BEEP(i));
1969 }
1970 data->beep_enable =
1971 (w83795_read(client, W83795_REG_BEEP(5)) >> 7) & 0x01;
1972
1973 /* Register sysfs hooks */
1974 for (i = 0; i < ARRAY_SIZE(w83795_in); i++) {
1975 if (!(data->has_in & (1 << (i / 6))))
1976 continue;
1977 err = device_create_file(dev, &w83795_in[i].dev_attr);
1978 if (err)
1979 goto exit_remove;
1980 }
1981
1982 for (i = 0; i < ARRAY_SIZE(w83795_fan); i++) {
1983 if (!(data->has_fan & (1 << (i / 5))))
1984 continue;
1985 err = device_create_file(dev, &w83795_fan[i].dev_attr);
1986 if (err)
1987 goto exit_remove;
1988 }
1989
1990 for (i = 0; i < ARRAY_SIZE(sda_single_files); i++) {
1991 err = device_create_file(dev, &sda_single_files[i].dev_attr);
1992 if (err)
1993 goto exit_remove;
1994 }
1995
1996 for (i = 0; i < ARRAY_SIZE(w83795_temp); i++) {
1997 if (!(data->has_temp & (1 << (i / 29))))
1998 continue;
1999 err = device_create_file(dev, &w83795_temp[i].dev_attr);
2000 if (err)
2001 goto exit_remove;
2002 }
2003
2004 if (data->enable_dts != 0) {
2005 for (i = 0; i < ARRAY_SIZE(w83795_dts); i++) {
2006 if (!(data->has_dts & (1 << (i / 8))))
2007 continue;
2008 err = device_create_file(dev, &w83795_dts[i].dev_attr);
2009 if (err)
2010 goto exit_remove;
2011 }
2012 }
2013
2014 if (data->chip_type == w83795g) {
2015 for (i = 0; i < ARRAY_SIZE(w83795_left_reg); i++) {
2016 err = device_create_file(dev,
2017 &w83795_left_reg[i].dev_attr);
2018 if (err)
2019 goto exit_remove;
2020 }
2021 }
2022
2023 for (i = 0; i < ARRAY_SIZE(w83795_static); i++) {
2024 err = device_create_file(dev, &w83795_static[i].dev_attr);
2025 if (err)
2026 goto exit_remove;
2027 }
2028
2029 data->hwmon_dev = hwmon_device_register(dev);
2030 if (IS_ERR(data->hwmon_dev)) {
2031 err = PTR_ERR(data->hwmon_dev);
2032 goto exit_remove;
2033 }
2034
2035 return 0;
2036
2037 /* Unregister sysfs hooks */
2038 exit_remove:
2039 for (i = 0; i < ARRAY_SIZE(w83795_in); i++)
2040 device_remove_file(dev, &w83795_in[i].dev_attr);
2041
2042 for (i = 0; i < ARRAY_SIZE(w83795_fan); i++)
2043 device_remove_file(dev, &w83795_fan[i].dev_attr);
2044
2045 for (i = 0; i < ARRAY_SIZE(sda_single_files); i++)
2046 device_remove_file(dev, &sda_single_files[i].dev_attr);
2047
2048 if (data->chip_type == w83795g) {
2049 for (i = 0; i < ARRAY_SIZE(w83795_left_reg); i++)
2050 device_remove_file(dev, &w83795_left_reg[i].dev_attr);
2051 }
2052
2053 for (i = 0; i < ARRAY_SIZE(w83795_temp); i++)
2054 device_remove_file(dev, &w83795_temp[i].dev_attr);
2055
2056 for (i = 0; i < ARRAY_SIZE(w83795_dts); i++)
2057 device_remove_file(dev, &w83795_dts[i].dev_attr);
2058
2059 for (i = 0; i < ARRAY_SIZE(w83795_static); i++)
2060 device_remove_file(dev, &w83795_static[i].dev_attr);
2061
2062 kfree(data);
2063 exit:
2064 return err;
2065 }
2066
2067 static int w83795_remove(struct i2c_client *client)
2068 {
2069 struct w83795_data *data = i2c_get_clientdata(client);
2070 struct device *dev = &client->dev;
2071 int i;
2072
2073 hwmon_device_unregister(data->hwmon_dev);
2074
2075 for (i = 0; i < ARRAY_SIZE(w83795_in); i++)
2076 device_remove_file(dev, &w83795_in[i].dev_attr);
2077
2078 for (i = 0; i < ARRAY_SIZE(w83795_fan); i++)
2079 device_remove_file(dev, &w83795_fan[i].dev_attr);
2080
2081 for (i = 0; i < ARRAY_SIZE(sda_single_files); i++)
2082 device_remove_file(dev, &sda_single_files[i].dev_attr);
2083
2084 if (data->chip_type == w83795g) {
2085 for (i = 0; i < ARRAY_SIZE(w83795_left_reg); i++)
2086 device_remove_file(dev, &w83795_left_reg[i].dev_attr);
2087 }
2088
2089 for (i = 0; i < ARRAY_SIZE(w83795_temp); i++)
2090 device_remove_file(dev, &w83795_temp[i].dev_attr);
2091
2092 for (i = 0; i < ARRAY_SIZE(w83795_dts); i++)
2093 device_remove_file(dev, &w83795_dts[i].dev_attr);
2094
2095 for (i = 0; i < ARRAY_SIZE(w83795_static); i++)
2096 device_remove_file(dev, &w83795_static[i].dev_attr);
2097
2098 kfree(data);
2099
2100 return 0;
2101 }
2102
2103
2104 static const struct i2c_device_id w83795_id[] = {
2105 { "w83795", w83795 },
2106 { }
2107 };
2108 MODULE_DEVICE_TABLE(i2c, w83795_id);
2109
2110 static struct i2c_driver w83795_driver = {
2111 .driver = {
2112 .name = "w83795",
2113 },
2114 .probe = w83795_probe,
2115 .remove = w83795_remove,
2116 .id_table = w83795_id,
2117
2118 .class = I2C_CLASS_HWMON,
2119 .detect = w83795_detect,
2120 .address_list = normal_i2c,
2121 };
2122
2123 static int __init sensors_w83795_init(void)
2124 {
2125 return i2c_add_driver(&w83795_driver);
2126 }
2127
2128 static void __exit sensors_w83795_exit(void)
2129 {
2130 i2c_del_driver(&w83795_driver);
2131 }
2132
2133 MODULE_AUTHOR("Wei Song");
2134 MODULE_DESCRIPTION("w83795 driver");
2135 MODULE_LICENSE("GPL");
2136
2137 module_init(sensors_w83795_init);
2138 module_exit(sensors_w83795_exit);
x86 "subsystem" repository