isci: Removing deprecated functions
[linux-2.6/x86.git] / drivers / scsi / isci / core / scic_sds_controller.c
blobd642ff7be6dbfdb34af7d4a16a4409ddd546fdf6
1 /*
2 * This file is provided under a dual BSD/GPLv2 license. When using or
3 * redistributing this file, you may do so under either license.
5 * GPL LICENSE SUMMARY
7 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of version 2 of the GNU General Public License as
11 * published by the Free Software Foundation.
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
21 * The full GNU General Public License is included in this distribution
22 * in the file called LICENSE.GPL.
24 * BSD LICENSE
26 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
27 * All rights reserved.
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30 * modification, are permitted provided that the following conditions
31 * are met:
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34 * notice, this list of conditions and the following disclaimer.
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36 * notice, this list of conditions and the following disclaimer in
37 * the documentation and/or other materials provided with the
38 * distribution.
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40 * contributors may be used to endorse or promote products derived
41 * from this software without specific prior written permission.
43 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
44 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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49 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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51 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
52 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
53 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
56 #include <linux/device.h>
57 #include "scic_controller.h"
58 #include "scic_phy.h"
59 #include "scic_port.h"
60 #include "scic_remote_device.h"
61 #include "scic_sds_controller.h"
62 #include "scic_sds_controller_registers.h"
63 #include "scic_sds_pci.h"
64 #include "scic_sds_phy.h"
65 #include "scic_sds_port_configuration_agent.h"
66 #include "scic_sds_port.h"
67 #include "scic_sds_remote_device.h"
68 #include "scic_sds_request.h"
69 #include "sci_environment.h"
70 #include "sci_util.h"
71 #include "scu_completion_codes.h"
72 #include "scu_constants.h"
73 #include "scu_event_codes.h"
74 #include "scu_remote_node_context.h"
75 #include "scu_task_context.h"
76 #include "scu_unsolicited_frame.h"
78 #define SCU_CONTEXT_RAM_INIT_STALL_TIME 200
80 /**
81 * smu_dcc_get_max_ports() -
83 * This macro returns the maximum number of logical ports supported by the
84 * hardware. The caller passes in the value read from the device context
85 * capacity register and this macro will mash and shift the value appropriately.
87 #define smu_dcc_get_max_ports(dcc_value) \
89 (((dcc_value) & SMU_DEVICE_CONTEXT_CAPACITY_MAX_LP_MASK) \
90 >> SMU_DEVICE_CONTEXT_CAPACITY_MAX_LP_SHIFT) + 1 \
93 /**
94 * smu_dcc_get_max_task_context() -
96 * This macro returns the maximum number of task contexts supported by the
97 * hardware. The caller passes in the value read from the device context
98 * capacity register and this macro will mash and shift the value appropriately.
100 #define smu_dcc_get_max_task_context(dcc_value) \
102 (((dcc_value) & SMU_DEVICE_CONTEXT_CAPACITY_MAX_TC_MASK) \
103 >> SMU_DEVICE_CONTEXT_CAPACITY_MAX_TC_SHIFT) + 1 \
107 * smu_dcc_get_max_remote_node_context() -
109 * This macro returns the maximum number of remote node contexts supported by
110 * the hardware. The caller passes in the value read from the device context
111 * capacity register and this macro will mash and shift the value appropriately.
113 #define smu_dcc_get_max_remote_node_context(dcc_value) \
115 (((dcc_value) & SMU_DEVICE_CONTEXT_CAPACITY_MAX_RNC_MASK) \
116 >> SMU_DEVICE_CONTEXT_CAPACITY_MAX_RNC_SHIFT) + 1 \
120 static void scic_sds_controller_power_control_timer_handler(
121 void *controller);
122 #define SCIC_SDS_CONTROLLER_MIN_TIMER_COUNT 3
123 #define SCIC_SDS_CONTROLLER_MAX_TIMER_COUNT 3
128 * The number of milliseconds to wait for a phy to start.
130 #define SCIC_SDS_CONTROLLER_PHY_START_TIMEOUT 100
135 * The number of milliseconds to wait while a given phy is consuming power
136 * before allowing another set of phys to consume power. Ultimately, this will
137 * be specified by OEM parameter.
139 #define SCIC_SDS_CONTROLLER_POWER_CONTROL_INTERVAL 500
142 * COMPLETION_QUEUE_CYCLE_BIT() -
144 * This macro will return the cycle bit of the completion queue entry
146 #define COMPLETION_QUEUE_CYCLE_BIT(x) ((x) & 0x80000000)
149 * NORMALIZE_GET_POINTER() -
151 * This macro will normalize the completion queue get pointer so its value can
152 * be used as an index into an array
154 #define NORMALIZE_GET_POINTER(x) \
155 ((x) & SMU_COMPLETION_QUEUE_GET_POINTER_MASK)
158 * NORMALIZE_PUT_POINTER() -
160 * This macro will normalize the completion queue put pointer so its value can
161 * be used as an array inde
163 #define NORMALIZE_PUT_POINTER(x) \
164 ((x) & SMU_COMPLETION_QUEUE_PUT_POINTER_MASK)
168 * NORMALIZE_GET_POINTER_CYCLE_BIT() -
170 * This macro will normalize the completion queue cycle pointer so it matches
171 * the completion queue cycle bit
173 #define NORMALIZE_GET_POINTER_CYCLE_BIT(x) \
174 ((SMU_CQGR_CYCLE_BIT & (x)) << (31 - SMU_COMPLETION_QUEUE_GET_CYCLE_BIT_SHIFT))
177 * NORMALIZE_EVENT_POINTER() -
179 * This macro will normalize the completion queue event entry so its value can
180 * be used as an index.
182 #define NORMALIZE_EVENT_POINTER(x) \
184 ((x) & SMU_COMPLETION_QUEUE_GET_EVENT_POINTER_MASK) \
185 >> SMU_COMPLETION_QUEUE_GET_EVENT_POINTER_SHIFT \
189 * INCREMENT_COMPLETION_QUEUE_GET() -
191 * This macro will increment the controllers completion queue index value and
192 * possibly toggle the cycle bit if the completion queue index wraps back to 0.
194 #define INCREMENT_COMPLETION_QUEUE_GET(controller, index, cycle) \
195 INCREMENT_QUEUE_GET(\
196 (index), \
197 (cycle), \
198 (controller)->completion_queue_entries, \
199 SMU_CQGR_CYCLE_BIT \
203 * INCREMENT_EVENT_QUEUE_GET() -
205 * This macro will increment the controllers event queue index value and
206 * possibly toggle the event cycle bit if the event queue index wraps back to 0.
208 #define INCREMENT_EVENT_QUEUE_GET(controller, index, cycle) \
209 INCREMENT_QUEUE_GET(\
210 (index), \
211 (cycle), \
212 (controller)->completion_event_entries, \
213 SMU_CQGR_EVENT_CYCLE_BIT \
216 struct sci_base_memory_descriptor_list *
217 sci_controller_get_memory_descriptor_list_handle(struct scic_sds_controller *scic)
219 return &scic->parent.mdl;
223 * ****************************************************************************-
224 * * SCIC SDS Controller Initialization Methods
225 * ****************************************************************************- */
228 * This timer is used to start another phy after we have given up on the
229 * previous phy to transition to the ready state.
233 static void scic_sds_controller_phy_startup_timeout_handler(
234 void *controller)
236 enum sci_status status;
237 struct scic_sds_controller *this_controller;
239 this_controller = (struct scic_sds_controller *)controller;
241 this_controller->phy_startup_timer_pending = false;
243 status = SCI_FAILURE;
245 while (status != SCI_SUCCESS) {
246 status = scic_sds_controller_start_next_phy(this_controller);
253 * This method initializes the phy startup operations for controller start.
255 void scic_sds_controller_initialize_phy_startup(
256 struct scic_sds_controller *this_controller)
258 this_controller->phy_startup_timer = isci_event_timer_create(
259 this_controller,
260 scic_sds_controller_phy_startup_timeout_handler,
261 this_controller
264 this_controller->next_phy_to_start = 0;
265 this_controller->phy_startup_timer_pending = false;
271 * This method initializes the power control operations for the controller
272 * object.
274 void scic_sds_controller_initialize_power_control(
275 struct scic_sds_controller *this_controller)
277 this_controller->power_control.timer = isci_event_timer_create(
278 this_controller,
279 scic_sds_controller_power_control_timer_handler,
280 this_controller
283 memset(
284 this_controller->power_control.requesters,
286 sizeof(this_controller->power_control.requesters)
289 this_controller->power_control.phys_waiting = 0;
292 /* --------------------------------------------------------------------------- */
294 #define SCU_REMOTE_NODE_CONTEXT_ALIGNMENT (32)
295 #define SCU_TASK_CONTEXT_ALIGNMENT (256)
296 #define SCU_UNSOLICITED_FRAME_ADDRESS_ALIGNMENT (64)
297 #define SCU_UNSOLICITED_FRAME_BUFFER_ALIGNMENT (1024)
298 #define SCU_UNSOLICITED_FRAME_HEADER_ALIGNMENT (64)
300 /* --------------------------------------------------------------------------- */
303 * This method builds the memory descriptor table for this controller.
304 * @this_controller: This parameter specifies the controller object for which
305 * to build the memory table.
308 static void scic_sds_controller_build_memory_descriptor_table(
309 struct scic_sds_controller *this_controller)
311 sci_base_mde_construct(
312 &this_controller->memory_descriptors[SCU_MDE_COMPLETION_QUEUE],
313 SCU_COMPLETION_RAM_ALIGNMENT,
314 (sizeof(u32) * this_controller->completion_queue_entries),
315 (SCI_MDE_ATTRIBUTE_CACHEABLE | SCI_MDE_ATTRIBUTE_PHYSICALLY_CONTIGUOUS)
318 sci_base_mde_construct(
319 &this_controller->memory_descriptors[SCU_MDE_REMOTE_NODE_CONTEXT],
320 SCU_REMOTE_NODE_CONTEXT_ALIGNMENT,
321 this_controller->remote_node_entries * sizeof(union scu_remote_node_context),
322 SCI_MDE_ATTRIBUTE_PHYSICALLY_CONTIGUOUS
325 sci_base_mde_construct(
326 &this_controller->memory_descriptors[SCU_MDE_TASK_CONTEXT],
327 SCU_TASK_CONTEXT_ALIGNMENT,
328 this_controller->task_context_entries * sizeof(struct scu_task_context),
329 SCI_MDE_ATTRIBUTE_PHYSICALLY_CONTIGUOUS
333 * The UF buffer address table size must be programmed to a power
334 * of 2. Find the first power of 2 that is equal to or greater then
335 * the number of unsolicited frame buffers to be utilized. */
336 scic_sds_unsolicited_frame_control_set_address_table_count(
337 &this_controller->uf_control
340 sci_base_mde_construct(
341 &this_controller->memory_descriptors[SCU_MDE_UF_BUFFER],
342 SCU_UNSOLICITED_FRAME_BUFFER_ALIGNMENT,
343 scic_sds_unsolicited_frame_control_get_mde_size(this_controller->uf_control),
344 SCI_MDE_ATTRIBUTE_PHYSICALLY_CONTIGUOUS
349 * This method validates the driver supplied memory descriptor table.
350 * @this_controller:
352 * enum sci_status
354 enum sci_status scic_sds_controller_validate_memory_descriptor_table(
355 struct scic_sds_controller *this_controller)
357 bool mde_list_valid;
359 mde_list_valid = sci_base_mde_is_valid(
360 &this_controller->memory_descriptors[SCU_MDE_COMPLETION_QUEUE],
361 SCU_COMPLETION_RAM_ALIGNMENT,
362 (sizeof(u32) * this_controller->completion_queue_entries),
363 (SCI_MDE_ATTRIBUTE_CACHEABLE | SCI_MDE_ATTRIBUTE_PHYSICALLY_CONTIGUOUS)
366 if (mde_list_valid == false)
367 return SCI_FAILURE_UNSUPPORTED_INFORMATION_FIELD;
369 mde_list_valid = sci_base_mde_is_valid(
370 &this_controller->memory_descriptors[SCU_MDE_REMOTE_NODE_CONTEXT],
371 SCU_REMOTE_NODE_CONTEXT_ALIGNMENT,
372 this_controller->remote_node_entries * sizeof(union scu_remote_node_context),
373 SCI_MDE_ATTRIBUTE_PHYSICALLY_CONTIGUOUS
376 if (mde_list_valid == false)
377 return SCI_FAILURE_UNSUPPORTED_INFORMATION_FIELD;
379 mde_list_valid = sci_base_mde_is_valid(
380 &this_controller->memory_descriptors[SCU_MDE_TASK_CONTEXT],
381 SCU_TASK_CONTEXT_ALIGNMENT,
382 this_controller->task_context_entries * sizeof(struct scu_task_context),
383 SCI_MDE_ATTRIBUTE_PHYSICALLY_CONTIGUOUS
386 if (mde_list_valid == false)
387 return SCI_FAILURE_UNSUPPORTED_INFORMATION_FIELD;
389 mde_list_valid = sci_base_mde_is_valid(
390 &this_controller->memory_descriptors[SCU_MDE_UF_BUFFER],
391 SCU_UNSOLICITED_FRAME_BUFFER_ALIGNMENT,
392 scic_sds_unsolicited_frame_control_get_mde_size(this_controller->uf_control),
393 SCI_MDE_ATTRIBUTE_PHYSICALLY_CONTIGUOUS
396 if (mde_list_valid == false)
397 return SCI_FAILURE_UNSUPPORTED_INFORMATION_FIELD;
399 return SCI_SUCCESS;
403 * This method initializes the controller with the physical memory addresses
404 * that are used to communicate with the driver.
405 * @this_controller:
408 void scic_sds_controller_ram_initialization(
409 struct scic_sds_controller *this_controller)
411 struct sci_physical_memory_descriptor *mde;
414 * The completion queue is actually placed in cacheable memory
415 * Therefore it no longer comes out of memory in the MDL. */
416 mde = &this_controller->memory_descriptors[SCU_MDE_COMPLETION_QUEUE];
417 this_controller->completion_queue = (u32 *)mde->virtual_address;
418 SMU_CQBAR_WRITE(this_controller, mde->physical_address);
421 * Program the location of the Remote Node Context table
422 * into the SCU. */
423 mde = &this_controller->memory_descriptors[SCU_MDE_REMOTE_NODE_CONTEXT];
424 this_controller->remote_node_context_table = (union scu_remote_node_context *)
425 mde->virtual_address;
426 SMU_RNCBAR_WRITE(this_controller, mde->physical_address);
428 /* Program the location of the Task Context table into the SCU. */
429 mde = &this_controller->memory_descriptors[SCU_MDE_TASK_CONTEXT];
430 this_controller->task_context_table = (struct scu_task_context *)
431 mde->virtual_address;
432 SMU_HTTBAR_WRITE(this_controller, mde->physical_address);
434 mde = &this_controller->memory_descriptors[SCU_MDE_UF_BUFFER];
435 scic_sds_unsolicited_frame_control_construct(
436 &this_controller->uf_control, mde, this_controller
440 * Inform the silicon as to the location of the UF headers and
441 * address table. */
442 SCU_UFHBAR_WRITE(
443 this_controller,
444 this_controller->uf_control.headers.physical_address);
445 SCU_PUFATHAR_WRITE(
446 this_controller,
447 this_controller->uf_control.address_table.physical_address);
451 * This method initializes the task context data for the controller.
452 * @this_controller:
455 void scic_sds_controller_assign_task_entries(
456 struct scic_sds_controller *this_controller)
458 u32 task_assignment;
461 * Assign all the TCs to function 0
462 * TODO: Do we actually need to read this register to write it back? */
463 task_assignment = SMU_TCA_READ(this_controller, 0);
465 task_assignment =
467 task_assignment
468 | (SMU_TCA_GEN_VAL(STARTING, 0))
469 | (SMU_TCA_GEN_VAL(ENDING, this_controller->task_context_entries - 1))
470 | (SMU_TCA_GEN_BIT(RANGE_CHECK_ENABLE))
473 SMU_TCA_WRITE(this_controller, 0, task_assignment);
477 * This method initializes the hardware completion queue.
481 void scic_sds_controller_initialize_completion_queue(
482 struct scic_sds_controller *this_controller)
484 u32 index;
485 u32 completion_queue_control_value;
486 u32 completion_queue_get_value;
487 u32 completion_queue_put_value;
489 this_controller->completion_queue_get = 0;
491 completion_queue_control_value = (
492 SMU_CQC_QUEUE_LIMIT_SET(this_controller->completion_queue_entries - 1)
493 | SMU_CQC_EVENT_LIMIT_SET(this_controller->completion_event_entries - 1)
496 SMU_CQC_WRITE(this_controller, completion_queue_control_value);
498 /* Set the completion queue get pointer and enable the queue */
499 completion_queue_get_value = (
500 (SMU_CQGR_GEN_VAL(POINTER, 0))
501 | (SMU_CQGR_GEN_VAL(EVENT_POINTER, 0))
502 | (SMU_CQGR_GEN_BIT(ENABLE))
503 | (SMU_CQGR_GEN_BIT(EVENT_ENABLE))
506 SMU_CQGR_WRITE(this_controller, completion_queue_get_value);
508 /* Set the completion queue put pointer */
509 completion_queue_put_value = (
510 (SMU_CQPR_GEN_VAL(POINTER, 0))
511 | (SMU_CQPR_GEN_VAL(EVENT_POINTER, 0))
514 SMU_CQPR_WRITE(this_controller, completion_queue_put_value);
516 /* Initialize the cycle bit of the completion queue entries */
517 for (index = 0; index < this_controller->completion_queue_entries; index++) {
519 * If get.cycle_bit != completion_queue.cycle_bit
520 * its not a valid completion queue entry
521 * so at system start all entries are invalid */
522 this_controller->completion_queue[index] = 0x80000000;
527 * This method initializes the hardware unsolicited frame queue.
531 void scic_sds_controller_initialize_unsolicited_frame_queue(
532 struct scic_sds_controller *this_controller)
534 u32 frame_queue_control_value;
535 u32 frame_queue_get_value;
536 u32 frame_queue_put_value;
538 /* Write the queue size */
539 frame_queue_control_value =
540 SCU_UFQC_GEN_VAL(QUEUE_SIZE, this_controller->uf_control.address_table.count);
542 SCU_UFQC_WRITE(this_controller, frame_queue_control_value);
544 /* Setup the get pointer for the unsolicited frame queue */
545 frame_queue_get_value = (
546 SCU_UFQGP_GEN_VAL(POINTER, 0)
547 | SCU_UFQGP_GEN_BIT(ENABLE_BIT)
550 SCU_UFQGP_WRITE(this_controller, frame_queue_get_value);
552 /* Setup the put pointer for the unsolicited frame queue */
553 frame_queue_put_value = SCU_UFQPP_GEN_VAL(POINTER, 0);
555 SCU_UFQPP_WRITE(this_controller, frame_queue_put_value);
559 * This method enables the hardware port task scheduler.
563 void scic_sds_controller_enable_port_task_scheduler(
564 struct scic_sds_controller *this_controller)
566 u32 port_task_scheduler_value;
568 port_task_scheduler_value = SCU_PTSGCR_READ(this_controller);
570 port_task_scheduler_value |=
571 (SCU_PTSGCR_GEN_BIT(ETM_ENABLE) | SCU_PTSGCR_GEN_BIT(PTSG_ENABLE));
573 SCU_PTSGCR_WRITE(this_controller, port_task_scheduler_value);
576 /* --------------------------------------------------------------------------- */
581 * This macro is used to delay between writes to the AFE registers during AFE
582 * initialization.
584 #define AFE_REGISTER_WRITE_DELAY 10
586 /* Initialize the AFE for this phy index. We need to read the AFE setup from
587 * the OEM parameters none
589 void scic_sds_controller_afe_initialization(struct scic_sds_controller *scic)
591 u32 afe_status;
592 u32 phy_id;
594 /* Clear DFX Status registers */
595 scu_afe_register_write(scic, afe_dfx_master_control0, 0x0081000f);
596 udelay(AFE_REGISTER_WRITE_DELAY);
598 /* Configure bias currents to normal */
599 if (is_a0())
600 scu_afe_register_write(scic, afe_bias_control, 0x00005500);
601 else
602 scu_afe_register_write(scic, afe_bias_control, 0x00005A00);
604 udelay(AFE_REGISTER_WRITE_DELAY);
606 /* Enable PLL */
607 if (is_b0())
608 scu_afe_register_write(scic, afe_pll_control0, 0x80040A08);
609 else
610 scu_afe_register_write(scic, afe_pll_control0, 0x80040908);
612 udelay(AFE_REGISTER_WRITE_DELAY);
614 /* Wait for the PLL to lock */
615 do {
616 afe_status = scu_afe_register_read(
617 scic, afe_common_block_status);
618 udelay(AFE_REGISTER_WRITE_DELAY);
619 } while ((afe_status & 0x00001000) == 0);
621 if (is_b0()) {
622 /* Shorten SAS SNW lock time (RxLock timer value from 76 us to 50 us) */
623 scu_afe_register_write(scic, afe_pmsn_master_control0, 0x7bcc96ad);
624 udelay(AFE_REGISTER_WRITE_DELAY);
627 for (phy_id = 0; phy_id < SCI_MAX_PHYS; phy_id++) {
628 if (is_b0()) {
629 /* Configure transmitter SSC parameters */
630 scu_afe_txreg_write(scic, phy_id, afe_tx_ssc_control, 0x00030000);
631 udelay(AFE_REGISTER_WRITE_DELAY);
632 } else {
634 * All defaults, except the Receive Word Alignament/Comma Detect
635 * Enable....(0xe800) */
636 scu_afe_txreg_write(scic, phy_id, afe_xcvr_control0, 0x00004512);
637 udelay(AFE_REGISTER_WRITE_DELAY);
639 scu_afe_txreg_write(scic, phy_id, afe_xcvr_control1, 0x0050100F);
640 udelay(AFE_REGISTER_WRITE_DELAY);
644 * Power up TX and RX out from power down (PWRDNTX and PWRDNRX)
645 * & increase TX int & ext bias 20%....(0xe85c) */
646 if (is_a0())
647 scu_afe_txreg_write(scic, phy_id, afe_channel_control, 0x000003D4);
648 else if (is_a2())
649 scu_afe_txreg_write(scic, phy_id, afe_channel_control, 0x000003F0);
650 else {
651 /* Power down TX and RX (PWRDNTX and PWRDNRX) */
652 scu_afe_txreg_write(scic, phy_id, afe_channel_control, 0x000003d7);
653 udelay(AFE_REGISTER_WRITE_DELAY);
656 * Power up TX and RX out from power down (PWRDNTX and PWRDNRX)
657 * & increase TX int & ext bias 20%....(0xe85c) */
658 scu_afe_txreg_write(scic, phy_id, afe_channel_control, 0x000003d4);
660 udelay(AFE_REGISTER_WRITE_DELAY);
662 if (is_a0() || is_a2()) {
663 /* Enable TX equalization (0xe824) */
664 scu_afe_txreg_write(scic, phy_id, afe_tx_control, 0x00040000);
665 udelay(AFE_REGISTER_WRITE_DELAY);
669 * RDPI=0x0(RX Power On), RXOOBDETPDNC=0x0, TPD=0x0(TX Power On),
670 * RDD=0x0(RX Detect Enabled) ....(0xe800) */
671 scu_afe_txreg_write(scic, phy_id, afe_xcvr_control0, 0x00004100);
672 udelay(AFE_REGISTER_WRITE_DELAY);
674 /* Leave DFE/FFE on */
675 if (is_a0())
676 scu_afe_txreg_write(scic, phy_id, afe_rx_ssc_control0, 0x3F09983F);
677 else if (is_a2())
678 scu_afe_txreg_write(scic, phy_id, afe_rx_ssc_control0, 0x3F11103F);
679 else {
680 scu_afe_txreg_write(scic, phy_id, afe_rx_ssc_control0, 0x3F11103F);
681 udelay(AFE_REGISTER_WRITE_DELAY);
682 /* Enable TX equalization (0xe824) */
683 scu_afe_txreg_write(scic, phy_id, afe_tx_control, 0x00040000);
685 udelay(AFE_REGISTER_WRITE_DELAY);
687 scu_afe_txreg_write(scic, phy_id, afe_tx_amp_control0, 0x000E7C03);
688 udelay(AFE_REGISTER_WRITE_DELAY);
690 scu_afe_txreg_write(scic, phy_id, afe_tx_amp_control1, 0x000E7C03);
691 udelay(AFE_REGISTER_WRITE_DELAY);
693 scu_afe_txreg_write(scic, phy_id, afe_tx_amp_control2, 0x000E7C03);
694 udelay(AFE_REGISTER_WRITE_DELAY);
696 scu_afe_txreg_write(scic, phy_id, afe_tx_amp_control3, 0x000E7C03);
697 udelay(AFE_REGISTER_WRITE_DELAY);
700 /* Transfer control to the PEs */
701 scu_afe_register_write(scic, afe_dfx_master_control0, 0x00010f00);
702 udelay(AFE_REGISTER_WRITE_DELAY);
706 * ****************************************************************************-
707 * * SCIC SDS Controller Internal Start/Stop Routines
708 * ****************************************************************************- */
712 * This method will attempt to transition into the ready state for the
713 * controller and indicate that the controller start operation has completed
714 * if all criteria are met.
715 * @this_controller: This parameter indicates the controller object for which
716 * to transition to ready.
717 * @status: This parameter indicates the status value to be pass into the call
718 * to scic_cb_controller_start_complete().
720 * none.
722 static void scic_sds_controller_transition_to_ready(
723 struct scic_sds_controller *this_controller,
724 enum sci_status status)
726 if (this_controller->parent.state_machine.current_state_id
727 == SCI_BASE_CONTROLLER_STATE_STARTING) {
729 * We move into the ready state, because some of the phys/ports
730 * may be up and operational. */
731 sci_base_state_machine_change_state(
732 scic_sds_controller_get_base_state_machine(this_controller),
733 SCI_BASE_CONTROLLER_STATE_READY
736 isci_event_controller_start_complete(this_controller, status);
741 * This method is the general timeout handler for the controller. It will take
742 * the correct timetout action based on the current controller state
744 void scic_sds_controller_timeout_handler(
745 struct scic_sds_controller *scic)
747 enum sci_base_controller_states current_state;
749 current_state = sci_base_state_machine_get_state(
750 scic_sds_controller_get_base_state_machine(scic));
752 if (current_state == SCI_BASE_CONTROLLER_STATE_STARTING) {
753 scic_sds_controller_transition_to_ready(
754 scic, SCI_FAILURE_TIMEOUT);
755 } else if (current_state == SCI_BASE_CONTROLLER_STATE_STOPPING) {
756 sci_base_state_machine_change_state(
757 scic_sds_controller_get_base_state_machine(scic),
758 SCI_BASE_CONTROLLER_STATE_FAILED);
759 isci_event_controller_stop_complete(scic, SCI_FAILURE_TIMEOUT);
760 } else /* / @todo Now what do we want to do in this case? */
761 dev_err(scic_to_dev(scic),
762 "%s: Controller timer fired when controller was not "
763 "in a state being timed.\n",
764 __func__);
768 * scic_sds_controller_get_port_configuration_mode
769 * @this_controller: This is the controller to use to determine if we are using
770 * manual or automatic port configuration.
772 * SCIC_PORT_CONFIGURATION_MODE
774 enum SCIC_PORT_CONFIGURATION_MODE scic_sds_controller_get_port_configuration_mode(
775 struct scic_sds_controller *this_controller)
777 u32 index;
778 enum SCIC_PORT_CONFIGURATION_MODE mode;
780 mode = SCIC_PORT_AUTOMATIC_CONFIGURATION_MODE;
782 for (index = 0; index < SCI_MAX_PORTS; index++) {
783 if (this_controller->oem_parameters.sds1.ports[index].phy_mask != 0) {
784 mode = SCIC_PORT_MANUAL_CONFIGURATION_MODE;
785 break;
789 return mode;
792 enum sci_status scic_sds_controller_stop_ports(struct scic_sds_controller *scic)
794 u32 index;
795 enum sci_status port_status;
796 enum sci_status status = SCI_SUCCESS;
798 for (index = 0; index < scic->logical_port_entries; index++) {
799 port_status = scic_port_stop(&scic->port_table[index]);
801 if ((port_status != SCI_SUCCESS) &&
802 (port_status != SCI_FAILURE_INVALID_STATE)) {
803 status = SCI_FAILURE;
805 dev_warn(scic_to_dev(scic),
806 "%s: Controller stop operation failed to "
807 "stop port %d because of status %d.\n",
808 __func__,
809 scic->port_table[index].logical_port_index,
810 port_status);
814 return status;
822 static void scic_sds_controller_phy_timer_start(
823 struct scic_sds_controller *this_controller)
825 isci_event_timer_start(
826 this_controller,
827 this_controller->phy_startup_timer,
828 SCIC_SDS_CONTROLLER_PHY_START_TIMEOUT
831 this_controller->phy_startup_timer_pending = true;
839 void scic_sds_controller_phy_timer_stop(
840 struct scic_sds_controller *this_controller)
842 isci_event_timer_stop(
843 this_controller,
844 this_controller->phy_startup_timer
847 this_controller->phy_startup_timer_pending = false;
851 * This method is called internally by the controller object to start the next
852 * phy on the controller. If all the phys have been starte, then this
853 * method will attempt to transition the controller to the READY state and
854 * inform the user (scic_cb_controller_start_complete()).
855 * @this_controller: This parameter specifies the controller object for which
856 * to start the next phy.
858 * enum sci_status
860 enum sci_status scic_sds_controller_start_next_phy(
861 struct scic_sds_controller *this_controller)
863 enum sci_status status;
865 status = SCI_SUCCESS;
867 if (this_controller->phy_startup_timer_pending == false) {
868 if (this_controller->next_phy_to_start == SCI_MAX_PHYS) {
869 bool is_controller_start_complete = true;
870 struct scic_sds_phy *the_phy;
871 u8 index;
873 for (index = 0; index < SCI_MAX_PHYS; index++) {
874 the_phy = &this_controller->phy_table[index];
876 if (scic_sds_phy_get_port(the_phy) != NULL) {
878 * The controller start operation is complete if and only
879 * if:
880 * - all links have been given an opportunity to start
881 * - have no indication of a connected device
882 * - have an indication of a connected device and it has
883 * finished the link training process.
885 if (
887 (the_phy->is_in_link_training == false)
888 && (the_phy->parent.state_machine.current_state_id
889 == SCI_BASE_PHY_STATE_INITIAL)
891 || (
892 (the_phy->is_in_link_training == false)
893 && (the_phy->parent.state_machine.current_state_id
894 == SCI_BASE_PHY_STATE_STOPPED)
896 || (
897 (the_phy->is_in_link_training == true)
898 && (the_phy->parent.state_machine.current_state_id
899 == SCI_BASE_PHY_STATE_STARTING)
902 is_controller_start_complete = false;
903 break;
909 * The controller has successfully finished the start process.
910 * Inform the SCI Core user and transition to the READY state. */
911 if (is_controller_start_complete == true) {
912 scic_sds_controller_transition_to_ready(
913 this_controller, SCI_SUCCESS
915 scic_sds_controller_phy_timer_stop(this_controller);
917 } else {
918 struct scic_sds_phy *the_phy;
920 the_phy = &this_controller->phy_table[this_controller->next_phy_to_start];
922 if (
923 scic_sds_controller_get_port_configuration_mode(this_controller)
924 == SCIC_PORT_MANUAL_CONFIGURATION_MODE
926 if (scic_sds_phy_get_port(the_phy) == NULL) {
927 this_controller->next_phy_to_start++;
930 * Caution recursion ahead be forwarned
932 * The PHY was never added to a PORT in MPC mode so start the next phy in sequence
933 * This phy will never go link up and will not draw power the OEM parameters either
934 * configured the phy incorrectly for the PORT or it was never assigned to a PORT */
935 return scic_sds_controller_start_next_phy(this_controller);
939 status = scic_sds_phy_start(the_phy);
941 if (status == SCI_SUCCESS) {
942 scic_sds_controller_phy_timer_start(this_controller);
943 } else {
944 dev_warn(scic_to_dev(this_controller),
945 "%s: Controller stop operation failed "
946 "to stop phy %d because of status "
947 "%d.\n",
948 __func__,
949 this_controller->phy_table[this_controller->next_phy_to_start].phy_index,
950 status);
953 this_controller->next_phy_to_start++;
957 return status;
962 * @this_controller:
964 * enum sci_status
966 enum sci_status scic_sds_controller_stop_phys(
967 struct scic_sds_controller *this_controller)
969 u32 index;
970 enum sci_status status;
971 enum sci_status phy_status;
973 status = SCI_SUCCESS;
975 for (index = 0; index < SCI_MAX_PHYS; index++) {
976 phy_status = scic_sds_phy_stop(&this_controller->phy_table[index]);
978 if (
979 (phy_status != SCI_SUCCESS)
980 && (phy_status != SCI_FAILURE_INVALID_STATE)
982 status = SCI_FAILURE;
984 dev_warn(scic_to_dev(this_controller),
985 "%s: Controller stop operation failed to stop "
986 "phy %d because of status %d.\n",
987 __func__,
988 this_controller->phy_table[index].phy_index, phy_status);
992 return status;
997 * @this_controller:
999 * enum sci_status
1001 enum sci_status scic_sds_controller_stop_devices(
1002 struct scic_sds_controller *this_controller)
1004 u32 index;
1005 enum sci_status status;
1006 enum sci_status device_status;
1008 status = SCI_SUCCESS;
1010 for (index = 0; index < this_controller->remote_node_entries; index++) {
1011 if (this_controller->device_table[index] != NULL) {
1012 /* / @todo What timeout value do we want to provide to this request? */
1013 device_status = scic_remote_device_stop(this_controller->device_table[index], 0);
1015 if ((device_status != SCI_SUCCESS) &&
1016 (device_status != SCI_FAILURE_INVALID_STATE)) {
1017 dev_warn(scic_to_dev(this_controller),
1018 "%s: Controller stop operation failed "
1019 "to stop device 0x%p because of "
1020 "status %d.\n",
1021 __func__,
1022 this_controller->device_table[index], device_status);
1027 return status;
1031 * ****************************************************************************-
1032 * * SCIC SDS Controller Power Control (Staggered Spinup)
1033 * ****************************************************************************- */
1038 * This method starts the power control timer for this controller object.
1040 static void scic_sds_controller_power_control_timer_start(
1041 struct scic_sds_controller *this_controller)
1043 isci_event_timer_start(
1044 this_controller, this_controller->power_control.timer,
1045 SCIC_SDS_CONTROLLER_POWER_CONTROL_INTERVAL
1048 this_controller->power_control.timer_started = true;
1056 static void scic_sds_controller_power_control_timer_handler(
1057 void *controller)
1059 struct scic_sds_controller *this_controller;
1061 this_controller = (struct scic_sds_controller *)controller;
1063 if (this_controller->power_control.phys_waiting == 0) {
1064 this_controller->power_control.timer_started = false;
1065 } else {
1066 struct scic_sds_phy *the_phy = NULL;
1067 u8 i;
1069 for (i = 0;
1070 (i < SCI_MAX_PHYS)
1071 && (this_controller->power_control.phys_waiting != 0);
1072 i++) {
1073 if (this_controller->power_control.requesters[i] != NULL) {
1074 the_phy = this_controller->power_control.requesters[i];
1075 this_controller->power_control.requesters[i] = NULL;
1076 this_controller->power_control.phys_waiting--;
1077 break;
1082 * It doesn't matter if the power list is empty, we need to start the
1083 * timer in case another phy becomes ready. */
1084 scic_sds_controller_power_control_timer_start(this_controller);
1086 scic_sds_phy_consume_power_handler(the_phy);
1091 * This method inserts the phy in the stagger spinup control queue.
1092 * @this_controller:
1096 void scic_sds_controller_power_control_queue_insert(
1097 struct scic_sds_controller *this_controller,
1098 struct scic_sds_phy *the_phy)
1100 BUG_ON(the_phy == NULL);
1102 if (
1103 (this_controller->power_control.timer_started)
1104 && (this_controller->power_control.requesters[the_phy->phy_index] == NULL)
1106 this_controller->power_control.requesters[the_phy->phy_index] = the_phy;
1107 this_controller->power_control.phys_waiting++;
1108 } else {
1109 scic_sds_controller_power_control_timer_start(this_controller);
1110 scic_sds_phy_consume_power_handler(the_phy);
1115 * This method removes the phy from the stagger spinup control queue.
1116 * @this_controller:
1120 void scic_sds_controller_power_control_queue_remove(
1121 struct scic_sds_controller *this_controller,
1122 struct scic_sds_phy *the_phy)
1124 BUG_ON(the_phy == NULL);
1126 if (this_controller->power_control.requesters[the_phy->phy_index] != NULL) {
1127 this_controller->power_control.phys_waiting--;
1130 this_controller->power_control.requesters[the_phy->phy_index] = NULL;
1134 * ****************************************************************************-
1135 * * SCIC SDS Controller Completion Routines
1136 * ****************************************************************************- */
1139 * This method returns a true value if the completion queue has entries that
1140 * can be processed
1141 * @this_controller:
1143 * bool true if the completion queue has entries to process false if the
1144 * completion queue has no entries to process
1146 static bool scic_sds_controller_completion_queue_has_entries(
1147 struct scic_sds_controller *this_controller)
1149 u32 get_value = this_controller->completion_queue_get;
1150 u32 get_index = get_value & SMU_COMPLETION_QUEUE_GET_POINTER_MASK;
1152 if (
1153 NORMALIZE_GET_POINTER_CYCLE_BIT(get_value)
1154 == COMPLETION_QUEUE_CYCLE_BIT(this_controller->completion_queue[get_index])
1156 return true;
1159 return false;
1162 /* --------------------------------------------------------------------------- */
1165 * This method processes a task completion notification. This is called from
1166 * within the controller completion handler.
1167 * @this_controller:
1168 * @completion_entry:
1171 static void scic_sds_controller_task_completion(
1172 struct scic_sds_controller *this_controller,
1173 u32 completion_entry)
1175 u32 index;
1176 struct scic_sds_request *io_request;
1178 index = SCU_GET_COMPLETION_INDEX(completion_entry);
1179 io_request = this_controller->io_request_table[index];
1181 /* Make sure that we really want to process this IO request */
1182 if (
1183 (io_request != NULL)
1184 && (io_request->io_tag != SCI_CONTROLLER_INVALID_IO_TAG)
1185 && (
1186 scic_sds_io_tag_get_sequence(io_request->io_tag)
1187 == this_controller->io_request_sequence[index]
1190 /* Yep this is a valid io request pass it along to the io request handler */
1191 scic_sds_io_request_tc_completion(io_request, completion_entry);
1196 * This method processes an SDMA completion event. This is called from within
1197 * the controller completion handler.
1198 * @this_controller:
1199 * @completion_entry:
1202 static void scic_sds_controller_sdma_completion(
1203 struct scic_sds_controller *this_controller,
1204 u32 completion_entry)
1206 u32 index;
1207 struct scic_sds_request *io_request;
1208 struct scic_sds_remote_device *device;
1210 index = SCU_GET_COMPLETION_INDEX(completion_entry);
1212 switch (scu_get_command_request_type(completion_entry)) {
1213 case SCU_CONTEXT_COMMAND_REQUEST_TYPE_POST_TC:
1214 case SCU_CONTEXT_COMMAND_REQUEST_TYPE_DUMP_TC:
1215 io_request = this_controller->io_request_table[index];
1216 dev_warn(scic_to_dev(this_controller),
1217 "%s: SCIC SDS Completion type SDMA %x for io request "
1218 "%p\n",
1219 __func__,
1220 completion_entry,
1221 io_request);
1222 /* @todo For a post TC operation we need to fail the IO
1223 * request
1225 break;
1227 case SCU_CONTEXT_COMMAND_REQUEST_TYPE_DUMP_RNC:
1228 case SCU_CONTEXT_COMMAND_REQUEST_TYPE_OTHER_RNC:
1229 case SCU_CONTEXT_COMMAND_REQUEST_TYPE_POST_RNC:
1230 device = this_controller->device_table[index];
1231 dev_warn(scic_to_dev(this_controller),
1232 "%s: SCIC SDS Completion type SDMA %x for remote "
1233 "device %p\n",
1234 __func__,
1235 completion_entry,
1236 device);
1237 /* @todo For a port RNC operation we need to fail the
1238 * device
1240 break;
1242 default:
1243 dev_warn(scic_to_dev(this_controller),
1244 "%s: SCIC SDS Completion unknown SDMA completion "
1245 "type %x\n",
1246 __func__,
1247 completion_entry);
1248 break;
1255 * @this_controller:
1256 * @completion_entry:
1258 * This method processes an unsolicited frame message. This is called from
1259 * within the controller completion handler. none
1261 static void scic_sds_controller_unsolicited_frame(
1262 struct scic_sds_controller *this_controller,
1263 u32 completion_entry)
1265 u32 index;
1266 u32 frame_index;
1268 struct scu_unsolicited_frame_header *frame_header;
1269 struct scic_sds_phy *phy;
1270 struct scic_sds_remote_device *device;
1272 enum sci_status result = SCI_FAILURE;
1274 frame_index = SCU_GET_FRAME_INDEX(completion_entry);
1276 frame_header
1277 = this_controller->uf_control.buffers.array[frame_index].header;
1278 this_controller->uf_control.buffers.array[frame_index].state
1279 = UNSOLICITED_FRAME_IN_USE;
1281 if (SCU_GET_FRAME_ERROR(completion_entry)) {
1283 * / @todo If the IAF frame or SIGNATURE FIS frame has an error will
1284 * / this cause a problem? We expect the phy initialization will
1285 * / fail if there is an error in the frame. */
1286 scic_sds_controller_release_frame(this_controller, frame_index);
1287 return;
1290 if (frame_header->is_address_frame) {
1291 index = SCU_GET_PROTOCOL_ENGINE_INDEX(completion_entry);
1292 phy = &this_controller->phy_table[index];
1293 if (phy != NULL) {
1294 result = scic_sds_phy_frame_handler(phy, frame_index);
1296 } else {
1298 index = SCU_GET_COMPLETION_INDEX(completion_entry);
1300 if (index == SCIC_SDS_REMOTE_NODE_CONTEXT_INVALID_INDEX) {
1302 * This is a signature fis or a frame from a direct attached SATA
1303 * device that has not yet been created. In either case forwared
1304 * the frame to the PE and let it take care of the frame data. */
1305 index = SCU_GET_PROTOCOL_ENGINE_INDEX(completion_entry);
1306 phy = &this_controller->phy_table[index];
1307 result = scic_sds_phy_frame_handler(phy, frame_index);
1308 } else {
1309 if (index < this_controller->remote_node_entries)
1310 device = this_controller->device_table[index];
1311 else
1312 device = NULL;
1314 if (device != NULL)
1315 result = scic_sds_remote_device_frame_handler(device, frame_index);
1316 else
1317 scic_sds_controller_release_frame(this_controller, frame_index);
1321 if (result != SCI_SUCCESS) {
1323 * / @todo Is there any reason to report some additional error message
1324 * / when we get this failure notifiction? */
1329 * This method processes an event completion entry. This is called from within
1330 * the controller completion handler.
1331 * @this_controller:
1332 * @completion_entry:
1335 static void scic_sds_controller_event_completion(
1336 struct scic_sds_controller *this_controller,
1337 u32 completion_entry)
1339 u32 index;
1340 struct scic_sds_request *io_request;
1341 struct scic_sds_remote_device *device;
1342 struct scic_sds_phy *phy;
1344 index = SCU_GET_COMPLETION_INDEX(completion_entry);
1346 switch (scu_get_event_type(completion_entry)) {
1347 case SCU_EVENT_TYPE_SMU_COMMAND_ERROR:
1348 /* / @todo The driver did something wrong and we need to fix the condtion. */
1349 dev_err(scic_to_dev(this_controller),
1350 "%s: SCIC Controller 0x%p received SMU command error "
1351 "0x%x\n",
1352 __func__,
1353 this_controller,
1354 completion_entry);
1355 break;
1357 case SCU_EVENT_TYPE_SMU_PCQ_ERROR:
1358 case SCU_EVENT_TYPE_SMU_ERROR:
1359 case SCU_EVENT_TYPE_FATAL_MEMORY_ERROR:
1361 * / @todo This is a hardware failure and its likely that we want to
1362 * / reset the controller. */
1363 dev_err(scic_to_dev(this_controller),
1364 "%s: SCIC Controller 0x%p received fatal controller "
1365 "event 0x%x\n",
1366 __func__,
1367 this_controller,
1368 completion_entry);
1369 break;
1371 case SCU_EVENT_TYPE_TRANSPORT_ERROR:
1372 io_request = this_controller->io_request_table[index];
1373 scic_sds_io_request_event_handler(io_request, completion_entry);
1374 break;
1376 case SCU_EVENT_TYPE_PTX_SCHEDULE_EVENT:
1377 switch (scu_get_event_specifier(completion_entry)) {
1378 case SCU_EVENT_SPECIFIC_SMP_RESPONSE_NO_PE:
1379 case SCU_EVENT_SPECIFIC_TASK_TIMEOUT:
1380 io_request = this_controller->io_request_table[index];
1381 if (io_request != NULL)
1382 scic_sds_io_request_event_handler(io_request, completion_entry);
1383 else
1384 dev_warn(scic_to_dev(this_controller),
1385 "%s: SCIC Controller 0x%p received "
1386 "event 0x%x for io request object "
1387 "that doesnt exist.\n",
1388 __func__,
1389 this_controller,
1390 completion_entry);
1392 break;
1394 case SCU_EVENT_SPECIFIC_IT_NEXUS_TIMEOUT:
1395 device = this_controller->device_table[index];
1396 if (device != NULL)
1397 scic_sds_remote_device_event_handler(device, completion_entry);
1398 else
1399 dev_warn(scic_to_dev(this_controller),
1400 "%s: SCIC Controller 0x%p received "
1401 "event 0x%x for remote device object "
1402 "that doesnt exist.\n",
1403 __func__,
1404 this_controller,
1405 completion_entry);
1407 break;
1409 break;
1411 case SCU_EVENT_TYPE_BROADCAST_CHANGE:
1413 * direct the broadcast change event to the phy first and then let
1414 * the phy redirect the broadcast change to the port object */
1415 case SCU_EVENT_TYPE_ERR_CNT_EVENT:
1417 * direct error counter event to the phy object since that is where
1418 * we get the event notification. This is a type 4 event. */
1419 case SCU_EVENT_TYPE_OSSP_EVENT:
1420 index = SCU_GET_PROTOCOL_ENGINE_INDEX(completion_entry);
1421 phy = &this_controller->phy_table[index];
1422 scic_sds_phy_event_handler(phy, completion_entry);
1423 break;
1425 case SCU_EVENT_TYPE_RNC_SUSPEND_TX:
1426 case SCU_EVENT_TYPE_RNC_SUSPEND_TX_RX:
1427 case SCU_EVENT_TYPE_RNC_OPS_MISC:
1428 if (index < this_controller->remote_node_entries) {
1429 device = this_controller->device_table[index];
1431 if (device != NULL)
1432 scic_sds_remote_device_event_handler(device, completion_entry);
1433 } else
1434 dev_err(scic_to_dev(this_controller),
1435 "%s: SCIC Controller 0x%p received event 0x%x "
1436 "for remote device object 0x%0x that doesnt "
1437 "exist.\n",
1438 __func__,
1439 this_controller,
1440 completion_entry,
1441 index);
1443 break;
1445 default:
1446 dev_warn(scic_to_dev(this_controller),
1447 "%s: SCIC Controller received unknown event code %x\n",
1448 __func__,
1449 completion_entry);
1450 break;
1455 * This method is a private routine for processing the completion queue entries.
1456 * @this_controller:
1459 static void scic_sds_controller_process_completions(
1460 struct scic_sds_controller *this_controller)
1462 u32 completion_count = 0;
1463 u32 completion_entry;
1464 u32 get_index;
1465 u32 get_cycle;
1466 u32 event_index;
1467 u32 event_cycle;
1469 dev_dbg(scic_to_dev(this_controller),
1470 "%s: completion queue begining get:0x%08x\n",
1471 __func__,
1472 this_controller->completion_queue_get);
1474 /* Get the component parts of the completion queue */
1475 get_index = NORMALIZE_GET_POINTER(this_controller->completion_queue_get);
1476 get_cycle = SMU_CQGR_CYCLE_BIT & this_controller->completion_queue_get;
1478 event_index = NORMALIZE_EVENT_POINTER(this_controller->completion_queue_get);
1479 event_cycle = SMU_CQGR_EVENT_CYCLE_BIT & this_controller->completion_queue_get;
1481 while (
1482 NORMALIZE_GET_POINTER_CYCLE_BIT(get_cycle)
1483 == COMPLETION_QUEUE_CYCLE_BIT(this_controller->completion_queue[get_index])
1485 completion_count++;
1487 completion_entry = this_controller->completion_queue[get_index];
1488 INCREMENT_COMPLETION_QUEUE_GET(this_controller, get_index, get_cycle);
1490 dev_dbg(scic_to_dev(this_controller),
1491 "%s: completion queue entry:0x%08x\n",
1492 __func__,
1493 completion_entry);
1495 switch (SCU_GET_COMPLETION_TYPE(completion_entry)) {
1496 case SCU_COMPLETION_TYPE_TASK:
1497 scic_sds_controller_task_completion(this_controller, completion_entry);
1498 break;
1500 case SCU_COMPLETION_TYPE_SDMA:
1501 scic_sds_controller_sdma_completion(this_controller, completion_entry);
1502 break;
1504 case SCU_COMPLETION_TYPE_UFI:
1505 scic_sds_controller_unsolicited_frame(this_controller, completion_entry);
1506 break;
1508 case SCU_COMPLETION_TYPE_EVENT:
1509 INCREMENT_EVENT_QUEUE_GET(this_controller, event_index, event_cycle);
1510 scic_sds_controller_event_completion(this_controller, completion_entry);
1511 break;
1513 case SCU_COMPLETION_TYPE_NOTIFY:
1515 * Presently we do the same thing with a notify event that we do with the
1516 * other event codes. */
1517 INCREMENT_EVENT_QUEUE_GET(this_controller, event_index, event_cycle);
1518 scic_sds_controller_event_completion(this_controller, completion_entry);
1519 break;
1521 default:
1522 dev_warn(scic_to_dev(this_controller),
1523 "%s: SCIC Controller received unknown "
1524 "completion type %x\n",
1525 __func__,
1526 completion_entry);
1527 break;
1531 /* Update the get register if we completed one or more entries */
1532 if (completion_count > 0) {
1533 this_controller->completion_queue_get =
1534 SMU_CQGR_GEN_BIT(ENABLE)
1535 | SMU_CQGR_GEN_BIT(EVENT_ENABLE)
1536 | event_cycle | SMU_CQGR_GEN_VAL(EVENT_POINTER, event_index)
1537 | get_cycle | SMU_CQGR_GEN_VAL(POINTER, get_index);
1539 SMU_CQGR_WRITE(this_controller,
1540 this_controller->completion_queue_get);
1543 dev_dbg(scic_to_dev(this_controller),
1544 "%s: completion queue ending get:0x%08x\n",
1545 __func__,
1546 this_controller->completion_queue_get);
1550 bool scic_sds_controller_isr(struct scic_sds_controller *scic)
1552 if (scic_sds_controller_completion_queue_has_entries(scic)) {
1553 return true;
1554 } else {
1556 * we have a spurious interrupt it could be that we have already
1557 * emptied the completion queue from a previous interrupt */
1558 SMU_ISR_WRITE(scic, SMU_ISR_COMPLETION);
1561 * There is a race in the hardware that could cause us not to be notified
1562 * of an interrupt completion if we do not take this step. We will mask
1563 * then unmask the interrupts so if there is another interrupt pending
1564 * the clearing of the interrupt source we get the next interrupt message. */
1565 SMU_IMR_WRITE(scic, 0xFF000000);
1566 SMU_IMR_WRITE(scic, 0x00000000);
1569 return false;
1572 void scic_sds_controller_completion_handler(struct scic_sds_controller *scic)
1574 /* Empty out the completion queue */
1575 if (scic_sds_controller_completion_queue_has_entries(scic))
1576 scic_sds_controller_process_completions(scic);
1578 /* Clear the interrupt and enable all interrupts again */
1579 SMU_ISR_WRITE(scic, SMU_ISR_COMPLETION);
1580 /* Could we write the value of SMU_ISR_COMPLETION? */
1581 SMU_IMR_WRITE(scic, 0xFF000000);
1582 SMU_IMR_WRITE(scic, 0x00000000);
1585 bool scic_sds_controller_error_isr(struct scic_sds_controller *scic)
1587 u32 interrupt_status;
1589 interrupt_status = SMU_ISR_READ(scic);
1591 interrupt_status &= (SMU_ISR_QUEUE_ERROR | SMU_ISR_QUEUE_SUSPEND);
1593 if (interrupt_status != 0) {
1595 * There is an error interrupt pending so let it through and handle
1596 * in the callback */
1597 return true;
1601 * There is a race in the hardware that could cause us not to be notified
1602 * of an interrupt completion if we do not take this step. We will mask
1603 * then unmask the error interrupts so if there was another interrupt
1604 * pending we will be notified.
1605 * Could we write the value of (SMU_ISR_QUEUE_ERROR | SMU_ISR_QUEUE_SUSPEND)? */
1606 SMU_IMR_WRITE(scic, 0x000000FF);
1607 SMU_IMR_WRITE(scic, 0x00000000);
1609 return false;
1612 void scic_sds_controller_error_handler(struct scic_sds_controller *scic)
1614 u32 interrupt_status;
1616 interrupt_status = SMU_ISR_READ(scic);
1618 if ((interrupt_status & SMU_ISR_QUEUE_SUSPEND) &&
1619 scic_sds_controller_completion_queue_has_entries(scic)) {
1621 scic_sds_controller_process_completions(scic);
1622 SMU_ISR_WRITE(scic, SMU_ISR_QUEUE_SUSPEND);
1624 } else {
1625 dev_err(scic_to_dev(scic), "%s: status: %#x\n", __func__,
1626 interrupt_status);
1628 sci_base_state_machine_change_state(
1629 scic_sds_controller_get_base_state_machine(scic),
1630 SCI_BASE_CONTROLLER_STATE_FAILED);
1632 return;
1636 * If we dont process any completions I am not sure that we want to do this.
1637 * We are in the middle of a hardware fault and should probably be reset. */
1638 SMU_IMR_WRITE(scic, 0x00000000);
1642 u32 scic_sds_controller_get_object_size(void)
1644 return sizeof(struct scic_sds_controller);
1648 void scic_sds_controller_link_up(
1649 struct scic_sds_controller *scic,
1650 struct scic_sds_port *sci_port,
1651 struct scic_sds_phy *sci_phy)
1653 scic_sds_controller_phy_handler_t link_up;
1654 u32 state;
1656 state = scic->parent.state_machine.current_state_id;
1657 link_up = scic_sds_controller_state_handler_table[state].link_up;
1659 if (link_up)
1660 link_up(scic, sci_port, sci_phy);
1661 else
1662 dev_warn(scic_to_dev(scic),
1663 "%s: SCIC Controller linkup event from phy %d in "
1664 "unexpected state %d\n",
1665 __func__,
1666 sci_phy->phy_index,
1667 sci_base_state_machine_get_state(
1668 scic_sds_controller_get_base_state_machine(
1669 scic)));
1673 void scic_sds_controller_link_down(
1674 struct scic_sds_controller *scic,
1675 struct scic_sds_port *sci_port,
1676 struct scic_sds_phy *sci_phy)
1678 u32 state;
1679 scic_sds_controller_phy_handler_t link_down;
1681 state = scic->parent.state_machine.current_state_id;
1682 link_down = scic_sds_controller_state_handler_table[state].link_down;
1684 if (link_down)
1685 link_down(scic, sci_port, sci_phy);
1686 else
1687 dev_warn(scic_to_dev(scic),
1688 "%s: SCIC Controller linkdown event from phy %d in "
1689 "unexpected state %d\n",
1690 __func__,
1691 sci_phy->phy_index,
1692 sci_base_state_machine_get_state(
1693 scic_sds_controller_get_base_state_machine(
1694 scic)));
1698 * This method will write to the SCU PCP register the request value. The method
1699 * is used to suspend/resume ports, devices, and phys.
1700 * @this_controller:
1704 void scic_sds_controller_post_request(
1705 struct scic_sds_controller *this_controller,
1706 u32 request)
1708 dev_dbg(scic_to_dev(this_controller),
1709 "%s: SCIC Controller 0x%p post request 0x%08x\n",
1710 __func__,
1711 this_controller,
1712 request);
1714 SMU_PCP_WRITE(this_controller, request);
1718 * This method will copy the soft copy of the task context into the physical
1719 * memory accessible by the controller.
1720 * @this_controller: This parameter specifies the controller for which to copy
1721 * the task context.
1722 * @this_request: This parameter specifies the request for which the task
1723 * context is being copied.
1725 * After this call is made the SCIC_SDS_IO_REQUEST object will always point to
1726 * the physical memory version of the task context. Thus, all subsequent
1727 * updates to the task context are performed in the TC table (i.e. DMAable
1728 * memory). none
1730 void scic_sds_controller_copy_task_context(
1731 struct scic_sds_controller *this_controller,
1732 struct scic_sds_request *this_request)
1734 struct scu_task_context *task_context_buffer;
1736 task_context_buffer = scic_sds_controller_get_task_context_buffer(
1737 this_controller, this_request->io_tag
1740 memcpy(
1741 task_context_buffer,
1742 this_request->task_context_buffer,
1743 SCI_FIELD_OFFSET(struct scu_task_context, sgl_snapshot_ac)
1747 * Now that the soft copy of the TC has been copied into the TC
1748 * table accessible by the silicon. Thus, any further changes to
1749 * the TC (e.g. TC termination) occur in the appropriate location. */
1750 this_request->task_context_buffer = task_context_buffer;
1754 * This method returns the task context buffer for the given io tag.
1755 * @this_controller:
1756 * @io_tag:
1758 * struct scu_task_context*
1760 struct scu_task_context *scic_sds_controller_get_task_context_buffer(
1761 struct scic_sds_controller *this_controller,
1762 u16 io_tag
1764 u16 task_index = scic_sds_io_tag_get_index(io_tag);
1766 if (task_index < this_controller->task_context_entries) {
1767 return &this_controller->task_context_table[task_index];
1770 return NULL;
1774 * This method returnst the sequence value from the io tag value
1775 * @this_controller:
1776 * @io_tag:
1778 * u16
1782 * This method returns the IO request associated with the tag value
1783 * @this_controller:
1784 * @io_tag:
1786 * SCIC_SDS_IO_REQUEST_T* NULL if there is no valid IO request at the tag value
1788 struct scic_sds_request *scic_sds_controller_get_io_request_from_tag(
1789 struct scic_sds_controller *this_controller,
1790 u16 io_tag
1792 u16 task_index;
1793 u16 task_sequence;
1795 task_index = scic_sds_io_tag_get_index(io_tag);
1797 if (task_index < this_controller->task_context_entries) {
1798 if (this_controller->io_request_table[task_index] != NULL) {
1799 task_sequence = scic_sds_io_tag_get_sequence(io_tag);
1801 if (task_sequence == this_controller->io_request_sequence[task_index]) {
1802 return this_controller->io_request_table[task_index];
1807 return NULL;
1811 * This method allocates remote node index and the reserves the remote node
1812 * context space for use. This method can fail if there are no more remote
1813 * node index available.
1814 * @this_controller: This is the controller object which contains the set of
1815 * free remote node ids
1816 * @the_devce: This is the device object which is requesting the a remote node
1817 * id
1818 * @node_id: This is the remote node id that is assinged to the device if one
1819 * is available
1821 * enum sci_status SCI_FAILURE_OUT_OF_RESOURCES if there are no available remote
1822 * node index available.
1824 enum sci_status scic_sds_controller_allocate_remote_node_context(
1825 struct scic_sds_controller *this_controller,
1826 struct scic_sds_remote_device *the_device,
1827 u16 *node_id)
1829 u16 node_index;
1830 u32 remote_node_count = scic_sds_remote_device_node_count(the_device);
1832 node_index = scic_sds_remote_node_table_allocate_remote_node(
1833 &this_controller->available_remote_nodes, remote_node_count
1836 if (node_index != SCIC_SDS_REMOTE_NODE_CONTEXT_INVALID_INDEX) {
1837 this_controller->device_table[node_index] = the_device;
1839 *node_id = node_index;
1841 return SCI_SUCCESS;
1844 return SCI_FAILURE_INSUFFICIENT_RESOURCES;
1848 * This method frees the remote node index back to the available pool. Once
1849 * this is done the remote node context buffer is no longer valid and can
1850 * not be used.
1851 * @this_controller:
1852 * @the_device:
1853 * @node_id:
1856 void scic_sds_controller_free_remote_node_context(
1857 struct scic_sds_controller *this_controller,
1858 struct scic_sds_remote_device *the_device,
1859 u16 node_id)
1861 u32 remote_node_count = scic_sds_remote_device_node_count(the_device);
1863 if (this_controller->device_table[node_id] == the_device) {
1864 this_controller->device_table[node_id] = NULL;
1866 scic_sds_remote_node_table_release_remote_node_index(
1867 &this_controller->available_remote_nodes, remote_node_count, node_id
1873 * This method returns the union scu_remote_node_context for the specified remote
1874 * node id.
1875 * @this_controller:
1876 * @node_id:
1878 * union scu_remote_node_context*
1880 union scu_remote_node_context *scic_sds_controller_get_remote_node_context_buffer(
1881 struct scic_sds_controller *this_controller,
1882 u16 node_id
1884 if (
1885 (node_id < this_controller->remote_node_entries)
1886 && (this_controller->device_table[node_id] != NULL)
1888 return &this_controller->remote_node_context_table[node_id];
1891 return NULL;
1896 * @resposne_buffer: This is the buffer into which the D2H register FIS will be
1897 * constructed.
1898 * @frame_header: This is the frame header returned by the hardware.
1899 * @frame_buffer: This is the frame buffer returned by the hardware.
1901 * This method will combind the frame header and frame buffer to create a SATA
1902 * D2H register FIS none
1904 void scic_sds_controller_copy_sata_response(
1905 void *response_buffer,
1906 void *frame_header,
1907 void *frame_buffer)
1909 memcpy(
1910 response_buffer,
1911 frame_header,
1912 sizeof(u32)
1915 memcpy(
1916 (char *)((char *)response_buffer + sizeof(u32)),
1917 frame_buffer,
1918 sizeof(struct sata_fis_reg_d2h) - sizeof(u32)
1923 * This method releases the frame once this is done the frame is available for
1924 * re-use by the hardware. The data contained in the frame header and frame
1925 * buffer is no longer valid. The UF queue get pointer is only updated if UF
1926 * control indicates this is appropriate.
1927 * @this_controller:
1928 * @frame_index:
1931 void scic_sds_controller_release_frame(
1932 struct scic_sds_controller *this_controller,
1933 u32 frame_index)
1935 if (scic_sds_unsolicited_frame_control_release_frame(
1936 &this_controller->uf_control, frame_index) == true)
1937 SCU_UFQGP_WRITE(this_controller, this_controller->uf_control.get);
1941 * This method sets user parameters and OEM parameters to default values.
1942 * Users can override these values utilizing the scic_user_parameters_set()
1943 * and scic_oem_parameters_set() methods.
1944 * @controller: This parameter specifies the controller for which to set the
1945 * configuration parameters to their default values.
1948 static void scic_sds_controller_set_default_config_parameters(struct scic_sds_controller *scic)
1950 u16 index;
1952 /* Default to no SSC operation. */
1953 scic->oem_parameters.sds1.controller.do_enable_ssc = false;
1955 /* Initialize all of the port parameter information to narrow ports. */
1956 for (index = 0; index < SCI_MAX_PORTS; index++) {
1957 scic->oem_parameters.sds1.ports[index].phy_mask = 0;
1960 /* Initialize all of the phy parameter information. */
1961 for (index = 0; index < SCI_MAX_PHYS; index++) {
1963 * Default to 3G (i.e. Gen 2) for now. User can override if
1964 * they choose. */
1965 scic->user_parameters.sds1.phys[index].max_speed_generation = 2;
1967 /* the frequencies cannot be 0 */
1968 scic->user_parameters.sds1.phys[index].align_insertion_frequency = 0x7f;
1969 scic->user_parameters.sds1.phys[index].in_connection_align_insertion_frequency = 0xff;
1970 scic->user_parameters.sds1.phys[index].notify_enable_spin_up_insertion_frequency = 0x33;
1973 * Previous Vitesse based expanders had a arbitration issue that
1974 * is worked around by having the upper 32-bits of SAS address
1975 * with a value greater then the Vitesse company identifier.
1976 * Hence, usage of 0x5FCFFFFF. */
1977 scic->oem_parameters.sds1.phys[index].sas_address.low = 0x00000001;
1978 scic->oem_parameters.sds1.phys[index].sas_address.high = 0x5FCFFFFF;
1981 scic->user_parameters.sds1.stp_inactivity_timeout = 5;
1982 scic->user_parameters.sds1.ssp_inactivity_timeout = 5;
1983 scic->user_parameters.sds1.stp_max_occupancy_timeout = 5;
1984 scic->user_parameters.sds1.ssp_max_occupancy_timeout = 20;
1985 scic->user_parameters.sds1.no_outbound_task_timeout = 20;
1989 enum sci_status scic_controller_construct(struct scic_sds_controller *controller,
1990 void __iomem *scu_base,
1991 void __iomem *smu_base)
1993 u8 index;
1995 sci_base_controller_construct(
1996 &controller->parent,
1997 scic_sds_controller_state_table,
1998 controller->memory_descriptors,
1999 ARRAY_SIZE(controller->memory_descriptors),
2000 NULL
2003 controller->scu_registers = scu_base;
2004 controller->smu_registers = smu_base;
2006 scic_sds_port_configuration_agent_construct(&controller->port_agent);
2008 /* Construct the ports for this controller */
2009 for (index = 0; index < SCI_MAX_PORTS; index++)
2010 scic_sds_port_construct(&controller->port_table[index],
2011 index, controller);
2012 scic_sds_port_construct(&controller->port_table[index],
2013 SCIC_SDS_DUMMY_PORT, controller);
2015 /* Construct the phys for this controller */
2016 for (index = 0; index < SCI_MAX_PHYS; index++) {
2017 /* Add all the PHYs to the dummy port */
2018 scic_sds_phy_construct(
2019 &controller->phy_table[index],
2020 &controller->port_table[SCI_MAX_PORTS],
2021 index
2025 controller->invalid_phy_mask = 0;
2027 /* Set the default maximum values */
2028 controller->completion_event_entries = SCU_EVENT_COUNT;
2029 controller->completion_queue_entries = SCU_COMPLETION_QUEUE_COUNT;
2030 controller->remote_node_entries = SCI_MAX_REMOTE_DEVICES;
2031 controller->logical_port_entries = SCI_MAX_PORTS;
2032 controller->task_context_entries = SCU_IO_REQUEST_COUNT;
2033 controller->uf_control.buffers.count = SCU_UNSOLICITED_FRAME_COUNT;
2034 controller->uf_control.address_table.count = SCU_UNSOLICITED_FRAME_COUNT;
2036 /* Initialize the User and OEM parameters to default values. */
2037 scic_sds_controller_set_default_config_parameters(controller);
2039 return SCI_SUCCESS;
2042 /* --------------------------------------------------------------------------- */
2044 enum sci_status scic_controller_initialize(
2045 struct scic_sds_controller *scic)
2047 enum sci_status status = SCI_FAILURE_INVALID_STATE;
2048 sci_base_controller_handler_t initialize;
2049 u32 state;
2051 state = scic->parent.state_machine.current_state_id;
2052 initialize = scic_sds_controller_state_handler_table[state].base.initialize;
2054 if (initialize)
2055 status = initialize(&scic->parent);
2056 else
2057 dev_warn(scic_to_dev(scic),
2058 "%s: SCIC Controller initialize operation requested "
2059 "in invalid state %d\n",
2060 __func__,
2061 sci_base_state_machine_get_state(
2062 scic_sds_controller_get_base_state_machine(
2063 scic)));
2065 return status;
2068 /* --------------------------------------------------------------------------- */
2070 u32 scic_controller_get_suggested_start_timeout(
2071 struct scic_sds_controller *sc)
2073 /* Validate the user supplied parameters. */
2074 if (sc == NULL)
2075 return 0;
2078 * The suggested minimum timeout value for a controller start operation:
2080 * Signature FIS Timeout
2081 * + Phy Start Timeout
2082 * + Number of Phy Spin Up Intervals
2083 * ---------------------------------
2084 * Number of milliseconds for the controller start operation.
2086 * NOTE: The number of phy spin up intervals will be equivalent
2087 * to the number of phys divided by the number phys allowed
2088 * per interval - 1 (once OEM parameters are supported).
2089 * Currently we assume only 1 phy per interval. */
2091 return SCIC_SDS_SIGNATURE_FIS_TIMEOUT
2092 + SCIC_SDS_CONTROLLER_PHY_START_TIMEOUT
2093 + ((SCI_MAX_PHYS - 1) * SCIC_SDS_CONTROLLER_POWER_CONTROL_INTERVAL);
2096 /* --------------------------------------------------------------------------- */
2098 enum sci_status scic_controller_start(
2099 struct scic_sds_controller *scic,
2100 u32 timeout)
2102 enum sci_status status = SCI_FAILURE_INVALID_STATE;
2103 sci_base_controller_timed_handler_t start;
2104 u32 state;
2106 state = scic->parent.state_machine.current_state_id;
2107 start = scic_sds_controller_state_handler_table[state].base.start;
2109 if (start)
2110 status = start(&scic->parent, timeout);
2111 else
2112 dev_warn(scic_to_dev(scic),
2113 "%s: SCIC Controller start operation requested in "
2114 "invalid state %d\n",
2115 __func__,
2116 sci_base_state_machine_get_state(
2117 scic_sds_controller_get_base_state_machine(
2118 scic)));
2120 return status;
2123 /* --------------------------------------------------------------------------- */
2125 enum sci_status scic_controller_stop(
2126 struct scic_sds_controller *scic,
2127 u32 timeout)
2129 enum sci_status status = SCI_FAILURE_INVALID_STATE;
2130 sci_base_controller_timed_handler_t stop;
2131 u32 state;
2133 state = scic->parent.state_machine.current_state_id;
2134 stop = scic_sds_controller_state_handler_table[state].base.stop;
2136 if (stop)
2137 status = stop(&scic->parent, timeout);
2138 else
2139 dev_warn(scic_to_dev(scic),
2140 "%s: SCIC Controller stop operation requested in "
2141 "invalid state %d\n",
2142 __func__,
2143 sci_base_state_machine_get_state(
2144 scic_sds_controller_get_base_state_machine(
2145 scic)));
2147 return status;
2150 /* --------------------------------------------------------------------------- */
2152 enum sci_status scic_controller_reset(
2153 struct scic_sds_controller *scic)
2155 enum sci_status status = SCI_FAILURE_INVALID_STATE;
2156 sci_base_controller_handler_t reset;
2157 u32 state;
2159 state = scic->parent.state_machine.current_state_id;
2160 reset = scic_sds_controller_state_handler_table[state].base.reset;
2162 if (reset)
2163 status = reset(&scic->parent);
2164 else
2165 dev_warn(scic_to_dev(scic),
2166 "%s: SCIC Controller reset operation requested in "
2167 "invalid state %d\n",
2168 __func__,
2169 sci_base_state_machine_get_state(
2170 scic_sds_controller_get_base_state_machine(
2171 scic)));
2173 return status;
2176 enum sci_io_status scic_controller_start_io(
2177 struct scic_sds_controller *scic,
2178 struct scic_sds_remote_device *remote_device,
2179 struct scic_sds_request *io_request,
2180 u16 io_tag)
2182 u32 state;
2183 sci_base_controller_start_request_handler_t start_io;
2185 state = scic->parent.state_machine.current_state_id;
2186 start_io = scic_sds_controller_state_handler_table[state].base.start_io;
2188 return start_io(&scic->parent,
2189 (struct sci_base_remote_device *) remote_device,
2190 (struct sci_base_request *)io_request, io_tag);
2193 /* --------------------------------------------------------------------------- */
2195 enum sci_status scic_controller_terminate_request(
2196 struct scic_sds_controller *scic,
2197 struct scic_sds_remote_device *remote_device,
2198 struct scic_sds_request *request)
2200 sci_base_controller_request_handler_t terminate_request;
2201 u32 state;
2203 state = scic->parent.state_machine.current_state_id;
2204 terminate_request = scic_sds_controller_state_handler_table[state].terminate_request;
2206 return terminate_request(&scic->parent,
2207 (struct sci_base_remote_device *)remote_device,
2208 (struct sci_base_request *)request);
2211 /* --------------------------------------------------------------------------- */
2213 enum sci_status scic_controller_complete_io(
2214 struct scic_sds_controller *scic,
2215 struct scic_sds_remote_device *remote_device,
2216 struct scic_sds_request *io_request)
2218 u32 state;
2219 sci_base_controller_request_handler_t complete_io;
2221 state = scic->parent.state_machine.current_state_id;
2222 complete_io = scic_sds_controller_state_handler_table[state].base.complete_io;
2224 return complete_io(&scic->parent,
2225 (struct sci_base_remote_device *)remote_device,
2226 (struct sci_base_request *)io_request);
2229 /* --------------------------------------------------------------------------- */
2232 enum sci_task_status scic_controller_start_task(
2233 struct scic_sds_controller *scic,
2234 struct scic_sds_remote_device *remote_device,
2235 struct scic_sds_request *task_request,
2236 u16 task_tag)
2238 u32 state;
2239 sci_base_controller_start_request_handler_t start_task;
2240 enum sci_task_status status = SCI_TASK_FAILURE_INVALID_STATE;
2242 state = scic->parent.state_machine.current_state_id;
2243 start_task = scic_sds_controller_state_handler_table[state].base.start_task;
2245 if (start_task)
2246 status = start_task(&scic->parent,
2247 (struct sci_base_remote_device *)remote_device,
2248 (struct sci_base_request *)task_request,
2249 task_tag);
2250 else
2251 dev_warn(scic_to_dev(scic),
2252 "%s: SCIC Controller starting task from invalid "
2253 "state\n",
2254 __func__);
2256 return status;
2259 /* --------------------------------------------------------------------------- */
2261 enum sci_status scic_controller_complete_task(
2262 struct scic_sds_controller *scic,
2263 struct scic_sds_remote_device *remote_device,
2264 struct scic_sds_request *task_request)
2266 u32 state;
2267 sci_base_controller_request_handler_t complete_task;
2268 enum sci_status status = SCI_FAILURE_INVALID_STATE;
2270 state = scic->parent.state_machine.current_state_id;
2271 complete_task = scic_sds_controller_state_handler_table[state].base.complete_task;
2273 if (complete_task)
2274 status = complete_task(&scic->parent,
2275 (struct sci_base_remote_device *)remote_device,
2276 (struct sci_base_request *)task_request);
2277 else
2278 dev_warn(scic_to_dev(scic),
2279 "%s: SCIC Controller completing task from invalid "
2280 "state\n",
2281 __func__);
2283 return status;
2287 /* --------------------------------------------------------------------------- */
2289 enum sci_status scic_controller_get_port_handle(
2290 struct scic_sds_controller *scic,
2291 u8 port_index,
2292 struct scic_sds_port **port_handle)
2294 if (port_index < scic->logical_port_entries) {
2295 *port_handle = &scic->port_table[port_index];
2297 return SCI_SUCCESS;
2300 return SCI_FAILURE_INVALID_PORT;
2303 /* --------------------------------------------------------------------------- */
2305 enum sci_status scic_controller_get_phy_handle(
2306 struct scic_sds_controller *scic,
2307 u8 phy_index,
2308 struct scic_sds_phy **phy_handle)
2310 if (phy_index < ARRAY_SIZE(scic->phy_table)) {
2311 *phy_handle = &scic->phy_table[phy_index];
2313 return SCI_SUCCESS;
2316 dev_err(scic_to_dev(scic),
2317 "%s: Controller:0x%p PhyId:0x%x invalid phy index\n",
2318 __func__, scic, phy_index);
2320 return SCI_FAILURE_INVALID_PHY;
2323 /* --------------------------------------------------------------------------- */
2325 u16 scic_controller_allocate_io_tag(
2326 struct scic_sds_controller *scic)
2328 u16 task_context;
2329 u16 sequence_count;
2331 if (!sci_pool_empty(scic->tci_pool)) {
2332 sci_pool_get(scic->tci_pool, task_context);
2334 sequence_count = scic->io_request_sequence[task_context];
2336 return scic_sds_io_tag_construct(sequence_count, task_context);
2339 return SCI_CONTROLLER_INVALID_IO_TAG;
2342 /* --------------------------------------------------------------------------- */
2344 enum sci_status scic_controller_free_io_tag(
2345 struct scic_sds_controller *scic,
2346 u16 io_tag)
2348 u16 sequence;
2349 u16 index;
2351 BUG_ON(io_tag == SCI_CONTROLLER_INVALID_IO_TAG);
2353 sequence = scic_sds_io_tag_get_sequence(io_tag);
2354 index = scic_sds_io_tag_get_index(io_tag);
2356 if (!sci_pool_full(scic->tci_pool)) {
2357 if (sequence == scic->io_request_sequence[index]) {
2358 scic_sds_io_sequence_increment(
2359 scic->io_request_sequence[index]);
2361 sci_pool_put(scic->tci_pool, index);
2363 return SCI_SUCCESS;
2367 return SCI_FAILURE_INVALID_IO_TAG;
2370 /* --------------------------------------------------------------------------- */
2372 void scic_controller_enable_interrupts(
2373 struct scic_sds_controller *scic)
2375 BUG_ON(scic->smu_registers == NULL);
2376 SMU_IMR_WRITE(scic, 0x00000000);
2379 /* --------------------------------------------------------------------------- */
2381 void scic_controller_disable_interrupts(
2382 struct scic_sds_controller *scic)
2384 BUG_ON(scic->smu_registers == NULL);
2385 SMU_IMR_WRITE(scic, 0xffffffff);
2388 /* --------------------------------------------------------------------------- */
2390 enum sci_status scic_controller_set_mode(
2391 struct scic_sds_controller *scic,
2392 enum sci_controller_mode operating_mode)
2394 enum sci_status status = SCI_SUCCESS;
2396 if ((scic->parent.state_machine.current_state_id ==
2397 SCI_BASE_CONTROLLER_STATE_INITIALIZING) ||
2398 (scic->parent.state_machine.current_state_id ==
2399 SCI_BASE_CONTROLLER_STATE_INITIALIZED)) {
2400 switch (operating_mode) {
2401 case SCI_MODE_SPEED:
2402 scic->remote_node_entries = SCI_MAX_REMOTE_DEVICES;
2403 scic->task_context_entries = SCU_IO_REQUEST_COUNT;
2404 scic->uf_control.buffers.count =
2405 SCU_UNSOLICITED_FRAME_COUNT;
2406 scic->completion_event_entries = SCU_EVENT_COUNT;
2407 scic->completion_queue_entries =
2408 SCU_COMPLETION_QUEUE_COUNT;
2409 scic_sds_controller_build_memory_descriptor_table(scic);
2410 break;
2412 case SCI_MODE_SIZE:
2413 scic->remote_node_entries = SCI_MIN_REMOTE_DEVICES;
2414 scic->task_context_entries = SCI_MIN_IO_REQUESTS;
2415 scic->uf_control.buffers.count =
2416 SCU_MIN_UNSOLICITED_FRAMES;
2417 scic->completion_event_entries = SCU_MIN_EVENTS;
2418 scic->completion_queue_entries =
2419 SCU_MIN_COMPLETION_QUEUE_ENTRIES;
2420 scic_sds_controller_build_memory_descriptor_table(scic);
2421 break;
2423 default:
2424 status = SCI_FAILURE_INVALID_PARAMETER_VALUE;
2425 break;
2427 } else
2428 status = SCI_FAILURE_INVALID_STATE;
2430 return status;
2434 * scic_sds_controller_reset_hardware() -
2436 * This method will reset the controller hardware.
2438 void scic_sds_controller_reset_hardware(
2439 struct scic_sds_controller *scic)
2441 /* Disable interrupts so we dont take any spurious interrupts */
2442 scic_controller_disable_interrupts(scic);
2444 /* Reset the SCU */
2445 SMU_SMUSRCR_WRITE(scic, 0xFFFFFFFF);
2447 /* Delay for 1ms to before clearing the CQP and UFQPR. */
2448 udelay(1000);
2450 /* The write to the CQGR clears the CQP */
2451 SMU_CQGR_WRITE(scic, 0x00000000);
2453 /* The write to the UFQGP clears the UFQPR */
2454 SCU_UFQGP_WRITE(scic, 0x00000000);
2457 /* --------------------------------------------------------------------------- */
2459 enum sci_status scic_user_parameters_set(
2460 struct scic_sds_controller *scic,
2461 union scic_user_parameters *scic_parms)
2463 if (
2464 (scic->parent.state_machine.current_state_id
2465 == SCI_BASE_CONTROLLER_STATE_RESET)
2466 || (scic->parent.state_machine.current_state_id
2467 == SCI_BASE_CONTROLLER_STATE_INITIALIZING)
2468 || (scic->parent.state_machine.current_state_id
2469 == SCI_BASE_CONTROLLER_STATE_INITIALIZED)
2471 u16 index;
2474 * Validate the user parameters. If they are not legal, then
2475 * return a failure. */
2476 for (index = 0; index < SCI_MAX_PHYS; index++) {
2477 if (!(scic_parms->sds1.phys[index].max_speed_generation
2478 <= SCIC_SDS_PARM_MAX_SPEED
2479 && scic_parms->sds1.phys[index].max_speed_generation
2480 > SCIC_SDS_PARM_NO_SPEED))
2481 return SCI_FAILURE_INVALID_PARAMETER_VALUE;
2483 if (scic_parms->sds1.phys[index].in_connection_align_insertion_frequency < 3)
2484 return SCI_FAILURE_INVALID_PARAMETER_VALUE;
2485 if (
2486 (scic_parms->sds1.phys[index].in_connection_align_insertion_frequency < 3) ||
2487 (scic_parms->sds1.phys[index].align_insertion_frequency == 0) ||
2488 (scic_parms->sds1.phys[index].notify_enable_spin_up_insertion_frequency == 0)
2490 return SCI_FAILURE_INVALID_PARAMETER_VALUE;
2493 if ((scic_parms->sds1.stp_inactivity_timeout == 0) ||
2494 (scic_parms->sds1.ssp_inactivity_timeout == 0) ||
2495 (scic_parms->sds1.stp_max_occupancy_timeout == 0) ||
2496 (scic_parms->sds1.ssp_max_occupancy_timeout == 0) ||
2497 (scic_parms->sds1.no_outbound_task_timeout == 0))
2498 return SCI_FAILURE_INVALID_PARAMETER_VALUE;
2500 memcpy(&scic->user_parameters, scic_parms, sizeof(*scic_parms));
2502 return SCI_SUCCESS;
2505 return SCI_FAILURE_INVALID_STATE;
2508 /* --------------------------------------------------------------------------- */
2510 void scic_user_parameters_get(
2511 struct scic_sds_controller *scic,
2512 union scic_user_parameters *scic_parms)
2514 memcpy(scic_parms, (&scic->user_parameters), sizeof(*scic_parms));
2517 /* --------------------------------------------------------------------------- */
2519 enum sci_status scic_oem_parameters_set(
2520 struct scic_sds_controller *scic,
2521 union scic_oem_parameters *scic_parms)
2523 if (
2524 (scic->parent.state_machine.current_state_id
2525 == SCI_BASE_CONTROLLER_STATE_RESET)
2526 || (scic->parent.state_machine.current_state_id
2527 == SCI_BASE_CONTROLLER_STATE_INITIALIZING)
2528 || (scic->parent.state_machine.current_state_id
2529 == SCI_BASE_CONTROLLER_STATE_INITIALIZED)
2531 u16 index;
2534 * Validate the oem parameters. If they are not legal, then
2535 * return a failure. */
2536 for (index = 0; index < SCI_MAX_PORTS; index++) {
2537 if (scic_parms->sds1.ports[index].phy_mask > SCIC_SDS_PARM_PHY_MASK_MAX) {
2538 return SCI_FAILURE_INVALID_PARAMETER_VALUE;
2542 for (index = 0; index < SCI_MAX_PHYS; index++) {
2543 if (
2544 scic_parms->sds1.phys[index].sas_address.high == 0
2545 && scic_parms->sds1.phys[index].sas_address.low == 0
2547 return SCI_FAILURE_INVALID_PARAMETER_VALUE;
2551 memcpy(&scic->oem_parameters, scic_parms, sizeof(*scic_parms));
2552 return SCI_SUCCESS;
2555 return SCI_FAILURE_INVALID_STATE;
2558 /* --------------------------------------------------------------------------- */
2560 void scic_oem_parameters_get(
2561 struct scic_sds_controller *scic,
2562 union scic_oem_parameters *scic_parms)
2564 memcpy(scic_parms, (&scic->oem_parameters), sizeof(*scic_parms));
2567 /* --------------------------------------------------------------------------- */
2570 #define INTERRUPT_COALESCE_TIMEOUT_BASE_RANGE_LOWER_BOUND_NS 853
2571 #define INTERRUPT_COALESCE_TIMEOUT_BASE_RANGE_UPPER_BOUND_NS 1280
2572 #define INTERRUPT_COALESCE_TIMEOUT_MAX_US 2700000
2573 #define INTERRUPT_COALESCE_NUMBER_MAX 256
2574 #define INTERRUPT_COALESCE_TIMEOUT_ENCODE_MIN 7
2575 #define INTERRUPT_COALESCE_TIMEOUT_ENCODE_MAX 28
2577 enum sci_status scic_controller_set_interrupt_coalescence(
2578 struct scic_sds_controller *scic_controller,
2579 u32 coalesce_number,
2580 u32 coalesce_timeout)
2582 u8 timeout_encode = 0;
2583 u32 min = 0;
2584 u32 max = 0;
2586 /* Check if the input parameters fall in the range. */
2587 if (coalesce_number > INTERRUPT_COALESCE_NUMBER_MAX)
2588 return SCI_FAILURE_INVALID_PARAMETER_VALUE;
2591 * Defined encoding for interrupt coalescing timeout:
2592 * Value Min Max Units
2593 * ----- --- --- -----
2594 * 0 - - Disabled
2595 * 1 13.3 20.0 ns
2596 * 2 26.7 40.0
2597 * 3 53.3 80.0
2598 * 4 106.7 160.0
2599 * 5 213.3 320.0
2600 * 6 426.7 640.0
2601 * 7 853.3 1280.0
2602 * 8 1.7 2.6 us
2603 * 9 3.4 5.1
2604 * 10 6.8 10.2
2605 * 11 13.7 20.5
2606 * 12 27.3 41.0
2607 * 13 54.6 81.9
2608 * 14 109.2 163.8
2609 * 15 218.5 327.7
2610 * 16 436.9 655.4
2611 * 17 873.8 1310.7
2612 * 18 1.7 2.6 ms
2613 * 19 3.5 5.2
2614 * 20 7.0 10.5
2615 * 21 14.0 21.0
2616 * 22 28.0 41.9
2617 * 23 55.9 83.9
2618 * 24 111.8 167.8
2619 * 25 223.7 335.5
2620 * 26 447.4 671.1
2621 * 27 894.8 1342.2
2622 * 28 1.8 2.7 s
2623 * Others Undefined */
2626 * Use the table above to decide the encode of interrupt coalescing timeout
2627 * value for register writing. */
2628 if (coalesce_timeout == 0)
2629 timeout_encode = 0;
2630 else{
2631 /* make the timeout value in unit of (10 ns). */
2632 coalesce_timeout = coalesce_timeout * 100;
2633 min = INTERRUPT_COALESCE_TIMEOUT_BASE_RANGE_LOWER_BOUND_NS / 10;
2634 max = INTERRUPT_COALESCE_TIMEOUT_BASE_RANGE_UPPER_BOUND_NS / 10;
2636 /* get the encode of timeout for register writing. */
2637 for (timeout_encode = INTERRUPT_COALESCE_TIMEOUT_ENCODE_MIN;
2638 timeout_encode <= INTERRUPT_COALESCE_TIMEOUT_ENCODE_MAX;
2639 timeout_encode++) {
2640 if (min <= coalesce_timeout && max > coalesce_timeout)
2641 break;
2642 else if (coalesce_timeout >= max && coalesce_timeout < min * 2
2643 && coalesce_timeout <= INTERRUPT_COALESCE_TIMEOUT_MAX_US * 100) {
2644 if ((coalesce_timeout - max) < (2 * min - coalesce_timeout))
2645 break;
2646 else{
2647 timeout_encode++;
2648 break;
2650 } else {
2651 max = max * 2;
2652 min = min * 2;
2656 if (timeout_encode == INTERRUPT_COALESCE_TIMEOUT_ENCODE_MAX + 1)
2657 /* the value is out of range. */
2658 return SCI_FAILURE_INVALID_PARAMETER_VALUE;
2661 SMU_ICC_WRITE(
2662 scic_controller,
2663 (SMU_ICC_GEN_VAL(NUMBER, coalesce_number) |
2664 SMU_ICC_GEN_VAL(TIMER, timeout_encode))
2667 scic_controller->interrupt_coalesce_number = (u16)coalesce_number;
2668 scic_controller->interrupt_coalesce_timeout = coalesce_timeout / 100;
2670 return SCI_SUCCESS;
2674 struct scic_sds_controller *scic_controller_alloc(struct device *dev)
2676 return devm_kzalloc(dev, sizeof(struct scic_sds_controller), GFP_KERNEL);
2680 * *****************************************************************************
2681 * * DEFAULT STATE HANDLERS
2682 * ***************************************************************************** */
2686 * @controller: This is struct sci_base_controller object which is cast into a
2687 * struct scic_sds_controller object.
2688 * @remote_device: This is struct sci_base_remote_device which, if it was used, would
2689 * be cast to a struct scic_sds_remote_device.
2690 * @io_request: This is the struct sci_base_request which, if it was used, would be
2691 * cast to a SCIC_SDS_IO_REQUEST.
2692 * @io_tag: This is the IO tag to be assigned to the IO request or
2693 * SCI_CONTROLLER_INVALID_IO_TAG.
2695 * This method is called when the struct scic_sds_controller default start io/task
2696 * handler is in place. - Issue a warning message enum sci_status
2697 * SCI_FAILURE_INVALID_STATE
2699 static enum sci_status scic_sds_controller_default_start_operation_handler(
2700 struct sci_base_controller *controller,
2701 struct sci_base_remote_device *remote_device,
2702 struct sci_base_request *io_request,
2703 u16 io_tag)
2705 struct scic_sds_controller *this_controller;
2707 this_controller = (struct scic_sds_controller *)controller;
2709 dev_warn(scic_to_dev(this_controller),
2710 "%s: SCIC Controller requested to start an io/task from "
2711 "invalid state %d\n",
2712 __func__,
2713 sci_base_state_machine_get_state(
2714 scic_sds_controller_get_base_state_machine(
2715 this_controller)));
2717 return SCI_FAILURE_INVALID_STATE;
2722 * @controller: This is struct sci_base_controller object which is cast into a
2723 * struct scic_sds_controller object.
2724 * @remote_device: This is struct sci_base_remote_device which, if it was used, would
2725 * be cast to a struct scic_sds_remote_device.
2726 * @io_request: This is the struct sci_base_request which, if it was used, would be
2727 * cast to a SCIC_SDS_IO_REQUEST.
2729 * This method is called when the struct scic_sds_controller default request handler
2730 * is in place. - Issue a warning message enum sci_status SCI_FAILURE_INVALID_STATE
2732 static enum sci_status scic_sds_controller_default_request_handler(
2733 struct sci_base_controller *controller,
2734 struct sci_base_remote_device *remote_device,
2735 struct sci_base_request *io_request)
2737 struct scic_sds_controller *this_controller;
2739 this_controller = (struct scic_sds_controller *)controller;
2741 dev_warn(scic_to_dev(this_controller),
2742 "%s: SCIC Controller request operation from invalid state %d\n",
2743 __func__,
2744 sci_base_state_machine_get_state(
2745 scic_sds_controller_get_base_state_machine(
2746 this_controller)));
2748 return SCI_FAILURE_INVALID_STATE;
2752 * *****************************************************************************
2753 * * GENERAL (COMMON) STATE HANDLERS
2754 * ***************************************************************************** */
2758 * @controller: The struct sci_base_controller object which is cast into a
2759 * struct scic_sds_controller object.
2761 * This method is called when the struct scic_sds_controller is in the ready state
2762 * reset handler is in place. - Transition to
2763 * SCI_BASE_CONTROLLER_STATE_RESETTING enum sci_status SCI_SUCCESS
2765 static enum sci_status scic_sds_controller_general_reset_handler(
2766 struct sci_base_controller *controller)
2768 struct scic_sds_controller *this_controller;
2770 this_controller = (struct scic_sds_controller *)controller;
2773 * The reset operation is not a graceful cleanup just perform the state
2774 * transition. */
2775 sci_base_state_machine_change_state(
2776 scic_sds_controller_get_base_state_machine(this_controller),
2777 SCI_BASE_CONTROLLER_STATE_RESETTING
2780 return SCI_SUCCESS;
2784 * *****************************************************************************
2785 * * RESET STATE HANDLERS
2786 * ***************************************************************************** */
2790 * @controller: This is the struct sci_base_controller object which is cast into a
2791 * struct scic_sds_controller object.
2793 * This method is the struct scic_sds_controller initialize handler for the reset
2794 * state. - Currently this function does nothing enum sci_status SCI_FAILURE This
2795 * function is not yet implemented and is a valid request from the reset state.
2797 static enum sci_status scic_sds_controller_reset_state_initialize_handler(
2798 struct sci_base_controller *controller)
2800 u32 index;
2801 enum sci_status result = SCI_SUCCESS;
2802 struct scic_sds_controller *this_controller;
2804 this_controller = (struct scic_sds_controller *)controller;
2806 sci_base_state_machine_change_state(
2807 scic_sds_controller_get_base_state_machine(this_controller),
2808 SCI_BASE_CONTROLLER_STATE_INITIALIZING
2811 this_controller->timeout_timer = isci_event_timer_create(
2812 this_controller,
2813 (void (*)(void *))scic_sds_controller_timeout_handler,
2814 (void (*)(void *))controller);
2816 scic_sds_controller_initialize_phy_startup(this_controller);
2818 scic_sds_controller_initialize_power_control(this_controller);
2821 * There is nothing to do here for B0 since we do not have to
2822 * program the AFE registers.
2823 * / @todo The AFE settings are supposed to be correct for the B0 but
2824 * / presently they seem to be wrong. */
2825 scic_sds_controller_afe_initialization(this_controller);
2827 if (SCI_SUCCESS == result) {
2828 u32 status;
2829 u32 terminate_loop;
2831 /* Take the hardware out of reset */
2832 SMU_SMUSRCR_WRITE(this_controller, 0x00000000);
2835 * / @todo Provide meaningfull error code for hardware failure
2836 * result = SCI_FAILURE_CONTROLLER_HARDWARE; */
2837 result = SCI_FAILURE;
2838 terminate_loop = 100;
2840 while (terminate_loop-- && (result != SCI_SUCCESS)) {
2841 /* Loop until the hardware reports success */
2842 udelay(SCU_CONTEXT_RAM_INIT_STALL_TIME);
2843 status = SMU_SMUCSR_READ(this_controller);
2845 if ((status & SCU_RAM_INIT_COMPLETED) == SCU_RAM_INIT_COMPLETED) {
2846 result = SCI_SUCCESS;
2851 if (result == SCI_SUCCESS) {
2852 u32 max_supported_ports;
2853 u32 max_supported_devices;
2854 u32 max_supported_io_requests;
2855 u32 device_context_capacity;
2858 * Determine what are the actaul device capacities that the
2859 * hardware will support */
2860 device_context_capacity = SMU_DCC_READ(this_controller);
2862 max_supported_ports =
2863 smu_dcc_get_max_ports(device_context_capacity);
2864 max_supported_devices =
2865 smu_dcc_get_max_remote_node_context(device_context_capacity);
2866 max_supported_io_requests =
2867 smu_dcc_get_max_task_context(device_context_capacity);
2869 /* Make all PEs that are unassigned match up with the logical ports */
2870 for (index = 0; index < max_supported_ports; index++) {
2871 scu_register_write(
2872 this_controller,
2873 this_controller->scu_registers->peg0.ptsg.protocol_engine[index],
2874 index
2878 /* Record the smaller of the two capacity values */
2879 this_controller->logical_port_entries =
2880 min(max_supported_ports, this_controller->logical_port_entries);
2882 this_controller->task_context_entries =
2883 min(max_supported_io_requests, this_controller->task_context_entries);
2885 this_controller->remote_node_entries =
2886 min(max_supported_devices, this_controller->remote_node_entries);
2889 * Now that we have the correct hardware reported minimum values
2890 * build the MDL for the controller. Default to a performance
2891 * configuration. */
2892 scic_controller_set_mode(this_controller, SCI_MODE_SPEED);
2895 /* Initialize hardware PCI Relaxed ordering in DMA engines */
2896 if (result == SCI_SUCCESS) {
2897 u32 dma_configuration;
2899 /* Configure the payload DMA */
2900 dma_configuration = SCU_PDMACR_READ(this_controller);
2901 dma_configuration |= SCU_PDMACR_GEN_BIT(PCI_RELAXED_ORDERING_ENABLE);
2902 SCU_PDMACR_WRITE(this_controller, dma_configuration);
2904 /* Configure the control DMA */
2905 dma_configuration = SCU_CDMACR_READ(this_controller);
2906 dma_configuration |= SCU_CDMACR_GEN_BIT(PCI_RELAXED_ORDERING_ENABLE);
2907 SCU_CDMACR_WRITE(this_controller, dma_configuration);
2911 * Initialize the PHYs before the PORTs because the PHY registers
2912 * are accessed during the port initialization. */
2913 if (result == SCI_SUCCESS) {
2914 /* Initialize the phys */
2915 for (index = 0;
2916 (result == SCI_SUCCESS) && (index < SCI_MAX_PHYS);
2917 index++) {
2918 result = scic_sds_phy_initialize(
2919 &this_controller->phy_table[index],
2920 &this_controller->scu_registers->peg0.pe[index].tl,
2921 &this_controller->scu_registers->peg0.pe[index].ll
2926 if (result == SCI_SUCCESS) {
2927 /* Initialize the logical ports */
2928 for (index = 0;
2929 (index < this_controller->logical_port_entries)
2930 && (result == SCI_SUCCESS);
2931 index++) {
2932 result = scic_sds_port_initialize(
2933 &this_controller->port_table[index],
2934 &this_controller->scu_registers->peg0.ptsg.port[index],
2935 &this_controller->scu_registers->peg0.ptsg.protocol_engine,
2936 &this_controller->scu_registers->peg0.viit[index]
2941 if (SCI_SUCCESS == result) {
2942 result = scic_sds_port_configuration_agent_initialize(
2943 this_controller,
2944 &this_controller->port_agent
2948 /* Advance the controller state machine */
2949 if (result == SCI_SUCCESS) {
2950 sci_base_state_machine_change_state(
2951 scic_sds_controller_get_base_state_machine(this_controller),
2952 SCI_BASE_CONTROLLER_STATE_INITIALIZED
2954 } else {
2955 sci_base_state_machine_change_state(
2956 scic_sds_controller_get_base_state_machine(this_controller),
2957 SCI_BASE_CONTROLLER_STATE_FAILED
2961 return result;
2965 * *****************************************************************************
2966 * * INITIALIZED STATE HANDLERS
2967 * ***************************************************************************** */
2971 * @controller: This is the struct sci_base_controller object which is cast into a
2972 * struct scic_sds_controller object.
2973 * @timeout: This is the allowed time for the controller object to reach the
2974 * started state.
2976 * This method is the struct scic_sds_controller start handler for the initialized
2977 * state. - Validate we have a good memory descriptor table - Initialze the
2978 * physical memory before programming the hardware - Program the SCU hardware
2979 * with the physical memory addresses passed in the memory descriptor table. -
2980 * Initialzie the TCi pool - Initialize the RNi pool - Initialize the
2981 * completion queue - Initialize the unsolicited frame data - Take the SCU port
2982 * task scheduler out of reset - Start the first phy object. - Transition to
2983 * SCI_BASE_CONTROLLER_STATE_STARTING. enum sci_status SCI_SUCCESS if all of the
2984 * controller start operations complete
2985 * SCI_FAILURE_UNSUPPORTED_INFORMATION_FIELD if one or more of the memory
2986 * descriptor fields is invalid.
2988 static enum sci_status scic_sds_controller_initialized_state_start_handler(
2989 struct sci_base_controller *controller,
2990 u32 timeout)
2992 u16 index;
2993 enum sci_status result;
2994 struct scic_sds_controller *this_controller;
2996 this_controller = (struct scic_sds_controller *)controller;
2998 /* Make sure that the SCI User filled in the memory descriptor table correctly */
2999 result = scic_sds_controller_validate_memory_descriptor_table(this_controller);
3001 if (result == SCI_SUCCESS) {
3002 /* The memory descriptor list looks good so program the hardware */
3003 scic_sds_controller_ram_initialization(this_controller);
3006 if (SCI_SUCCESS == result) {
3007 /* Build the TCi free pool */
3008 sci_pool_initialize(this_controller->tci_pool);
3009 for (index = 0; index < this_controller->task_context_entries; index++) {
3010 sci_pool_put(this_controller->tci_pool, index);
3013 /* Build the RNi free pool */
3014 scic_sds_remote_node_table_initialize(
3015 &this_controller->available_remote_nodes,
3016 this_controller->remote_node_entries
3020 if (SCI_SUCCESS == result) {
3022 * Before anything else lets make sure we will not be interrupted
3023 * by the hardware. */
3024 scic_controller_disable_interrupts(this_controller);
3026 /* Enable the port task scheduler */
3027 scic_sds_controller_enable_port_task_scheduler(this_controller);
3029 /* Assign all the task entries to this controller physical function */
3030 scic_sds_controller_assign_task_entries(this_controller);
3032 /* Now initialze the completion queue */
3033 scic_sds_controller_initialize_completion_queue(this_controller);
3035 /* Initialize the unsolicited frame queue for use */
3036 scic_sds_controller_initialize_unsolicited_frame_queue(this_controller);
3039 if (SCI_SUCCESS == result) {
3040 scic_sds_controller_start_next_phy(this_controller);
3042 isci_event_timer_start(this_controller,
3043 this_controller->timeout_timer,
3044 timeout);
3046 sci_base_state_machine_change_state(
3047 scic_sds_controller_get_base_state_machine(this_controller),
3048 SCI_BASE_CONTROLLER_STATE_STARTING
3052 return result;
3056 * *****************************************************************************
3057 * * INITIALIZED STATE HANDLERS
3058 * ***************************************************************************** */
3062 * @controller: This is struct scic_sds_controller which receives the link up
3063 * notification.
3064 * @port: This is struct scic_sds_port with which the phy is associated.
3065 * @phy: This is the struct scic_sds_phy which has gone link up.
3067 * This method is called when the struct scic_sds_controller is in the starting state
3068 * link up handler is called. This method will perform the following: - Stop
3069 * the phy timer - Start the next phy - Report the link up condition to the
3070 * port object none
3072 static void scic_sds_controller_starting_state_link_up_handler(
3073 struct scic_sds_controller *this_controller,
3074 struct scic_sds_port *port,
3075 struct scic_sds_phy *phy)
3077 scic_sds_controller_phy_timer_stop(this_controller);
3079 this_controller->port_agent.link_up_handler(
3080 this_controller, &this_controller->port_agent, port, phy
3082 /* scic_sds_port_link_up(port, phy); */
3084 scic_sds_controller_start_next_phy(this_controller);
3089 * @controller: This is struct scic_sds_controller which receives the link down
3090 * notification.
3091 * @port: This is struct scic_sds_port with which the phy is associated.
3092 * @phy: This is the struct scic_sds_phy which has gone link down.
3094 * This method is called when the struct scic_sds_controller is in the starting state
3095 * link down handler is called. - Report the link down condition to the port
3096 * object none
3098 static void scic_sds_controller_starting_state_link_down_handler(
3099 struct scic_sds_controller *this_controller,
3100 struct scic_sds_port *port,
3101 struct scic_sds_phy *phy)
3103 this_controller->port_agent.link_down_handler(
3104 this_controller, &this_controller->port_agent, port, phy
3106 /* scic_sds_port_link_down(port, phy); */
3110 * *****************************************************************************
3111 * * READY STATE HANDLERS
3112 * ***************************************************************************** */
3116 * @controller: The struct sci_base_controller object which is cast into a
3117 * struct scic_sds_controller object.
3118 * @timeout: The timeout for when the stop operation should report a failure.
3120 * This method is called when the struct scic_sds_controller is in the ready state
3121 * stop handler is called. - Start the timeout timer - Transition to
3122 * SCI_BASE_CONTROLLER_STATE_STOPPING. enum sci_status SCI_SUCCESS
3124 static enum sci_status scic_sds_controller_ready_state_stop_handler(
3125 struct sci_base_controller *controller,
3126 u32 timeout)
3128 struct scic_sds_controller *this_controller;
3130 this_controller = (struct scic_sds_controller *)controller;
3132 isci_event_timer_start(this_controller,
3133 this_controller->timeout_timer,
3134 timeout);
3136 sci_base_state_machine_change_state(
3137 scic_sds_controller_get_base_state_machine(this_controller),
3138 SCI_BASE_CONTROLLER_STATE_STOPPING
3141 return SCI_SUCCESS;
3146 * @controller: This is struct sci_base_controller object which is cast into a
3147 * struct scic_sds_controller object.
3148 * @remote_device: This is struct sci_base_remote_device which is cast to a
3149 * struct scic_sds_remote_device object.
3150 * @io_request: This is the struct sci_base_request which is cast to a
3151 * SCIC_SDS_IO_REQUEST object.
3152 * @io_tag: This is the IO tag to be assigned to the IO request or
3153 * SCI_CONTROLLER_INVALID_IO_TAG.
3155 * This method is called when the struct scic_sds_controller is in the ready state and
3156 * the start io handler is called. - Start the io request on the remote device
3157 * - if successful - assign the io_request to the io_request_table - post the
3158 * request to the hardware enum sci_status SCI_SUCCESS if the start io operation
3159 * succeeds SCI_FAILURE_INSUFFICIENT_RESOURCES if the IO tag could not be
3160 * allocated for the io request. SCI_FAILURE_INVALID_STATE if one or more
3161 * objects are not in a valid state to accept io requests. How does the io_tag
3162 * parameter get assigned to the io request?
3164 static enum sci_status scic_sds_controller_ready_state_start_io_handler(
3165 struct sci_base_controller *controller,
3166 struct sci_base_remote_device *remote_device,
3167 struct sci_base_request *io_request,
3168 u16 io_tag)
3170 enum sci_status status;
3172 struct scic_sds_controller *this_controller;
3173 struct scic_sds_request *the_request;
3174 struct scic_sds_remote_device *the_device;
3176 this_controller = (struct scic_sds_controller *)controller;
3177 the_request = (struct scic_sds_request *)io_request;
3178 the_device = (struct scic_sds_remote_device *)remote_device;
3180 status = scic_sds_remote_device_start_io(this_controller, the_device, the_request);
3182 if (status == SCI_SUCCESS) {
3183 this_controller->io_request_table[
3184 scic_sds_io_tag_get_index(the_request->io_tag)] = the_request;
3186 scic_sds_controller_post_request(
3187 this_controller,
3188 scic_sds_request_get_post_context(the_request)
3192 return status;
3197 * @controller: This is struct sci_base_controller object which is cast into a
3198 * struct scic_sds_controller object.
3199 * @remote_device: This is struct sci_base_remote_device which is cast to a
3200 * struct scic_sds_remote_device object.
3201 * @io_request: This is the struct sci_base_request which is cast to a
3202 * SCIC_SDS_IO_REQUEST object.
3204 * This method is called when the struct scic_sds_controller is in the ready state and
3205 * the complete io handler is called. - Complete the io request on the remote
3206 * device - if successful - remove the io_request to the io_request_table
3207 * enum sci_status SCI_SUCCESS if the start io operation succeeds
3208 * SCI_FAILURE_INVALID_STATE if one or more objects are not in a valid state to
3209 * accept io requests.
3211 static enum sci_status scic_sds_controller_ready_state_complete_io_handler(
3212 struct sci_base_controller *controller,
3213 struct sci_base_remote_device *remote_device,
3214 struct sci_base_request *io_request)
3216 u16 index;
3217 enum sci_status status;
3218 struct scic_sds_controller *this_controller;
3219 struct scic_sds_request *the_request;
3220 struct scic_sds_remote_device *the_device;
3222 this_controller = (struct scic_sds_controller *)controller;
3223 the_request = (struct scic_sds_request *)io_request;
3224 the_device = (struct scic_sds_remote_device *)remote_device;
3226 status = scic_sds_remote_device_complete_io(
3227 this_controller, the_device, the_request);
3229 if (status == SCI_SUCCESS) {
3230 index = scic_sds_io_tag_get_index(the_request->io_tag);
3231 this_controller->io_request_table[index] = NULL;
3234 return status;
3239 * @controller: This is struct sci_base_controller object which is cast into a
3240 * struct scic_sds_controller object.
3241 * @remote_device: This is struct sci_base_remote_device which is cast to a
3242 * struct scic_sds_remote_device object.
3243 * @io_request: This is the struct sci_base_request which is cast to a
3244 * SCIC_SDS_IO_REQUEST object.
3246 * This method is called when the struct scic_sds_controller is in the ready state and
3247 * the continue io handler is called. enum sci_status
3249 static enum sci_status scic_sds_controller_ready_state_continue_io_handler(
3250 struct sci_base_controller *controller,
3251 struct sci_base_remote_device *remote_device,
3252 struct sci_base_request *io_request)
3254 struct scic_sds_controller *this_controller;
3255 struct scic_sds_request *the_request;
3257 the_request = (struct scic_sds_request *)io_request;
3258 this_controller = (struct scic_sds_controller *)controller;
3260 this_controller->io_request_table[
3261 scic_sds_io_tag_get_index(the_request->io_tag)] = the_request;
3263 scic_sds_controller_post_request(
3264 this_controller,
3265 scic_sds_request_get_post_context(the_request)
3268 return SCI_SUCCESS;
3273 * @controller: This is struct sci_base_controller object which is cast into a
3274 * struct scic_sds_controller object.
3275 * @remote_device: This is struct sci_base_remote_device which is cast to a
3276 * struct scic_sds_remote_device object.
3277 * @io_request: This is the struct sci_base_request which is cast to a
3278 * SCIC_SDS_IO_REQUEST object.
3279 * @task_tag: This is the task tag to be assigned to the task request or
3280 * SCI_CONTROLLER_INVALID_IO_TAG.
3282 * This method is called when the struct scic_sds_controller is in the ready state and
3283 * the start task handler is called. - The remote device is requested to start
3284 * the task request - if successful - assign the task to the io_request_table -
3285 * post the request to the SCU hardware enum sci_status SCI_SUCCESS if the start io
3286 * operation succeeds SCI_FAILURE_INSUFFICIENT_RESOURCES if the IO tag could
3287 * not be allocated for the io request. SCI_FAILURE_INVALID_STATE if one or
3288 * more objects are not in a valid state to accept io requests. How does the io
3289 * tag get assigned in this code path?
3291 static enum sci_status scic_sds_controller_ready_state_start_task_handler(
3292 struct sci_base_controller *controller,
3293 struct sci_base_remote_device *remote_device,
3294 struct sci_base_request *io_request,
3295 u16 task_tag)
3297 struct scic_sds_controller *this_controller = (struct scic_sds_controller *)
3298 controller;
3299 struct scic_sds_request *the_request = (struct scic_sds_request *)
3300 io_request;
3301 struct scic_sds_remote_device *the_device = (struct scic_sds_remote_device *)
3302 remote_device;
3303 enum sci_status status;
3305 status = scic_sds_remote_device_start_task(
3306 this_controller, the_device, the_request
3309 if (status == SCI_SUCCESS) {
3310 this_controller->io_request_table[
3311 scic_sds_io_tag_get_index(the_request->io_tag)] = the_request;
3313 scic_sds_controller_post_request(
3314 this_controller,
3315 scic_sds_request_get_post_context(the_request)
3317 } else if (status == SCI_FAILURE_RESET_DEVICE_PARTIAL_SUCCESS) {
3318 this_controller->io_request_table[
3319 scic_sds_io_tag_get_index(the_request->io_tag)] = the_request;
3322 * We will let framework know this task request started successfully,
3323 * although core is still woring on starting the request (to post tc when
3324 * RNC is resumed.) */
3325 status = SCI_SUCCESS;
3327 return status;
3332 * @controller: This is struct sci_base_controller object which is cast into a
3333 * struct scic_sds_controller object.
3334 * @remote_device: This is struct sci_base_remote_device which is cast to a
3335 * struct scic_sds_remote_device object.
3336 * @io_request: This is the struct sci_base_request which is cast to a
3337 * SCIC_SDS_IO_REQUEST object.
3339 * This method is called when the struct scic_sds_controller is in the ready state and
3340 * the terminate request handler is called. - call the io request terminate
3341 * function - if successful - post the terminate request to the SCU hardware
3342 * enum sci_status SCI_SUCCESS if the start io operation succeeds
3343 * SCI_FAILURE_INVALID_STATE if one or more objects are not in a valid state to
3344 * accept io requests.
3346 static enum sci_status scic_sds_controller_ready_state_terminate_request_handler(
3347 struct sci_base_controller *controller,
3348 struct sci_base_remote_device *remote_device,
3349 struct sci_base_request *io_request)
3351 struct scic_sds_controller *this_controller = (struct scic_sds_controller *)
3352 controller;
3353 struct scic_sds_request *the_request = (struct scic_sds_request *)
3354 io_request;
3355 enum sci_status status;
3357 status = scic_sds_io_request_terminate(the_request);
3358 if (status == SCI_SUCCESS) {
3360 * Utilize the original post context command and or in the POST_TC_ABORT
3361 * request sub-type. */
3362 scic_sds_controller_post_request(
3363 this_controller,
3364 scic_sds_request_get_post_context(the_request)
3365 | SCU_CONTEXT_COMMAND_REQUEST_POST_TC_ABORT
3369 return status;
3374 * @controller: This is struct scic_sds_controller which receives the link up
3375 * notification.
3376 * @port: This is struct scic_sds_port with which the phy is associated.
3377 * @phy: This is the struct scic_sds_phy which has gone link up.
3379 * This method is called when the struct scic_sds_controller is in the starting state
3380 * link up handler is called. This method will perform the following: - Stop
3381 * the phy timer - Start the next phy - Report the link up condition to the
3382 * port object none
3384 static void scic_sds_controller_ready_state_link_up_handler(
3385 struct scic_sds_controller *this_controller,
3386 struct scic_sds_port *port,
3387 struct scic_sds_phy *phy)
3389 this_controller->port_agent.link_up_handler(
3390 this_controller, &this_controller->port_agent, port, phy
3396 * @controller: This is struct scic_sds_controller which receives the link down
3397 * notification.
3398 * @port: This is struct scic_sds_port with which the phy is associated.
3399 * @phy: This is the struct scic_sds_phy which has gone link down.
3401 * This method is called when the struct scic_sds_controller is in the starting state
3402 * link down handler is called. - Report the link down condition to the port
3403 * object none
3405 static void scic_sds_controller_ready_state_link_down_handler(
3406 struct scic_sds_controller *this_controller,
3407 struct scic_sds_port *port,
3408 struct scic_sds_phy *phy)
3410 this_controller->port_agent.link_down_handler(
3411 this_controller, &this_controller->port_agent, port, phy
3416 * *****************************************************************************
3417 * * STOPPING STATE HANDLERS
3418 * ***************************************************************************** */
3422 * @controller: This is struct sci_base_controller object which is cast into a
3423 * struct scic_sds_controller object.
3424 * @remote_device: This is struct sci_base_remote_device which is cast to a
3425 * struct scic_sds_remote_device object.
3426 * @io_request: This is the struct sci_base_request which is cast to a
3427 * SCIC_SDS_IO_REQUEST object.
3429 * This method is called when the struct scic_sds_controller is in a stopping state
3430 * and the complete io handler is called. - This function is not yet
3431 * implemented enum sci_status SCI_FAILURE
3433 static enum sci_status scic_sds_controller_stopping_state_complete_io_handler(
3434 struct sci_base_controller *controller,
3435 struct sci_base_remote_device *remote_device,
3436 struct sci_base_request *io_request)
3438 struct scic_sds_controller *this_controller;
3440 this_controller = (struct scic_sds_controller *)controller;
3442 /* / @todo Implement this function */
3443 return SCI_FAILURE;
3448 * @controller: This is struct sci_base_controller object which is cast into a
3449 * struct scic_sds_controller object.
3450 * @remote_device: This is struct sci_base_remote_device which is cast to a
3451 * struct scic_sds_remote_device object.
3452 * @io_request: This is the struct sci_base_request which is cast to a
3453 * SCIC_SDS_IO_REQUEST object.
3455 * This method is called when the struct scic_sds_controller is in a stopping state
3456 * and the complete task handler is called. - This function is not yet
3457 * implemented enum sci_status SCI_FAILURE
3461 * *****************************************************************************
3462 * * STOPPED STATE HANDLERS
3463 * ***************************************************************************** */
3466 * *****************************************************************************
3467 * * FAILED STATE HANDLERS
3468 * ***************************************************************************** */
3470 const struct scic_sds_controller_state_handler scic_sds_controller_state_handler_table[] = {
3471 [SCI_BASE_CONTROLLER_STATE_INITIAL] = {
3472 .base.start_io = scic_sds_controller_default_start_operation_handler,
3473 .base.complete_io = scic_sds_controller_default_request_handler,
3474 .base.continue_io = scic_sds_controller_default_request_handler,
3475 .terminate_request = scic_sds_controller_default_request_handler,
3477 [SCI_BASE_CONTROLLER_STATE_RESET] = {
3478 .base.initialize = scic_sds_controller_reset_state_initialize_handler,
3479 .base.start_io = scic_sds_controller_default_start_operation_handler,
3480 .base.complete_io = scic_sds_controller_default_request_handler,
3481 .base.continue_io = scic_sds_controller_default_request_handler,
3482 .terminate_request = scic_sds_controller_default_request_handler,
3484 [SCI_BASE_CONTROLLER_STATE_INITIALIZING] = {
3485 .base.start_io = scic_sds_controller_default_start_operation_handler,
3486 .base.complete_io = scic_sds_controller_default_request_handler,
3487 .base.continue_io = scic_sds_controller_default_request_handler,
3488 .terminate_request = scic_sds_controller_default_request_handler,
3490 [SCI_BASE_CONTROLLER_STATE_INITIALIZED] = {
3491 .base.start = scic_sds_controller_initialized_state_start_handler,
3492 .base.start_io = scic_sds_controller_default_start_operation_handler,
3493 .base.complete_io = scic_sds_controller_default_request_handler,
3494 .base.continue_io = scic_sds_controller_default_request_handler,
3495 .terminate_request = scic_sds_controller_default_request_handler,
3497 [SCI_BASE_CONTROLLER_STATE_STARTING] = {
3498 .base.start_io = scic_sds_controller_default_start_operation_handler,
3499 .base.complete_io = scic_sds_controller_default_request_handler,
3500 .base.continue_io = scic_sds_controller_default_request_handler,
3501 .terminate_request = scic_sds_controller_default_request_handler,
3502 .link_up = scic_sds_controller_starting_state_link_up_handler,
3503 .link_down = scic_sds_controller_starting_state_link_down_handler
3505 [SCI_BASE_CONTROLLER_STATE_READY] = {
3506 .base.stop = scic_sds_controller_ready_state_stop_handler,
3507 .base.reset = scic_sds_controller_general_reset_handler,
3508 .base.start_io = scic_sds_controller_ready_state_start_io_handler,
3509 .base.complete_io = scic_sds_controller_ready_state_complete_io_handler,
3510 .base.continue_io = scic_sds_controller_ready_state_continue_io_handler,
3511 .base.start_task = scic_sds_controller_ready_state_start_task_handler,
3512 .base.complete_task = scic_sds_controller_ready_state_complete_io_handler,
3513 .terminate_request = scic_sds_controller_ready_state_terminate_request_handler,
3514 .link_up = scic_sds_controller_ready_state_link_up_handler,
3515 .link_down = scic_sds_controller_ready_state_link_down_handler
3517 [SCI_BASE_CONTROLLER_STATE_RESETTING] = {
3518 .base.start_io = scic_sds_controller_default_start_operation_handler,
3519 .base.complete_io = scic_sds_controller_default_request_handler,
3520 .base.continue_io = scic_sds_controller_default_request_handler,
3521 .terminate_request = scic_sds_controller_default_request_handler,
3523 [SCI_BASE_CONTROLLER_STATE_STOPPING] = {
3524 .base.start_io = scic_sds_controller_default_start_operation_handler,
3525 .base.complete_io = scic_sds_controller_stopping_state_complete_io_handler,
3526 .base.continue_io = scic_sds_controller_default_request_handler,
3527 .terminate_request = scic_sds_controller_default_request_handler,
3529 [SCI_BASE_CONTROLLER_STATE_STOPPED] = {
3530 .base.reset = scic_sds_controller_general_reset_handler,
3531 .base.start_io = scic_sds_controller_default_start_operation_handler,
3532 .base.complete_io = scic_sds_controller_default_request_handler,
3533 .base.continue_io = scic_sds_controller_default_request_handler,
3534 .terminate_request = scic_sds_controller_default_request_handler,
3536 [SCI_BASE_CONTROLLER_STATE_FAILED] = {
3537 .base.reset = scic_sds_controller_general_reset_handler,
3538 .base.start_io = scic_sds_controller_default_start_operation_handler,
3539 .base.complete_io = scic_sds_controller_default_request_handler,
3540 .base.continue_io = scic_sds_controller_default_request_handler,
3541 .terminate_request = scic_sds_controller_default_request_handler,
3547 * @object: This is the struct sci_base_object which is cast to a struct scic_sds_controller
3548 * object.
3550 * This method implements the actions taken by the struct scic_sds_controller on entry
3551 * to the SCI_BASE_CONTROLLER_STATE_INITIAL. - Set the state handlers to the
3552 * controllers initial state. none This function should initialze the
3553 * controller object.
3555 static void scic_sds_controller_initial_state_enter(
3556 struct sci_base_object *object)
3558 struct scic_sds_controller *this_controller;
3560 this_controller = (struct scic_sds_controller *)object;
3562 sci_base_state_machine_change_state(
3563 &this_controller->parent.state_machine, SCI_BASE_CONTROLLER_STATE_RESET);
3568 * @object: This is the struct sci_base_object which is cast to a struct scic_sds_controller
3569 * object.
3571 * This method implements the actions taken by the struct scic_sds_controller on exit
3572 * from the SCI_BASE_CONTROLLER_STATE_STARTING. - This function stops the
3573 * controller starting timeout timer. none
3575 static void scic_sds_controller_starting_state_exit(
3576 struct sci_base_object *object)
3578 struct scic_sds_controller *scic = (struct scic_sds_controller *)object;
3580 isci_event_timer_stop(scic, scic->timeout_timer);
3585 * @object: This is the struct sci_base_object which is cast to a struct scic_sds_controller
3586 * object.
3588 * This method implements the actions taken by the struct scic_sds_controller on entry
3589 * to the SCI_BASE_CONTROLLER_STATE_READY. - Set the state handlers to the
3590 * controllers ready state. none
3592 static void scic_sds_controller_ready_state_enter(
3593 struct sci_base_object *object)
3595 struct scic_sds_controller *this_controller;
3597 this_controller = (struct scic_sds_controller *)object;
3599 /* set the default interrupt coalescence number and timeout value. */
3600 scic_controller_set_interrupt_coalescence(
3601 this_controller, 0x10, 250);
3606 * @object: This is the struct sci_base_object which is cast to a struct scic_sds_controller
3607 * object.
3609 * This method implements the actions taken by the struct scic_sds_controller on exit
3610 * from the SCI_BASE_CONTROLLER_STATE_READY. - This function does nothing. none
3612 static void scic_sds_controller_ready_state_exit(
3613 struct sci_base_object *object)
3615 struct scic_sds_controller *this_controller;
3617 this_controller = (struct scic_sds_controller *)object;
3619 /* disable interrupt coalescence. */
3620 scic_controller_set_interrupt_coalescence(this_controller, 0, 0);
3625 * @object: This is the struct sci_base_object which is cast to a struct scic_sds_controller
3626 * object.
3628 * This method implements the actions taken by the struct scic_sds_controller on entry
3629 * to the SCI_BASE_CONTROLLER_STATE_READY. - Set the state handlers to the
3630 * controllers ready state. - Stop the phys on this controller - Stop the ports
3631 * on this controller - Stop all of the remote devices on this controller none
3633 static void scic_sds_controller_stopping_state_enter(
3634 struct sci_base_object *object)
3636 struct scic_sds_controller *this_controller;
3638 this_controller = (struct scic_sds_controller *)object;
3640 /* Stop all of the components for this controller */
3641 scic_sds_controller_stop_phys(this_controller);
3642 scic_sds_controller_stop_ports(this_controller);
3643 scic_sds_controller_stop_devices(this_controller);
3648 * @object: This is the struct sci_base_object which is cast to a struct scic_sds_controller
3649 * object.
3651 * This method implements the actions taken by the struct scic_sds_controller on exit
3652 * from the SCI_BASE_CONTROLLER_STATE_STOPPING. - This function stops the
3653 * controller stopping timeout timer. none
3655 static void scic_sds_controller_stopping_state_exit(
3656 struct sci_base_object *object)
3658 struct scic_sds_controller *this_controller;
3660 this_controller = (struct scic_sds_controller *)object;
3662 isci_event_timer_stop(this_controller, this_controller->timeout_timer);
3667 * @object: This is the struct sci_base_object which is cast to a struct scic_sds_controller
3668 * object.
3670 * This method implements the actions taken by the struct scic_sds_controller on entry
3671 * to the SCI_BASE_CONTROLLER_STATE_RESETTING. - Set the state handlers to the
3672 * controllers resetting state. - Write to the SCU hardware reset register to
3673 * force a reset - Transition to the SCI_BASE_CONTROLLER_STATE_RESET none
3675 static void scic_sds_controller_resetting_state_enter(
3676 struct sci_base_object *object)
3678 struct scic_sds_controller *this_controller;
3680 this_controller = (struct scic_sds_controller *)object;
3682 scic_sds_controller_reset_hardware(this_controller);
3684 sci_base_state_machine_change_state(
3685 scic_sds_controller_get_base_state_machine(this_controller),
3686 SCI_BASE_CONTROLLER_STATE_RESET
3690 /* --------------------------------------------------------------------------- */
3692 const struct sci_base_state scic_sds_controller_state_table[] = {
3693 [SCI_BASE_CONTROLLER_STATE_INITIAL] = {
3694 .enter_state = scic_sds_controller_initial_state_enter,
3696 [SCI_BASE_CONTROLLER_STATE_RESET] = {},
3697 [SCI_BASE_CONTROLLER_STATE_INITIALIZING] = {},
3698 [SCI_BASE_CONTROLLER_STATE_INITIALIZED] = {},
3699 [SCI_BASE_CONTROLLER_STATE_STARTING] = {
3700 .exit_state = scic_sds_controller_starting_state_exit,
3702 [SCI_BASE_CONTROLLER_STATE_READY] = {
3703 .enter_state = scic_sds_controller_ready_state_enter,
3704 .exit_state = scic_sds_controller_ready_state_exit,
3706 [SCI_BASE_CONTROLLER_STATE_RESETTING] = {
3707 .enter_state = scic_sds_controller_resetting_state_enter,
3709 [SCI_BASE_CONTROLLER_STATE_STOPPING] = {
3710 .enter_state = scic_sds_controller_stopping_state_enter,
3711 .exit_state = scic_sds_controller_stopping_state_exit,
3713 [SCI_BASE_CONTROLLER_STATE_STOPPED] = {},
3714 [SCI_BASE_CONTROLLER_STATE_FAILED] = {}