2 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version
7 * 2 of the License, or (at your option) any later version.
9 * Modified by Cort Dougan (cort@cs.nmt.edu)
10 * and Paul Mackerras (paulus@samba.org)
14 * This file handles the architecture-dependent parts of hardware exceptions
17 #include <linux/errno.h>
18 #include <linux/sched.h>
19 #include <linux/kernel.h>
21 #include <linux/stddef.h>
22 #include <linux/unistd.h>
23 #include <linux/ptrace.h>
24 #include <linux/slab.h>
25 #include <linux/user.h>
26 #include <linux/a.out.h>
27 #include <linux/interrupt.h>
28 #include <linux/init.h>
29 #include <linux/module.h>
30 #include <linux/prctl.h>
31 #include <linux/delay.h>
32 #include <linux/kprobes.h>
33 #include <linux/kexec.h>
34 #include <linux/backlight.h>
36 #include <asm/kdebug.h>
37 #include <asm/pgtable.h>
38 #include <asm/uaccess.h>
39 #include <asm/system.h>
41 #include <asm/machdep.h>
47 #ifdef CONFIG_PMAC_BACKLIGHT
48 #include <asm/backlight.h>
51 #include <asm/firmware.h>
52 #include <asm/processor.h>
54 #include <asm/kexec.h>
56 #ifdef CONFIG_PPC64 /* XXX */
57 #define _IO_BASE pci_io_base
60 #ifdef CONFIG_DEBUGGER
61 int (*__debugger
)(struct pt_regs
*regs
);
62 int (*__debugger_ipi
)(struct pt_regs
*regs
);
63 int (*__debugger_bpt
)(struct pt_regs
*regs
);
64 int (*__debugger_sstep
)(struct pt_regs
*regs
);
65 int (*__debugger_iabr_match
)(struct pt_regs
*regs
);
66 int (*__debugger_dabr_match
)(struct pt_regs
*regs
);
67 int (*__debugger_fault_handler
)(struct pt_regs
*regs
);
69 EXPORT_SYMBOL(__debugger
);
70 EXPORT_SYMBOL(__debugger_ipi
);
71 EXPORT_SYMBOL(__debugger_bpt
);
72 EXPORT_SYMBOL(__debugger_sstep
);
73 EXPORT_SYMBOL(__debugger_iabr_match
);
74 EXPORT_SYMBOL(__debugger_dabr_match
);
75 EXPORT_SYMBOL(__debugger_fault_handler
);
78 ATOMIC_NOTIFIER_HEAD(powerpc_die_chain
);
80 int register_die_notifier(struct notifier_block
*nb
)
82 return atomic_notifier_chain_register(&powerpc_die_chain
, nb
);
84 EXPORT_SYMBOL(register_die_notifier
);
86 int unregister_die_notifier(struct notifier_block
*nb
)
88 return atomic_notifier_chain_unregister(&powerpc_die_chain
, nb
);
90 EXPORT_SYMBOL(unregister_die_notifier
);
93 * Trap & Exception support
96 static DEFINE_SPINLOCK(die_lock
);
98 int die(const char *str
, struct pt_regs
*regs
, long err
)
100 static int die_counter
;
106 spin_lock_irq(&die_lock
);
108 #ifdef CONFIG_PMAC_BACKLIGHT
109 mutex_lock(&pmac_backlight_mutex
);
110 if (machine_is(powermac
) && pmac_backlight
) {
111 struct backlight_properties
*props
;
113 down(&pmac_backlight
->sem
);
114 props
= pmac_backlight
->props
;
115 props
->brightness
= props
->max_brightness
;
116 props
->power
= FB_BLANK_UNBLANK
;
117 props
->update_status(pmac_backlight
);
118 up(&pmac_backlight
->sem
);
120 mutex_unlock(&pmac_backlight_mutex
);
122 printk("Oops: %s, sig: %ld [#%d]\n", str
, err
, ++die_counter
);
123 #ifdef CONFIG_PREEMPT
127 printk("SMP NR_CPUS=%d ", NR_CPUS
);
129 #ifdef CONFIG_DEBUG_PAGEALLOC
130 printk("DEBUG_PAGEALLOC ");
135 printk("%s\n", ppc_md
.name
? "" : ppc_md
.name
);
140 spin_unlock_irq(&die_lock
);
142 if (kexec_should_crash(current
) ||
143 kexec_sr_activated(smp_processor_id()))
145 crash_kexec_secondary(regs
);
148 panic("Fatal exception in interrupt");
151 panic("Fatal exception");
158 void _exception(int signr
, struct pt_regs
*regs
, int code
, unsigned long addr
)
162 if (!user_mode(regs
)) {
163 if (die("Exception in kernel mode", regs
, signr
))
167 memset(&info
, 0, sizeof(info
));
168 info
.si_signo
= signr
;
170 info
.si_addr
= (void __user
*) addr
;
171 force_sig_info(signr
, &info
, current
);
174 * Init gets no signals that it doesn't have a handler for.
175 * That's all very well, but if it has caused a synchronous
176 * exception and we ignore the resulting signal, it will just
177 * generate the same exception over and over again and we get
178 * nowhere. Better to kill it and let the kernel panic.
180 if (current
->pid
== 1) {
181 __sighandler_t handler
;
183 spin_lock_irq(¤t
->sighand
->siglock
);
184 handler
= current
->sighand
->action
[signr
-1].sa
.sa_handler
;
185 spin_unlock_irq(¤t
->sighand
->siglock
);
186 if (handler
== SIG_DFL
) {
187 /* init has generated a synchronous exception
188 and it doesn't have a handler for the signal */
189 printk(KERN_CRIT
"init has generated signal %d "
190 "but has no handler for it\n", signr
);
197 void system_reset_exception(struct pt_regs
*regs
)
199 /* See if any machine dependent calls */
200 if (ppc_md
.system_reset_exception
) {
201 if (ppc_md
.system_reset_exception(regs
))
206 cpu_set(smp_processor_id(), cpus_in_sr
);
209 die("System Reset", regs
, SIGABRT
);
212 * Some CPUs when released from the debugger will execute this path.
213 * These CPUs entered the debugger via a soft-reset. If the CPU was
214 * hung before entering the debugger it will return to the hung
215 * state when exiting this function. This causes a problem in
216 * kdump since the hung CPU(s) will not respond to the IPI sent
217 * from kdump. To prevent the problem we call crash_kexec_secondary()
218 * here. If a kdump had not been initiated or we exit the debugger
219 * with the "exit and recover" command (x) crash_kexec_secondary()
220 * will return after 5ms and the CPU returns to its previous state.
222 crash_kexec_secondary(regs
);
224 /* Must die if the interrupt is not recoverable */
225 if (!(regs
->msr
& MSR_RI
))
226 panic("Unrecoverable System Reset");
228 /* What should we do here? We could issue a shutdown or hard reset. */
233 * I/O accesses can cause machine checks on powermacs.
234 * Check if the NIP corresponds to the address of a sync
235 * instruction for which there is an entry in the exception
237 * Note that the 601 only takes a machine check on TEA
238 * (transfer error ack) signal assertion, and does not
239 * set any of the top 16 bits of SRR1.
242 static inline int check_io_access(struct pt_regs
*regs
)
244 #if defined(CONFIG_PPC_PMAC) && defined(CONFIG_PPC32)
245 unsigned long msr
= regs
->msr
;
246 const struct exception_table_entry
*entry
;
247 unsigned int *nip
= (unsigned int *)regs
->nip
;
249 if (((msr
& 0xffff0000) == 0 || (msr
& (0x80000 | 0x40000)))
250 && (entry
= search_exception_tables(regs
->nip
)) != NULL
) {
252 * Check that it's a sync instruction, or somewhere
253 * in the twi; isync; nop sequence that inb/inw/inl uses.
254 * As the address is in the exception table
255 * we should be able to read the instr there.
256 * For the debug message, we look at the preceding
259 if (*nip
== 0x60000000) /* nop */
261 else if (*nip
== 0x4c00012c) /* isync */
263 if (*nip
== 0x7c0004ac || (*nip
>> 26) == 3) {
268 rb
= (*nip
>> 11) & 0x1f;
269 printk(KERN_DEBUG
"%s bad port %lx at %p\n",
270 (*nip
& 0x100)? "OUT to": "IN from",
271 regs
->gpr
[rb
] - _IO_BASE
, nip
);
273 regs
->nip
= entry
->fixup
;
277 #endif /* CONFIG_PPC_PMAC && CONFIG_PPC32 */
281 #if defined(CONFIG_4xx) || defined(CONFIG_BOOKE)
282 /* On 4xx, the reason for the machine check or program exception
284 #define get_reason(regs) ((regs)->dsisr)
285 #ifndef CONFIG_FSL_BOOKE
286 #define get_mc_reason(regs) ((regs)->dsisr)
288 #define get_mc_reason(regs) (mfspr(SPRN_MCSR))
290 #define REASON_FP ESR_FP
291 #define REASON_ILLEGAL (ESR_PIL | ESR_PUO)
292 #define REASON_PRIVILEGED ESR_PPR
293 #define REASON_TRAP ESR_PTR
295 /* single-step stuff */
296 #define single_stepping(regs) (current->thread.dbcr0 & DBCR0_IC)
297 #define clear_single_step(regs) (current->thread.dbcr0 &= ~DBCR0_IC)
300 /* On non-4xx, the reason for the machine check or program
301 exception is in the MSR. */
302 #define get_reason(regs) ((regs)->msr)
303 #define get_mc_reason(regs) ((regs)->msr)
304 #define REASON_FP 0x100000
305 #define REASON_ILLEGAL 0x80000
306 #define REASON_PRIVILEGED 0x40000
307 #define REASON_TRAP 0x20000
309 #define single_stepping(regs) ((regs)->msr & MSR_SE)
310 #define clear_single_step(regs) ((regs)->msr &= ~MSR_SE)
314 * This is "fall-back" implementation for configurations
315 * which don't provide platform-specific machine check info
317 void __attribute__ ((weak
))
318 platform_machine_check(struct pt_regs
*regs
)
322 void machine_check_exception(struct pt_regs
*regs
)
325 unsigned long reason
= get_mc_reason(regs
);
327 /* See if any machine dependent calls */
328 if (ppc_md
.machine_check_exception
)
329 recover
= ppc_md
.machine_check_exception(regs
);
334 if (user_mode(regs
)) {
336 _exception(SIGBUS
, regs
, BUS_ADRERR
, regs
->nip
);
340 #if defined(CONFIG_8xx) && defined(CONFIG_PCI)
341 /* the qspan pci read routines can cause machine checks -- Cort */
342 bad_page_fault(regs
, regs
->dar
, SIGBUS
);
346 if (debugger_fault_handler(regs
)) {
351 if (check_io_access(regs
))
354 #if defined(CONFIG_4xx) && !defined(CONFIG_440A)
355 if (reason
& ESR_IMCP
) {
356 printk("Instruction");
357 mtspr(SPRN_ESR
, reason
& ~ESR_IMCP
);
360 printk(" machine check in kernel mode.\n");
361 #elif defined(CONFIG_440A)
362 printk("Machine check in kernel mode.\n");
363 if (reason
& ESR_IMCP
){
364 printk("Instruction Synchronous Machine Check exception\n");
365 mtspr(SPRN_ESR
, reason
& ~ESR_IMCP
);
368 u32 mcsr
= mfspr(SPRN_MCSR
);
370 printk("Instruction Read PLB Error\n");
372 printk("Data Read PLB Error\n");
374 printk("Data Write PLB Error\n");
375 if (mcsr
& MCSR_TLBP
)
376 printk("TLB Parity Error\n");
377 if (mcsr
& MCSR_ICP
){
378 flush_instruction_cache();
379 printk("I-Cache Parity Error\n");
381 if (mcsr
& MCSR_DCSP
)
382 printk("D-Cache Search Parity Error\n");
383 if (mcsr
& MCSR_DCFP
)
384 printk("D-Cache Flush Parity Error\n");
385 if (mcsr
& MCSR_IMPE
)
386 printk("Machine Check exception is imprecise\n");
389 mtspr(SPRN_MCSR
, mcsr
);
391 #elif defined (CONFIG_E500)
392 printk("Machine check in kernel mode.\n");
393 printk("Caused by (from MCSR=%lx): ", reason
);
395 if (reason
& MCSR_MCP
)
396 printk("Machine Check Signal\n");
397 if (reason
& MCSR_ICPERR
)
398 printk("Instruction Cache Parity Error\n");
399 if (reason
& MCSR_DCP_PERR
)
400 printk("Data Cache Push Parity Error\n");
401 if (reason
& MCSR_DCPERR
)
402 printk("Data Cache Parity Error\n");
403 if (reason
& MCSR_GL_CI
)
404 printk("Guarded Load or Cache-Inhibited stwcx.\n");
405 if (reason
& MCSR_BUS_IAERR
)
406 printk("Bus - Instruction Address Error\n");
407 if (reason
& MCSR_BUS_RAERR
)
408 printk("Bus - Read Address Error\n");
409 if (reason
& MCSR_BUS_WAERR
)
410 printk("Bus - Write Address Error\n");
411 if (reason
& MCSR_BUS_IBERR
)
412 printk("Bus - Instruction Data Error\n");
413 if (reason
& MCSR_BUS_RBERR
)
414 printk("Bus - Read Data Bus Error\n");
415 if (reason
& MCSR_BUS_WBERR
)
416 printk("Bus - Read Data Bus Error\n");
417 if (reason
& MCSR_BUS_IPERR
)
418 printk("Bus - Instruction Parity Error\n");
419 if (reason
& MCSR_BUS_RPERR
)
420 printk("Bus - Read Parity Error\n");
421 #elif defined (CONFIG_E200)
422 printk("Machine check in kernel mode.\n");
423 printk("Caused by (from MCSR=%lx): ", reason
);
425 if (reason
& MCSR_MCP
)
426 printk("Machine Check Signal\n");
427 if (reason
& MCSR_CP_PERR
)
428 printk("Cache Push Parity Error\n");
429 if (reason
& MCSR_CPERR
)
430 printk("Cache Parity Error\n");
431 if (reason
& MCSR_EXCP_ERR
)
432 printk("ISI, ITLB, or Bus Error on first instruction fetch for an exception handler\n");
433 if (reason
& MCSR_BUS_IRERR
)
434 printk("Bus - Read Bus Error on instruction fetch\n");
435 if (reason
& MCSR_BUS_DRERR
)
436 printk("Bus - Read Bus Error on data load\n");
437 if (reason
& MCSR_BUS_WRERR
)
438 printk("Bus - Write Bus Error on buffered store or cache line push\n");
439 #else /* !CONFIG_4xx && !CONFIG_E500 && !CONFIG_E200 */
440 printk("Machine check in kernel mode.\n");
441 printk("Caused by (from SRR1=%lx): ", reason
);
442 switch (reason
& 0x601F0000) {
444 printk("Machine check signal\n");
446 case 0: /* for 601 */
448 case 0x140000: /* 7450 MSS error and TEA */
449 printk("Transfer error ack signal\n");
452 printk("Data parity error signal\n");
455 printk("Address parity error signal\n");
458 printk("L1 Data Cache error\n");
461 printk("L1 Instruction Cache error\n");
464 printk("L2 data cache parity error\n");
467 printk("Unknown values in msr\n");
469 #endif /* CONFIG_4xx */
472 * Optional platform-provided routine to print out
473 * additional info, e.g. bus error registers.
475 platform_machine_check(regs
);
477 if (debugger_fault_handler(regs
))
479 die("Machine check", regs
, SIGBUS
);
481 /* Must die if the interrupt is not recoverable */
482 if (!(regs
->msr
& MSR_RI
))
483 panic("Unrecoverable Machine check");
486 void SMIException(struct pt_regs
*regs
)
488 die("System Management Interrupt", regs
, SIGABRT
);
491 void unknown_exception(struct pt_regs
*regs
)
493 printk("Bad trap at PC: %lx, SR: %lx, vector=%lx\n",
494 regs
->nip
, regs
->msr
, regs
->trap
);
496 _exception(SIGTRAP
, regs
, 0, 0);
499 void instruction_breakpoint_exception(struct pt_regs
*regs
)
501 if (notify_die(DIE_IABR_MATCH
, "iabr_match", regs
, 5,
502 5, SIGTRAP
) == NOTIFY_STOP
)
504 if (debugger_iabr_match(regs
))
506 _exception(SIGTRAP
, regs
, TRAP_BRKPT
, regs
->nip
);
509 void RunModeException(struct pt_regs
*regs
)
511 _exception(SIGTRAP
, regs
, 0, 0);
514 void __kprobes
single_step_exception(struct pt_regs
*regs
)
516 regs
->msr
&= ~(MSR_SE
| MSR_BE
); /* Turn off 'trace' bits */
518 if (notify_die(DIE_SSTEP
, "single_step", regs
, 5,
519 5, SIGTRAP
) == NOTIFY_STOP
)
521 if (debugger_sstep(regs
))
524 _exception(SIGTRAP
, regs
, TRAP_TRACE
, regs
->nip
);
528 * After we have successfully emulated an instruction, we have to
529 * check if the instruction was being single-stepped, and if so,
530 * pretend we got a single-step exception. This was pointed out
531 * by Kumar Gala. -- paulus
533 static void emulate_single_step(struct pt_regs
*regs
)
535 if (single_stepping(regs
)) {
536 clear_single_step(regs
);
537 _exception(SIGTRAP
, regs
, TRAP_TRACE
, 0);
541 static void parse_fpe(struct pt_regs
*regs
)
546 flush_fp_to_thread(current
);
548 fpscr
= current
->thread
.fpscr
.val
;
550 /* Invalid operation */
551 if ((fpscr
& FPSCR_VE
) && (fpscr
& FPSCR_VX
))
555 else if ((fpscr
& FPSCR_OE
) && (fpscr
& FPSCR_OX
))
559 else if ((fpscr
& FPSCR_UE
) && (fpscr
& FPSCR_UX
))
563 else if ((fpscr
& FPSCR_ZE
) && (fpscr
& FPSCR_ZX
))
567 else if ((fpscr
& FPSCR_XE
) && (fpscr
& FPSCR_XX
))
570 _exception(SIGFPE
, regs
, code
, regs
->nip
);
574 * Illegal instruction emulation support. Originally written to
575 * provide the PVR to user applications using the mfspr rd, PVR.
576 * Return non-zero if we can't emulate, or -EFAULT if the associated
577 * memory access caused an access fault. Return zero on success.
579 * There are a couple of ways to do this, either "decode" the instruction
580 * or directly match lots of bits. In this case, matching lots of
581 * bits is faster and easier.
584 #define INST_MFSPR_PVR 0x7c1f42a6
585 #define INST_MFSPR_PVR_MASK 0xfc1fffff
587 #define INST_DCBA 0x7c0005ec
588 #define INST_DCBA_MASK 0xfc0007fe
590 #define INST_MCRXR 0x7c000400
591 #define INST_MCRXR_MASK 0xfc0007fe
593 #define INST_STRING 0x7c00042a
594 #define INST_STRING_MASK 0xfc0007fe
595 #define INST_STRING_GEN_MASK 0xfc00067e
596 #define INST_LSWI 0x7c0004aa
597 #define INST_LSWX 0x7c00042a
598 #define INST_STSWI 0x7c0005aa
599 #define INST_STSWX 0x7c00052a
601 #define INST_POPCNTB 0x7c0000f4
602 #define INST_POPCNTB_MASK 0xfc0007fe
604 static int emulate_string_inst(struct pt_regs
*regs
, u32 instword
)
606 u8 rT
= (instword
>> 21) & 0x1f;
607 u8 rA
= (instword
>> 16) & 0x1f;
608 u8 NB_RB
= (instword
>> 11) & 0x1f;
613 /* Early out if we are an invalid form of lswx */
614 if ((instword
& INST_STRING_MASK
) == INST_LSWX
)
615 if ((rT
== rA
) || (rT
== NB_RB
))
618 EA
= (rA
== 0) ? 0 : regs
->gpr
[rA
];
620 switch (instword
& INST_STRING_MASK
) {
624 num_bytes
= regs
->xer
& 0x7f;
628 num_bytes
= (NB_RB
== 0) ? 32 : NB_RB
;
634 while (num_bytes
!= 0)
637 u32 shift
= 8 * (3 - (pos
& 0x3));
639 switch ((instword
& INST_STRING_MASK
)) {
642 if (get_user(val
, (u8 __user
*)EA
))
644 /* first time updating this reg,
648 regs
->gpr
[rT
] |= val
<< shift
;
652 val
= regs
->gpr
[rT
] >> shift
;
653 if (put_user(val
, (u8 __user
*)EA
))
657 /* move EA to next address */
661 /* manage our position within the register */
672 static int emulate_popcntb_inst(struct pt_regs
*regs
, u32 instword
)
677 ra
= (instword
>> 16) & 0x1f;
678 rs
= (instword
>> 21) & 0x1f;
681 tmp
= tmp
- ((tmp
>> 1) & 0x5555555555555555ULL
);
682 tmp
= (tmp
& 0x3333333333333333ULL
) + ((tmp
>> 2) & 0x3333333333333333ULL
);
683 tmp
= (tmp
+ (tmp
>> 4)) & 0x0f0f0f0f0f0f0f0fULL
;
689 static int emulate_instruction(struct pt_regs
*regs
)
694 if (!user_mode(regs
) || (regs
->msr
& MSR_LE
))
696 CHECK_FULL_REGS(regs
);
698 if (get_user(instword
, (u32 __user
*)(regs
->nip
)))
701 /* Emulate the mfspr rD, PVR. */
702 if ((instword
& INST_MFSPR_PVR_MASK
) == INST_MFSPR_PVR
) {
703 rd
= (instword
>> 21) & 0x1f;
704 regs
->gpr
[rd
] = mfspr(SPRN_PVR
);
708 /* Emulating the dcba insn is just a no-op. */
709 if ((instword
& INST_DCBA_MASK
) == INST_DCBA
)
712 /* Emulate the mcrxr insn. */
713 if ((instword
& INST_MCRXR_MASK
) == INST_MCRXR
) {
714 int shift
= (instword
>> 21) & 0x1c;
715 unsigned long msk
= 0xf0000000UL
>> shift
;
717 regs
->ccr
= (regs
->ccr
& ~msk
) | ((regs
->xer
>> shift
) & msk
);
718 regs
->xer
&= ~0xf0000000UL
;
722 /* Emulate load/store string insn. */
723 if ((instword
& INST_STRING_GEN_MASK
) == INST_STRING
)
724 return emulate_string_inst(regs
, instword
);
726 /* Emulate the popcntb (Population Count Bytes) instruction. */
727 if ((instword
& INST_POPCNTB_MASK
) == INST_POPCNTB
) {
728 return emulate_popcntb_inst(regs
, instword
);
735 * Look through the list of trap instructions that are used for BUG(),
736 * BUG_ON() and WARN_ON() and see if we hit one. At this point we know
737 * that the exception was caused by a trap instruction of some kind.
738 * Returns 1 if we should continue (i.e. it was a WARN_ON) or 0
741 extern struct bug_entry __start___bug_table
[], __stop___bug_table
[];
743 #ifndef CONFIG_MODULES
744 #define module_find_bug(x) NULL
747 struct bug_entry
*find_bug(unsigned long bugaddr
)
749 struct bug_entry
*bug
;
751 for (bug
= __start___bug_table
; bug
< __stop___bug_table
; ++bug
)
752 if (bugaddr
== bug
->bug_addr
)
754 return module_find_bug(bugaddr
);
757 static int check_bug_trap(struct pt_regs
*regs
)
759 struct bug_entry
*bug
;
762 if (regs
->msr
& MSR_PR
)
763 return 0; /* not in kernel */
764 addr
= regs
->nip
; /* address of trap instruction */
765 if (addr
< PAGE_OFFSET
)
767 bug
= find_bug(regs
->nip
);
770 if (bug
->line
& BUG_WARNING_TRAP
) {
771 /* this is a WARN_ON rather than BUG/BUG_ON */
772 printk(KERN_ERR
"Badness in %s at %s:%ld\n",
773 bug
->function
, bug
->file
,
774 bug
->line
& ~BUG_WARNING_TRAP
);
778 printk(KERN_CRIT
"kernel BUG in %s at %s:%ld!\n",
779 bug
->function
, bug
->file
, bug
->line
);
784 void __kprobes
program_check_exception(struct pt_regs
*regs
)
786 unsigned int reason
= get_reason(regs
);
787 extern int do_mathemu(struct pt_regs
*regs
);
789 #ifdef CONFIG_MATH_EMULATION
790 /* (reason & REASON_ILLEGAL) would be the obvious thing here,
791 * but there seems to be a hardware bug on the 405GP (RevD)
792 * that means ESR is sometimes set incorrectly - either to
793 * ESR_DST (!?) or 0. In the process of chasing this with the
794 * hardware people - not sure if it can happen on any illegal
795 * instruction or only on FP instructions, whether there is a
796 * pattern to occurences etc. -dgibson 31/Mar/2003 */
797 if (!(reason
& REASON_TRAP
) && do_mathemu(regs
) == 0) {
798 emulate_single_step(regs
);
801 #endif /* CONFIG_MATH_EMULATION */
803 if (reason
& REASON_FP
) {
804 /* IEEE FP exception */
808 if (reason
& REASON_TRAP
) {
810 if (notify_die(DIE_BPT
, "breakpoint", regs
, 5, 5, SIGTRAP
)
813 if (debugger_bpt(regs
))
815 if (check_bug_trap(regs
)) {
819 _exception(SIGTRAP
, regs
, TRAP_BRKPT
, regs
->nip
);
825 /* Try to emulate it if we should. */
826 if (reason
& (REASON_ILLEGAL
| REASON_PRIVILEGED
)) {
827 switch (emulate_instruction(regs
)) {
830 emulate_single_step(regs
);
833 _exception(SIGSEGV
, regs
, SEGV_MAPERR
, regs
->nip
);
838 if (reason
& REASON_PRIVILEGED
)
839 _exception(SIGILL
, regs
, ILL_PRVOPC
, regs
->nip
);
841 _exception(SIGILL
, regs
, ILL_ILLOPC
, regs
->nip
);
844 void alignment_exception(struct pt_regs
*regs
)
848 /* we don't implement logging of alignment exceptions */
849 if (!(current
->thread
.align_ctl
& PR_UNALIGN_SIGBUS
))
850 fixed
= fix_alignment(regs
);
853 regs
->nip
+= 4; /* skip over emulated instruction */
854 emulate_single_step(regs
);
858 /* Operand address was bad */
859 if (fixed
== -EFAULT
) {
861 _exception(SIGSEGV
, regs
, SEGV_ACCERR
, regs
->dar
);
863 /* Search exception table */
864 bad_page_fault(regs
, regs
->dar
, SIGSEGV
);
867 _exception(SIGBUS
, regs
, BUS_ADRALN
, regs
->dar
);
870 void StackOverflow(struct pt_regs
*regs
)
872 printk(KERN_CRIT
"Kernel stack overflow in process %p, r1=%lx\n",
873 current
, regs
->gpr
[1]);
876 panic("kernel stack overflow");
879 void nonrecoverable_exception(struct pt_regs
*regs
)
881 printk(KERN_ERR
"Non-recoverable exception at PC=%lx MSR=%lx\n",
882 regs
->nip
, regs
->msr
);
884 die("nonrecoverable exception", regs
, SIGKILL
);
887 void trace_syscall(struct pt_regs
*regs
)
889 printk("Task: %p(%d), PC: %08lX/%08lX, Syscall: %3ld, Result: %s%ld %s\n",
890 current
, current
->pid
, regs
->nip
, regs
->link
, regs
->gpr
[0],
891 regs
->ccr
&0x10000000?"Error=":"", regs
->gpr
[3], print_tainted());
894 void kernel_fp_unavailable_exception(struct pt_regs
*regs
)
896 printk(KERN_EMERG
"Unrecoverable FP Unavailable Exception "
897 "%lx at %lx\n", regs
->trap
, regs
->nip
);
898 die("Unrecoverable FP Unavailable Exception", regs
, SIGABRT
);
901 void altivec_unavailable_exception(struct pt_regs
*regs
)
903 if (user_mode(regs
)) {
904 /* A user program has executed an altivec instruction,
905 but this kernel doesn't support altivec. */
906 _exception(SIGILL
, regs
, ILL_ILLOPC
, regs
->nip
);
910 printk(KERN_EMERG
"Unrecoverable VMX/Altivec Unavailable Exception "
911 "%lx at %lx\n", regs
->trap
, regs
->nip
);
912 die("Unrecoverable VMX/Altivec Unavailable Exception", regs
, SIGABRT
);
915 void performance_monitor_exception(struct pt_regs
*regs
)
921 void SoftwareEmulation(struct pt_regs
*regs
)
923 extern int do_mathemu(struct pt_regs
*);
924 extern int Soft_emulate_8xx(struct pt_regs
*);
927 CHECK_FULL_REGS(regs
);
929 if (!user_mode(regs
)) {
931 die("Kernel Mode Software FPU Emulation", regs
, SIGFPE
);
934 #ifdef CONFIG_MATH_EMULATION
935 errcode
= do_mathemu(regs
);
937 errcode
= Soft_emulate_8xx(regs
);
941 _exception(SIGFPE
, regs
, 0, 0);
942 else if (errcode
== -EFAULT
)
943 _exception(SIGSEGV
, regs
, 0, 0);
945 _exception(SIGILL
, regs
, ILL_ILLOPC
, regs
->nip
);
947 emulate_single_step(regs
);
949 #endif /* CONFIG_8xx */
951 #if defined(CONFIG_40x) || defined(CONFIG_BOOKE)
953 void DebugException(struct pt_regs
*regs
, unsigned long debug_status
)
955 if (debug_status
& DBSR_IC
) { /* instruction completion */
956 regs
->msr
&= ~MSR_DE
;
957 if (user_mode(regs
)) {
958 current
->thread
.dbcr0
&= ~DBCR0_IC
;
960 /* Disable instruction completion */
961 mtspr(SPRN_DBCR0
, mfspr(SPRN_DBCR0
) & ~DBCR0_IC
);
962 /* Clear the instruction completion event */
963 mtspr(SPRN_DBSR
, DBSR_IC
);
964 if (debugger_sstep(regs
))
967 _exception(SIGTRAP
, regs
, TRAP_TRACE
, 0);
970 #endif /* CONFIG_4xx || CONFIG_BOOKE */
972 #if !defined(CONFIG_TAU_INT)
973 void TAUException(struct pt_regs
*regs
)
975 printk("TAU trap at PC: %lx, MSR: %lx, vector=%lx %s\n",
976 regs
->nip
, regs
->msr
, regs
->trap
, print_tainted());
978 #endif /* CONFIG_INT_TAU */
980 #ifdef CONFIG_ALTIVEC
981 void altivec_assist_exception(struct pt_regs
*regs
)
985 if (!user_mode(regs
)) {
986 printk(KERN_EMERG
"VMX/Altivec assist exception in kernel mode"
987 " at %lx\n", regs
->nip
);
988 die("Kernel VMX/Altivec assist exception", regs
, SIGILL
);
991 flush_altivec_to_thread(current
);
993 err
= emulate_altivec(regs
);
995 regs
->nip
+= 4; /* skip emulated instruction */
996 emulate_single_step(regs
);
1000 if (err
== -EFAULT
) {
1001 /* got an error reading the instruction */
1002 _exception(SIGSEGV
, regs
, SEGV_ACCERR
, regs
->nip
);
1004 /* didn't recognize the instruction */
1005 /* XXX quick hack for now: set the non-Java bit in the VSCR */
1006 if (printk_ratelimit())
1007 printk(KERN_ERR
"Unrecognized altivec instruction "
1008 "in %s at %lx\n", current
->comm
, regs
->nip
);
1009 current
->thread
.vscr
.u
[3] |= 0x10000;
1012 #endif /* CONFIG_ALTIVEC */
1014 #ifdef CONFIG_FSL_BOOKE
1015 void CacheLockingException(struct pt_regs
*regs
, unsigned long address
,
1016 unsigned long error_code
)
1018 /* We treat cache locking instructions from the user
1019 * as priv ops, in the future we could try to do
1022 if (error_code
& (ESR_DLK
|ESR_ILK
))
1023 _exception(SIGILL
, regs
, ILL_PRVOPC
, regs
->nip
);
1026 #endif /* CONFIG_FSL_BOOKE */
1029 void SPEFloatingPointException(struct pt_regs
*regs
)
1031 unsigned long spefscr
;
1035 spefscr
= current
->thread
.spefscr
;
1036 fpexc_mode
= current
->thread
.fpexc_mode
;
1038 /* Hardware does not neccessarily set sticky
1039 * underflow/overflow/invalid flags */
1040 if ((spefscr
& SPEFSCR_FOVF
) && (fpexc_mode
& PR_FP_EXC_OVF
)) {
1042 spefscr
|= SPEFSCR_FOVFS
;
1044 else if ((spefscr
& SPEFSCR_FUNF
) && (fpexc_mode
& PR_FP_EXC_UND
)) {
1046 spefscr
|= SPEFSCR_FUNFS
;
1048 else if ((spefscr
& SPEFSCR_FDBZ
) && (fpexc_mode
& PR_FP_EXC_DIV
))
1050 else if ((spefscr
& SPEFSCR_FINV
) && (fpexc_mode
& PR_FP_EXC_INV
)) {
1052 spefscr
|= SPEFSCR_FINVS
;
1054 else if ((spefscr
& (SPEFSCR_FG
| SPEFSCR_FX
)) && (fpexc_mode
& PR_FP_EXC_RES
))
1057 current
->thread
.spefscr
= spefscr
;
1059 _exception(SIGFPE
, regs
, code
, regs
->nip
);
1065 * We enter here if we get an unrecoverable exception, that is, one
1066 * that happened at a point where the RI (recoverable interrupt) bit
1067 * in the MSR is 0. This indicates that SRR0/1 are live, and that
1068 * we therefore lost state by taking this exception.
1070 void unrecoverable_exception(struct pt_regs
*regs
)
1072 printk(KERN_EMERG
"Unrecoverable exception %lx at %lx\n",
1073 regs
->trap
, regs
->nip
);
1074 die("Unrecoverable exception", regs
, SIGABRT
);
1077 #ifdef CONFIG_BOOKE_WDT
1079 * Default handler for a Watchdog exception,
1080 * spins until a reboot occurs
1082 void __attribute__ ((weak
)) WatchdogHandler(struct pt_regs
*regs
)
1084 /* Generic WatchdogHandler, implement your own */
1085 mtspr(SPRN_TCR
, mfspr(SPRN_TCR
)&(~TCR_WIE
));
1089 void WatchdogException(struct pt_regs
*regs
)
1091 printk (KERN_EMERG
"PowerPC Book-E Watchdog Exception\n");
1092 WatchdogHandler(regs
);
1097 * We enter here if we discover during exception entry that we are
1098 * running in supervisor mode with a userspace value in the stack pointer.
1100 void kernel_bad_stack(struct pt_regs
*regs
)
1102 printk(KERN_EMERG
"Bad kernel stack pointer %lx at %lx\n",
1103 regs
->gpr
[1], regs
->nip
);
1104 die("Bad kernel stack pointer", regs
, SIGABRT
);
1107 void __init
trap_init(void)