drivers/staging/gma500/mrst_device.c

   1 /**************************************************************************
   2  * Copyright (c) 2011, Intel Corporation.
   3  * All Rights Reserved.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms and conditions of the GNU General Public License,
   7  * version 2, as published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program; if not, write to the Free Software Foundation, Inc.,
  16  * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  17  *
  18  **************************************************************************/
  19
  20 #include <linux/backlight.h>
  21 #include <drm/drmP.h>
  22 #include <drm/drm.h>
  23 #include "psb_drm.h"
  24 #include "psb_drv.h"
  25 #include "psb_reg.h"
  26 #include "psb_intel_reg.h"
  27 #include <asm/intel_scu_ipc.h>
  28
  29 /* IPC message and command defines used to enable/disable mipi panel voltages */
  30 #define IPC_MSG_PANEL_ON_OFF    0xE9
  31 #define IPC_CMD_PANEL_ON        1
  32 #define IPC_CMD_PANEL_OFF       0
  33
  34 static int mrst_output_init(struct drm_device *dev)
  35 {
  36         struct drm_psb_private *dev_priv = dev->dev_private;
  37         if (dev_priv->iLVDS_enable) {
  38                 mrst_lvds_init(dev, &dev_priv->mode_dev);
  39                 return 0;
  40         }
  41         dev_err(dev->dev, "DSI is not supported\n");
  42         return -ENODEV;
  43 }
  44
  45 /*
  46  *      Provide the low level interfaces for the Moorestown backlight
  47  */
  48
  49 #ifdef CONFIG_BACKLIGHT_CLASS_DEVICE
  50
  51 #define MRST_BLC_MAX_PWM_REG_FREQ           0xFFFF
  52 #define BLC_PWM_PRECISION_FACTOR 100    /* 10000000 */
  53 #define BLC_PWM_FREQ_CALC_CONSTANT 32
  54 #define MHz 1000000
  55 #define BLC_ADJUSTMENT_MAX 100
  56
  57 static struct backlight_device *mrst_backlight_device;
  58 static int mrst_brightness;
  59
  60 static int mrst_set_brightness(struct backlight_device *bd)
  61 {
  62         struct drm_device *dev = bl_get_data(mrst_backlight_device);
  63         struct drm_psb_private *dev_priv = dev->dev_private;
  64         int level = bd->props.brightness;
  65         u32 blc_pwm_ctl;
  66         u32 max_pwm_blc;
  67
  68         /* Percentage 1-100% being valid */
  69         if (level < 1)
  70                 level = 1;
  71
  72         if (gma_power_begin(dev, 0)) {
  73                 /* Calculate and set the brightness value */
  74                 max_pwm_blc = REG_READ(BLC_PWM_CTL) >> 16;
  75                 blc_pwm_ctl = level * max_pwm_blc / 100;
  76
  77                 /* Adjust the backlight level with the percent in
  78                  * dev_priv->blc_adj1;
  79                  */
  80                 blc_pwm_ctl = blc_pwm_ctl * dev_priv->blc_adj1;
  81                 blc_pwm_ctl = blc_pwm_ctl / 100;
  82
  83                 /* Adjust the backlight level with the percent in
  84                  * dev_priv->blc_adj2;
  85                  */
  86                 blc_pwm_ctl = blc_pwm_ctl * dev_priv->blc_adj2;
  87                 blc_pwm_ctl = blc_pwm_ctl / 100;
  88
  89                 /* force PWM bit on */
  90                 REG_WRITE(BLC_PWM_CTL2, (0x80000000 | REG_READ(BLC_PWM_CTL2)));
  91                 REG_WRITE(BLC_PWM_CTL, (max_pwm_blc << 16) | blc_pwm_ctl);
  92                 gma_power_end(dev);
  93         }
  94         mrst_brightness = level;
  95         return 0;
  96 }
  97
  98 static int mrst_get_brightness(struct backlight_device *bd)
  99 {
 100         /* return locally cached var instead of HW read (due to DPST etc.) */
 101         /* FIXME: ideally return actual value in case firmware fiddled with
 102            it */
 103         return mrst_brightness;
 104 }
 105
 106 static int device_backlight_init(struct drm_device *dev)
 107 {
 108         struct drm_psb_private *dev_priv = dev->dev_private;
 109         unsigned long core_clock;
 110         u16 bl_max_freq;
 111         uint32_t value;
 112         uint32_t blc_pwm_precision_factor;
 113
 114         dev_priv->blc_adj1 = BLC_ADJUSTMENT_MAX;
 115         dev_priv->blc_adj2 = BLC_ADJUSTMENT_MAX;
 116         bl_max_freq = 256;
 117         /* this needs to be set elsewhere */
 118         blc_pwm_precision_factor = BLC_PWM_PRECISION_FACTOR;
 119
 120         core_clock = dev_priv->core_freq;
 121
 122         value = (core_clock * MHz) / BLC_PWM_FREQ_CALC_CONSTANT;
 123         value *= blc_pwm_precision_factor;
 124         value /= bl_max_freq;
 125         value /= blc_pwm_precision_factor;
 126
 127         if (gma_power_begin(dev, false)) {
 128                 if (value > (unsigned long long)MRST_BLC_MAX_PWM_REG_FREQ)
 129                                 return -ERANGE;
 130                 else {
 131                         REG_WRITE(BLC_PWM_CTL2,
 132                                         (0x80000000 | REG_READ(BLC_PWM_CTL2)));
 133                         REG_WRITE(BLC_PWM_CTL, value | (value << 16));
 134                 }
 135                 gma_power_end(dev);
 136         }
 137         return 0;
 138 }
 139
 140 static const struct backlight_ops mrst_ops = {
 141         .get_brightness = mrst_get_brightness,
 142         .update_status  = mrst_set_brightness,
 143 };
 144
 145 int mrst_backlight_init(struct drm_device *dev)
 146 {
 147         struct drm_psb_private *dev_priv = dev->dev_private;
 148         int ret;
 149         struct backlight_properties props;
 150
 151         memset(&props, 0, sizeof(struct backlight_properties));
 152         props.max_brightness = 100;
 153         props.type = BACKLIGHT_PLATFORM;
 154
 155         mrst_backlight_device = backlight_device_register("mrst-bl",
 156                                         NULL, (void *)dev, &mrst_ops, &props);
 157
 158         if (IS_ERR(mrst_backlight_device))
 159                 return PTR_ERR(mrst_backlight_device);
 160
 161         ret = device_backlight_init(dev);
 162         if (ret < 0) {
 163                 backlight_device_unregister(mrst_backlight_device);
 164                 return ret;
 165         }
 166         mrst_backlight_device->props.brightness = 100;
 167         mrst_backlight_device->props.max_brightness = 100;
 168         backlight_update_status(mrst_backlight_device);
 169         dev_priv->backlight_device = mrst_backlight_device;
 170         return 0;
 171 }
 172
 173 #endif
 174
 175 /*
 176  *      Provide the Moorestown specific chip logic and low level methods
 177  *      for power management
 178  */
 179
 180 static void mrst_init_pm(struct drm_device *dev)
 181 {
 182 }
 183
 184 /**
 185  *      mrst_save_display_registers     -       save registers lost on suspend
 186  *      @dev: our DRM device
 187  *
 188  *      Save the state we need in order to be able to restore the interface
 189  *      upon resume from suspend
 190  */
 191 static int mrst_save_display_registers(struct drm_device *dev)
 192 {
 193         struct drm_psb_private *dev_priv = dev->dev_private;
 194         struct drm_crtc *crtc;
 195         struct drm_connector *connector;
 196
 197         /* Display arbitration control + watermarks */
 198         dev_priv->saveDSPARB = PSB_RVDC32(DSPARB);
 199         dev_priv->saveDSPFW1 = PSB_RVDC32(DSPFW1);
 200         dev_priv->saveDSPFW2 = PSB_RVDC32(DSPFW2);
 201         dev_priv->saveDSPFW3 = PSB_RVDC32(DSPFW3);
 202         dev_priv->saveDSPFW4 = PSB_RVDC32(DSPFW4);
 203         dev_priv->saveDSPFW5 = PSB_RVDC32(DSPFW5);
 204         dev_priv->saveDSPFW6 = PSB_RVDC32(DSPFW6);
 205         dev_priv->saveCHICKENBIT = PSB_RVDC32(DSPCHICKENBIT);
 206
 207         /* Save crtc and output state */
 208         mutex_lock(&dev->mode_config.mutex);
 209         list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
 210                 if (drm_helper_crtc_in_use(crtc))
 211                         crtc->funcs->save(crtc);
 212         }
 213
 214         list_for_each_entry(connector, &dev->mode_config.connector_list, head)
 215                 connector->funcs->save(connector);
 216
 217         mutex_unlock(&dev->mode_config.mutex);
 218         return 0;
 219 }
 220
 221 /**
 222  *      mrst_restore_display_registers  -       restore lost register state
 223  *      @dev: our DRM device
 224  *
 225  *      Restore register state that was lost during suspend and resume.
 226  */
 227 static int mrst_restore_display_registers(struct drm_device *dev)
 228 {
 229         struct drm_psb_private *dev_priv = dev->dev_private;
 230         struct drm_crtc *crtc;
 231         struct drm_connector *connector;
 232         int pp_stat;
 233
 234         if (!dev_priv->iLVDS_enable) {
 235 #ifdef CONFIG_X86_MRST
 236                 intel_scu_ipc_simple_command(IPC_MSG_PANEL_ON_OFF,
 237                                                         IPC_CMD_PANEL_ON);
 238                 /* FIXME: can we avoid this delay ? */
 239                 msleep(2000); /* wait 2 seconds */
 240 #endif
 241         }
 242
 243         /* Display arbitration + watermarks */
 244         PSB_WVDC32(dev_priv->saveDSPARB, DSPARB);
 245         PSB_WVDC32(dev_priv->saveDSPFW1, DSPFW1);
 246         PSB_WVDC32(dev_priv->saveDSPFW2, DSPFW2);
 247         PSB_WVDC32(dev_priv->saveDSPFW3, DSPFW3);
 248         PSB_WVDC32(dev_priv->saveDSPFW4, DSPFW4);
 249         PSB_WVDC32(dev_priv->saveDSPFW5, DSPFW5);
 250         PSB_WVDC32(dev_priv->saveDSPFW6, DSPFW6);
 251         PSB_WVDC32(dev_priv->saveCHICKENBIT, DSPCHICKENBIT);
 252
 253         /*make sure VGA plane is off. it initializes to on after reset!*/
 254         PSB_WVDC32(0x80000000, VGACNTRL);
 255
 256         mutex_lock(&dev->mode_config.mutex);
 257         list_for_each_entry(crtc, &dev->mode_config.crtc_list, head)
 258                 if (drm_helper_crtc_in_use(crtc))
 259                         crtc->funcs->restore(crtc);
 260
 261         list_for_each_entry(connector, &dev->mode_config.connector_list, head)
 262                 connector->funcs->restore(connector);
 263
 264         mutex_unlock(&dev->mode_config.mutex);
 265
 266         if (dev_priv->iLVDS_enable) {
 267                 /*shutdown the panel*/
 268                 PSB_WVDC32(0, PP_CONTROL);
 269                 do {
 270                         pp_stat = PSB_RVDC32(PP_STATUS);
 271                 } while (pp_stat & 0x80000000);
 272
 273                 /* Turn off the plane */
 274                 PSB_WVDC32(0x58000000, DSPACNTR);
 275                 PSB_WVDC32(0, DSPASURF);/*trigger the plane disable*/
 276                 /* Wait ~4 ticks */
 277                 msleep(4);
 278                 /* Turn off pipe */
 279                 PSB_WVDC32(0x0, PIPEACONF);
 280                 /* Wait ~8 ticks */
 281                 msleep(8);
 282
 283                 /* Turn off PLLs */
 284                 PSB_WVDC32(0, MRST_DPLL_A);
 285         } else {
 286                 PSB_WVDC32(DPI_SHUT_DOWN, DPI_CONTROL_REG);
 287                 PSB_WVDC32(0x0, PIPEACONF);
 288                 PSB_WVDC32(0x2faf0000, BLC_PWM_CTL);
 289                 while (REG_READ(0x70008) & 0x40000000)
 290                         cpu_relax();
 291                 while ((PSB_RVDC32(GEN_FIFO_STAT_REG) & DPI_FIFO_EMPTY)
 292                         != DPI_FIFO_EMPTY)
 293                         cpu_relax();
 294                 PSB_WVDC32(0, DEVICE_READY_REG);
 295                 /* Turn off panel power */
 296 #ifdef CONFIG_X86_MRST  /* FIXME: kill define once modular */
 297                 intel_scu_ipc_simple_command(IPC_MSG_PANEL_ON_OFF,
 298                                                         IPC_CMD_PANEL_OFF);
 299 #endif
 300         }
 301         return 0;
 302 }
 303
 304 /**
 305  *      mrst_power_down -       power down the display island
 306  *      @dev: our DRM device
 307  *
 308  *      Power down the display interface of our device
 309  */
 310 static int mrst_power_down(struct drm_device *dev)
 311 {
 312         struct drm_psb_private *dev_priv = dev->dev_private;
 313         u32 pwr_mask ;
 314         u32 pwr_sts;
 315
 316         pwr_mask = PSB_PWRGT_DISPLAY_MASK;
 317         outl(pwr_mask, dev_priv->ospm_base + PSB_PM_SSC);
 318
 319         while (true) {
 320                 pwr_sts = inl(dev_priv->ospm_base + PSB_PM_SSS);
 321                 if ((pwr_sts & pwr_mask) == pwr_mask)
 322                         break;
 323                 else
 324                         udelay(10);
 325         }
 326         return 0;
 327 }
 328
 329 /*
 330  * mrst_power_up
 331  *
 332  * Restore power to the specified island(s) (powergating)
 333  */
 334 static int mrst_power_up(struct drm_device *dev)
 335 {
 336         struct drm_psb_private *dev_priv = dev->dev_private;
 337         u32 pwr_mask = PSB_PWRGT_DISPLAY_MASK;
 338         u32 pwr_sts, pwr_cnt;
 339
 340         pwr_cnt = inl(dev_priv->ospm_base + PSB_PM_SSC);
 341         pwr_cnt &= ~pwr_mask;
 342         outl(pwr_cnt, (dev_priv->ospm_base + PSB_PM_SSC));
 343
 344         while (true) {
 345                 pwr_sts = inl(dev_priv->ospm_base + PSB_PM_SSS);
 346                 if ((pwr_sts & pwr_mask) == 0)
 347                         break;
 348                 else
 349                         udelay(10);
 350         }
 351         return 0;
 352 }
 353
 354 const struct psb_ops mrst_chip_ops = {
 355         .output_init = mrst_output_init,
 356
 357 #ifdef CONFIG_BACKLIGHT_CLASS_DEVICE
 358         .backlight_init = mrst_backlight_init,
 359 #endif
 360
 361         .init_pm = mrst_init_pm,
 362         .save_regs = mrst_save_display_registers,
 363         .restore_regs = mrst_restore_display_registers,
 364         .power_down = mrst_power_down,
 365         .power_up = mrst_power_up,
 366 };
 367