ACPI: Remove R40e c-state blacklist
[linux-2.6/x86.git] / drivers / acpi / processor_idle.c
blob397f2a7fee48bf6a3cfec0e5b79ab98d3c3a9c6a
1 /*
2 * processor_idle - idle state submodule to the ACPI processor driver
4 * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com>
5 * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
6 * Copyright (C) 2004, 2005 Dominik Brodowski <linux@brodo.de>
7 * Copyright (C) 2004 Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com>
8 * - Added processor hotplug support
9 * Copyright (C) 2005 Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
10 * - Added support for C3 on SMP
12 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License as published by
16 * the Free Software Foundation; either version 2 of the License, or (at
17 * your option) any later version.
19 * This program is distributed in the hope that it will be useful, but
20 * WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
22 * General Public License for more details.
24 * You should have received a copy of the GNU General Public License along
25 * with this program; if not, write to the Free Software Foundation, Inc.,
26 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
28 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
31 #include <linux/kernel.h>
32 #include <linux/module.h>
33 #include <linux/init.h>
34 #include <linux/cpufreq.h>
35 #include <linux/proc_fs.h>
36 #include <linux/seq_file.h>
37 #include <linux/acpi.h>
38 #include <linux/dmi.h>
39 #include <linux/moduleparam.h>
40 #include <linux/sched.h> /* need_resched() */
41 #include <linux/pm_qos_params.h>
42 #include <linux/clockchips.h>
43 #include <linux/cpuidle.h>
44 #include <linux/irqflags.h>
47 * Include the apic definitions for x86 to have the APIC timer related defines
48 * available also for UP (on SMP it gets magically included via linux/smp.h).
49 * asm/acpi.h is not an option, as it would require more include magic. Also
50 * creating an empty asm-ia64/apic.h would just trade pest vs. cholera.
52 #ifdef CONFIG_X86
53 #include <asm/apic.h>
54 #endif
56 #include <asm/io.h>
57 #include <asm/uaccess.h>
59 #include <acpi/acpi_bus.h>
60 #include <acpi/processor.h>
61 #include <asm/processor.h>
63 #define ACPI_PROCESSOR_CLASS "processor"
64 #define _COMPONENT ACPI_PROCESSOR_COMPONENT
65 ACPI_MODULE_NAME("processor_idle");
66 #define ACPI_PROCESSOR_FILE_POWER "power"
67 #define US_TO_PM_TIMER_TICKS(t) ((t * (PM_TIMER_FREQUENCY/1000)) / 1000)
68 #define PM_TIMER_TICK_NS (1000000000ULL/PM_TIMER_FREQUENCY)
69 #define C2_OVERHEAD 1 /* 1us */
70 #define C3_OVERHEAD 1 /* 1us */
71 #define PM_TIMER_TICKS_TO_US(p) (((p) * 1000)/(PM_TIMER_FREQUENCY/1000))
73 static unsigned int max_cstate __read_mostly = ACPI_PROCESSOR_MAX_POWER;
74 module_param(max_cstate, uint, 0000);
75 static unsigned int nocst __read_mostly;
76 module_param(nocst, uint, 0000);
78 static unsigned int latency_factor __read_mostly = 2;
79 module_param(latency_factor, uint, 0644);
82 * IBM ThinkPad R40e crashes mysteriously when going into C2 or C3.
83 * For now disable this. Probably a bug somewhere else.
85 * To skip this limit, boot/load with a large max_cstate limit.
87 static int set_max_cstate(const struct dmi_system_id *id)
89 if (max_cstate > ACPI_PROCESSOR_MAX_POWER)
90 return 0;
92 printk(KERN_NOTICE PREFIX "%s detected - limiting to C%ld max_cstate."
93 " Override with \"processor.max_cstate=%d\"\n", id->ident,
94 (long)id->driver_data, ACPI_PROCESSOR_MAX_POWER + 1);
96 max_cstate = (long)id->driver_data;
98 return 0;
101 /* Actually this shouldn't be __cpuinitdata, would be better to fix the
102 callers to only run once -AK */
103 static struct dmi_system_id __cpuinitdata processor_power_dmi_table[] = {
104 { set_max_cstate, "Clevo 5600D", {
105 DMI_MATCH(DMI_BIOS_VENDOR,"Phoenix Technologies LTD"),
106 DMI_MATCH(DMI_BIOS_VERSION,"SHE845M0.86C.0013.D.0302131307")},
107 (void *)2},
111 static inline u32 ticks_elapsed(u32 t1, u32 t2)
113 if (t2 >= t1)
114 return (t2 - t1);
115 else if (!(acpi_gbl_FADT.flags & ACPI_FADT_32BIT_TIMER))
116 return (((0x00FFFFFF - t1) + t2) & 0x00FFFFFF);
117 else
118 return ((0xFFFFFFFF - t1) + t2);
121 static inline u32 ticks_elapsed_in_us(u32 t1, u32 t2)
123 if (t2 >= t1)
124 return PM_TIMER_TICKS_TO_US(t2 - t1);
125 else if (!(acpi_gbl_FADT.flags & ACPI_FADT_32BIT_TIMER))
126 return PM_TIMER_TICKS_TO_US(((0x00FFFFFF - t1) + t2) & 0x00FFFFFF);
127 else
128 return PM_TIMER_TICKS_TO_US((0xFFFFFFFF - t1) + t2);
132 * Callers should disable interrupts before the call and enable
133 * interrupts after return.
135 static void acpi_safe_halt(void)
137 current_thread_info()->status &= ~TS_POLLING;
139 * TS_POLLING-cleared state must be visible before we
140 * test NEED_RESCHED:
142 smp_mb();
143 if (!need_resched()) {
144 safe_halt();
145 local_irq_disable();
147 current_thread_info()->status |= TS_POLLING;
150 #ifdef ARCH_APICTIMER_STOPS_ON_C3
153 * Some BIOS implementations switch to C3 in the published C2 state.
154 * This seems to be a common problem on AMD boxen, but other vendors
155 * are affected too. We pick the most conservative approach: we assume
156 * that the local APIC stops in both C2 and C3.
158 static void acpi_timer_check_state(int state, struct acpi_processor *pr,
159 struct acpi_processor_cx *cx)
161 struct acpi_processor_power *pwr = &pr->power;
162 u8 type = local_apic_timer_c2_ok ? ACPI_STATE_C3 : ACPI_STATE_C2;
165 * Check, if one of the previous states already marked the lapic
166 * unstable
168 if (pwr->timer_broadcast_on_state < state)
169 return;
171 if (cx->type >= type)
172 pr->power.timer_broadcast_on_state = state;
175 static void acpi_propagate_timer_broadcast(struct acpi_processor *pr)
177 unsigned long reason;
179 reason = pr->power.timer_broadcast_on_state < INT_MAX ?
180 CLOCK_EVT_NOTIFY_BROADCAST_ON : CLOCK_EVT_NOTIFY_BROADCAST_OFF;
182 clockevents_notify(reason, &pr->id);
185 /* Power(C) State timer broadcast control */
186 static void acpi_state_timer_broadcast(struct acpi_processor *pr,
187 struct acpi_processor_cx *cx,
188 int broadcast)
190 int state = cx - pr->power.states;
192 if (state >= pr->power.timer_broadcast_on_state) {
193 unsigned long reason;
195 reason = broadcast ? CLOCK_EVT_NOTIFY_BROADCAST_ENTER :
196 CLOCK_EVT_NOTIFY_BROADCAST_EXIT;
197 clockevents_notify(reason, &pr->id);
201 #else
203 static void acpi_timer_check_state(int state, struct acpi_processor *pr,
204 struct acpi_processor_cx *cstate) { }
205 static void acpi_propagate_timer_broadcast(struct acpi_processor *pr) { }
206 static void acpi_state_timer_broadcast(struct acpi_processor *pr,
207 struct acpi_processor_cx *cx,
208 int broadcast)
212 #endif
215 * Suspend / resume control
217 static int acpi_idle_suspend;
219 int acpi_processor_suspend(struct acpi_device * device, pm_message_t state)
221 acpi_idle_suspend = 1;
222 return 0;
225 int acpi_processor_resume(struct acpi_device * device)
227 acpi_idle_suspend = 0;
228 return 0;
231 #if defined (CONFIG_GENERIC_TIME) && defined (CONFIG_X86)
232 static int tsc_halts_in_c(int state)
234 switch (boot_cpu_data.x86_vendor) {
235 case X86_VENDOR_AMD:
236 case X86_VENDOR_INTEL:
238 * AMD Fam10h TSC will tick in all
239 * C/P/S0/S1 states when this bit is set.
241 if (boot_cpu_has(X86_FEATURE_NONSTOP_TSC))
242 return 0;
244 /*FALL THROUGH*/
245 default:
246 return state > ACPI_STATE_C1;
249 #endif
251 static int acpi_processor_get_power_info_fadt(struct acpi_processor *pr)
254 if (!pr)
255 return -EINVAL;
257 if (!pr->pblk)
258 return -ENODEV;
260 /* if info is obtained from pblk/fadt, type equals state */
261 pr->power.states[ACPI_STATE_C2].type = ACPI_STATE_C2;
262 pr->power.states[ACPI_STATE_C3].type = ACPI_STATE_C3;
264 #ifndef CONFIG_HOTPLUG_CPU
266 * Check for P_LVL2_UP flag before entering C2 and above on
267 * an SMP system.
269 if ((num_online_cpus() > 1) &&
270 !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED))
271 return -ENODEV;
272 #endif
274 /* determine C2 and C3 address from pblk */
275 pr->power.states[ACPI_STATE_C2].address = pr->pblk + 4;
276 pr->power.states[ACPI_STATE_C3].address = pr->pblk + 5;
278 /* determine latencies from FADT */
279 pr->power.states[ACPI_STATE_C2].latency = acpi_gbl_FADT.C2latency;
280 pr->power.states[ACPI_STATE_C3].latency = acpi_gbl_FADT.C3latency;
282 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
283 "lvl2[0x%08x] lvl3[0x%08x]\n",
284 pr->power.states[ACPI_STATE_C2].address,
285 pr->power.states[ACPI_STATE_C3].address));
287 return 0;
290 static int acpi_processor_get_power_info_default(struct acpi_processor *pr)
292 if (!pr->power.states[ACPI_STATE_C1].valid) {
293 /* set the first C-State to C1 */
294 /* all processors need to support C1 */
295 pr->power.states[ACPI_STATE_C1].type = ACPI_STATE_C1;
296 pr->power.states[ACPI_STATE_C1].valid = 1;
297 pr->power.states[ACPI_STATE_C1].entry_method = ACPI_CSTATE_HALT;
299 /* the C0 state only exists as a filler in our array */
300 pr->power.states[ACPI_STATE_C0].valid = 1;
301 return 0;
304 static int acpi_processor_get_power_info_cst(struct acpi_processor *pr)
306 acpi_status status = 0;
307 acpi_integer count;
308 int current_count;
309 int i;
310 struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
311 union acpi_object *cst;
314 if (nocst)
315 return -ENODEV;
317 current_count = 0;
319 status = acpi_evaluate_object(pr->handle, "_CST", NULL, &buffer);
320 if (ACPI_FAILURE(status)) {
321 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "No _CST, giving up\n"));
322 return -ENODEV;
325 cst = buffer.pointer;
327 /* There must be at least 2 elements */
328 if (!cst || (cst->type != ACPI_TYPE_PACKAGE) || cst->package.count < 2) {
329 printk(KERN_ERR PREFIX "not enough elements in _CST\n");
330 status = -EFAULT;
331 goto end;
334 count = cst->package.elements[0].integer.value;
336 /* Validate number of power states. */
337 if (count < 1 || count != cst->package.count - 1) {
338 printk(KERN_ERR PREFIX "count given by _CST is not valid\n");
339 status = -EFAULT;
340 goto end;
343 /* Tell driver that at least _CST is supported. */
344 pr->flags.has_cst = 1;
346 for (i = 1; i <= count; i++) {
347 union acpi_object *element;
348 union acpi_object *obj;
349 struct acpi_power_register *reg;
350 struct acpi_processor_cx cx;
352 memset(&cx, 0, sizeof(cx));
354 element = &(cst->package.elements[i]);
355 if (element->type != ACPI_TYPE_PACKAGE)
356 continue;
358 if (element->package.count != 4)
359 continue;
361 obj = &(element->package.elements[0]);
363 if (obj->type != ACPI_TYPE_BUFFER)
364 continue;
366 reg = (struct acpi_power_register *)obj->buffer.pointer;
368 if (reg->space_id != ACPI_ADR_SPACE_SYSTEM_IO &&
369 (reg->space_id != ACPI_ADR_SPACE_FIXED_HARDWARE))
370 continue;
372 /* There should be an easy way to extract an integer... */
373 obj = &(element->package.elements[1]);
374 if (obj->type != ACPI_TYPE_INTEGER)
375 continue;
377 cx.type = obj->integer.value;
379 * Some buggy BIOSes won't list C1 in _CST -
380 * Let acpi_processor_get_power_info_default() handle them later
382 if (i == 1 && cx.type != ACPI_STATE_C1)
383 current_count++;
385 cx.address = reg->address;
386 cx.index = current_count + 1;
388 cx.entry_method = ACPI_CSTATE_SYSTEMIO;
389 if (reg->space_id == ACPI_ADR_SPACE_FIXED_HARDWARE) {
390 if (acpi_processor_ffh_cstate_probe
391 (pr->id, &cx, reg) == 0) {
392 cx.entry_method = ACPI_CSTATE_FFH;
393 } else if (cx.type == ACPI_STATE_C1) {
395 * C1 is a special case where FIXED_HARDWARE
396 * can be handled in non-MWAIT way as well.
397 * In that case, save this _CST entry info.
398 * Otherwise, ignore this info and continue.
400 cx.entry_method = ACPI_CSTATE_HALT;
401 snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI HLT");
402 } else {
403 continue;
405 if (cx.type == ACPI_STATE_C1 &&
406 (idle_halt || idle_nomwait)) {
408 * In most cases the C1 space_id obtained from
409 * _CST object is FIXED_HARDWARE access mode.
410 * But when the option of idle=halt is added,
411 * the entry_method type should be changed from
412 * CSTATE_FFH to CSTATE_HALT.
413 * When the option of idle=nomwait is added,
414 * the C1 entry_method type should be
415 * CSTATE_HALT.
417 cx.entry_method = ACPI_CSTATE_HALT;
418 snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI HLT");
420 } else {
421 snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI IOPORT 0x%x",
422 cx.address);
425 if (cx.type == ACPI_STATE_C1) {
426 cx.valid = 1;
429 obj = &(element->package.elements[2]);
430 if (obj->type != ACPI_TYPE_INTEGER)
431 continue;
433 cx.latency = obj->integer.value;
435 obj = &(element->package.elements[3]);
436 if (obj->type != ACPI_TYPE_INTEGER)
437 continue;
439 cx.power = obj->integer.value;
441 current_count++;
442 memcpy(&(pr->power.states[current_count]), &cx, sizeof(cx));
445 * We support total ACPI_PROCESSOR_MAX_POWER - 1
446 * (From 1 through ACPI_PROCESSOR_MAX_POWER - 1)
448 if (current_count >= (ACPI_PROCESSOR_MAX_POWER - 1)) {
449 printk(KERN_WARNING
450 "Limiting number of power states to max (%d)\n",
451 ACPI_PROCESSOR_MAX_POWER);
452 printk(KERN_WARNING
453 "Please increase ACPI_PROCESSOR_MAX_POWER if needed.\n");
454 break;
458 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "Found %d power states\n",
459 current_count));
461 /* Validate number of power states discovered */
462 if (current_count < 2)
463 status = -EFAULT;
465 end:
466 kfree(buffer.pointer);
468 return status;
471 static void acpi_processor_power_verify_c2(struct acpi_processor_cx *cx)
474 if (!cx->address)
475 return;
478 * C2 latency must be less than or equal to 100
479 * microseconds.
481 else if (cx->latency > ACPI_PROCESSOR_MAX_C2_LATENCY) {
482 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
483 "latency too large [%d]\n", cx->latency));
484 return;
488 * Otherwise we've met all of our C2 requirements.
489 * Normalize the C2 latency to expidite policy
491 cx->valid = 1;
493 cx->latency_ticks = cx->latency;
495 return;
498 static void acpi_processor_power_verify_c3(struct acpi_processor *pr,
499 struct acpi_processor_cx *cx)
501 static int bm_check_flag;
504 if (!cx->address)
505 return;
508 * C3 latency must be less than or equal to 1000
509 * microseconds.
511 else if (cx->latency > ACPI_PROCESSOR_MAX_C3_LATENCY) {
512 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
513 "latency too large [%d]\n", cx->latency));
514 return;
518 * PIIX4 Erratum #18: We don't support C3 when Type-F (fast)
519 * DMA transfers are used by any ISA device to avoid livelock.
520 * Note that we could disable Type-F DMA (as recommended by
521 * the erratum), but this is known to disrupt certain ISA
522 * devices thus we take the conservative approach.
524 else if (errata.piix4.fdma) {
525 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
526 "C3 not supported on PIIX4 with Type-F DMA\n"));
527 return;
530 /* All the logic here assumes flags.bm_check is same across all CPUs */
531 if (!bm_check_flag) {
532 /* Determine whether bm_check is needed based on CPU */
533 acpi_processor_power_init_bm_check(&(pr->flags), pr->id);
534 bm_check_flag = pr->flags.bm_check;
535 } else {
536 pr->flags.bm_check = bm_check_flag;
539 if (pr->flags.bm_check) {
540 if (!pr->flags.bm_control) {
541 if (pr->flags.has_cst != 1) {
542 /* bus mastering control is necessary */
543 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
544 "C3 support requires BM control\n"));
545 return;
546 } else {
547 /* Here we enter C3 without bus mastering */
548 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
549 "C3 support without BM control\n"));
552 } else {
554 * WBINVD should be set in fadt, for C3 state to be
555 * supported on when bm_check is not required.
557 if (!(acpi_gbl_FADT.flags & ACPI_FADT_WBINVD)) {
558 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
559 "Cache invalidation should work properly"
560 " for C3 to be enabled on SMP systems\n"));
561 return;
566 * Otherwise we've met all of our C3 requirements.
567 * Normalize the C3 latency to expidite policy. Enable
568 * checking of bus mastering status (bm_check) so we can
569 * use this in our C3 policy
571 cx->valid = 1;
573 cx->latency_ticks = cx->latency;
575 * On older chipsets, BM_RLD needs to be set
576 * in order for Bus Master activity to wake the
577 * system from C3. Newer chipsets handle DMA
578 * during C3 automatically and BM_RLD is a NOP.
579 * In either case, the proper way to
580 * handle BM_RLD is to set it and leave it set.
582 acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_RLD, 1);
584 return;
587 static int acpi_processor_power_verify(struct acpi_processor *pr)
589 unsigned int i;
590 unsigned int working = 0;
592 pr->power.timer_broadcast_on_state = INT_MAX;
594 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) {
595 struct acpi_processor_cx *cx = &pr->power.states[i];
597 switch (cx->type) {
598 case ACPI_STATE_C1:
599 cx->valid = 1;
600 break;
602 case ACPI_STATE_C2:
603 acpi_processor_power_verify_c2(cx);
604 if (cx->valid)
605 acpi_timer_check_state(i, pr, cx);
606 break;
608 case ACPI_STATE_C3:
609 acpi_processor_power_verify_c3(pr, cx);
610 if (cx->valid)
611 acpi_timer_check_state(i, pr, cx);
612 break;
615 if (cx->valid)
616 working++;
619 acpi_propagate_timer_broadcast(pr);
621 return (working);
624 static int acpi_processor_get_power_info(struct acpi_processor *pr)
626 unsigned int i;
627 int result;
630 /* NOTE: the idle thread may not be running while calling
631 * this function */
633 /* Zero initialize all the C-states info. */
634 memset(pr->power.states, 0, sizeof(pr->power.states));
636 result = acpi_processor_get_power_info_cst(pr);
637 if (result == -ENODEV)
638 result = acpi_processor_get_power_info_fadt(pr);
640 if (result)
641 return result;
643 acpi_processor_get_power_info_default(pr);
645 pr->power.count = acpi_processor_power_verify(pr);
648 * if one state of type C2 or C3 is available, mark this
649 * CPU as being "idle manageable"
651 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) {
652 if (pr->power.states[i].valid) {
653 pr->power.count = i;
654 if (pr->power.states[i].type >= ACPI_STATE_C2)
655 pr->flags.power = 1;
659 return 0;
662 static int acpi_processor_power_seq_show(struct seq_file *seq, void *offset)
664 struct acpi_processor *pr = seq->private;
665 unsigned int i;
668 if (!pr)
669 goto end;
671 seq_printf(seq, "active state: C%zd\n"
672 "max_cstate: C%d\n"
673 "bus master activity: %08x\n"
674 "maximum allowed latency: %d usec\n",
675 pr->power.state ? pr->power.state - pr->power.states : 0,
676 max_cstate, (unsigned)pr->power.bm_activity,
677 pm_qos_requirement(PM_QOS_CPU_DMA_LATENCY));
679 seq_puts(seq, "states:\n");
681 for (i = 1; i <= pr->power.count; i++) {
682 seq_printf(seq, " %cC%d: ",
683 (&pr->power.states[i] ==
684 pr->power.state ? '*' : ' '), i);
686 if (!pr->power.states[i].valid) {
687 seq_puts(seq, "<not supported>\n");
688 continue;
691 switch (pr->power.states[i].type) {
692 case ACPI_STATE_C1:
693 seq_printf(seq, "type[C1] ");
694 break;
695 case ACPI_STATE_C2:
696 seq_printf(seq, "type[C2] ");
697 break;
698 case ACPI_STATE_C3:
699 seq_printf(seq, "type[C3] ");
700 break;
701 default:
702 seq_printf(seq, "type[--] ");
703 break;
706 if (pr->power.states[i].promotion.state)
707 seq_printf(seq, "promotion[C%zd] ",
708 (pr->power.states[i].promotion.state -
709 pr->power.states));
710 else
711 seq_puts(seq, "promotion[--] ");
713 if (pr->power.states[i].demotion.state)
714 seq_printf(seq, "demotion[C%zd] ",
715 (pr->power.states[i].demotion.state -
716 pr->power.states));
717 else
718 seq_puts(seq, "demotion[--] ");
720 seq_printf(seq, "latency[%03d] usage[%08d] duration[%020llu]\n",
721 pr->power.states[i].latency,
722 pr->power.states[i].usage,
723 (unsigned long long)pr->power.states[i].time);
726 end:
727 return 0;
730 static int acpi_processor_power_open_fs(struct inode *inode, struct file *file)
732 return single_open(file, acpi_processor_power_seq_show,
733 PDE(inode)->data);
736 static const struct file_operations acpi_processor_power_fops = {
737 .owner = THIS_MODULE,
738 .open = acpi_processor_power_open_fs,
739 .read = seq_read,
740 .llseek = seq_lseek,
741 .release = single_release,
746 * acpi_idle_bm_check - checks if bus master activity was detected
748 static int acpi_idle_bm_check(void)
750 u32 bm_status = 0;
752 acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_STATUS, &bm_status);
753 if (bm_status)
754 acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_STATUS, 1);
756 * PIIX4 Erratum #18: Note that BM_STS doesn't always reflect
757 * the true state of bus mastering activity; forcing us to
758 * manually check the BMIDEA bit of each IDE channel.
760 else if (errata.piix4.bmisx) {
761 if ((inb_p(errata.piix4.bmisx + 0x02) & 0x01)
762 || (inb_p(errata.piix4.bmisx + 0x0A) & 0x01))
763 bm_status = 1;
765 return bm_status;
769 * acpi_idle_do_entry - a helper function that does C2 and C3 type entry
770 * @cx: cstate data
772 * Caller disables interrupt before call and enables interrupt after return.
774 static inline void acpi_idle_do_entry(struct acpi_processor_cx *cx)
776 /* Don't trace irqs off for idle */
777 stop_critical_timings();
778 if (cx->entry_method == ACPI_CSTATE_FFH) {
779 /* Call into architectural FFH based C-state */
780 acpi_processor_ffh_cstate_enter(cx);
781 } else if (cx->entry_method == ACPI_CSTATE_HALT) {
782 acpi_safe_halt();
783 } else {
784 int unused;
785 /* IO port based C-state */
786 inb(cx->address);
787 /* Dummy wait op - must do something useless after P_LVL2 read
788 because chipsets cannot guarantee that STPCLK# signal
789 gets asserted in time to freeze execution properly. */
790 unused = inl(acpi_gbl_FADT.xpm_timer_block.address);
792 start_critical_timings();
796 * acpi_idle_enter_c1 - enters an ACPI C1 state-type
797 * @dev: the target CPU
798 * @state: the state data
800 * This is equivalent to the HALT instruction.
802 static int acpi_idle_enter_c1(struct cpuidle_device *dev,
803 struct cpuidle_state *state)
805 u32 t1, t2;
806 struct acpi_processor *pr;
807 struct acpi_processor_cx *cx = cpuidle_get_statedata(state);
809 pr = __get_cpu_var(processors);
811 if (unlikely(!pr))
812 return 0;
814 local_irq_disable();
816 /* Do not access any ACPI IO ports in suspend path */
817 if (acpi_idle_suspend) {
818 acpi_safe_halt();
819 local_irq_enable();
820 return 0;
823 t1 = inl(acpi_gbl_FADT.xpm_timer_block.address);
824 acpi_idle_do_entry(cx);
825 t2 = inl(acpi_gbl_FADT.xpm_timer_block.address);
827 local_irq_enable();
828 cx->usage++;
830 return ticks_elapsed_in_us(t1, t2);
834 * acpi_idle_enter_simple - enters an ACPI state without BM handling
835 * @dev: the target CPU
836 * @state: the state data
838 static int acpi_idle_enter_simple(struct cpuidle_device *dev,
839 struct cpuidle_state *state)
841 struct acpi_processor *pr;
842 struct acpi_processor_cx *cx = cpuidle_get_statedata(state);
843 u32 t1, t2;
844 int sleep_ticks = 0;
846 pr = __get_cpu_var(processors);
848 if (unlikely(!pr))
849 return 0;
851 if (acpi_idle_suspend)
852 return(acpi_idle_enter_c1(dev, state));
854 local_irq_disable();
855 current_thread_info()->status &= ~TS_POLLING;
857 * TS_POLLING-cleared state must be visible before we test
858 * NEED_RESCHED:
860 smp_mb();
862 if (unlikely(need_resched())) {
863 current_thread_info()->status |= TS_POLLING;
864 local_irq_enable();
865 return 0;
869 * Must be done before busmaster disable as we might need to
870 * access HPET !
872 acpi_state_timer_broadcast(pr, cx, 1);
874 if (cx->type == ACPI_STATE_C3)
875 ACPI_FLUSH_CPU_CACHE();
877 t1 = inl(acpi_gbl_FADT.xpm_timer_block.address);
878 /* Tell the scheduler that we are going deep-idle: */
879 sched_clock_idle_sleep_event();
880 acpi_idle_do_entry(cx);
881 t2 = inl(acpi_gbl_FADT.xpm_timer_block.address);
883 #if defined (CONFIG_GENERIC_TIME) && defined (CONFIG_X86)
884 /* TSC could halt in idle, so notify users */
885 if (tsc_halts_in_c(cx->type))
886 mark_tsc_unstable("TSC halts in idle");;
887 #endif
888 sleep_ticks = ticks_elapsed(t1, t2);
890 /* Tell the scheduler how much we idled: */
891 sched_clock_idle_wakeup_event(sleep_ticks*PM_TIMER_TICK_NS);
893 local_irq_enable();
894 current_thread_info()->status |= TS_POLLING;
896 cx->usage++;
898 acpi_state_timer_broadcast(pr, cx, 0);
899 cx->time += sleep_ticks;
900 return ticks_elapsed_in_us(t1, t2);
903 static int c3_cpu_count;
904 static DEFINE_SPINLOCK(c3_lock);
907 * acpi_idle_enter_bm - enters C3 with proper BM handling
908 * @dev: the target CPU
909 * @state: the state data
911 * If BM is detected, the deepest non-C3 idle state is entered instead.
913 static int acpi_idle_enter_bm(struct cpuidle_device *dev,
914 struct cpuidle_state *state)
916 struct acpi_processor *pr;
917 struct acpi_processor_cx *cx = cpuidle_get_statedata(state);
918 u32 t1, t2;
919 int sleep_ticks = 0;
921 pr = __get_cpu_var(processors);
923 if (unlikely(!pr))
924 return 0;
926 if (acpi_idle_suspend)
927 return(acpi_idle_enter_c1(dev, state));
929 if (acpi_idle_bm_check()) {
930 if (dev->safe_state) {
931 dev->last_state = dev->safe_state;
932 return dev->safe_state->enter(dev, dev->safe_state);
933 } else {
934 local_irq_disable();
935 acpi_safe_halt();
936 local_irq_enable();
937 return 0;
941 local_irq_disable();
942 current_thread_info()->status &= ~TS_POLLING;
944 * TS_POLLING-cleared state must be visible before we test
945 * NEED_RESCHED:
947 smp_mb();
949 if (unlikely(need_resched())) {
950 current_thread_info()->status |= TS_POLLING;
951 local_irq_enable();
952 return 0;
955 acpi_unlazy_tlb(smp_processor_id());
957 /* Tell the scheduler that we are going deep-idle: */
958 sched_clock_idle_sleep_event();
960 * Must be done before busmaster disable as we might need to
961 * access HPET !
963 acpi_state_timer_broadcast(pr, cx, 1);
966 * disable bus master
967 * bm_check implies we need ARB_DIS
968 * !bm_check implies we need cache flush
969 * bm_control implies whether we can do ARB_DIS
971 * That leaves a case where bm_check is set and bm_control is
972 * not set. In that case we cannot do much, we enter C3
973 * without doing anything.
975 if (pr->flags.bm_check && pr->flags.bm_control) {
976 spin_lock(&c3_lock);
977 c3_cpu_count++;
978 /* Disable bus master arbitration when all CPUs are in C3 */
979 if (c3_cpu_count == num_online_cpus())
980 acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE, 1);
981 spin_unlock(&c3_lock);
982 } else if (!pr->flags.bm_check) {
983 ACPI_FLUSH_CPU_CACHE();
986 t1 = inl(acpi_gbl_FADT.xpm_timer_block.address);
987 acpi_idle_do_entry(cx);
988 t2 = inl(acpi_gbl_FADT.xpm_timer_block.address);
990 /* Re-enable bus master arbitration */
991 if (pr->flags.bm_check && pr->flags.bm_control) {
992 spin_lock(&c3_lock);
993 acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE, 0);
994 c3_cpu_count--;
995 spin_unlock(&c3_lock);
998 #if defined (CONFIG_GENERIC_TIME) && defined (CONFIG_X86)
999 /* TSC could halt in idle, so notify users */
1000 if (tsc_halts_in_c(ACPI_STATE_C3))
1001 mark_tsc_unstable("TSC halts in idle");
1002 #endif
1003 sleep_ticks = ticks_elapsed(t1, t2);
1004 /* Tell the scheduler how much we idled: */
1005 sched_clock_idle_wakeup_event(sleep_ticks*PM_TIMER_TICK_NS);
1007 local_irq_enable();
1008 current_thread_info()->status |= TS_POLLING;
1010 cx->usage++;
1012 acpi_state_timer_broadcast(pr, cx, 0);
1013 cx->time += sleep_ticks;
1014 return ticks_elapsed_in_us(t1, t2);
1017 struct cpuidle_driver acpi_idle_driver = {
1018 .name = "acpi_idle",
1019 .owner = THIS_MODULE,
1023 * acpi_processor_setup_cpuidle - prepares and configures CPUIDLE
1024 * @pr: the ACPI processor
1026 static int acpi_processor_setup_cpuidle(struct acpi_processor *pr)
1028 int i, count = CPUIDLE_DRIVER_STATE_START;
1029 struct acpi_processor_cx *cx;
1030 struct cpuidle_state *state;
1031 struct cpuidle_device *dev = &pr->power.dev;
1033 if (!pr->flags.power_setup_done)
1034 return -EINVAL;
1036 if (pr->flags.power == 0) {
1037 return -EINVAL;
1040 dev->cpu = pr->id;
1041 for (i = 0; i < CPUIDLE_STATE_MAX; i++) {
1042 dev->states[i].name[0] = '\0';
1043 dev->states[i].desc[0] = '\0';
1046 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) {
1047 cx = &pr->power.states[i];
1048 state = &dev->states[count];
1050 if (!cx->valid)
1051 continue;
1053 #ifdef CONFIG_HOTPLUG_CPU
1054 if ((cx->type != ACPI_STATE_C1) && (num_online_cpus() > 1) &&
1055 !pr->flags.has_cst &&
1056 !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED))
1057 continue;
1058 #endif
1059 cpuidle_set_statedata(state, cx);
1061 snprintf(state->name, CPUIDLE_NAME_LEN, "C%d", i);
1062 strncpy(state->desc, cx->desc, CPUIDLE_DESC_LEN);
1063 state->exit_latency = cx->latency;
1064 state->target_residency = cx->latency * latency_factor;
1065 state->power_usage = cx->power;
1067 state->flags = 0;
1068 switch (cx->type) {
1069 case ACPI_STATE_C1:
1070 state->flags |= CPUIDLE_FLAG_SHALLOW;
1071 if (cx->entry_method == ACPI_CSTATE_FFH)
1072 state->flags |= CPUIDLE_FLAG_TIME_VALID;
1074 state->enter = acpi_idle_enter_c1;
1075 dev->safe_state = state;
1076 break;
1078 case ACPI_STATE_C2:
1079 state->flags |= CPUIDLE_FLAG_BALANCED;
1080 state->flags |= CPUIDLE_FLAG_TIME_VALID;
1081 state->enter = acpi_idle_enter_simple;
1082 dev->safe_state = state;
1083 break;
1085 case ACPI_STATE_C3:
1086 state->flags |= CPUIDLE_FLAG_DEEP;
1087 state->flags |= CPUIDLE_FLAG_TIME_VALID;
1088 state->flags |= CPUIDLE_FLAG_CHECK_BM;
1089 state->enter = pr->flags.bm_check ?
1090 acpi_idle_enter_bm :
1091 acpi_idle_enter_simple;
1092 break;
1095 count++;
1096 if (count == CPUIDLE_STATE_MAX)
1097 break;
1100 dev->state_count = count;
1102 if (!count)
1103 return -EINVAL;
1105 return 0;
1108 int acpi_processor_cst_has_changed(struct acpi_processor *pr)
1110 int ret = 0;
1112 if (boot_option_idle_override)
1113 return 0;
1115 if (!pr)
1116 return -EINVAL;
1118 if (nocst) {
1119 return -ENODEV;
1122 if (!pr->flags.power_setup_done)
1123 return -ENODEV;
1125 cpuidle_pause_and_lock();
1126 cpuidle_disable_device(&pr->power.dev);
1127 acpi_processor_get_power_info(pr);
1128 if (pr->flags.power) {
1129 acpi_processor_setup_cpuidle(pr);
1130 ret = cpuidle_enable_device(&pr->power.dev);
1132 cpuidle_resume_and_unlock();
1134 return ret;
1137 int __cpuinit acpi_processor_power_init(struct acpi_processor *pr,
1138 struct acpi_device *device)
1140 acpi_status status = 0;
1141 static int first_run;
1142 struct proc_dir_entry *entry = NULL;
1143 unsigned int i;
1145 if (boot_option_idle_override)
1146 return 0;
1148 if (!first_run) {
1149 if (idle_halt) {
1151 * When the boot option of "idle=halt" is added, halt
1152 * is used for CPU IDLE.
1153 * In such case C2/C3 is meaningless. So the max_cstate
1154 * is set to one.
1156 max_cstate = 1;
1158 dmi_check_system(processor_power_dmi_table);
1159 max_cstate = acpi_processor_cstate_check(max_cstate);
1160 if (max_cstate < ACPI_C_STATES_MAX)
1161 printk(KERN_NOTICE
1162 "ACPI: processor limited to max C-state %d\n",
1163 max_cstate);
1164 first_run++;
1167 if (!pr)
1168 return -EINVAL;
1170 if (acpi_gbl_FADT.cst_control && !nocst) {
1171 status =
1172 acpi_os_write_port(acpi_gbl_FADT.smi_command, acpi_gbl_FADT.cst_control, 8);
1173 if (ACPI_FAILURE(status)) {
1174 ACPI_EXCEPTION((AE_INFO, status,
1175 "Notifying BIOS of _CST ability failed"));
1179 acpi_processor_get_power_info(pr);
1180 pr->flags.power_setup_done = 1;
1183 * Install the idle handler if processor power management is supported.
1184 * Note that we use previously set idle handler will be used on
1185 * platforms that only support C1.
1187 if (pr->flags.power) {
1188 acpi_processor_setup_cpuidle(pr);
1189 if (cpuidle_register_device(&pr->power.dev))
1190 return -EIO;
1192 printk(KERN_INFO PREFIX "CPU%d (power states:", pr->id);
1193 for (i = 1; i <= pr->power.count; i++)
1194 if (pr->power.states[i].valid)
1195 printk(" C%d[C%d]", i,
1196 pr->power.states[i].type);
1197 printk(")\n");
1200 /* 'power' [R] */
1201 entry = proc_create_data(ACPI_PROCESSOR_FILE_POWER,
1202 S_IRUGO, acpi_device_dir(device),
1203 &acpi_processor_power_fops,
1204 acpi_driver_data(device));
1205 if (!entry)
1206 return -EIO;
1207 return 0;
1210 int acpi_processor_power_exit(struct acpi_processor *pr,
1211 struct acpi_device *device)
1213 if (boot_option_idle_override)
1214 return 0;
1216 cpuidle_unregister_device(&pr->power.dev);
1217 pr->flags.power_setup_done = 0;
1219 if (acpi_device_dir(device))
1220 remove_proc_entry(ACPI_PROCESSOR_FILE_POWER,
1221 acpi_device_dir(device));
1223 return 0;