ide: remove set_transfer()
[linux-2.6/x86.git] / drivers / ide / ide-iops.c
blob99fe50e941beb4fa9f71d9a9d23c1cf59f9d481e
1 /*
2 * Copyright (C) 2000-2002 Andre Hedrick <andre@linux-ide.org>
3 * Copyright (C) 2003 Red Hat <alan@redhat.com>
5 */
7 #include <linux/module.h>
8 #include <linux/types.h>
9 #include <linux/string.h>
10 #include <linux/kernel.h>
11 #include <linux/timer.h>
12 #include <linux/mm.h>
13 #include <linux/interrupt.h>
14 #include <linux/major.h>
15 #include <linux/errno.h>
16 #include <linux/genhd.h>
17 #include <linux/blkpg.h>
18 #include <linux/slab.h>
19 #include <linux/pci.h>
20 #include <linux/delay.h>
21 #include <linux/hdreg.h>
22 #include <linux/ide.h>
23 #include <linux/bitops.h>
24 #include <linux/nmi.h>
26 #include <asm/byteorder.h>
27 #include <asm/irq.h>
28 #include <asm/uaccess.h>
29 #include <asm/io.h>
32 * Conventional PIO operations for ATA devices
35 static u8 ide_inb (unsigned long port)
37 return (u8) inb(port);
40 static u16 ide_inw (unsigned long port)
42 return (u16) inw(port);
45 static void ide_insw (unsigned long port, void *addr, u32 count)
47 insw(port, addr, count);
50 static void ide_insl (unsigned long port, void *addr, u32 count)
52 insl(port, addr, count);
55 static void ide_outb (u8 val, unsigned long port)
57 outb(val, port);
60 static void ide_outbsync (ide_drive_t *drive, u8 addr, unsigned long port)
62 outb(addr, port);
65 static void ide_outw (u16 val, unsigned long port)
67 outw(val, port);
70 static void ide_outsw (unsigned long port, void *addr, u32 count)
72 outsw(port, addr, count);
75 static void ide_outsl (unsigned long port, void *addr, u32 count)
77 outsl(port, addr, count);
80 void default_hwif_iops (ide_hwif_t *hwif)
82 hwif->OUTB = ide_outb;
83 hwif->OUTBSYNC = ide_outbsync;
84 hwif->OUTW = ide_outw;
85 hwif->OUTSW = ide_outsw;
86 hwif->OUTSL = ide_outsl;
87 hwif->INB = ide_inb;
88 hwif->INW = ide_inw;
89 hwif->INSW = ide_insw;
90 hwif->INSL = ide_insl;
94 * MMIO operations, typically used for SATA controllers
97 static u8 ide_mm_inb (unsigned long port)
99 return (u8) readb((void __iomem *) port);
102 static u16 ide_mm_inw (unsigned long port)
104 return (u16) readw((void __iomem *) port);
107 static void ide_mm_insw (unsigned long port, void *addr, u32 count)
109 __ide_mm_insw((void __iomem *) port, addr, count);
112 static void ide_mm_insl (unsigned long port, void *addr, u32 count)
114 __ide_mm_insl((void __iomem *) port, addr, count);
117 static void ide_mm_outb (u8 value, unsigned long port)
119 writeb(value, (void __iomem *) port);
122 static void ide_mm_outbsync (ide_drive_t *drive, u8 value, unsigned long port)
124 writeb(value, (void __iomem *) port);
127 static void ide_mm_outw (u16 value, unsigned long port)
129 writew(value, (void __iomem *) port);
132 static void ide_mm_outsw (unsigned long port, void *addr, u32 count)
134 __ide_mm_outsw((void __iomem *) port, addr, count);
137 static void ide_mm_outsl (unsigned long port, void *addr, u32 count)
139 __ide_mm_outsl((void __iomem *) port, addr, count);
142 void default_hwif_mmiops (ide_hwif_t *hwif)
144 hwif->OUTB = ide_mm_outb;
145 /* Most systems will need to override OUTBSYNC, alas however
146 this one is controller specific! */
147 hwif->OUTBSYNC = ide_mm_outbsync;
148 hwif->OUTW = ide_mm_outw;
149 hwif->OUTSW = ide_mm_outsw;
150 hwif->OUTSL = ide_mm_outsl;
151 hwif->INB = ide_mm_inb;
152 hwif->INW = ide_mm_inw;
153 hwif->INSW = ide_mm_insw;
154 hwif->INSL = ide_mm_insl;
157 EXPORT_SYMBOL(default_hwif_mmiops);
159 void SELECT_DRIVE (ide_drive_t *drive)
161 if (HWIF(drive)->selectproc)
162 HWIF(drive)->selectproc(drive);
163 HWIF(drive)->OUTB(drive->select.all, IDE_SELECT_REG);
166 void SELECT_MASK (ide_drive_t *drive, int mask)
168 if (HWIF(drive)->maskproc)
169 HWIF(drive)->maskproc(drive, mask);
173 * Some localbus EIDE interfaces require a special access sequence
174 * when using 32-bit I/O instructions to transfer data. We call this
175 * the "vlb_sync" sequence, which consists of three successive reads
176 * of the sector count register location, with interrupts disabled
177 * to ensure that the reads all happen together.
179 static void ata_vlb_sync(ide_drive_t *drive, unsigned long port)
181 (void) HWIF(drive)->INB(port);
182 (void) HWIF(drive)->INB(port);
183 (void) HWIF(drive)->INB(port);
187 * This is used for most PIO data transfers *from* the IDE interface
189 static void ata_input_data(ide_drive_t *drive, void *buffer, u32 wcount)
191 ide_hwif_t *hwif = HWIF(drive);
192 u8 io_32bit = drive->io_32bit;
194 if (io_32bit) {
195 if (io_32bit & 2) {
196 unsigned long flags;
197 local_irq_save(flags);
198 ata_vlb_sync(drive, IDE_NSECTOR_REG);
199 hwif->INSL(IDE_DATA_REG, buffer, wcount);
200 local_irq_restore(flags);
201 } else
202 hwif->INSL(IDE_DATA_REG, buffer, wcount);
203 } else {
204 hwif->INSW(IDE_DATA_REG, buffer, wcount<<1);
209 * This is used for most PIO data transfers *to* the IDE interface
211 static void ata_output_data(ide_drive_t *drive, void *buffer, u32 wcount)
213 ide_hwif_t *hwif = HWIF(drive);
214 u8 io_32bit = drive->io_32bit;
216 if (io_32bit) {
217 if (io_32bit & 2) {
218 unsigned long flags;
219 local_irq_save(flags);
220 ata_vlb_sync(drive, IDE_NSECTOR_REG);
221 hwif->OUTSL(IDE_DATA_REG, buffer, wcount);
222 local_irq_restore(flags);
223 } else
224 hwif->OUTSL(IDE_DATA_REG, buffer, wcount);
225 } else {
226 hwif->OUTSW(IDE_DATA_REG, buffer, wcount<<1);
231 * The following routines are mainly used by the ATAPI drivers.
233 * These routines will round up any request for an odd number of bytes,
234 * so if an odd bytecount is specified, be sure that there's at least one
235 * extra byte allocated for the buffer.
238 static void atapi_input_bytes(ide_drive_t *drive, void *buffer, u32 bytecount)
240 ide_hwif_t *hwif = HWIF(drive);
242 ++bytecount;
243 #if defined(CONFIG_ATARI) || defined(CONFIG_Q40)
244 if (MACH_IS_ATARI || MACH_IS_Q40) {
245 /* Atari has a byte-swapped IDE interface */
246 insw_swapw(IDE_DATA_REG, buffer, bytecount / 2);
247 return;
249 #endif /* CONFIG_ATARI || CONFIG_Q40 */
250 hwif->ata_input_data(drive, buffer, bytecount / 4);
251 if ((bytecount & 0x03) >= 2)
252 hwif->INSW(IDE_DATA_REG, ((u8 *)buffer)+(bytecount & ~0x03), 1);
255 static void atapi_output_bytes(ide_drive_t *drive, void *buffer, u32 bytecount)
257 ide_hwif_t *hwif = HWIF(drive);
259 ++bytecount;
260 #if defined(CONFIG_ATARI) || defined(CONFIG_Q40)
261 if (MACH_IS_ATARI || MACH_IS_Q40) {
262 /* Atari has a byte-swapped IDE interface */
263 outsw_swapw(IDE_DATA_REG, buffer, bytecount / 2);
264 return;
266 #endif /* CONFIG_ATARI || CONFIG_Q40 */
267 hwif->ata_output_data(drive, buffer, bytecount / 4);
268 if ((bytecount & 0x03) >= 2)
269 hwif->OUTSW(IDE_DATA_REG, ((u8*)buffer)+(bytecount & ~0x03), 1);
272 void default_hwif_transport(ide_hwif_t *hwif)
274 hwif->ata_input_data = ata_input_data;
275 hwif->ata_output_data = ata_output_data;
276 hwif->atapi_input_bytes = atapi_input_bytes;
277 hwif->atapi_output_bytes = atapi_output_bytes;
280 void ide_fix_driveid (struct hd_driveid *id)
282 #ifndef __LITTLE_ENDIAN
283 # ifdef __BIG_ENDIAN
284 int i;
285 u16 *stringcast;
287 id->config = __le16_to_cpu(id->config);
288 id->cyls = __le16_to_cpu(id->cyls);
289 id->reserved2 = __le16_to_cpu(id->reserved2);
290 id->heads = __le16_to_cpu(id->heads);
291 id->track_bytes = __le16_to_cpu(id->track_bytes);
292 id->sector_bytes = __le16_to_cpu(id->sector_bytes);
293 id->sectors = __le16_to_cpu(id->sectors);
294 id->vendor0 = __le16_to_cpu(id->vendor0);
295 id->vendor1 = __le16_to_cpu(id->vendor1);
296 id->vendor2 = __le16_to_cpu(id->vendor2);
297 stringcast = (u16 *)&id->serial_no[0];
298 for (i = 0; i < (20/2); i++)
299 stringcast[i] = __le16_to_cpu(stringcast[i]);
300 id->buf_type = __le16_to_cpu(id->buf_type);
301 id->buf_size = __le16_to_cpu(id->buf_size);
302 id->ecc_bytes = __le16_to_cpu(id->ecc_bytes);
303 stringcast = (u16 *)&id->fw_rev[0];
304 for (i = 0; i < (8/2); i++)
305 stringcast[i] = __le16_to_cpu(stringcast[i]);
306 stringcast = (u16 *)&id->model[0];
307 for (i = 0; i < (40/2); i++)
308 stringcast[i] = __le16_to_cpu(stringcast[i]);
309 id->dword_io = __le16_to_cpu(id->dword_io);
310 id->reserved50 = __le16_to_cpu(id->reserved50);
311 id->field_valid = __le16_to_cpu(id->field_valid);
312 id->cur_cyls = __le16_to_cpu(id->cur_cyls);
313 id->cur_heads = __le16_to_cpu(id->cur_heads);
314 id->cur_sectors = __le16_to_cpu(id->cur_sectors);
315 id->cur_capacity0 = __le16_to_cpu(id->cur_capacity0);
316 id->cur_capacity1 = __le16_to_cpu(id->cur_capacity1);
317 id->lba_capacity = __le32_to_cpu(id->lba_capacity);
318 id->dma_1word = __le16_to_cpu(id->dma_1word);
319 id->dma_mword = __le16_to_cpu(id->dma_mword);
320 id->eide_pio_modes = __le16_to_cpu(id->eide_pio_modes);
321 id->eide_dma_min = __le16_to_cpu(id->eide_dma_min);
322 id->eide_dma_time = __le16_to_cpu(id->eide_dma_time);
323 id->eide_pio = __le16_to_cpu(id->eide_pio);
324 id->eide_pio_iordy = __le16_to_cpu(id->eide_pio_iordy);
325 for (i = 0; i < 2; ++i)
326 id->words69_70[i] = __le16_to_cpu(id->words69_70[i]);
327 for (i = 0; i < 4; ++i)
328 id->words71_74[i] = __le16_to_cpu(id->words71_74[i]);
329 id->queue_depth = __le16_to_cpu(id->queue_depth);
330 for (i = 0; i < 4; ++i)
331 id->words76_79[i] = __le16_to_cpu(id->words76_79[i]);
332 id->major_rev_num = __le16_to_cpu(id->major_rev_num);
333 id->minor_rev_num = __le16_to_cpu(id->minor_rev_num);
334 id->command_set_1 = __le16_to_cpu(id->command_set_1);
335 id->command_set_2 = __le16_to_cpu(id->command_set_2);
336 id->cfsse = __le16_to_cpu(id->cfsse);
337 id->cfs_enable_1 = __le16_to_cpu(id->cfs_enable_1);
338 id->cfs_enable_2 = __le16_to_cpu(id->cfs_enable_2);
339 id->csf_default = __le16_to_cpu(id->csf_default);
340 id->dma_ultra = __le16_to_cpu(id->dma_ultra);
341 id->trseuc = __le16_to_cpu(id->trseuc);
342 id->trsEuc = __le16_to_cpu(id->trsEuc);
343 id->CurAPMvalues = __le16_to_cpu(id->CurAPMvalues);
344 id->mprc = __le16_to_cpu(id->mprc);
345 id->hw_config = __le16_to_cpu(id->hw_config);
346 id->acoustic = __le16_to_cpu(id->acoustic);
347 id->msrqs = __le16_to_cpu(id->msrqs);
348 id->sxfert = __le16_to_cpu(id->sxfert);
349 id->sal = __le16_to_cpu(id->sal);
350 id->spg = __le32_to_cpu(id->spg);
351 id->lba_capacity_2 = __le64_to_cpu(id->lba_capacity_2);
352 for (i = 0; i < 22; i++)
353 id->words104_125[i] = __le16_to_cpu(id->words104_125[i]);
354 id->last_lun = __le16_to_cpu(id->last_lun);
355 id->word127 = __le16_to_cpu(id->word127);
356 id->dlf = __le16_to_cpu(id->dlf);
357 id->csfo = __le16_to_cpu(id->csfo);
358 for (i = 0; i < 26; i++)
359 id->words130_155[i] = __le16_to_cpu(id->words130_155[i]);
360 id->word156 = __le16_to_cpu(id->word156);
361 for (i = 0; i < 3; i++)
362 id->words157_159[i] = __le16_to_cpu(id->words157_159[i]);
363 id->cfa_power = __le16_to_cpu(id->cfa_power);
364 for (i = 0; i < 14; i++)
365 id->words161_175[i] = __le16_to_cpu(id->words161_175[i]);
366 for (i = 0; i < 31; i++)
367 id->words176_205[i] = __le16_to_cpu(id->words176_205[i]);
368 for (i = 0; i < 48; i++)
369 id->words206_254[i] = __le16_to_cpu(id->words206_254[i]);
370 id->integrity_word = __le16_to_cpu(id->integrity_word);
371 # else
372 # error "Please fix <asm/byteorder.h>"
373 # endif
374 #endif
378 * ide_fixstring() cleans up and (optionally) byte-swaps a text string,
379 * removing leading/trailing blanks and compressing internal blanks.
380 * It is primarily used to tidy up the model name/number fields as
381 * returned by the WIN_[P]IDENTIFY commands.
384 void ide_fixstring (u8 *s, const int bytecount, const int byteswap)
386 u8 *p = s, *end = &s[bytecount & ~1]; /* bytecount must be even */
388 if (byteswap) {
389 /* convert from big-endian to host byte order */
390 for (p = end ; p != s;) {
391 unsigned short *pp = (unsigned short *) (p -= 2);
392 *pp = ntohs(*pp);
395 /* strip leading blanks */
396 while (s != end && *s == ' ')
397 ++s;
398 /* compress internal blanks and strip trailing blanks */
399 while (s != end && *s) {
400 if (*s++ != ' ' || (s != end && *s && *s != ' '))
401 *p++ = *(s-1);
403 /* wipe out trailing garbage */
404 while (p != end)
405 *p++ = '\0';
408 EXPORT_SYMBOL(ide_fixstring);
411 * Needed for PCI irq sharing
413 int drive_is_ready (ide_drive_t *drive)
415 ide_hwif_t *hwif = HWIF(drive);
416 u8 stat = 0;
418 if (drive->waiting_for_dma)
419 return hwif->ide_dma_test_irq(drive);
421 #if 0
422 /* need to guarantee 400ns since last command was issued */
423 udelay(1);
424 #endif
427 * We do a passive status test under shared PCI interrupts on
428 * cards that truly share the ATA side interrupt, but may also share
429 * an interrupt with another pci card/device. We make no assumptions
430 * about possible isa-pnp and pci-pnp issues yet.
432 if (IDE_CONTROL_REG)
433 stat = hwif->INB(IDE_ALTSTATUS_REG);
434 else
435 /* Note: this may clear a pending IRQ!! */
436 stat = hwif->INB(IDE_STATUS_REG);
438 if (stat & BUSY_STAT)
439 /* drive busy: definitely not interrupting */
440 return 0;
442 /* drive ready: *might* be interrupting */
443 return 1;
446 EXPORT_SYMBOL(drive_is_ready);
449 * This routine busy-waits for the drive status to be not "busy".
450 * It then checks the status for all of the "good" bits and none
451 * of the "bad" bits, and if all is okay it returns 0. All other
452 * cases return error -- caller may then invoke ide_error().
454 * This routine should get fixed to not hog the cpu during extra long waits..
455 * That could be done by busy-waiting for the first jiffy or two, and then
456 * setting a timer to wake up at half second intervals thereafter,
457 * until timeout is achieved, before timing out.
459 static int __ide_wait_stat(ide_drive_t *drive, u8 good, u8 bad, unsigned long timeout, u8 *rstat)
461 ide_hwif_t *hwif = drive->hwif;
462 unsigned long flags;
463 int i;
464 u8 stat;
466 udelay(1); /* spec allows drive 400ns to assert "BUSY" */
467 if ((stat = hwif->INB(IDE_STATUS_REG)) & BUSY_STAT) {
468 local_irq_set(flags);
469 timeout += jiffies;
470 while ((stat = hwif->INB(IDE_STATUS_REG)) & BUSY_STAT) {
471 if (time_after(jiffies, timeout)) {
473 * One last read after the timeout in case
474 * heavy interrupt load made us not make any
475 * progress during the timeout..
477 stat = hwif->INB(IDE_STATUS_REG);
478 if (!(stat & BUSY_STAT))
479 break;
481 local_irq_restore(flags);
482 *rstat = stat;
483 return -EBUSY;
486 local_irq_restore(flags);
489 * Allow status to settle, then read it again.
490 * A few rare drives vastly violate the 400ns spec here,
491 * so we'll wait up to 10usec for a "good" status
492 * rather than expensively fail things immediately.
493 * This fix courtesy of Matthew Faupel & Niccolo Rigacci.
495 for (i = 0; i < 10; i++) {
496 udelay(1);
497 if (OK_STAT((stat = hwif->INB(IDE_STATUS_REG)), good, bad)) {
498 *rstat = stat;
499 return 0;
502 *rstat = stat;
503 return -EFAULT;
507 * In case of error returns error value after doing "*startstop = ide_error()".
508 * The caller should return the updated value of "startstop" in this case,
509 * "startstop" is unchanged when the function returns 0.
511 int ide_wait_stat(ide_startstop_t *startstop, ide_drive_t *drive, u8 good, u8 bad, unsigned long timeout)
513 int err;
514 u8 stat;
516 /* bail early if we've exceeded max_failures */
517 if (drive->max_failures && (drive->failures > drive->max_failures)) {
518 *startstop = ide_stopped;
519 return 1;
522 err = __ide_wait_stat(drive, good, bad, timeout, &stat);
524 if (err) {
525 char *s = (err == -EBUSY) ? "status timeout" : "status error";
526 *startstop = ide_error(drive, s, stat);
529 return err;
532 EXPORT_SYMBOL(ide_wait_stat);
535 * ide_in_drive_list - look for drive in black/white list
536 * @id: drive identifier
537 * @drive_table: list to inspect
539 * Look for a drive in the blacklist and the whitelist tables
540 * Returns 1 if the drive is found in the table.
543 int ide_in_drive_list(struct hd_driveid *id, const struct drive_list_entry *drive_table)
545 for ( ; drive_table->id_model; drive_table++)
546 if ((!strcmp(drive_table->id_model, id->model)) &&
547 (!drive_table->id_firmware ||
548 strstr(id->fw_rev, drive_table->id_firmware)))
549 return 1;
550 return 0;
553 EXPORT_SYMBOL_GPL(ide_in_drive_list);
556 * Early UDMA66 devices don't set bit14 to 1, only bit13 is valid.
557 * We list them here and depend on the device side cable detection for them.
559 * Some optical devices with the buggy firmwares have the same problem.
561 static const struct drive_list_entry ivb_list[] = {
562 { "QUANTUM FIREBALLlct10 05" , "A03.0900" },
563 { "TSSTcorp CDDVDW SH-S202J" , "SB00" },
564 { "TSSTcorp CDDVDW SH-S202J" , "SB01" },
565 { "TSSTcorp CDDVDW SH-S202N" , "SB00" },
566 { "TSSTcorp CDDVDW SH-S202N" , "SB01" },
567 { NULL , NULL }
571 * All hosts that use the 80c ribbon must use!
572 * The name is derived from upper byte of word 93 and the 80c ribbon.
574 u8 eighty_ninty_three (ide_drive_t *drive)
576 ide_hwif_t *hwif = drive->hwif;
577 struct hd_driveid *id = drive->id;
578 int ivb = ide_in_drive_list(id, ivb_list);
580 if (hwif->cbl == ATA_CBL_PATA40_SHORT)
581 return 1;
583 if (ivb)
584 printk(KERN_DEBUG "%s: skipping word 93 validity check\n",
585 drive->name);
587 if (ide_dev_is_sata(id) && !ivb)
588 return 1;
590 if (hwif->cbl != ATA_CBL_PATA80 && !ivb)
591 goto no_80w;
594 * FIXME:
595 * - force bit13 (80c cable present) check also for !ivb devices
596 * (unless the slave device is pre-ATA3)
598 if ((id->hw_config & 0x4000) || (ivb && (id->hw_config & 0x2000)))
599 return 1;
601 no_80w:
602 if (drive->udma33_warned == 1)
603 return 0;
605 printk(KERN_WARNING "%s: %s side 80-wire cable detection failed, "
606 "limiting max speed to UDMA33\n",
607 drive->name,
608 hwif->cbl == ATA_CBL_PATA80 ? "drive" : "host");
610 drive->udma33_warned = 1;
612 return 0;
615 int ide_ata66_check (ide_drive_t *drive, ide_task_t *args)
617 if (args->tf.command == WIN_SETFEATURES &&
618 args->tf.nsect > XFER_UDMA_2 &&
619 args->tf.feature == SETFEATURES_XFER) {
620 if (eighty_ninty_three(drive) == 0) {
621 printk(KERN_WARNING "%s: UDMA speeds >UDMA33 cannot "
622 "be set\n", drive->name);
623 return 1;
627 return 0;
630 #ifdef CONFIG_BLK_DEV_IDEDMA
631 static u8 ide_auto_reduce_xfer (ide_drive_t *drive)
633 if (!drive->crc_count)
634 return drive->current_speed;
635 drive->crc_count = 0;
637 switch(drive->current_speed) {
638 case XFER_UDMA_7: return XFER_UDMA_6;
639 case XFER_UDMA_6: return XFER_UDMA_5;
640 case XFER_UDMA_5: return XFER_UDMA_4;
641 case XFER_UDMA_4: return XFER_UDMA_3;
642 case XFER_UDMA_3: return XFER_UDMA_2;
643 case XFER_UDMA_2: return XFER_UDMA_1;
644 case XFER_UDMA_1: return XFER_UDMA_0;
646 * OOPS we do not goto non Ultra DMA modes
647 * without iCRC's available we force
648 * the system to PIO and make the user
649 * invoke the ATA-1 ATA-2 DMA modes.
651 case XFER_UDMA_0:
652 default: return XFER_PIO_4;
655 #endif /* CONFIG_BLK_DEV_IDEDMA */
657 int ide_driveid_update(ide_drive_t *drive)
659 ide_hwif_t *hwif = drive->hwif;
660 struct hd_driveid *id;
661 unsigned long timeout, flags;
664 * Re-read drive->id for possible DMA mode
665 * change (copied from ide-probe.c)
668 SELECT_MASK(drive, 1);
669 ide_set_irq(drive, 1);
670 msleep(50);
671 hwif->OUTB(WIN_IDENTIFY, IDE_COMMAND_REG);
672 timeout = jiffies + WAIT_WORSTCASE;
673 do {
674 if (time_after(jiffies, timeout)) {
675 SELECT_MASK(drive, 0);
676 return 0; /* drive timed-out */
678 msleep(50); /* give drive a breather */
679 } while (hwif->INB(IDE_ALTSTATUS_REG) & BUSY_STAT);
680 msleep(50); /* wait for IRQ and DRQ_STAT */
681 if (!OK_STAT(hwif->INB(IDE_STATUS_REG),DRQ_STAT,BAD_R_STAT)) {
682 SELECT_MASK(drive, 0);
683 printk("%s: CHECK for good STATUS\n", drive->name);
684 return 0;
686 local_irq_save(flags);
687 SELECT_MASK(drive, 0);
688 id = kmalloc(SECTOR_WORDS*4, GFP_ATOMIC);
689 if (!id) {
690 local_irq_restore(flags);
691 return 0;
693 ata_input_data(drive, id, SECTOR_WORDS);
694 (void) hwif->INB(IDE_STATUS_REG); /* clear drive IRQ */
695 local_irq_enable();
696 local_irq_restore(flags);
697 ide_fix_driveid(id);
698 if (id) {
699 drive->id->dma_ultra = id->dma_ultra;
700 drive->id->dma_mword = id->dma_mword;
701 drive->id->dma_1word = id->dma_1word;
702 /* anything more ? */
703 kfree(id);
705 if (drive->using_dma && ide_id_dma_bug(drive))
706 ide_dma_off(drive);
709 return 1;
712 int ide_config_drive_speed(ide_drive_t *drive, u8 speed)
714 ide_hwif_t *hwif = drive->hwif;
715 int error = 0;
716 u8 stat;
718 // while (HWGROUP(drive)->busy)
719 // msleep(50);
721 #ifdef CONFIG_BLK_DEV_IDEDMA
722 if (hwif->dma_host_set) /* check if host supports DMA */
723 hwif->dma_host_set(drive, 0);
724 #endif
726 /* Skip setting PIO flow-control modes on pre-EIDE drives */
727 if ((speed & 0xf8) == XFER_PIO_0 && !(drive->id->capability & 0x08))
728 goto skip;
731 * Don't use ide_wait_cmd here - it will
732 * attempt to set_geometry and recalibrate,
733 * but for some reason these don't work at
734 * this point (lost interrupt).
737 * Select the drive, and issue the SETFEATURES command
739 disable_irq_nosync(hwif->irq);
742 * FIXME: we race against the running IRQ here if
743 * this is called from non IRQ context. If we use
744 * disable_irq() we hang on the error path. Work
745 * is needed.
748 udelay(1);
749 SELECT_DRIVE(drive);
750 SELECT_MASK(drive, 0);
751 udelay(1);
752 ide_set_irq(drive, 0);
753 hwif->OUTB(speed, IDE_NSECTOR_REG);
754 hwif->OUTB(SETFEATURES_XFER, IDE_FEATURE_REG);
755 hwif->OUTBSYNC(drive, WIN_SETFEATURES, IDE_COMMAND_REG);
756 if (drive->quirk_list == 2)
757 ide_set_irq(drive, 1);
759 error = __ide_wait_stat(drive, drive->ready_stat,
760 BUSY_STAT|DRQ_STAT|ERR_STAT,
761 WAIT_CMD, &stat);
763 SELECT_MASK(drive, 0);
765 enable_irq(hwif->irq);
767 if (error) {
768 (void) ide_dump_status(drive, "set_drive_speed_status", stat);
769 return error;
772 drive->id->dma_ultra &= ~0xFF00;
773 drive->id->dma_mword &= ~0x0F00;
774 drive->id->dma_1word &= ~0x0F00;
776 skip:
777 #ifdef CONFIG_BLK_DEV_IDEDMA
778 if ((speed >= XFER_SW_DMA_0 || (hwif->host_flags & IDE_HFLAG_VDMA)) &&
779 drive->using_dma)
780 hwif->dma_host_set(drive, 1);
781 else if (hwif->dma_host_set) /* check if host supports DMA */
782 ide_dma_off_quietly(drive);
783 #endif
785 switch(speed) {
786 case XFER_UDMA_7: drive->id->dma_ultra |= 0x8080; break;
787 case XFER_UDMA_6: drive->id->dma_ultra |= 0x4040; break;
788 case XFER_UDMA_5: drive->id->dma_ultra |= 0x2020; break;
789 case XFER_UDMA_4: drive->id->dma_ultra |= 0x1010; break;
790 case XFER_UDMA_3: drive->id->dma_ultra |= 0x0808; break;
791 case XFER_UDMA_2: drive->id->dma_ultra |= 0x0404; break;
792 case XFER_UDMA_1: drive->id->dma_ultra |= 0x0202; break;
793 case XFER_UDMA_0: drive->id->dma_ultra |= 0x0101; break;
794 case XFER_MW_DMA_2: drive->id->dma_mword |= 0x0404; break;
795 case XFER_MW_DMA_1: drive->id->dma_mword |= 0x0202; break;
796 case XFER_MW_DMA_0: drive->id->dma_mword |= 0x0101; break;
797 case XFER_SW_DMA_2: drive->id->dma_1word |= 0x0404; break;
798 case XFER_SW_DMA_1: drive->id->dma_1word |= 0x0202; break;
799 case XFER_SW_DMA_0: drive->id->dma_1word |= 0x0101; break;
800 default: break;
802 if (!drive->init_speed)
803 drive->init_speed = speed;
804 drive->current_speed = speed;
805 return error;
809 * This should get invoked any time we exit the driver to
810 * wait for an interrupt response from a drive. handler() points
811 * at the appropriate code to handle the next interrupt, and a
812 * timer is started to prevent us from waiting forever in case
813 * something goes wrong (see the ide_timer_expiry() handler later on).
815 * See also ide_execute_command
817 static void __ide_set_handler (ide_drive_t *drive, ide_handler_t *handler,
818 unsigned int timeout, ide_expiry_t *expiry)
820 ide_hwgroup_t *hwgroup = HWGROUP(drive);
822 if (hwgroup->handler != NULL) {
823 printk(KERN_CRIT "%s: ide_set_handler: handler not null; "
824 "old=%p, new=%p\n",
825 drive->name, hwgroup->handler, handler);
827 hwgroup->handler = handler;
828 hwgroup->expiry = expiry;
829 hwgroup->timer.expires = jiffies + timeout;
830 hwgroup->req_gen_timer = hwgroup->req_gen;
831 add_timer(&hwgroup->timer);
834 void ide_set_handler (ide_drive_t *drive, ide_handler_t *handler,
835 unsigned int timeout, ide_expiry_t *expiry)
837 unsigned long flags;
838 spin_lock_irqsave(&ide_lock, flags);
839 __ide_set_handler(drive, handler, timeout, expiry);
840 spin_unlock_irqrestore(&ide_lock, flags);
843 EXPORT_SYMBOL(ide_set_handler);
846 * ide_execute_command - execute an IDE command
847 * @drive: IDE drive to issue the command against
848 * @command: command byte to write
849 * @handler: handler for next phase
850 * @timeout: timeout for command
851 * @expiry: handler to run on timeout
853 * Helper function to issue an IDE command. This handles the
854 * atomicity requirements, command timing and ensures that the
855 * handler and IRQ setup do not race. All IDE command kick off
856 * should go via this function or do equivalent locking.
859 void ide_execute_command(ide_drive_t *drive, u8 cmd, ide_handler_t *handler,
860 unsigned timeout, ide_expiry_t *expiry)
862 unsigned long flags;
863 ide_hwgroup_t *hwgroup = HWGROUP(drive);
864 ide_hwif_t *hwif = HWIF(drive);
866 spin_lock_irqsave(&ide_lock, flags);
867 BUG_ON(hwgroup->handler);
868 __ide_set_handler(drive, handler, timeout, expiry);
869 hwif->OUTBSYNC(drive, cmd, IDE_COMMAND_REG);
871 * Drive takes 400nS to respond, we must avoid the IRQ being
872 * serviced before that.
874 * FIXME: we could skip this delay with care on non shared devices
876 ndelay(400);
877 spin_unlock_irqrestore(&ide_lock, flags);
880 EXPORT_SYMBOL(ide_execute_command);
883 /* needed below */
884 static ide_startstop_t do_reset1 (ide_drive_t *, int);
887 * atapi_reset_pollfunc() gets invoked to poll the interface for completion every 50ms
888 * during an atapi drive reset operation. If the drive has not yet responded,
889 * and we have not yet hit our maximum waiting time, then the timer is restarted
890 * for another 50ms.
892 static ide_startstop_t atapi_reset_pollfunc (ide_drive_t *drive)
894 ide_hwgroup_t *hwgroup = HWGROUP(drive);
895 ide_hwif_t *hwif = HWIF(drive);
896 u8 stat;
898 SELECT_DRIVE(drive);
899 udelay (10);
901 if (OK_STAT(stat = hwif->INB(IDE_STATUS_REG), 0, BUSY_STAT)) {
902 printk("%s: ATAPI reset complete\n", drive->name);
903 } else {
904 if (time_before(jiffies, hwgroup->poll_timeout)) {
905 BUG_ON(HWGROUP(drive)->handler != NULL);
906 ide_set_handler(drive, &atapi_reset_pollfunc, HZ/20, NULL);
907 /* continue polling */
908 return ide_started;
910 /* end of polling */
911 hwgroup->polling = 0;
912 printk("%s: ATAPI reset timed-out, status=0x%02x\n",
913 drive->name, stat);
914 /* do it the old fashioned way */
915 return do_reset1(drive, 1);
917 /* done polling */
918 hwgroup->polling = 0;
919 hwgroup->resetting = 0;
920 return ide_stopped;
924 * reset_pollfunc() gets invoked to poll the interface for completion every 50ms
925 * during an ide reset operation. If the drives have not yet responded,
926 * and we have not yet hit our maximum waiting time, then the timer is restarted
927 * for another 50ms.
929 static ide_startstop_t reset_pollfunc (ide_drive_t *drive)
931 ide_hwgroup_t *hwgroup = HWGROUP(drive);
932 ide_hwif_t *hwif = HWIF(drive);
933 u8 tmp;
935 if (hwif->reset_poll != NULL) {
936 if (hwif->reset_poll(drive)) {
937 printk(KERN_ERR "%s: host reset_poll failure for %s.\n",
938 hwif->name, drive->name);
939 return ide_stopped;
943 if (!OK_STAT(tmp = hwif->INB(IDE_STATUS_REG), 0, BUSY_STAT)) {
944 if (time_before(jiffies, hwgroup->poll_timeout)) {
945 BUG_ON(HWGROUP(drive)->handler != NULL);
946 ide_set_handler(drive, &reset_pollfunc, HZ/20, NULL);
947 /* continue polling */
948 return ide_started;
950 printk("%s: reset timed-out, status=0x%02x\n", hwif->name, tmp);
951 drive->failures++;
952 } else {
953 printk("%s: reset: ", hwif->name);
954 if ((tmp = hwif->INB(IDE_ERROR_REG)) == 1) {
955 printk("success\n");
956 drive->failures = 0;
957 } else {
958 drive->failures++;
959 printk("master: ");
960 switch (tmp & 0x7f) {
961 case 1: printk("passed");
962 break;
963 case 2: printk("formatter device error");
964 break;
965 case 3: printk("sector buffer error");
966 break;
967 case 4: printk("ECC circuitry error");
968 break;
969 case 5: printk("controlling MPU error");
970 break;
971 default:printk("error (0x%02x?)", tmp);
973 if (tmp & 0x80)
974 printk("; slave: failed");
975 printk("\n");
978 hwgroup->polling = 0; /* done polling */
979 hwgroup->resetting = 0; /* done reset attempt */
980 return ide_stopped;
983 static void check_dma_crc(ide_drive_t *drive)
985 #ifdef CONFIG_BLK_DEV_IDEDMA
986 if (drive->crc_count) {
987 ide_dma_off_quietly(drive);
988 ide_set_xfer_rate(drive, ide_auto_reduce_xfer(drive));
989 if (drive->current_speed >= XFER_SW_DMA_0)
990 ide_dma_on(drive);
991 } else
992 ide_dma_off(drive);
993 #endif
996 static void ide_disk_pre_reset(ide_drive_t *drive)
998 int legacy = (drive->id->cfs_enable_2 & 0x0400) ? 0 : 1;
1000 drive->special.all = 0;
1001 drive->special.b.set_geometry = legacy;
1002 drive->special.b.recalibrate = legacy;
1003 drive->mult_count = 0;
1004 if (!drive->keep_settings && !drive->using_dma)
1005 drive->mult_req = 0;
1006 if (drive->mult_req != drive->mult_count)
1007 drive->special.b.set_multmode = 1;
1010 static void pre_reset(ide_drive_t *drive)
1012 if (drive->media == ide_disk)
1013 ide_disk_pre_reset(drive);
1014 else
1015 drive->post_reset = 1;
1017 if (!drive->keep_settings) {
1018 if (drive->using_dma) {
1019 check_dma_crc(drive);
1020 } else {
1021 drive->unmask = 0;
1022 drive->io_32bit = 0;
1024 return;
1026 if (drive->using_dma)
1027 check_dma_crc(drive);
1029 if (HWIF(drive)->pre_reset != NULL)
1030 HWIF(drive)->pre_reset(drive);
1032 if (drive->current_speed != 0xff)
1033 drive->desired_speed = drive->current_speed;
1034 drive->current_speed = 0xff;
1038 * do_reset1() attempts to recover a confused drive by resetting it.
1039 * Unfortunately, resetting a disk drive actually resets all devices on
1040 * the same interface, so it can really be thought of as resetting the
1041 * interface rather than resetting the drive.
1043 * ATAPI devices have their own reset mechanism which allows them to be
1044 * individually reset without clobbering other devices on the same interface.
1046 * Unfortunately, the IDE interface does not generate an interrupt to let
1047 * us know when the reset operation has finished, so we must poll for this.
1048 * Equally poor, though, is the fact that this may a very long time to complete,
1049 * (up to 30 seconds worstcase). So, instead of busy-waiting here for it,
1050 * we set a timer to poll at 50ms intervals.
1052 static ide_startstop_t do_reset1 (ide_drive_t *drive, int do_not_try_atapi)
1054 unsigned int unit;
1055 unsigned long flags;
1056 ide_hwif_t *hwif;
1057 ide_hwgroup_t *hwgroup;
1059 spin_lock_irqsave(&ide_lock, flags);
1060 hwif = HWIF(drive);
1061 hwgroup = HWGROUP(drive);
1063 /* We must not reset with running handlers */
1064 BUG_ON(hwgroup->handler != NULL);
1066 /* For an ATAPI device, first try an ATAPI SRST. */
1067 if (drive->media != ide_disk && !do_not_try_atapi) {
1068 hwgroup->resetting = 1;
1069 pre_reset(drive);
1070 SELECT_DRIVE(drive);
1071 udelay (20);
1072 hwif->OUTBSYNC(drive, WIN_SRST, IDE_COMMAND_REG);
1073 ndelay(400);
1074 hwgroup->poll_timeout = jiffies + WAIT_WORSTCASE;
1075 hwgroup->polling = 1;
1076 __ide_set_handler(drive, &atapi_reset_pollfunc, HZ/20, NULL);
1077 spin_unlock_irqrestore(&ide_lock, flags);
1078 return ide_started;
1082 * First, reset any device state data we were maintaining
1083 * for any of the drives on this interface.
1085 for (unit = 0; unit < MAX_DRIVES; ++unit)
1086 pre_reset(&hwif->drives[unit]);
1088 if (!IDE_CONTROL_REG) {
1089 spin_unlock_irqrestore(&ide_lock, flags);
1090 return ide_stopped;
1093 hwgroup->resetting = 1;
1095 * Note that we also set nIEN while resetting the device,
1096 * to mask unwanted interrupts from the interface during the reset.
1097 * However, due to the design of PC hardware, this will cause an
1098 * immediate interrupt due to the edge transition it produces.
1099 * This single interrupt gives us a "fast poll" for drives that
1100 * recover from reset very quickly, saving us the first 50ms wait time.
1102 /* set SRST and nIEN */
1103 hwif->OUTBSYNC(drive, drive->ctl|6,IDE_CONTROL_REG);
1104 /* more than enough time */
1105 udelay(10);
1106 if (drive->quirk_list == 2) {
1107 /* clear SRST and nIEN */
1108 hwif->OUTBSYNC(drive, drive->ctl, IDE_CONTROL_REG);
1109 } else {
1110 /* clear SRST, leave nIEN */
1111 hwif->OUTBSYNC(drive, drive->ctl|2, IDE_CONTROL_REG);
1113 /* more than enough time */
1114 udelay(10);
1115 hwgroup->poll_timeout = jiffies + WAIT_WORSTCASE;
1116 hwgroup->polling = 1;
1117 __ide_set_handler(drive, &reset_pollfunc, HZ/20, NULL);
1120 * Some weird controller like resetting themselves to a strange
1121 * state when the disks are reset this way. At least, the Winbond
1122 * 553 documentation says that
1124 if (hwif->resetproc)
1125 hwif->resetproc(drive);
1127 spin_unlock_irqrestore(&ide_lock, flags);
1128 return ide_started;
1132 * ide_do_reset() is the entry point to the drive/interface reset code.
1135 ide_startstop_t ide_do_reset (ide_drive_t *drive)
1137 return do_reset1(drive, 0);
1140 EXPORT_SYMBOL(ide_do_reset);
1143 * ide_wait_not_busy() waits for the currently selected device on the hwif
1144 * to report a non-busy status, see comments in ide_probe_port().
1146 int ide_wait_not_busy(ide_hwif_t *hwif, unsigned long timeout)
1148 u8 stat = 0;
1150 while(timeout--) {
1152 * Turn this into a schedule() sleep once I'm sure
1153 * about locking issues (2.5 work ?).
1155 mdelay(1);
1156 stat = hwif->INB(hwif->io_ports[IDE_STATUS_OFFSET]);
1157 if ((stat & BUSY_STAT) == 0)
1158 return 0;
1160 * Assume a value of 0xff means nothing is connected to
1161 * the interface and it doesn't implement the pull-down
1162 * resistor on D7.
1164 if (stat == 0xff)
1165 return -ENODEV;
1166 touch_softlockup_watchdog();
1167 touch_nmi_watchdog();
1169 return -EBUSY;
1172 EXPORT_SYMBOL_GPL(ide_wait_not_busy);